Plasma etching system and edge assembly for plasma etching system

Abstract

A plasma etching system and an edge assembly for a plasma etching system. The edge assembly includes a focus ring surrounding an edge portion of a mounting platform mounted within the plasma etching system. The focus ring includes: a lower step portion adjacent to an edge portion of the mounting platform, vertically extending from a bottom surface of the focus ring to a lower step top surface; and an upper step portion extending vertically from the bottom surface of the focus ring to the top surface of the upper step, and extending radially from the inside of the upper step to the outside of the upper step, away from the edge portion of the mounting platform. The focus ring is characterized in that a void is located in the upper stepped portion and extends peripherally along a perimeter of the focus ring.

Description

Technical Field

[0001] The present disclosure relates to a plasma etching system, and more particularly to a plasma etching system with an improved focus ring. Background Art

[0002] The semiconductor industry has experienced rapid growth due to the continuous improvement in the integration density of various electronic components (e.g., transistors, diodes, resistors, capacitors, etc.) In most cases, the improvement in integration density is achieved by iterative reduction of the minimum feature size, so that more components can be integrated into a specific area.

[0003] While some integrated device manufacturers (IDMs) design and manufacture integrated circuits (ICs) themselves, fabless semiconductor companies outsource semiconductor manufacturing to semiconductor fabrication plants or foundries. Semiconductor manufacturing consists of a series of processes in which device structures are manufactured by adding a series of structural layers to a substrate. This series of processes involves the deposition and removal of various dielectric, semiconductor, and metal layers. The area of ​​the metal layer to be deposited or removed is controlled by lithography. Each deposition and removal process is usually followed by cleaning and inspection steps. Therefore, both IDMs and foundries rely on a large number of semiconductor equipment and semiconductor manufacturing materials that are usually provided by suppliers. Customization or modification of these semiconductor equipment and semiconductor manufacturing materials is often necessary to improve flexibility, reliability, and cost-effectiveness. Utility Model Content

[0004] One aspect of the present disclosure is directed to an edge assembly for use in a plasma etching system. The edge assembly includes a focus ring that surrounds an edge portion of a mounting platform mounted within the plasma etching system. The focus ring includes a lower step portion adjacent to the edge portion of the mounting platform, the lower step portion extending vertically from a bottom surface of the focus ring to a top surface of the lower step. The focus ring also includes an upper step portion distal to the edge portion of the mounting platform, the upper step portion extending vertically from the bottom surface of the focus ring to the top surface of the upper step, and the upper step portion extending radially from an inner side of the upper step to an outer side of the upper step, wherein the lower step portion is connected to the upper step portion at an inner side of the upper step. The focus ring is characterized in that a gap is located in the upper step portion, and the gap extends peripherally along the periphery of the focus ring.

[0005] Another aspect of the present disclosure is directed to an edge assembly for use in a plasma etching system. The edge assembly includes a focus ring surrounding an edge portion of a mounting platform mounted in the plasma etching system. The focus ring includes an upper step portion, wherein the upper step portion is annular and extends vertically from a bottom surface of the focus ring to an upper step top surface, and wherein the upper step portion is characterized by having a cavity extending along a circumference of the upper step portion, and the cavity is characterized by having a cavity bottom surface that is coplanar with the bottom surface of the focus ring.

[0006] Another aspect of the present disclosure is directed to a plasma etching system, comprising a mounting platform and an edge assembly, wherein the edge assembly comprises a focus ring surrounding an edge portion of the mounting platform, wherein the focus ring is characterized by having a cavity extending along its periphery, and wherein the cavity is characterized by having a cavity bottom surface that is coplanar with a bottom surface of the focus ring. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] The aspects of the present disclosure are best understood from the following detailed description when read in conjunction with the accompanying drawings. It should be noted that, in accordance with standard industry practice, various features are not drawn to scale. In fact, the dimensions of these features may be arbitrarily increased or reduced based on the clarity of the discussion.

[0008] Figure 1 is a schematic cross-sectional view of an exemplary plasma etching system according to some embodiments;

[0009] Figure 2 is a schematic cross-sectional view illustrating an example edge component according to some embodiments;

[0010] Figure 3 is a top view illustrating an example edge assembly according to some embodiments;

[0011] Figure 4 is a schematic diagram illustrating an example plasma sheath region above a focus ring according to some embodiments;

[0012] Figure 5 is a schematic diagram illustrating an example equivalent circuit of a focus ring and a plasma sheath according to some embodiments;

[0013] Figure 6 is a flow chart illustrating an example method for operating a plasma etching system in accordance with some embodiments.

[0014]

Explanation of symbols

[0015] 10: Semiconductor wafer

[0016] 22: Etchant delivery system

[0017] 24: Etching chamber

[0018] 26: Etching agent controller

[0019] 28: Manifold

[0020] 30: Controller

[0021] 32: Etching agent supplier

[0022] 34:Carrier gas supply

[0023] 36: Etching agent supply line

[0024] 38: Etching agent supply valve

[0025] 40:Carrier gas supply line

[0026] 42:Carrier gas supply valve

[0027] 44: Etchant chamber housing

[0028] 46: Spacer

[0029] 48: Nozzle

[0030] 50: Installation Platform

[0031] 52: Lower electrode

[0032] 54: Lower RF generator

[0033] 55: Mounting surface

[0034] 56: Upper electrode

[0035] 58: Upper RF generator

[0036] 62: Vacuum pump

[0037] 70: Focus ring

[0038] 80:Support ring

[0039] 90: Actuator

[0040] 92: Closed loop

[0041] 94: Covering ring

[0042] 96: Gap

[0043] 100: Plasma Etching System

[0044] 102: Area

[0045] 104:Edge Components

[0046] 201: Top surface of lower step

[0047] 202: Inside the gap

[0048] 203: Inside the steps

[0049] 204: Outside the gap

[0050] 205: Go up the outside of the steps

[0051] 206: Top surface of the gap

[0052] 207: Bottom surface

[0053] 208: Support ring top surface

[0054] 209: Inside of the lower step

[0055] 210: Top surface of upper step

[0056] 211: Top surface

[0057] 214: Beveled part

[0058] 216: Covering ring top surface

[0059] 218: Inclined surface

[0060] 220: Covering the outside of the ring

[0061] 292: Bottom surface of the gap

[0062] 402: Bulk plasma region

[0063] 404: Plasma Shell Region

[0064] 406: Bulk-Shell Interface

[0065] 408: Plasma Shell

[0066] 500: Equivalent circuit

[0067] 502: first resistor

[0068] 504: first capacitor

[0069] 512: second resistor

[0070] 514: Second capacitor

[0071] 600: Method

[0072] 602: Steps

[0073] 604: Steps

[0074] C sheath ,C ring :Capacitance value

[0075] R sheath ,R ring :Resistance value

[0076] V gap ,V ring : Potential difference

[0077] Z sheath ,Z ring :impedance DETAILED DESCRIPTION

[0078] The following disclosure provides many different embodiments or examples for implementing the different features of the provided subject matter. Specific examples of components and configurations are described below to simplify the disclosure. Of course, these are merely examples and are not intended to be limiting. For example, in the following description, the formation of a first feature above or on a second feature may include an embodiment in which the first feature is formed in direct contact with the second feature, and may also include an embodiment in which an additional feature is formed between the first feature and the second feature so that the first feature and the second feature may not be in direct contact. In addition, the disclosure may repeat reference numbers and / or letters in various examples. This repetition is for the purpose of simplicity and clarity, and does not itself indicate the relationship between the various embodiments and / or configurations discussed.

[0079] In addition, for ease of description, spatially relative terms such as "under," "beneath," "lower," "above," "upper," and the like may be used herein to describe the relationship of one element or feature to another (or other) elements or features, as illustrated in the figures. Spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientations depicted in the figures. The device may be oriented in other ways (rotated 90 degrees or in other orientations), and the spatially relative descriptors used herein may be interpreted accordingly. In addition, unless expressly stated otherwise, each element having the same reference number and / or letter is assumed to have the same material composition and have a thickness within the same thickness range.

[0080] Furthermore, source / drain regions may be referred to individually or collectively as source or drain, depending on the context. For example, a device may include a first source / drain region and a second source / drain region, as well as other components. The first source / drain region may be a source region, while the second source / drain region may be a drain region, and vice versa. One of ordinary skill in the art will recognize many variations, modifications, and substitutions.

[0081] This disclosure describes some embodiments. Additional operations may be provided before, during, and / or after the stages described in these embodiments. For different embodiments, some of the stages described may be replaced or removed. Some of the features described below may be replaced or removed, and additional features may be added for different embodiments. Although some embodiments discuss operations performed in a particular order, these operations may also be performed in another logical order.

[0082] Overview

[0083] Plasma-related processes are widely used in semiconductor manufacturing. For example, plasma etching processes are frequently used in the rapidly developing semiconductor device manufacturing technology. Reactive ion etching (RIE) processes or other plasma etching processes are used to etch materials formed on semiconductor devices, usually creating patterns in material layers formed on semiconductor substrates. As another example, plasma cleaning processes are also commonly used in semiconductor device manufacturing. Plasma cleaning processes can be, for example, stripping operations including covering films for removing materials from semiconductor devices. In addition, plasma-related processes also include plasma treatment processes. Although the present disclosure uses a plasma etching system for a plasma etching process as an example, it should be understood that the technology disclosed herein is generally applicable to other plasma-related systems for plasma-related processes.

[0084] In conventional plasma etching systems, focus rings are used to extend or pull plasma horizontally or radially toward the peripheral area of ​​the chamber to improve the uniformity of the plasma generated in the chamber. However, the materials generally used for focus rings are susceptible to corrosion and degradation by fluorine-based chemicals commonly used in plasma etching processes. Such materials susceptible to corrosion and degradation include quartz, silicon, aluminum, etc. As a result, the service life of the focus ring is generally relatively short, and a frequent and lengthy replacement process is required, which further leads to production capacity loss.

[0085] On the other hand, the amount of thermal and electrical stress generated on a semiconductor wafer (sometimes also referred to as a "wafer") during multiple plasma etching processes accumulates rapidly. The semiconductor wafer is typically held by an electrostatic chuck (sometimes also referred to as an "e-chuck") so that the semiconductor wafer is "attached" to a wafer holder during the plasma etching process. Generally, a high voltage is applied to the electrodes of the electrostatic chuck. The electrostatic field generated by the high voltage will then generate an attractive force between the semiconductor wafer and the electrostatic chuck. However, during the plasma etching process, after the plasma strikes the semiconductor wafer, the potential of the semiconductor wafer is typically pulled down to a negative value relative to the chamber wall within, for example, tens of radio frequency (RF) cycles. As a result, arcing may occur due to the high potential difference, which becomes higher than, for example, the breakdown voltage of the dielectric layer. The arc discharge may damage or destroy the semiconductor devices manufactured on the semiconductor wafer, and may even render the semiconductor wafer unusable.

[0086] According to some aspects of the present disclosure, a novel plasma etching system is provided. The plasma etching system includes an edge component, which is disposed around the edge of a semiconductor wafer and is processed in a plasma etching process. The edge component includes a focus ring characterized by a gap. The gap extends peripherally along the periphery of the focus ring and contains air. Since the relative dielectric constant of the gap located in the focus ring is low, the focus ring has a significantly lower capacitance than a conventional focus ring without a gap. Therefore, in the plasma etching process, the potential difference generated between the focus ring and the plasma shell is significantly reduced due to the increase in the impedance of the focus ring. Accordingly, according to the Child-Langmuir law (sometimes also referred to as "Child's law"), the thickness of the plasma shell above the focus ring becomes smaller, thereby reducing the erosion of the focus ring by the plasma, and improving the durability of the focus ring, so that the service life of the focus ring is extended. In addition, wafer arcing, which is an unfavorable factor, can also be significantly reduced due to more uniform plasma and a lower potential difference between the focus ring and the plasma shell above the wafer.

[0087] refer to Figure 1-6 A description of the plasma etching system, edge assembly, and focus ring is as follows.

[0088] Example of a plasma etching system with novel edge components

[0089] Figure 1 FIG. 1 is a cross-sectional schematic diagram illustrating an exemplary plasma etching system 100 according to some embodiments. Figure 1 In the example shown, the plasma etching system 100 includes, among other elements, an etchant delivery system 22, an etching chamber 24, an etchant controller 26, a manifold 28, a controller 30, a plurality of etchant supplies 32, a carrier gas supply 34, a plurality of etchant supply lines 36, a plurality of etchant supply valves 38, a carrier gas supply line 40, a carrier gas supply valve 42, an etchant chamber housing 44, a spacer 46, a showerhead 48, a mounting platform 50, a lower electrode 52, a lower RF generator 54, an upper electrode 56, an upper RF generator 58, a vacuum pump 62, and an actuator 90. It should be understood that in other embodiments, the plasma etching system 100 may include other elements.

[0090] The plasma etching system 100 also includes an edge assembly 104 (eg, Figure 1 In the dashed line Figure 1 In the example shown, edge assembly 104 surrounds an edge or peripheral portion of semiconductor wafer 10 mounted on mounting platform 50. Edge assembly 104 includes, among other components, sealing ring 92, cover ring 94, support ring 80, and focus ring 70. Figure 2-3 As discussed in detail below, focus ring 70 has a design featuring gap 96 to extend the life of focus ring 70.

[0091] The etchant delivery system 22 is operable to deliver one or more gaseous etchants to the etching chamber 24. The etchant delivery system 22 supplies various desired etchants to the etching chamber 24 through the etchant controller 26 and the manifold 28. The etchant delivery system 22 can also assist in controlling the flow of etchants entering the etching chamber 24 by controlling the flow and pressure of the carrier gas passing through the etchant delivery system 22. The etchant delivery system 22 and the etching chamber 24 are controlled by a controller 30, which controls and regulates the various etchants and carrier gases entering the etching chamber 24. In some embodiments, the plasma etching process performed by the plasma etching system 100 is a reactive-ion etching (RIE) process or a deep reactive-ion etching (DRIE) process.

[0092] exist Figure 1 In the example shown, the etchant delivery system 22 includes an etchant supply 32 and a carrier gas supply 34. Figure 1 Only two etchant suppliers 32 are shown, but it should be understood that the etchant delivery system 22 may include any suitable number of etchant suppliers 32, such as etchant suppliers for various etchants required to be used in the plasma etching system 100. For example, in an embodiment where five different etchants are required, the etchant delivery system 22 may include five etchant suppliers 32.

[0093] Each etchant supplier 32 can be a container, such as a gas storage tank, which can be located near or away from the etching chamber 24. In another embodiment, the etchant supplier 32 can be part of a facility for independently preparing and delivering the required etchant. Any suitable etchant source can be used as the etchant supplier 32, and all such sources are included in the scope of the present disclosure. Each etchant supplier 32 can supply etchant to the etchant controller 26 through an etchant supply line 36 with an etchant supply valve 38. The etchant supply valve 38 is controlled by the controller 30.

[0094] The carrier gas supply 34 is operable to supply a desired carrier gas or diluent gas that can be used to assist in propelling or "carrying" the various desired etchants into the etching chamber 24. The carrier gas can be an inert gas or other gas that does not react with the etchant itself or the byproducts of the etchant reaction. For example, the carrier gas can be nitrogen (N 2 ), helium (He), argon (Ar), or a combination of the above gases, but other suitable carrier gases may be used in other embodiments.

[0095] The carrier gas supplier 34 can be a container, such as a gas storage tank, which can be located near the etching chamber 24 or away from the etching chamber 24. In another embodiment, the carrier gas supplier 34 can be a facility for independently preparing and delivering carrier gas. Any suitable carrier gas source can be used as the carrier gas supplier 34, and all such sources are included in the scope of the present disclosure. The carrier gas supply source 34 can supply the required carrier gas to the etchant controller 26 through the carrier gas supply line 40, wherein the carrier gas supply valve 42 connects the carrier gas supplier 34 to the carrier gas supply line 40. The carrier gas supply valve 42 is also controlled by the controller 30, and the controller 30 controls and regulates the various etchants and carrier gases entering the etching chamber 24. Once the carrier gas and the etchant are combined, they can be introduced into the etchant controller 26 and then enter the etching chamber 24 through the manifold 28.

[0096] The etching chamber 24 may be of any desired shape suitable for distributing the etchant. Figure 1 In the example shown, the etching chamber 24 has a cylindrical sidewall and bottom. However, the etching chamber 24 is not limited to a cylindrical shape, and any other suitable shape may be adopted in other embodiments, such as a hollow square tube, an octagon, etc. In addition, the etching chamber housing 44 may surround the etching chamber 24, and the etching chamber housing 44 is made of a material that is inert to various processing materials. In this way, the etching chamber housing 44 may be made of any suitable material that can withstand the chemicals and pressures involved in the etching process. In some embodiments, the etching chamber housing 44 may be made of steel, stainless steel, nickel, aluminum, alloys of the above materials, or a combination of the above materials. In some embodiments, the spacer 46 may be embedded in the sidewall of the etching chamber housing 44 or removed from the sidewall of the etching chamber housing 44 to control the height of the etching chamber 24.

[0097] exist Figure 1 In the example shown, the etching chamber 24 includes a showerhead 48. In one embodiment, the showerhead 48 receives various etchants from the manifold 28 and assists in distributing the various etchants into the etching chamber 24. The showerhead 48 can be designed to evenly distribute the etchants to minimize undesired process conditions that may be caused by uneven distribution of the etchants. In one embodiment, the showerhead 48 can have a circular design with openings evenly distributed around the showerhead 48 to allow the desired etchant to be distributed into the etching chamber 24. However, any suitable method of introducing the desired etchant, such as an inlet port, can be used to introduce the desired etchant into the etching chamber 24.

[0098] The mounting platform 50 is located within the etching chamber 24 to position and control the semiconductor wafer 10 during the etching process. In some cases, the semiconductor wafer 10 can be mounted on a mounting surface 55 of the mounting platform 50. Figure 1In the example shown, the mounting platform 50 fixes the semiconductor wafer 10 by electrostatic force, clamps, vacuum pressure, or a combination thereof, and may also include heating and cooling mechanisms to control the temperature of the semiconductor wafer 10 during the plasma etching process. In one embodiment, the mounting platform 50 is an electrostatic chuck platform.

[0099] exist Figure 1 In the example shown, the etching chamber 24 also includes a lower electrode 52 coupled to a lower RF generator 54. During the etching process, the lower electrode 52 can be biased at an RF voltage by the lower RF generator 54 (e.g., under the control of the controller 30). Through the bias voltage, the lower electrode 52 is used to provide a bias voltage to the introduced etchant and assist in igniting it into plasma. The lower electrode 52 is also used to maintain the plasma by maintaining the bias voltage during the plasma etching process, and the lower electrode 52 is also used to assist in accelerating ions from the plasma to the semiconductor wafer 10.

[0100] exist Figure 1 In the example shown, the etching chamber 24 also includes an upper electrode 56 coupled to an upper RF generator 58 for use as a plasma generator. The upper RF generator 58 provides power to the upper electrode 56 (e.g., under the control of the controller 30) to ignite the plasma during the introduction of the reactive etchant. Although the upper electrode 56 is described above as a capacitively coupled plasma generator, the embodiments are not intended to be limited to capacitively coupled plasma generators. Instead, any suitable method of generating plasma may be utilized, such as an inductively coupled plasma system, magnetically enhanced reactive ion etching, electron cyclotron resonance, remote plasma generators, etc. All such methods are fully intended to be included within the scope of the present disclosure.

[0101] exist Figure 1 In the example shown, the etching chamber 24 is also connected to a vacuum pump 62. In one embodiment, the vacuum pump 62 can be used to control the pressure in the etching chamber 24 to a desired pressure under the control of the controller 30. In addition, once the plasma etching process is completed, the vacuum pump 62 can be used to evacuate the etching chamber 24 in preparation for removing the semiconductor wafer 10.

[0102] exist Figure 1In the example shown, the actuator 90 is attached to the support ring 80 and can be operated to vertically move the support ring 80 and the focus ring 70. In some embodiments, the actuator 90 can be a part of the support ring 80 or the mounting platform 50, or can be separated from the support ring 80 or the mounting platform 50. In some embodiments, the actuator 90 can be inside or outside the etchant chamber housing 44. In order to move the focus ring 70, the actuator 90 can include, for example, a stepper motor, other types of motors, or a hydraulic system. In some embodiments, the actuator 90 can directly move the movable part of the support ring 80, or can be connected to the support ring 80 by a linkage, a transmission, a cable, a hydraulic device, or other suitable technology or combination of technologies. In some embodiments, the actuator 90 is controlled by the controller 30.

[0103] Although a number of specific components of the plasma etching system 100 have been described above, other suitable components may also be included. For example, end point mounting components, pads, and any other components that may assist in operating or controlling the plasma etching process may also be included. All such components are fully intended to be included within the scope of the present disclosure.

[0104] Example of an edge assembly with a novel focus ring

[0105] Figure 2 is a diagram illustrating some embodiments of the present invention. Figure 1 Schematic cross-sectional view of an example edge assembly 104. Figure 3 1 is a top view of an example edge assembly 104 according to some embodiments. As described above, edge assembly 104 located in region 102 includes, among other elements, closure ring 92, cover ring 94, support ring 80, and focus ring 70. Focus ring 70 features gap 96 to extend the useful life of focus ring 70.

[0106] exist Figure 2 and Figure 3 In the example shown, the focus ring 70 surrounds the periphery of the semiconductor wafer 10 and has a generally annular shape that is concentric with the semiconductor wafer 10. The focus ring 70 may have a rectangular cross-sectional shape, an irregular cross-sectional shape, or a cross-sectional shape of different shapes. In the example shown in the drawings, the focus ring 70 includes a lower step portion 72 and an upper step portion 74 attached to the lower step portion 72. The lower step portion 72 is adjacent to the edge of the semiconductor wafer 10, while the upper step portion 74 is away from the edge of the semiconductor wafer 10. The upper step portion 74 is perpendicular to the lower step portion 72 (i.e., Figure 2 The upper step portion 74 is raised in the Z direction (as shown), and the size of the upper step portion 74 is greater than the size of the lower step portion 72.

[0107] like Figure 2As shown, the upper step portion 74 extends vertically from the bottom surface 207 of the focus ring 70 to the upper step top surface 210. The upper step portion 74 extends radially from the upper step inner side 203 to the upper step outer side 205 in the horizontal plane (i.e., the XY plane). The lower step portion 72 extends vertically from the bottom surface 207 of the focus ring 70 to the lower step top surface 201, and extends radially from the lower step inner side 209 of the lower step portion 72 to the upper step inner side 203. The lower step portion 72 and the upper step portion 74 are connected at the upper step inner side 203 of the upper step portion 74. The lower step top surface 201 is located below the upper step top surface 210 in the vertical direction. The distance between the lower step top surface 201 and the upper step top surface 210 can be changed according to design requirements.

[0108] like Figure 2 As shown, the lower step inner side 209 is adjacent to the mounting platform 50. In some embodiments, the lower step top surface 201 of the lower step portion 72 is coplanar or substantially coplanar with the mounting surface 55. In some embodiments, the edge portion or peripheral portion of the semiconductor wafer 10 is located above the lower step portion 72 in the vertical direction. In alternative embodiments, the lower step top surface 201 can be coplanar or substantially coplanar with the top surface 211 of the semiconductor wafer 10. The upper step top surface 210 is located above the top surface 211 of the semiconductor wafer 10.

[0109] The upper step portion 74 may have a first width (W ) measured between the upper step inner side 203 and the upper step outer side 205. 1 ) and a first thickness (T 1 In some embodiments, the first width (W 1 ) is between about 17 mm and about 37 mm, between about 20 mm and about 30 mm, or between about 26 mm and about 28 mm. In one embodiment, the first width (W 1 ) is about 27 mm. In some embodiments, the first thickness (T 1 ) is between about 5 mm and about 10 mm, between about 6 mm and about 9 mm, or between about 7 mm and about 8 mm. In one embodiment, the first thickness (T 1 ) is approximately 7.2mm.

[0110] In some embodiments, the lower step portion 72 may have a second width (W ) measured from the lower step inner side 209 to the upper step inner side 203. 2 ) and a second thickness (T 2 In some embodiments, the second width (W 2) is between about 3 mm and about 6 mm or between about 4 mm and about 5 mm. In one embodiment, the second width (W 2 ) is about 4.45 mm. In some embodiments, the second thickness (T 2 ) is between about 2 mm and about 4 mm or between about 2.5 mm and about 3.5 mm. In one embodiment, the second thickness (T 2 ) is approximately 2.8mm.

[0111] exist Figure 2 In the example shown, the focus ring 70 is mounted to a support ring 80. The support ring 80 may support or secure the focus ring 70 around the entire circumference of the focus ring 70, or support or secure the focus ring 70 at one or more discrete locations. The support ring 80 is partially disposed on the mounting platform 50 and partially disposed on the closure ring 92. The support ring 80 has a support ring top surface 208. In some embodiments, the lower step portion 72 and the upper step portion 74 of the focus ring 70 are disposed on and in contact with the support ring top surface 208.

[0112] The focus ring 70 is attached to the cover ring 94. Figure 2 In the example shown, the cover ring 94 is disposed on the upper step outer side 205 of the upper step portion 74 and peripherally surrounds the focus ring 70. The cover ring 94 has a cover ring top surface 216 and a cover ring outer side 220. In some embodiments, the cover ring top surface 216 is coplanar or substantially coplanar with the upper step top surface 210 of the upper step portion 74. Figure 2 In the example shown, the cover ring 94 includes a beveled portion 214 having an inclined surface 218. The inclined surface 218 can form smooth edges with the cover ring top surface 216 and the cover ring outer side 220, respectively. The smooth edges of the cover ring 94 can reduce the sharpness of the corners and prevent damage during operation.

[0113] The cover ring 94 is mounted on the closing ring 92 located below the cover ring 94. The closing ring 92 is configured to support and fix the support ring 80 and the cover ring 94. Figure 2 As shown, the closed ring 92 peripherally surrounds the mounting platform 50 and can protect the mounting platform 50 during the plasma etching process.

[0114] As described above, focus ring 70 is characterized by void 96. It should be noted that the term "void" as used in the present disclosure is not intended to be limiting and may refer to any space that is filled or not filled with a gas. Other terms such as "cavity," "hollow," "hole," "channel," and "groove" are equivalent to "void" and may be used interchangeably with "void" in the present disclosure. For example, as discussed below, "void bottom surface" may also be referred to as "cavity bottom surface"; "void inside" may also be referred to as "cavity inside"; and "void outside" may also be referred to as "cavity outside." One of ordinary skill in the art will understand that these terms may be used interchangeably with other variations.

[0115] In one embodiment, the gap 96 is characterized by a cavity and air filled in the cavity. The relative dielectric constant of air is 1.00058986±0.00000050, which is very close to the dielectric constant of a vacuum of 1. As explained below, the low relative dielectric constant of the air in the gap 96 results in a significant reduction in the capacitance of the focus ring 70 compared to a conventional focus ring without a gap. Accordingly, the thickness of the plasma sheath on the focus ring 70 becomes thinner, and the erosion of the focus ring 70 by the plasma is reduced.

[0116] It should be noted that Figure 1-3 The gap 96 shown is only an example and is not intended to be limiting, and other gaps, such as a vacuum cavity or a cavity filled with another gas other than air, are also feasible in alternative embodiments of the present disclosure. The gas filled in the gap generally has a lower relative dielectric constant. In one embodiment, a bottom cover located on the bottom surface 207 of the focus ring 70 (i.e., the gap bottom surface 292) and coplanar therewith is used to enclose the gas filled in the cavity or chamber, and the filling and release of the gas can be achieved through, for example, an inlet and outlet opening, and the inlet and outlet opening is closed after the gas is filled. Similarly, the above-mentioned vacuum cavity can also be achieved by a bottom cover located on the bottom surface 207 of the focus ring 70, and this vacuum pump (e.g., a turbomolecular pump) is connected to the vacuum cavity through the inlet and outlet openings on the bottom cover.

[0117] like Figure 3 As shown, gap 96 extends circumferentially around upper step portion 74 of focus ring 70 and has an annular shape that is concentric or substantially concentric with focus ring 70. In some embodiments, gap 96 is continuous along its circumference. In alternative embodiments, gap 96 is segmented, for example, including a plurality of separate gap portions that are separated from each other along the circumference of focus ring 70.

[0118] The void 96 may have a rectangular cross-sectional shape or may have a cross-sectional shape of a different shape in a radial plane. Figure 2In the example shown, the gap 96 extends radially from the gap inner side 202 to the gap outer side 204. The gap 96 is characterized by a gap bottom surface 292 that is coplanar with the bottom surface 207 of the focus ring 70. The gap inner side 202 and the gap outer side 204 are perpendicular to the bottom surface 207 of the focus ring 70 (i.e., perpendicular to the gap bottom surface 292). The gap inner side 202 is adjacent to the upper step inner side 203 of the upper step portion 74, and the gap outer side 204 is adjacent to the upper step outer side 205 of the upper step portion 74. The gap 96 extends perpendicularly from the gap top surface 206 to the bottom surface 207 of the focus ring 70. However, in alternative embodiments, the gap 96 may be completely enclosed in the upper step portion 74 and does not leak through the bottom surface 207. It should be noted that in alternative embodiments, the gap 96 may also have other cross-sectional shapes, such as circular, square, oval, and rectangular with rounded corners.

[0119] The gap 96 has a radial dimension (D) and a vertical dimension (H). The radial dimension (D) is measured from the distance between the gap inner side 202 and the gap outer side 204, and the vertical dimension (H) is measured from the distance between the gap top surface 206 and the gap bottom surface 207. The cross-sectional dimensions of the gap 96 can vary according to design requirements.

[0120] In some embodiments, the radial dimension (D) of the gap 96 is between about 5 mm and about 30 mm, between about 10 mm and about 25 mm, or between about 15 and about 25 mm. In some embodiments, the radial dimension (D) of the gap 96 is between the first width (W ) of the upper step portion 74 of the focus ring 70 and the radial dimension (D) of the gap 96. 1 ) between about 30% and about 90%, between about 40% and about 80%, or between about 50% and about 70%.

[0121] In some embodiments, the vertical dimension (H) of the gap 96 is between the first thickness (T 1 ) between about 20% and about 70%, between about 30% and about 60%, or between about 40% and about 50%.

[0122] In one embodiment, the first width (W) of the upper step portion 74 is 1 ) is about 27mm; the first thickness of the upper step portion 74 (T 1 ) is about 7.2 mm. The radial dimension (D) of the gap 96 is 10 mm; the vertical dimension (H) of the gap 96 is about 2 mm.

[0123] In another embodiment, the first width (W 1 ) is about 27mm; the first thickness of the upper step portion 74 (T 1The radial dimension (D) of the gap 96 is 15 mm, and the vertical dimension (H) of the gap 96 is approximately 3 mm.

[0124] In yet another embodiment, the first width (W 1 ) is about 27mm; the first thickness of the upper step portion 74 (T 1 The radial dimension (D) of the gap 96 is 20 mm, and the vertical dimension (H) of the gap 96 is approximately 4 mm.

[0125] The void 96 has a first total volume (V 1 ), the upper step portion 74 of the focus ring 70 has a second total volume (V 2 ). In some embodiments, V l Yes V 2 of between about 5% and about 90%, between about 20% and about 70%, or between about 40% and about 50%.

[0126] The focus ring 70 may be made of conductive material, semiconductor material, dielectric material or other material. In some embodiments, the focus ring 70 may be made of doped or undoped silicon. In some embodiments, the focus ring 70 may be made of quartz, silicon carbide (SiC) or aluminum (Al). In some embodiments, the focus ring 70 may include a coating on its outer surface (i.e., the lower step top surface 201, the upper step top surface 210, the outer surface of the upper step inner side 203 and the outer surface of the upper step outer side 205). This coating may be, for example, yttrium oxide (Y 2 O 3 ) of metal oxides, such as yttrium fluoride (YF 3 ), or a metal fluoride such as yttrium oxyfluoride (YOF). The coating can be formed using a suitable deposition technique, such as chemical vapor deposition (CVD) or physical vapor deposition (PVD). In some embodiments, the coating can resist degradation by fluorine etching chemicals used in etching, stripping, and cleaning operations in semiconductor processing. Thus, the coating can provide additional protection for the focus ring 70 to prevent corrosion during, for example, a plasma etching process.

[0127] Focus ring performance improvement

[0128] Figure 4 FIG. 2 is a schematic diagram illustrating an example plasma sheath region above a focus ring according to some embodiments. Figure 4In the example shown, the bulk plasma region 402 is located above the plasma shell region 404, and the plasma shell region 404 is located above the focus ring 70. The bulk plasma region 402 and the plasma shell region 404 have a bulk-shell interface 406 extending in a horizontal plane (i.e., as shown in FIG. Figure 4 XY plane shown).

[0129] Plasma is a state of matter in which ionized matter becomes electrically conductive so that long-range electric and magnetic fields dominate its behavior. Plasma is generally an electrically quasi-neutral medium of unbound positive and negative particles (i.e., the total charge of the plasma is approximately zero). Plasma contains ions and electrons and is, on average, electrically neutral.

[0130] In the edge region of the plasma, electrons leave the plasma before ions and strike the focusing ring 70 (and other Figure 2 Therefore, an electric field is established at the edge in the Z direction (at Figure 4 As the electrons charge the focus ring 70 more, the electric field becomes stronger. Since the electric field is directed toward the focus ring 70, it will slow down the movement of the electrons. That is, the electric field will prevent more electrons from charging the focus ring 70. In other words, equilibrium is eventually reached and a plasma sheath 408 is formed near the focus ring 70. The plasma sheath 408 is a thin layer of positively charged ions that is built up over multiple Debye lengths. In other words, the thickness of the plasma sheath 408 (i.e., the thickness of the plasma sheath region 404, which is Figure 4 The marked "d sheath ”) is approximately a multiple of the Debye length. In one embodiment, the thickness of the plasma sheath 408 is approximately 0.15 mm. On the other hand, the bulk plasma region 402 is quasi-neutral (i.e., the electron density and the ion density are substantially the same).

[0131] On the other hand, the positively charged ions remaining in the plasma sheath region 404 are accelerated by the electric field and bombard the focusing ring 70. The bombardment energy is related to the potential difference (V gap ) is proportional (i.e. Figure 4 In the example shown, between the focus ring 70 and the bulk-shell interface 406 and the upper step top surface 210 of the focus ring 70 ).

[0132] Figure 5 FIG. 5 is a schematic diagram illustrating an example equivalent circuit 500 of the focus ring 70 and the plasma sheath 408 according to some embodiments. The equivalent circuit of the focus ring 70 includes a first resistor 502 (characterized by a resistance value R ) connected in parallel between the node B and the node C. ring ) and the first capacitor 504 (characterized by a capacitance value C ring ). The impedance Z of the focusing ring 70 ring It can be calculated by the following formula (1):

[0133]

[0134] where ω is the angular frequency of the RF signal.

[0135] Likewise, the equivalent circuit of the plasma sheath 408 includes a second resistor 512 (characterized by a resistance value R sheath ) and a second capacitor 514 (characterized by a capacitance value C sheath ). The impedance Z of the plasma shell 408 sheath It can be calculated by the following formula (2):

[0136]

[0137] where ω is the angular frequency of the RF signal.

[0138] Since the air in the gap 96 of the focus ring 70 has a low relative dielectric constant, the focus ring 70 has a significantly lower capacitance (C ring In one embodiment, compared to a conventional focus ring without a gap, the capacitance value (C ring ) is reduced to about 84% (i.e., reduced by about 16%). According to the above equation (1), the impedance of the focus ring 70 increases. Therefore, the potential difference (V gap ) and the potential difference (V ring ) is redistributed, and the potential difference (V gap ) is reduced.

[0139] In addition, according to the Child-Langmuir law, the thickness (d sheath ) and the potential difference (V gap ) is proportional to the 3 / 4 exponential. Since the plasma shell 408 is the potential difference (V gap ) is reduced, so the thickness of the plasma shell 408 (d sheath ) decreases accordingly. According to the parallel plate capacitance formula, the thickness of the plasma shell 408 (d sheath ) is reduced, resulting in the capacitance value C of the second capacitor 514 sheath According to the above formula (2), the increased capacitance value C sheath This further leads to the impedance Z of the plasma sheath 408 sheath Reduced. Reduced impedance Z sheath and the increased impedance Z ring The redistribution of the potential on the focus ring 70 and the plasma sheath 408 is enhanced.

[0140] Accordingly, as explained above, due to the bombardment energy and the potential difference (Vgap ), so the reduced potential difference (V gap ) results in a lower erosion rate. The durability of the focus ring 70 is improved; the service life of the focus ring 70 is extended. On the other hand, the reduced potential difference (V gap ) also reduces the occurrence of adverse wafer arcing.

[0141] In some embodiments, the potential difference between the focus ring 70 and the plasma above the focus ring 70 is reduced by between about 17% and about 47% compared to a conventional focus ring without voids 96. The wear rate of the focus ring 70 is reduced by about 23.2% (i.e., reduced to about 76.8%) compared to a conventional focus ring without voids 96, and the service life of the focus ring 70 with voids 96 is increased by at least 90%. In some embodiments, the erosion rate of the focus ring 70 with voids 96 is reduced by at least 20% compared to a conventional focus ring without voids. In some embodiments, the arcing rate is reduced to between about 50 ppm and about 100 ppm, or by more than 95%, compared to a conventional focus ring without voids (whose arcing rate is typically greater than 2000 ppm).

[0142] Example Methods of Operating a Plasma Etching System

[0143] Figure 6 is a flow chart illustrating an example method 600 of operating a plasma etching system according to some embodiments. Figure 6 In the example shown, method 600 includes operations 602 and 604, and additional operations may also be performed.

[0144] In operation 602, a semiconductor wafer (e.g., Figure 2 The semiconductor wafer 10 shown in FIG. 1 is positioned to a plasma etching system (eg, Figure 1 The plasma etching system 100 shown in FIG. Figure 1 24) in the etching chamber 20 shown in FIG. Figure 2 The plasma etching system includes a mounting platform and an edge component (e.g., Figure 2 104 shown in FIG. 10B ).

[0145] The edge assembly includes a focus ring (e.g., Figure 2 The focus ring 70 is shown. The focus ring is characterized by a cavity extending peripherally along the periphery of the focus ring (e.g., Figure 2 The cavity is characterized by a bottom surface of the cavity (e.g., Figure 2 The bottom surface of the gap 292 shown) and the bottom surface of the focus ring (e.g., Figure 2The bottom surfaces 207 are shown to be coplanar.

[0146] As described above, since the material located in the cavity (e.g., air, vacuum, etc.) has a low relative dielectric constant, the focus ring has a significantly lower capacitance compared to a conventional focus ring without a gap. Therefore, in the plasma etching process, the potential difference generated between the focus ring and the plasma shell will be significantly reduced due to the increase in the impedance of the focus ring, thereby reducing the erosion of the focus ring by the plasma and improving the durability of the focus ring, so that the service life of the focus ring can be extended. In addition, due to the more uniform plasma and the lower potential difference between the focus ring and the plasma shell above the wafer, the wafer arc, which is an unfavorable factor, is also significantly reduced.

[0147] In operation step 604, a plasma-related process is performed. In one embodiment, the plasma-related process is a plasma etching process. In another embodiment, the plasma-related process is a plasma cleaning process. In yet another embodiment, the plasma-related process is a plasma treatment process. It should be understood that other types of plasma-related processes may be performed in other embodiments.

[0148] Summarize

[0149] According to some aspects of the present disclosure, an edge component for a plasma etching system is provided. The edge component includes: a focus ring, which surrounds an edge portion of a mounting platform installed in the plasma etching system. The focus ring includes: a lower step portion, which is adjacent to the edge portion of the mounting platform, and the lower step portion extends vertically from the bottom surface of the focus ring to the top surface of the lower step; an upper step portion, which is away from the edge portion of the mounting platform, and the upper step portion extends vertically from the bottom surface of the focus ring to the top surface of the upper step, and extends radially from the inner side of the upper step to the outer side of the upper step, wherein the lower step portion and the upper step portion are connected at the inner side of the upper step. The focus ring is characterized in that a gap is located in the upper step portion, and the gap extends peripherally along the periphery of the focus ring.

[0150] According to some aspects of the present disclosure, an edge assembly for a plasma etching system is provided. The edge assembly includes a focus ring surrounding an edge portion of a mounting platform mounted in the plasma etching system. The focus ring includes an upper step portion, the upper step portion being annular and extending vertically from a bottom surface of the focus ring to an upper step top surface. The upper step portion is characterized by having a cavity extending along a periphery of the upper step portion, and wherein the cavity is characterized by having a cavity bottom surface that is coplanar with the bottom surface of the focus ring.

[0151] According to some aspects of the present disclosure, a method for operating a plasma etching system is provided. The method includes the following steps: positioning a semiconductor wafer on a mounting platform in a chamber of the plasma etching system, wherein the plasma etching system includes: a mounting platform; an edge assembly including a focus ring, the focus ring surrounding an edge portion of the mounting platform, wherein the focus ring is characterized by having a cavity extending along a periphery of the focus ring, wherein the cavity is characterized by having a cavity bottom surface that is coplanar with a bottom surface of the focus ring; and performing a plasma-related process.

[0152] According to some aspects of the present disclosure, a plasma etching system is provided, comprising a mounting platform and an edge assembly, wherein the edge assembly comprises a focus ring surrounding an edge portion of the mounting platform, wherein the focus ring is characterized by having a cavity extending along the periphery thereof, and wherein the cavity is characterized by having a cavity bottom surface that is coplanar with a bottom surface of the focus ring.

[0153] The foregoing summarizes the features of several embodiments or examples so that those skilled in the art can better understand the aspects of the present disclosure. Those skilled in the art should understand that they can easily use the present disclosure as a basis for designing or modifying other processes and structures for achieving the same purpose and / or achieving the same advantages of the embodiments or examples described herein. Those skilled in the art should also recognize that these equivalent constructions do not depart from the spirit and scope of the present disclosure, and that various changes, substitutions, and replacements may be made herein without departing from the spirit and scope of the present disclosure.

Claims

1. An edge component for a plasma etching system, characterized in that: The edge component comprises: A focus ring surrounding an edge portion of a mounting platform mounted in the plasma etching system, the focus ring comprising: a lower step portion adjacent to the edge portion of the mounting platform, the lower step portion extending vertically from a bottom surface of the focus ring to a lower step top surface; as well as an upper step portion, away from the edge portion of the mounting platform, the upper step portion vertically extending from the bottom surface of the focus ring to a top surface of the upper step, and the upper step portion radially extending from an inner side of an upper step to an outer side of an upper step, wherein the lower step portion is connected to the upper step portion at the inner side of the upper step; as well as A gap is located in the upper step portion, and the gap extends peripherally along a periphery of the focus ring.

2. The edge assembly according to claim 1, characterized in that The gap has a gap bottom surface, and the gap bottom surface is coplanar with the bottom surface of the focus ring.

3. The edge assembly according to claim 2, characterized in that: The gap radially extends from an inner side of the gap to an outer side of the gap.

4. The edge assembly according to claim 1, characterized in that: The focus ring further includes a bottom cover which is coplanar with the bottom surface of the focus ring and closes the gap.

5. The edge assembly according to claim 1, characterized in that: Also includes: a support ring located below the focus ring, wherein the focus ring is attached to the support ring; and A closed ring is located below the support ring, wherein the closed ring surrounds the installation platform.

6. The edge assembly according to claim 5, characterized in that Also includes: A cover ring is located above the closed ring, wherein the cover ring peripherally surrounds the focus ring.

7. An edge assembly for a plasma etching system, characterized in that: The edge component comprises: A focus ring surrounding an edge portion of a mounting platform mounted within the plasma etching system, the focus ring comprising: an upper step portion, wherein the upper step portion is annular and extends vertically from a bottom surface of the focus ring to an upper step top surface, and wherein the upper step portion has a cavity extending along a periphery of the upper step portion, and wherein the cavity has a cavity bottom surface that is coplanar with the bottom surface of the focus ring.

8. The edge assembly according to claim 7, characterized in that The focus ring further includes a bottom cover which is coplanar with the bottom surface of the focus ring and closes the cavity.

9. The edge assembly according to claim 7, characterized in that: The focusing ring further comprises: A lower step portion surrounds the edge portion adjacent to the mounting platform, wherein the lower step portion vertically extends from the bottom surface of the focus ring to a lower step top surface, and wherein the lower step portion is attached to the upper step portion.

10. A plasma etching system, characterized in that: Include: a mounting platform; and An edge assembly includes a focus ring surrounding an edge portion of the mounting platform, wherein the focus ring has a cavity extending along a periphery of the focus ring, and wherein the cavity has a cavity bottom surface that is coplanar with a bottom surface of the focus ring.

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