High-gain low-noise amplifier

By using a combination of current multiplexing and negative feedback in a low-noise amplifier, combined with an RLC negative feedback network and a current mirror network, a high-gain low-noise amplifier is designed, which solves the problem of the existing technology's difficulty in meeting multiple performance requirements at the same time. solve the problem and achieve the effects of wideband, high gain, low noise and low power consumption.

CN222395652UActive Publication Date: 2025-01-24CHENGDU ZHUOXIN CO LTD
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Patent Information

Application Number
CN202420735561.5
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-04-10
Publication Date
2025-01-24
Estimated Expiration
2034-04-10

AI Technical Summary

Technical Problem

Existing low-noise amplifiers are difficult to meet the performance requirements of wide bandwidth, high gain, low noise, low standing wave and low power consumption at the same time.

Method used

The combination of current reuse and negative feedback, combined with the RLC negative feedback network and the current mirror network, design a high -gain and low noise amplifier.

Benefits of technology

A high-gain extremely low-noise amplifier with a gain GAIN≥31dB, a noise coefficient NF≤0.6, and a standing wave ratio VSWR≤1.4 in the range of 0.8GHz to 3GHz has been realized. The test values ​​are in good agreement with the simulation values.

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Abstract

The utility model belongs to the technical field of amplifiers, and discloses a high-gain low-noise amplifier, which comprises a negative feedback network, a current multiplexing network and an RLC (Radio Link Control) negative feedback network which are connected in sequence, and a second transistor M2 of the current multiplexing network is multiplexed by a first transistor M1 of the negative feedback network. The RLC negative feedback network comprises a first feedback resistor R1 and a second feedback resistor R2 which are connected in parallel, the second feedback resistor R2 is connected with a feedback capacitor C5 in series, the feedback capacitor C5 is connected with a feedback inductor L4 in parallel, and the first feedback resistor R1 and the feedback inductor L4 are both connected with the second transistor M2. The high-gain low-noise amplifier has the advantages of wide bandwidth, high gain, low noise, low standing wave, low power consumption and the like.
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Description

Technical Field

[0001] The utility model belongs to the technical field of amplifiers, and in particular relates to a high-gain low-noise amplifier. Background Art

[0002] The advantages of monolithic microwave integrated circuits (MMICs) include: high integration, compact and light; higher reliability and lower parasitic effects; good product consistency and reproducibility, especially suitable for mass production; the circuit basically does not need to be debugged, and the unit cost is low during mass production. In addition, when assembling the chip, there are fewer peripheral wiring and fewer circuit parts, because the chip has integrated many active and passive devices into itself. At present, the manufacturing process of GaAs monolithic microwave integrated circuits is constantly improving, especially the advent of heterojunction devices (pHEMT), which show excellent performance in high frequency and low noise. Monolithic microwave integrated circuits are widely used in various microwave systems due to their excellent consistency and reliability.

[0003] As a key part of the front end of the RF receiver, the low noise amplifier can amplify the antenna's received signal while reducing noise interference. Its higher gain can ensure the amplification of weak signals and the suppression of the noise of the subsequent link, and its excellent noise performance can improve the sensitivity of the receiver. The requirements for low power consumption in microwave components are becoming higher and higher. In microwave systems, the problem of increased loss as the frequency increases is often encountered. Additional equalization devices need to be added to increase the loss at the low end of the band to obtain wide-band gain flatness. This approach will reduce the receiving sensitivity, increase power loss, and increase system complexity. This problem can be solved if the amplifier has the characteristic that the gain increases with the frequency.

[0004] The existing low noise amplifier technology can be divided into many types according to the implementation method. Among them, the input-end parallel resistor common source amplifier has a matching resistor connected in parallel at the input end to match the input impedance to 50Ω, thus achieving broadband matching. After a single parallel resistor is connected, due to the resistor voltage division, the gate effective signal is only half of the input signal, and the introduction of the resistor will deteriorate the noise performance of the amplifier.

[0005] The common-gate amplifier has a low input impedance. When the signal frequency is small enough, the input impedance can be regarded as a real number. By designing the appropriate device size and bias current, the input impedance is matched to the source impedance of 50Ω. This structure is not suitable for large-sized transistors. Excessive parasitic capacitance will increase the impact of the imaginary part of the input impedance.

[0006] The parallel-series feedback amplifier architecture connects a feedback resistor between the input and output terminals, and can achieve input impedance matching and output impedance matching by designing appropriate resistors and device sizes. The introduction of resistors in this structure deteriorates noise performance, reduces gain, and consumes more power than low-noise amplifiers with the same noise figure level.

[0007] The source inductor feedback amplifier architecture provides real impedance by connecting an inductor in series with the source of the transistor. The inductor resonates with the parasitic capacitance of the gate source of the transistor, making the imaginary part of the amplifier input impedance 0. Due to the narrow frequency band range of resonance, the amplifier of this architecture can only achieve narrowband matching.

[0008] The traditional low noise amplifiers of the above architectures cannot simultaneously meet the performance requirements of wide bandwidth, high gain, low noise, low standing wave and low power consumption. Utility Model Content

[0009] The utility model aims to solve the above technical problems at least to a certain extent. To this end, the utility model aims to provide a high-gain low-noise amplifier.

[0010] The technical solution adopted by the utility model is:

[0011] A high-gain low-noise amplifier comprises a negative feedback network, a current multiplexing network and an RLC negative feedback network which are connected in sequence, wherein a second transistor M2 of the current multiplexing network is multiplexed by a first transistor M1 of the negative feedback network, and the RLC negative feedback network comprises a first feedback resistor R1 and a second feedback resistor R2 connected in parallel, the second feedback resistor R2 is connected in series with a feedback capacitor C5, the feedback capacitor C5 is connected in parallel with a feedback inductor L4, and the first feedback resistor R1 and the feedback inductor L4 are both connected to the second transistor M2.

[0012] Preferably, it also includes a current mirror network, which includes a third transistor M3, the third transistor M3 is respectively connected to the fifth inductor L5 and the fourth resistor R4, the fifth inductor L5 is connected to the first transistor M1, and the fourth resistor R4 is connected to the RLC negative feedback network through the third resistor R3; the fourth resistor R4 is grounded through the line between the third resistor R3 and the second resistor R21.

[0013] Preferably, the negative feedback network is connected to an input matching network, the input matching network includes a first inductor L1 and a DC blocking capacitor C1 connected in series, the DC blocking capacitor C1 is connected to a first transistor M1 of the negative feedback network, and the line between the DC blocking capacitor C1 and the first transistor M1 is grounded through a second inductor L2.

[0014] Preferably, the second transistor M2 is grounded via a fourth capacitor C4.

[0015] Preferably, a DC bias network is also included, the DC bias network includes a choke inductor L6, and the choke inductor L6 is grounded through a filter capacitor C7.

[0016] The beneficial effects of the utility model are:

[0017] The utility model provides a high-gain low-noise amplifier applied to GaAs pHEMT process, which adopts the combination of current multiplexing and negative feedback. At the same time, in order to avoid the influence caused by temperature change and process deviation, the active bias adopted is a current mirror network, which has the advantages of wide bandwidth, high gain, low noise, low standing wave and low power consumption. In the range of 0.8GHz to 3GHz, the gain GAIN ≥ 31dB, the noise figure NF ≤ 0.6, and the standing wave ratio VSWR ≤ 1.4 are high-gain and low-noise amplifiers, and the test values ​​are consistent with the simulation values. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 It is the overall topology diagram of the high-gain low-noise amplifier circuit of the utility model.

[0019] Figure 2 This is a topological diagram of the current mirror network of the utility model.

[0020] Figure 3 This is a topological diagram of the current multiplexing network of the utility model.

[0021] Figure 4 It is a topological diagram of the RLC negative feedback network of the utility model.

[0022] Figure 5 This is a high-gain low-noise amplifier layout of the utility model. DETAILED DESCRIPTION

[0023] The following will be combined with the drawings in the utility model to clearly and completely describe the technical solution of the utility model. Obviously, the described embodiments are part of the embodiments of the utility model, but not all of the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0024] It should be understood that it should also be noted that in the embodiment, the functions / actions that appear may be different from the order in which the drawings appear. For example, depending on the functions / actions involved, they can actually be executed substantially concurrently, or two figures shown in succession can sometimes be executed in the reverse order.

[0025] This embodiment relates to a high-gain and extremely low-noise amplifier with an operating frequency band of 0.8 GHz to 3 GHz, a gain GAIN ≥ 31 dB, a noise figure NF ≤ 0.6, and a standing wave ratio VSWR ≤ 1.4; the combination of an RLC negative feedback structure and a current multiplexing structure not only effectively improves the working bandwidth of the amplifier, but also allows the signal to be amplified multiple times to increase the gain while achieving low power consumption. The problem of steep gain drop and noise deterioration is effectively solved.

[0026] To avoid the influence caused by temperature change and process deviation, the active bias circuit used in this embodiment is as follows: Figure 2 The current mirror network shown in the figure is that the key to the current mirror network is that Id can proportionally copy the value of the reference current Ib, thereby avoiding the impact caused by temperature changes and process deviations. The proportional relationship between Id and Ib can be adjusted and set by the Ma and Mb die sizes. The specific expression is as follows: Id = (W / L)a / (W / L)b*Ib. The above formula also further illustrates the shielding effect of the current mirror bias circuit on ambient temperature changes. It is for this reason that current mirrors are widely used in the design of low-noise amplifier bias circuits, and also play a relatively good role in temperature compensation.

[0027] like Figure 3 As shown, in order to reduce power consumption, this embodiment adopts a current multiplexing structure to reduce current. Vdd is the transistor drain voltage, Vg is the transistor gate voltage, and Id is the drain current of transistors Ma and Mb. The drain current of transistor Ma is reused by transistor Mb, and the drain voltage Vdd is divided by the DC bias network after passing through transistor Ma to provide the operating voltage VD1 for transistor Mb. The power consumption of the entire circuit is Vdd*Id.

[0028] like Figure 4 As shown, in order to achieve the index requirement of gain GAIN ≥ 31dB, this embodiment adopts two-stage amplification. Since the working frequency band of the chip is relatively wide, the RLC negative feedback structure is used in the second stage of the low noise amplifier to expand the bandwidth. The parallel negative feedback structure is a commonly used structure for broadband circuits, and has advantages such as good bandwidth stability, but because it has a greater impact on noise, it is generally used in the final stage of the amplifier. Negative feedback is to connect the RLC element from the drain of the device to the gate to form a negative feedback loop, in which R is the key component and determines the gain and bandwidth of the amplifier. Negative feedback makes the input and output impedances easier to match and can improve the stability of the circuit. Introducing lossy matching in the drain bias can also improve the stability of the circuit, reduce the low-frequency gain, and reduce the burr phenomenon of the out-of-band gain curve, while the effect on the gain is small at high frequencies. The negative feedback MMIC low noise amplifier also has good tolerance characteristics, which improves the yield rate of tape-out.

[0029] like Figure 1 As shown, a high-gain low-noise amplifier of this embodiment includes an input matching network, an output matching network, a negative feedback network, a current multiplexing network, an RLC negative feedback network, a current mirror network and a DC bias network.

[0030] The input matching network, negative feedback network, current multiplexing network, RLC negative feedback network and output matching network are connected in sequence, the second transistor M2 of the current multiplexing network is multiplexed by the first transistor M1 of the negative feedback network, the RLC negative feedback network includes a first feedback resistor R1 and a second feedback resistor R2 in parallel, the second feedback resistor R2 is connected in series with a feedback capacitor C5, the feedback capacitor C5 is connected in parallel with a feedback inductor L4, the first feedback resistor R1 and the feedback inductor L4 are both connected to the second transistor M2, and the second transistor M2 is grounded through a fourth capacitor C4. Due to the existence of the first feedback resistor R1 and the second feedback resistor R2, the input and output impedances are very close to 50Ω, which greatly reduces the complexity of the matching network, because in the low frequency band, the transistor has a very low input impedance and an extremely high output impedance. If you want to match to 50Ω, the value of the required matching circuit components will become very extreme, and due to the limitations of the specific process, the values ​​of some components will make the chip area layout extremely unreasonable and the parasitic effect large, and the performance is limited. Applying the RLC negative feedback network, the matching network will become very simple. The first feedback resistor R1 and the second feedback resistor R2 are key feedback elements, and their values ​​determine the basic gain and bandwidth that are mutually constrained. At the same time, the first feedback resistor R1 and the second feedback resistor R2 also play a role of voltage division. The feedback inductor L4 introduces a certain frequency dependence to the RLC negative feedback network: in the low frequency band, the feedback inductor L4 has a small effect, and the first feedback resistor R1 and the second feedback resistor R2 control the size of the gain; in the high frequency band, the reactance of the feedback inductor L4 increases, reducing the depth of the negative feedback. Therefore, the role of the feedback inductor L4 is to maintain the gain flatness, so that the amplifier has good gain flatness in a wider frequency band, and the value of the feedback inductor L4 is very small. The role of the feedback capacitor C5 is to separate the positive potential drain of the second transistor M2 from the zero potential gate. The role of the feedback inductor L4 is to provide a gain peak at the upper edge of the frequency band, thereby expanding the bandwidth. The sixth resistor R6 is added to the current multiplexing network to prevent low-frequency oscillation and increase the stability of the amplifier.

[0031] In order to avoid the influence caused by temperature changes and process deviations, a current mirror network is used, which includes a third transistor M3, the third transistor M3 is respectively connected to the fifth inductor L5 and the fourth resistor R4, the fifth inductor L5 is connected to the first transistor M1, and the fourth resistor R4 is connected to the RLC negative feedback network through the third resistor R3; the fourth resistor R4 is grounded through the line between the third resistor R3 and the second resistor R21.

[0032] The first transistor M1 and the second transistor M2 use larger pHEMT tubes, the size of the first transistor M1 is 16*25μm, and the size of the second transistor M2 is 8*50μm. The third transistor M3 in the current mirror network uses the smallest pHEMT tube, the size of the third transistor M3 is 2*25μm.

[0033] The input matching network includes a first inductor L1 and a DC blocking capacitor C1 connected in series. The DC blocking capacitor C1 is connected to the first transistor M1 of the negative feedback network. The line between the DC blocking capacitor C1 and the first transistor M1 is grounded through the second inductor L2. The first inductor L1 and the feedback inductor L4 are used to offset the reactance generated by the parasitic capacitance in the input impedance, so that the input impedance is a real number, thereby facilitating impedance matching. The second inductor L2 provides a zero potential DC bias for the transistor gate, and at the same time provides effective isolation between the RF signal and the ground to prevent the RF signal from leaking and affecting the efficiency of the amplifier. At the same time, it also forms a part of the input matching network with the DC blocking capacitor C1.

[0034] The DC bias network includes a choke inductor L6, which is grounded via a filter capacitor C7.

[0035] like Figure 5 As shown, it is a layout simulation of a high-gain low-noise amplifier of this embodiment, which is powered by a +5V DC power supply, and the quiescent current power consumption is 50mA. Because a current multiplexing network is used, the first and second stages are both 50mA. From the joint simulation results of the layout schematic diagram, it can be seen that the typical values ​​of the noise coefficient are all below 0.5dB, the gain is 32dB, the gain flatness is ±0.6dB, the input\output return loss is good, and the P1dB is greater than 15dBm, and the linearity is good. According to the K-Δ criterion, the amplifier is unconditionally stable at 0~300GHz, and the chip area is 1.5*1.3*0.1(μm).

[0036] The present utility model is not limited to the above-mentioned optional implementation modes. Anyone can derive other various forms of products under the inspiration of the present utility model. However, no matter what changes are made in the shape or structure, all technical solutions that fall within the scope defined by the claims of the present utility model fall within the protection scope of the present utility model.

Claims

1. A high-gain low-noise amplifier, characterized in that: It includes a negative feedback network, a current multiplexing network and an RLC negative feedback network connected in sequence. The second transistor M2 of the current multiplexing network is multiplexed by the first transistor M1 of the negative feedback network. The RLC negative feedback network includes a first feedback resistor R1 and a second feedback resistor R2 connected in parallel. The second feedback resistor R2 is connected in series with a feedback capacitor C5. The feedback capacitor C5 is connected in parallel with a feedback inductor L4. The first feedback resistor R1 and the feedback inductor L4 are both connected to the second transistor M2.

2. The high-gain low-noise amplifier according to claim 1, characterized in that: It also includes a current mirror network, which includes a third transistor M3, the third transistor M3 is connected to the fifth inductor L5 and the fourth resistor R4 respectively, the fifth inductor L5 is connected to the first transistor M1, and the fourth resistor R4 is connected to the RLC negative feedback network through the third resistor R3; the fourth resistor R4 is grounded through the line between the third resistor R3 and the second resistor R21.

3. The high-gain low-noise amplifier according to claim 2, characterized in that: The size of the third transistor M3 is 2*25 μm.

4. The high-gain low-noise amplifier according to claim 1 or 3, characterized in that: The size of the first transistor M1 is 16*25 μm, and the size of the second transistor M2 is 8*50 μm.

5. The high-gain low-noise amplifier according to claim 1, characterized in that: The negative feedback network is connected to an input matching network, which includes a first inductor L1 and a DC blocking capacitor C1 connected in series. The DC blocking capacitor C1 is connected to a first transistor M1 of the negative feedback network, and a line between the DC blocking capacitor C1 and the first transistor M1 is grounded through a second inductor L2.

6. The high-gain low-noise amplifier according to claim 1, characterized in that: The second transistor M2 is grounded via a fourth capacitor C4.

7. The high-gain low-noise amplifier according to claim 1, characterized in that: A DC bias network is also included. The DC bias network includes a choke inductor L6. The choke inductor L6 is grounded via a filter capacitor C7.