Photoelectric detector and chip

Abstract

The embodiment of the utility model discloses a photoelectric detector and a chip, and the photoelectric detector comprises a first conductive type region, an intrinsic region, a second conductive type region, a first electrode and a second electrode. Wherein the first conductive type region is manufactured based on a first silicon layer, the intrinsic region is manufactured based on a first germanium layer, the second conductive type region is manufactured based on a second silicon layer, the first silicon layer, the first germanium layer and the second silicon layer are sequentially arranged in the thickness direction of the photoelectric detector, the thickness of the intrinsic region is smaller than or equal to 80 nm, and the thickness of the intrinsic region is smaller than or equal to 80 nm. The width of the intrinsic region is greater than or equal to 2 microns; the first electrode is electrically connected to the first conductive type region, and the second electrode is electrically connected to the second conductive type region.

Description

Technical Field

[0001] The utility model relates to the field of semiconductors, in particular to a photoelectric detector and a chip. Background Art

[0002] Photodetectors are one of the key components of high-speed optoelectronic devices, and one type of them is the germanium PIN photodetector. Utility Model Content

[0003] The utility model provides a photoelectric detector and a manufacturing method of the photoelectric detector, aiming to optimize the performance of the photoelectric detector.

[0004] According to one aspect of the utility model, the utility model provides a photodetector, comprising: a first conductive type region, an intrinsic region and a second conductive type region; wherein the first conductive type region is manufactured based on a first silicon layer, the intrinsic region is manufactured based on a first germanium layer, and the second conductive type region is manufactured based on a second silicon layer, and the first silicon layer, the first germanium layer and the second silicon layer are arranged sequentially in the thickness direction of the photodetector; the thickness of the intrinsic region is less than or equal to 80nm, and the width of the intrinsic region is greater than or equal to 2 microns; the first electrode is electrically connected to the first conductive type region, and the second electrode is electrically connected to the second conductive type region.

[0005] In some embodiments, on a plane perpendicular to the thickness direction of the photodetector, a projection of the first conductive type region and a projection of the intrinsic region at least partially overlap, and a projection of the second conductive type region and a projection of the intrinsic region at least partially overlap.

[0006] In some embodiments, on a plane perpendicular to the thickness direction of the photodetector, a projection of the first conductive type region, a projection of the intrinsic region, and a projection of the second conductive type region at least partially overlap.

[0007] In some embodiments, the intrinsic region is at least partially embedded in the first conductivity type region.

[0008] In some embodiments, the photodetector further includes a first conductive structure and a second conductive structure; the first conductive structure is electrically connected to the first conductive type region, and the second conductive structure is electrically in contact with the second conductive type region.

[0009] In some embodiments, the first conductive type region includes a first region and a second region doped with a first dopant, the second region being connected to a side of the first region relatively far away from the second conductive type region; the second conductive type region includes a third region and a fourth region doped with a second dopant, the fourth region being connected to a side of the third region relatively far away from the first conductive type region; the doping concentration of the first region is less than that of the second region; and the doping concentration of the third region is less than that of the fourth region.

[0010] In some embodiments, the second region is electrically connected to the first conductive structure, and the fourth region is electrically connected to the second conductive structure.

[0011] In some embodiments, the first conductivity type region and the second conductivity type region have opposite conductivity types.

[0012] In some embodiments, the first conductivity type region is of N-type conductivity, and the second conductivity type region is of P-type conductivity.

[0013] In some embodiments, the first silicon layer has a trench, and the thickness of the intrinsic region is greater than the depth of the trench.

[0014] In some embodiments, the thickness of the intrinsic region located inside the trench is 30% to 70% of the thickness of the intrinsic region.

[0015] According to one aspect of the utility model, a chip is provided, wherein the chip includes a photodetector.

[0016] Through one or more of the above embodiments of the present invention, at least the following technical effects can be achieved:

[0017] The utility model optimizes the structure and formation process of the photodetector device by setting grooves in silicon to form germanium in the required specific area, and further includes many advantages such as reducing defect states and optimizing lattice quality, thereby optimizing the performance of the device from many aspects. In addition, a vertical Si / Ge / Si structure photodetector is proposed, which optimizes the electrical contact of the photodetector and further optimizes the performance of the photodetector. In addition, the appropriate thickness and width of the germanium layer can be set through relevant processes to optimize its bandwidth and responsiveness. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The technical solutions and other beneficial effects of the present invention will be made apparent by describing in detail the specific embodiments of the present invention in conjunction with the accompanying drawings.

[0019] Figure 1 A schematic diagram of the structure of a photoelectric detector provided in an embodiment of the utility model;

[0020] Figure 2 A flowchart of the steps of the method for manufacturing a photoelectric detector provided by an embodiment of the utility model;

[0021] Figure 3 A schematic diagram of the structure of a substrate provided in an embodiment of the utility model;

[0022] Figure 4 A schematic diagram of forming a first conductivity type region by using a first silicon layer provided in an embodiment of the utility model;

[0023] Figure 5 A schematic diagram of forming a first silicon oxide layer on a first silicon layer provided in an embodiment of the utility model;

[0024] Figure 6 A schematic diagram of forming a groove in a first silicon layer according to an embodiment of the utility model;

[0025] Figure 7 A schematic diagram of growing a first germanium layer on a trench provided in an embodiment of the utility model;

[0026] Figure 8 A schematic diagram of forming an intrinsic region provided in an embodiment of the utility model;

[0027] Fig. 9 A schematic diagram of forming a second conductivity type region by using a second silicon layer provided in an embodiment of the utility model;

[0028] Fig.10 A schematic diagram of the structure of a photoelectric detector provided in an embodiment of the utility model.

[0029] The meanings of the figure marks are as follows: 1000-photodetector; 100-first conductive type region; 110-first region 110; 120-second region; 200-intrinsic region; 300-second conductive type region; 310-third region; 320-fourth region; 400-first conductive structure; 500-second conductive structure; 11-bottom silicon; 12-buried oxide layer; 13-first silicon layer; 131-trench; 20-first germanium layer; 30-second silicon layer; 40-dielectric layer; 50-first silicon oxide layer. DETAILED DESCRIPTION

[0030] The technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application.

[0031] In the description of the present application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application. In addition, the terms "first" and "second" are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present application, the meaning of "multiple" is two or more, unless otherwise clearly and specifically defined.

[0032] In the description of this application, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, an electrical connection, or mutual communication; it can be a direct connection, or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0033] In the present application, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may include that the first and second features are in direct contact, or may include that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, a first feature being "above", "above" and "above" a second feature includes that the first feature is directly above and obliquely above the second feature, or simply indicates that the first feature is higher in level than the second feature. A first feature being "below", "below" and "below" a second feature includes that the first feature is directly below and obliquely below the second feature, or simply indicates that the first feature is lower in level than the second feature.

[0034] The disclosure below provides many different embodiments or examples to realize the different structures of the present application. In order to simplify the disclosure of the present application, the parts and settings of specific examples are described below. Of course, they are only examples, and the purpose is not to limit the present application. In addition, the present application can repeat reference numbers and / or reference letters in different examples, and this repetition is for the purpose of simplification and clarity, which itself does not indicate the relationship between the various embodiments and / or settings discussed. In addition, the various specific processes and material examples provided by the present application, but those of ordinary skill in the art can appreciate the application of other processes and / or the use of other materials.

[0035] The inventor of the present invention has found that the traditional vertical germanium photodetector adopts a vertically arranged Ge / Ge / Si structure from top to bottom, and uses germanium as one of the connection ends of the metal electrode, which can achieve a higher bandwidth but will result in a lower light response. The present invention forms a vertical Si / Ge / Si photodetector, optimizes the electrical contact of the photodetector, and optimizes the performance of the photodetector; in addition, by setting grooves and related processes in silicon to form germanium in the required specific area, the structure and formation process of the photodetector device are optimized, and further includes many advantages such as reducing defect states and optimizing lattice quality, thereby optimizing the performance of the device from many aspects.

[0036] Embodiment 1

[0037] The utility model provides a photoelectric detector 1000, Figure 1 This is a schematic diagram of the structure of a photodetector 1000 provided in one embodiment of the present application.

[0038] like Figure 1 As shown, the photodetector 1000 includes a first conductive type region 100, an intrinsic region 200, and a second conductive type region 300. The first conductive type region 100 is manufactured based on a first silicon layer 13, the intrinsic region 200 is manufactured based on a first germanium layer, and the second conductive type region 300 is manufactured based on a second silicon layer. The first silicon layer 13, the first germanium layer, and the second silicon layer are arranged in sequence in the thickness direction of the photodetector 1000.

[0039] In an embodiment of the utility model, there is incident light in a direction perpendicular to the photodetector 1000. The incident light enters the intrinsic region through a silicon waveguide, and photoelectric detection is performed through the vertically arranged silicon-germanium-silicon PIN structure. Compared with the structure in which a P-type region is arranged on a germanium layer, the connection ends of the metal electrodes in the utility model are all silicon layers, thereby avoiding direct contact between the germanium layer and the metal electrode, thereby effectively improving the light response of the photodetector.

[0040] In some embodiments, on a plane perpendicular to the thickness direction of the photodetector 1000 or on a plane parallel to the first silicon layer 13, the projection of the first conductive type region 100 and the projection of the intrinsic region 200 at least partially overlap, and the projection of the second conductive type region 300 and the projection of the intrinsic region 200 at least partially overlap. The position where the projection of the first conductive type region 100 overlaps with the projection of the intrinsic region 200 is the contact area between the two. In some embodiments, on a plane perpendicular to the thickness direction of the photodetector 1000, the projection of the first conductive type region 100, the projection of the intrinsic region 200, and the projection of the second conductive type region 300 at least partially overlap. Figure 1 In the illustrated embodiment, the projections of the first conductive type region 100 , the intrinsic region 200 , and the second conductive type region 300 have a common overlapping portion, and the projection of the intrinsic region 200 completely overlaps the projections of the first conductive type region 100 and / or the second conductive type region 300 .

[0041] In some embodiments, the intrinsic region 200 is at least partially embedded in the first conductive type region 100. Figure 1 As shown, the first conductive type region 100 has a groove (see Figure 6 The intrinsic region 200 fills the trench, and its surface exceeds the first conductive type region 100 by a certain height.

[0042] In some embodiments, the photodetector 1000 further includes a first conductive structure 400 and a second conductive structure 500. The first conductive structure 400 is electrically connected to the first conductive type region 100, and the second conductive structure 500 is electrically in contact with the second conductive type region 300. The photogenerated carriers generated by the intrinsic region 200 during light absorption are output as current under an electric field, thereby realizing photoelectric detection by converting optical signals into electrical signals. Exemplarily, the first conductive structure and the second conductive structure may be metal materials, such as metal tungsten.

[0043] The second conductive type region 300 is made of silicon material, which is more suitable for manufacturing using silicon semiconductor technology, thereby forming a vertical photodetector of silicon / germanium / silicon from top to bottom. In addition, the second conductive type region 300 can also form the required doping based on the doping process of the silicon material to form a good electrical contact.

[0044] In some embodiments, the first conductive type region 100 includes a first region 110 and a second region 120 doped with a first dopant, and the second region 120 is connected to a side of the first region 110 relatively far from the second conductive type region 300. The second conductive type region 300 includes a third region 310 and a fourth region 320 doped with a second dopant, and the fourth region 320 is connected to a side of the third region 310 relatively far from the first conductive type region 100. The doping concentration of the first region 110 is less than that of the second region 120; the doping concentration of the third region 310 is less than that of the fourth region 320. The second region 120 is electrically connected to the first conductive structure 400, and the fourth region 320 is electrically connected to the second conductive structure 500.

[0045] In the first conductive type region 100 and the second conductive type region 300, the first region 110 and the third region 310 with low doping concentration have semiconductor properties and are used to constitute the P-type region or N-type region of the PIN photodetector 1000 to collect photogenerated carriers, and the second region 120 and the fourth region 320 with high doping concentration are used to make metal connections with the conductive structure to achieve ohmic contact.

[0046] In some embodiments, the first conductive type region 100 and the second conductive type region 300 have opposite conductive types. The opposite conductive types of the first conductive type region 100 and the second conductive type region 300 can be achieved by doping processes such as ion implantation. That is, the first conductive type region 100 and the second conductive type region 300 are doped to exhibit opposite conductive types. The conductive types include P-type conductive type and N-type conductive type. In some embodiments, in order to make a certain conductive type region exhibit N-type conductive type, N-type impurities and P-type impurities can be doped simultaneously. Exemplarily, the concentration of N-type impurities can be selected to be much greater than the concentration of P-type impurities. In other embodiments, in order to make a certain conductive type region exhibit P-type conductive type, N-type impurities and P-type impurities can be doped simultaneously. Exemplarily, the concentration of N-type impurities can be selected to be much greater than the concentration of P-type impurities. In other embodiments, in order to make a certain conductive type region exhibit P-type conductive type, N-type impurities and P-type impurities can be doped simultaneously. Exemplarily, the concentration of N-type impurities can be selected to be much less than the concentration of P-type impurities.

[0047] In some embodiments, the first conductive type region 100 may be doped to exhibit an N conductive type, and the second conductive type region 300 may be doped to exhibit a P conductive type.

[0048] In some embodiments, Figure 1 As shown, the photodetector 1000 includes a dielectric layer 40, which is arranged on the surface of the substrate 10. For example, the dielectric layer 40 covers the surface of the substrate 10, encapsulating the first conductive type region 100, the intrinsic region 200, the second conductive type region 300, and the first conductive structure 400 and the second conductive structure 500. The conductive structure is electrically connected to the outside through a contact hole opened on the dielectric layer 40.

[0049] The following is a method for manufacturing a photodetector 1000, which is used to prepare the photodetector 1000 provided in the above embodiments. The photodetector 1000 includes a first conductive type region 100, an intrinsic region 200 and a second conductive type region 300. Figure 2 As shown, the manufacturing method includes steps 101 to 103.

[0050] Step 101: providing a substrate, the substrate comprising a first silicon layer, and forming a first conductivity type region using the first silicon layer.

[0051] like Figure 3 As shown, the substrate may be a silicon-on-insulator SOI substrate, the substrate comprising a bottom silicon layer 11 and a buried oxide layer 12 arranged in sequence, and a first silicon layer 13 is arranged on the buried oxide layer 12. Exemplarily, the buried oxide layer 12 has a thickness of 2um, and the first silicon layer 13 has a thickness of 220nm.

[0052] like Figure 4 As shown, the step of forming the first conductive type region 100 using the first silicon layer 13 includes: doping the first conductive type region 100 to form a first region 110 having a first doping concentration. Doping a portion of the first region 110 to form a second region 120 having a second doping concentration. Exemplarily, a second silicon oxide layer can be first formed on the surface of the first silicon layer 13 by surface thermal oxidation, and then the first region 110 having the first doping concentration and the second region 120 having the second doping concentration are formed by etching, doping and other processes.

[0053] Step 102: growing a first germanium layer on the first silicon layer, and forming an intrinsic region using the first germanium layer.

[0054] The above-mentioned step of growing the first germanium layer 20 on the first silicon layer 13 and forming the intrinsic region 200 using the first germanium layer 20 includes:

[0055] like Figure 5 As shown, a first silicon oxide layer 50 is formed on the first silicon layer 13. Exemplarily, the first silicon oxide layer 50 may be formed by a deposition process.

[0056] Furthermore, if Figure 6As shown, a groove 131 is formed in the first silicon layer 13, and the groove 131 can be used to accommodate germanium. Forming the groove 131 may include etching the first silicon layer 13, and etching a portion of the first silicon oxide layer. The first silicon oxide layer 50 covers the surface of the first silicon layer 13 except the groove 131. Exemplarily, the groove 131 can be formed in the first silicon layer 13 by an etching process. In some embodiments, after the groove 131 is formed in the first silicon layer 13, the groove 131 is thermally oxidized to repair the silicon layer on the surface of the groove 131, reduce the interface defect state density during the subsequent heteroepitaxial germanium layer in the groove 131, and improve the quality of the grown germanium layer, thereby reducing the dark current of the photodetector 1000, wherein the dark current of the photodetector 1000 refers to the current flowing in the photodetector 1000 under the condition of no light (light entering).

[0057] Furthermore, if Figure 7 As shown, a first germanium layer 20 is grown on the groove 131. In some embodiments, the first germanium layer 20 can be grown on the first trench 131 until the height of the first germanium layer 20 is not less than the first silicon layer 13, so as to utilize the overgrowth of the first germanium layer 20 to form a first germanium layer 20 embedded in the groove 131 of the first silicon layer 13 but with a surface higher than the first silicon layer 13.

[0058] In the embodiment of the present application, due to the process and growth characteristics of germanium growth, germanium cannot grow on the first silicon oxide layer 50, and can only grow on the surface of the first silicon layer exposed by the groove. Therefore, by utilizing the grooves in the first silicon layer 13 and performing a certain amount of overgrowth in this process, the lattice quality of the germanium layer in the intrinsic region can be improved, thereby improving the bandwidth of the photodetector.

[0059] Furthermore, if Figure 8 As shown, the surface of the first germanium layer 20 is planarized, the first silicon oxide layer 50 is removed, and the intrinsic region 200 is formed. Exemplarily, the surface of the first germanium layer 20 can be planarized and the first silicon oxide layer 50 can be removed by chemical means or mechanical grinding. It should be noted that the portion of the first germanium layer 20 that spreads to the surface of the first silicon oxide layer 50 during overgrowth can be removed together when the first silicon oxide layer 50 is removed, and does not need to be removed separately. The thickness of the first germanium layer 20 is determined by the thickness of the groove 131 and the height of the first germanium layer 20 exceeding the surface of the groove 131, wherein the thickness of the groove 131 is determined when the groove 131 is formed, and the height exceeding the surface of the groove 131 is determined when the surface of the first germanium layer 20 is planarized.

[0060] Step 103: growing a second silicon layer on the first germanium layer and the first silicon layer, and forming a second conductivity type region using the second silicon layer.

[0061] After the second silicon layer 30 is grown, Fig. 9As shown, the above-mentioned forming the second conductive type region 300 using the second silicon layer 30 includes: doping the second conductive type region 300 to form a third region 310 with a third doping concentration. Doping a part of the third region 310 to form a fourth region 320 with a fourth doping concentration.

[0062] In some embodiments, after step 103, the manufacturing method further includes completing subsequent metal silicide self-alignment, manufacturing an etch stop layer, manufacturing a dielectric layer 40, manufacturing a metal contact hole, and other process flows to obtain Figure 1 The photodetector 1000 is shown.

[0063] In some embodiments, the thickness of the intrinsic region 200 can be a thin layer, such as a thickness d≤80nm, for example, 20nm to 80nm, and illustratively, such as 30nm, 40nm, 60nm. A thinner thickness is beneficial for obtaining a high-bandwidth photodetector; the width of the intrinsic region 200 can be ≥2μm, for example 2 to 10um, which greatly increases the contact area between germanium and the bottom silicon waveguide, thereby improving the optical coupling efficiency, and germanium can absorb more light, thereby improving the responsiveness of the germanium photodetector.

[0064] Exemplarily, the first silicon layer has a groove, and the thickness of the intrinsic region is greater than the depth of the groove. The thickness of the intrinsic region 200 located inside the groove is 30% to 70% of the thickness of the intrinsic region, which is beneficial to the characteristics of the photodetector, for example, 30%, 40% or 45%, and in some embodiments, it can be 50% to 70%. Exemplarily, see Figure 5-7 The thickness of the first germanium layer 20 can be controlled by controlling the thickness of the first oxide layer 50, thereby controlling the thickness of the intrinsic region 200 that is finally formed. On the other hand, the thickness of the intrinsic region 200 also depends on the height (depth) of the trench. Therefore, the etching depth of the trench can also be controlled to obtain a suitable thickness dimension of the intrinsic region 200.

[0065] Exemplarily, the photodetector includes a first electrode and a second electrode, the first conductive type region is connected to the first electrode through the first conductive structure, and the second conductive type region is connected to the second electrode through the second conductive structure.

[0066] According to one aspect of the utility model, a chip is provided, the chip comprising the above-mentioned photodetector. In addition, the chip may also include other devices, such as an optical modulator, a photodetector, a microring resonator, an optical beam splitter, etc.

[0067] In the above steps, the specific steps for depositing each layer can be designed according to actual needs, and the embodiments of the present application do not specifically limit this. The specific steps for etching each layer can be designed according to actual needs, and the embodiments of the present application do not specifically limit this. The specific steps for doping each layer can also be designed according to actual needs, wherein the number of doping regions and the doping concentration and doping ions of each doping region can be determined according to actual needs.

[0068] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described or recorded in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0069] This document uses specific examples to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the technical solution and its core idea of ​​the present application. Ordinary technicians in this field should understand that they can still modify the technical solutions recorded in the aforementioned embodiments, or replace some of the technical features therein with equivalents; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A photoelectric detector, characterized in that: include: A first conductivity type region, an intrinsic region and a second conductivity type region, a first electrode and a second electrode; Among them, the first conductive type region is manufactured based on a first silicon layer, the intrinsic region is manufactured based on a first germanium layer, and the second conductive type region is manufactured based on a second silicon layer. The first silicon layer, the first germanium layer and the second silicon layer are arranged sequentially in the thickness direction of the photodetector. The thickness of the intrinsic region is less than or equal to 80nm, and the width of the intrinsic region is greater than or equal to 2 microns. The first electrode is electrically connected to the first conductive type region, and the second electrode is electrically connected to the second conductive type region.

2. The photodetector according to claim 1, wherein: On a plane perpendicular to the thickness direction of the photodetector, a projection of the first conductive type region at least partially overlaps with a projection of the intrinsic region, and a projection of the second conductive type region at least partially overlaps with a projection of the intrinsic region.

3. The photodetector according to claim 1, wherein: On a plane perpendicular to the thickness direction of the photodetector, a projection of the first conductive type region, a projection of the intrinsic region, and a projection of the second conductive type region at least partially overlap.

4. The photodetector according to claim 1, wherein: The intrinsic region is at least partially embedded in the first conductivity type region.

5. The photodetector according to claim 1, wherein: Also includes: A first conductive structure and a second conductive structure; the first conductive structure is electrically connected to the first conductive type region, and the second conductive structure is electrically connected to the second conductive type region.

6. The photodetector according to claim 5, characterized in that The first conductive type region includes a first region doped with a first dopant and a second region, wherein the second region is connected to a side of the first region relatively far from the second conductive type region; The second conductive type region includes a third region and a fourth region doped with a second dopant, the fourth region being connected to a side of the third region relatively far away from the first conductive type region; the doping concentration of the first region is less than that of the second region; and the doping concentration of the third region is less than that of the fourth region.

7. The photodetector according to claim 6, wherein: The second region is electrically connected to the first conductive structure, and the fourth region is electrically connected to the second conductive structure.

8. The photodetector according to claim 1, wherein: The first conductive type region is of N-type conductive type, and the second conductive type region is of P-type conductive type.

9. The photodetector according to claim 1, wherein: The first silicon layer has a groove, and the thickness of the intrinsic region located inside the groove is 30% to 70% of the thickness of the intrinsic region.

10. A chip comprising the photodetector according to any one of claims 1 to 9.

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