Low-power-consumption dual-power-supply switching circuit
By using a low-power dual-power switching circuit, PNP and NPN field-effect transistors and diodes are used to automatically switch to internal battery power when external power fails. This solves the problem of loss of sensing capability when the equipment is interrupted in remote, concealed or enclosed spaces, and ensures continuous power supply to the equipment.
Patent Information
- Application Number
- CN202323402550.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2023-12-13
- Publication Date
- 2025-02-11
- Estimated Expiration
- 2033-12-13
AI Technical Summary
Existing equipment cannot automatically switch to internal battery power when power is interrupted in remote, concealed, or enclosed spaces, resulting in loss of sensing capabilities and potentially causing significant losses and serious consequences.
Design a low-power dual-power switching circuit, which includes external power and battery circuits. Utilize PNP and NPN field-effect transistors and diodes to automatically switch to internal battery power when external power is lost, and switch back to external power when external power is restored.
This device ensures that it automatically switches to internal battery power when external power is lost, preventing loss of sensing capability, and automatically switches back to external power when external power is restored. It is suitable for front-end sensing devices that are difficult to handle in a timely manner.
Smart Images
Figure CN222464231U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of power supply, in particular to a low-power consumption dual-power supply switching circuit. Background Art
[0002] Monitors, alarms, cameras and other equipment are widely used in the field of remote and centralized monitoring for sensing and transmitting data of on-site environmental parameters (including temperature and humidity collection, hazardous gas sensing, video recording, etc.). Such equipment is mostly deployed at remote sites, including high places, narrow slits, hidden areas or confined spaces where daily operations, inspections and maintenance are inconvenient. The equipment needs to be in a continuous power supply state when it is running. Once the power is cut off, the sensing ability will be lost immediately, which may cause significant losses (such as monitors) and serious consequences (such as alarms). Therefore, such equipment requires a more reliable power supply method. Utility Model Content
[0003] The technical problem to be solved by the utility model is to provide a low-power dual-power switching circuit, which can use two working conditions: external power supply and internal battery. When the external power is lost, it can automatically switch to the internal battery power supply, and then switch back to the external power supply after the external power is restored. It is particularly suitable for front-end sensing equipment located in areas that are not easy to process in time.
[0004] The low-power dual power switching circuit includes an external power circuit and a battery circuit. The output ends of the external power circuit and the battery circuit are connected to a common power supply end SYS_VDD. The external power circuit includes an external power interface. The external power interface is connected to the common power supply end SYS_VDD via a diode D1 and a step-down chip U12. Field effect transistors Q9 and Q10 are connected to the upstream and downstream of the common power supply end SYS_VDD respectively. The field effect transistor Q9 is connected to a pull-up resistor R103, and the field effect transistor Q10 is connected to a voltage relief resistor R145. The battery circuit includes a battery interface. The battery interface is connected to the common power supply end SYS_VDD via field effect transistors Q25 and Q26. The gates of the field effect transistors Q25 and Q26 are connected to a pull-down resistor R149.
[0005] Furthermore, the field effect transistor Q9 is a PNP field effect transistor, and the gate of the field effect transistor Q9 is connected to the system power supply terminal SYS_VDD through the pull-up resistor R103; the field effect transistor Q10 is an NPN field effect transistor, and the gate of the field effect transistor Q10 is connected to the voltage relief resistor R145.
[0006] Furthermore, the field effect transistor Q25 is a PNP field effect transistor, and the gate of the field effect transistor Q10 is connected to the pull-down resistor R147; the field effect transistor Q26 is an NPN field effect transistor, and the gate of the field effect transistor Q10 is connected to the voltage-discharging resistor R148.
[0007] Optimally, a protection diode D11 is connected to the gate terminal of the field effect transistor Q10.
[0008] The utility model discloses a low-power consumption dual power switching circuit, which can use two working conditions: external power supply and internal battery. When the external power fails, the circuit can automatically switch to the internal battery power supply, and then switch back to the external power supply after the external power is restored. The utility model is particularly suitable for front-end sensing equipment located in areas that are difficult to process in time. BRIEF DESCRIPTION OF THE DRAWINGS
[0009] The following is a further description of a low power consumption dual power switching circuit of the utility model in conjunction with the accompanying drawings:
[0010] Figure 1 This is the logic structure and connection principle wireframe diagram of this low-power dual power switching circuit;
[0011] Figure 2 It is a circuit diagram of the external power circuit of the low-power dual power switching circuit;
[0012] Figure 3 It is a circuit diagram of the battery part circuit of the low-power dual power switching circuit.
[0013] In the figure:
[0014] 1- external power circuit, 2- battery circuit; 11- external power interface, 21- battery interface DETAILED DESCRIPTION
[0015] In the present invention, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be directly connected or indirectly connected through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.
[0016] In the description of the present invention, it should be understood that the terms "left", "right", "front", "back", "top", "bottom", "inside", "outside", etc., indicating directions or positional relationships, are based on the directions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific direction, be constructed and operated in a specific direction, and therefore cannot be understood as a limitation on the present invention.
[0017] The technical solution of the utility model is further described below with specific embodiments, but the protection scope of the utility model is not limited to the following embodiments.
[0018] Implementation method 1: Figures 1 to 3 As shown, the low-power dual power switching circuit includes an external power circuit 1 and a battery circuit 2, and the output ends of the external power circuit 1 and the battery circuit 2 are connected to the common power supply end SYS_VDD, wherein the external power circuit 1 includes an external power interface 11, and the external power interface 11 is connected to the common power supply end SYS_VDD via a diode D1 and a step-down chip U12, and the common power supply end SYS_VDD is respectively connected to field effect transistors Q9 and Q10 upstream and downstream, and the field effect transistor Q9 is connected to a pull-up resistor R103, and the field effect transistor Q10 is connected to a voltage relief resistor R145; the battery circuit 2 includes a battery interface 21, and the battery interface 21 is connected to the common power supply end SYS_VDD via field effect transistors Q25 and Q26; the gates of the field effect transistors Q25 and Q26 are connected to a pull-down resistor R149.
[0019] Implementation 2: The field effect transistor Q9 of this low-power dual power switching circuit is a PNP field effect transistor, and the gate of the field effect transistor Q9 is connected to the system power supply terminal SYS_VDD after being pulled up by the resistor R103; the field effect transistor Q10 is an NPN field effect transistor, and the gate of the field effect transistor Q10 is connected to the voltage bleeder resistor R145. The field effect transistor Q25 is a PNP field effect transistor, and the gate of the field effect transistor Q10 is connected to the pull-down resistor R147; the field effect transistor Q26 is an NPN field effect transistor, and the gate of the field effect transistor Q10 is connected to the voltage bleeder resistor R148. The remaining structures and components are as described in Implementation 1 and will not be described again.
[0020] Implementation 3: The gate end of the field effect transistor Q10 described in this low-power dual power switching circuit is connected to a protective diode D11. D11 is selected to be smaller than the gate voltage of Q10 and larger than the conduction voltage. When the external power voltage is higher than the maximum reverse voltage of the diode, the diode D11 will cooperate with R146 to stabilize the voltage at a constant value, thereby protecting Q10; when the external power is connected in reverse, D11 will control the gate voltage of Q10 to about 0.7V, thereby also protecting Q10. The remaining structures and components are as described in Implementation 1 and will not be described again.
[0021] During operation: When there is no external power or power is lost, the external circuit input voltage is 0V, and the step-down chip U12 has no power output. Figure 2 The voltage at V_1 is 0V. At this time, the gate charge of Q10 will be discharged through R145, making Q10 in an open circuit state. Q9 is also in an open circuit state due to the presence of the pull-up resistor R103, and SYS_VDD is disconnected relative to V_1. Furthermore, under the premise that V_1 output is 0, Figure 3Due to the presence of R149 in the battery circuit, the gate voltage of Q25 and Q26 is pulled down, forcing Q25 and Q26 to be in the on state, which is equivalent to V_Battery and SYS_VDD being in the on state, so that the circuit system is powered by the battery. When the external power is on, U12 has a voltage output and V_1 has an output voltage. The initial design is that the output voltage of V_1 is equal to the V_Battery voltage. According to the characteristics of the PMOS tube, V_Battery is in the cut-off state and the battery does not output current to the outside; at the same time, the external power has a voltage input, which makes Q10 in the on state, pulls down the gate voltage of Q9, and then makes Q9 in the on state, realizing that the voltage of SYS_VDD is switched to the external power.
[0022] This low-power dual power switching circuit can use both external power supply and internal battery power supply. It can automatically switch to internal battery power supply when the external power is lost, and then switch back to external power supply after the external power is restored. It is especially suitable for front-end sensing equipment located in areas that are difficult to handle in time.
[0023] The above description shows the main features, basic principles, and advantages of the utility model. For those skilled in the art, it is obvious that the utility model is not limited to the details of the above exemplary embodiments or embodiments, and the utility model can be implemented in other specific forms without departing from the spirit or basic features of the utility model. Therefore, the above embodiments or embodiments should be regarded as exemplary and non-restrictive. The scope of the utility model is defined by the attached claims rather than the above description, and it is intended that all changes falling within the meaning and scope of the equivalent elements of the claims are included in the utility model. Any figure mark in the claims should not be regarded as limiting the claims involved.
[0024] In addition, it should be understood that although the present specification is described according to implementation modes, not every implementation mode contains only one independent technical solution. This description of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment may also be appropriately combined to form other implementation modes that can be understood by those skilled in the art.
Claims
1. A low power consumption dual power switching circuit, characterized in that: It comprises an external power circuit (1) and a battery circuit (2), wherein the output ends of the external power circuit (1) and the battery circuit (2) are connected to a common power supply end SYS_VDD, wherein: The external power circuit (1) comprises an external power interface (11), the external power interface (11) is connected to a common power supply terminal SYS_VDD via a diode D1 and a step-down chip U12, the common power supply terminal SYS_VDD is respectively connected to field effect transistors Q9 and Q10 upstream and downstream, the field effect transistor Q9 is connected to a pull-up resistor R103, and the field effect transistor Q10 is connected to a voltage relief resistor R145; the battery circuit (2) comprises a battery interface (21), the battery interface (21) is connected to the common power supply terminal SYS_VDD via field effect transistors Q25 and Q26; the gate electrodes of the field effect transistors Q25 and Q26 are connected to a pull-down resistor R149.
2. The low power consumption dual power switching circuit according to claim 1, characterized in that: The field effect transistor Q9 is a PNP field effect transistor, and the gate of the field effect transistor Q9 is connected to the system power supply terminal SYS_VDD through a pull-up resistor R103; the field effect transistor Q10 is an NPN field effect transistor, and the gate of the field effect transistor Q10 is connected to a voltage relief resistor R145.
3. The low power consumption dual power switching circuit according to claim 2, characterized in that: The field effect transistor Q25 is a PNP field effect transistor, and the gate of the field effect transistor Q10 is connected to the pull-down resistor R147; the field effect transistor Q26 is an NPN field effect transistor, and the gate of the field effect transistor Q10 is connected to the voltage-discharging resistor R148.
4. The low power consumption dual power switching circuit according to claim 3, characterized in that: The gate terminal of the field effect transistor Q10 is connected with a protection diode D11.