True random number generator, true random number generation system and system-on-chip
By integrating multiple different types of random number source outputters on the SOC chip and using the processor to perform algorithmic processing on its data, the problem of single entropy source of true random number generator in the SOC chip is solved, and the quality of random numbers is improved and stability.
Patent Information
- Application Number
- CN202323489351.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2023-12-21
- Publication Date
- 2025-02-14
- Estimated Expiration
- 2033-12-21
AI Technical Summary
The entropy source of the true random number generator in existing SOC chips is single, resulting in poor quality of the generated random numbers and is susceptible to external interference, which makes the random effect worse or even fails.
Design a true random number generator that integrates multiple different types of random number source outputs, such as sensors, analog-to-digital converters and memory. Each random number source output has different data and uses the processor to output these data. Perform algorithmic processing of enhanced random numbers to generate true random numbers.
Through the collection and integration of multiple entropy sources, the randomness and quality of random numbers are improved, and the risk of random number generation failure caused by single entropy source failure is reduced. In the case where the SOC chip does not have an integrated true random number generator, Use other resources to generate true random numbers.
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Figure CN222482719U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of random number generation technology, and in particular to a true random number generator, a true random number generation system, and a system-on-a-chip. Background Technology
[0002] Currently, random numbers are widely used in many fields of modern science, such as computer science, medicine, and finance. Products in these fields all rely heavily on System-on-Chips (SOCs), such as information security communication terminals, online banking USB tokens, lottery systems, and laser marking equipment. Therefore, generating truly random numbers using SOCs has become a common need. Related technologies primarily involve integrating a truly random number generator onto the SOC chip to generate truly random numbers.
[0003] However, the data sources for generating true random numbers in related technologies are too limited. Utility Model Content
[0004] Therefore, it is necessary to provide a true random number generator, a true random number generation system, and a system-on-a-chip to address the aforementioned technical problems and improve the diversity of data sources when generating true random numbers.
[0005] In a first aspect, this application provides a true random number generator, which includes: multiple random number source outputters of different types; each random number source outputter outputs different data;
[0006] The data output by each random number source outputter is used to generate true random numbers.
[0007] In one embodiment, each random number source output is any one of a sensor, an analog-to-digital converter, and a memory.
[0008] In one embodiment, the sensor type is any one of a process sensor, a voltage sensor, and a temperature sensor.
[0009] In one embodiment, each random number source output is provided with a switching unit, which is used to turn the random number source output on and off.
[0010] In one embodiment, each switching unit is a transistor switch.
[0011] In one embodiment, the true random number generator further includes a processor; each random number source outputter is connected to the processor; each random number source outputter outputs data to the processor, and the processor performs enhanced random number processing on the data to generate true random numbers.
[0012] In one embodiment, the true random number generator further includes multiple signal acquisition units, each of which is connected to the processor via a signal acquisition unit.
[0013] In one embodiment, each signal acquisition unit includes an analog-to-digital converter (ADC), the input of which is connected to a random number source output, and the output of which is connected to a processor.
[0014] Secondly, this application also provides a true random number generation system, which includes the true random number generator in any of the embodiments of the first aspect described above.
[0015] Thirdly, this application also provides a system-on-a-chip, which includes the true random number generation system described in the second aspect above.
[0016] The aforementioned true random number generator, true random number generation system, and system-on-a-chip (SoC) include multiple random number source outputters of different types, each outputting different data. The data output by each random number source outputter is used to generate true random numbers. The inclusion of multiple random number source outputters in this true random number generator is equivalent to setting up multiple entropy sources for generating random numbers within the generator. By collecting the randomness of multiple entropy sources, the problem of a single entropy source and poor random number generation quality in true random number generators is solved. Furthermore, the design of multiple random number source outputters within the true random number generator ensures that even if one outputter malfunctions, random data can still be generated by the remaining outputters without affecting the normal generation of true random numbers. This solves the problem of random number generation failure caused by a single entropy source malfunction. Additionally, even if the SoC chip does not integrate a true random number generator, other resources within the SoC chip itself can be used to generate true random numbers. Attached Figure Description
[0017] To more clearly illustrate the technical solutions in the embodiments or related technologies of this application, the accompanying drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0018] Figure 1 This is a block diagram of a true random number generator in one embodiment;
[0019] Figure 2 Here is a block diagram of a true random number generator in another embodiment;
[0020] Figure 3This is a noise diagram of an analog-to-digital converter in one embodiment;
[0021] Figure 4 This is a schematic diagram of the circuit structure of the memory in one embodiment;
[0022] Figure 5 Here is a block diagram of a true random number generator in another embodiment;
[0023] Figure 6 This is a schematic diagram of the circuit structure of a ring oscillator in one embodiment;
[0024] Figure 7 This is a schematic diagram of the oscillation noise of a ring oscillator in one embodiment;
[0025] Figure 8 Here is a block diagram of a true random number generator in another embodiment;
[0026] Figure 9 This is a schematic diagram of the circuit structure of a ring oscillator in one embodiment;
[0027] Figure 10 This is a schematic diagram of the circuit structure of a ring oscillator in one embodiment;
[0028] Figure 11 This is a schematic diagram of the circuit structure of a ring oscillator in one embodiment;
[0029] Figure 12 This is a schematic diagram of the circuit structure of a ring oscillator in one embodiment.
[0030] Explanation of reference numerals in the attached figures:
[0031] 100 - True random number generator; 101 - Random number source output unit;
[0032] 201 - Sensor; 202 - Analog-to-digital converter;
[0033] 203 - Memory; 501 - Process sensor;
[0034] 502 - Voltage sensor; 502 - Temperature sensor;
[0035] 801 - Switching unit; 901 - Processor;
[0036] 1001 - Signal acquisition unit; 1201 - Analog-to-digital conversion unit. Detailed Implementation
[0037] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.
[0038] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains; the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the application; the term "comprising" and any variations thereof in the specification, claims and foregoing description of the drawings are intended to cover non-exclusive inclusion.
[0039] It is understood that the terms “first,” “second,” etc., used in this application may be used herein to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish one element from another.
[0040] It is understood that the term "connection" in the following embodiments should be understood as "electrical connection," "communication connection," etc., if the connected circuits, modules, units, etc., have electrical signal or data transmission with each other.
[0041] When used herein, the singular forms of “a,” “an,” and “ / the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising / including” or “having,” etc., specify the presence of the stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not preclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. Meanwhile, the term “and / or” as used in this specification includes any and all combinations of the associated listed items.
[0042] Random numbers are widely used in many fields of modern science, such as computers, medicine, and finance. Products in these fields cannot function without the use of SOC chips, such as information security communication terminal equipment, online banking USB tokens, lottery and random number generation equipment, and laser marking equipment. Therefore, systems that use SOC chips to generate random numbers have become a common demand.
[0043] Currently, systems that generate random numbers using SOC chips mainly fall into two categories: one generates pseudo-random numbers purely through software, and the other generates truly random numbers by transforming random physical phenomena. Purely software-generated pseudo-random numbers are unusable in applications where randomness is explicitly required because the generated random numbers are correlated and predictable. Therefore, truly random numbers, rather than pseudo-random numbers, must be generated.
[0044] Systems that generate truly random numbers by transforming random physical phenomena have become the main systems for generating truly random numbers in SoC chips. Among these random physical phenomena, the principle behind most SoC chip true random number generation systems is the use of unpredictable circuit noise, thermal noise, circuit metastability, and chaotic circuits to generate random numbers. These systems are usually integrated into the SoC chip as circuits and are called true random number generators. For example, the most common method of generating true random numbers based on ring oscillators utilizes random physical phenomena such as circuit noise and metastability in the ring oscillator. However, currently, true random number generators integrated into SoC chips usually have a single entropy source (the source of random numbers), and the generated random numbers are often insufficient to achieve the completely random effect of white noise. Furthermore, they are easily affected by external electromagnetic interference, which can degrade the randomness or even cause them to fail. For example, ring oscillators themselves are easily affected by external electromagnetic interference, causing abnormal or failed random number generation. On the other hand, due to cost factors, not all SoC chips integrate true random number generators.
[0045] Since SOC chips with true random number generators generally only integrate one type of entropy source true random number generator, the single entropy source results in the generated true random numbers being insufficient to achieve high-quality randomness. Furthermore, a single entropy source is susceptible to external interference, which can worsen the randomness or even cause it to fail. On the other hand, not all SOC chips integrate true random number generators.
[0046] Based on this, this application provides a true random number generator, a true random number generation system, and a system-on-a-chip, which can solve the problem of a single entropy source when generating random numbers in related technologies. At the same time, in the case where the SOC does not integrate a true random number generator, it can utilize other resources of the SOC chip itself to generate true random numbers.
[0047] In one exemplary embodiment, such as Figure 1 As shown, a true random number generator is provided. The true random number generator 100 includes: multiple random number source outputs 101 of different types; each random number source output 101 outputs different data; the data output by each random number source output 101 is used to generate true random numbers.
[0048] True random number generators can be integrated into SOC chips, but not all SOC chips integrate true random number generators. In order to enable SOC chips that do not integrate true random number generators to generate true random numbers, the existing resources on the SOC chip can be used as random number source output devices to form a true random number generator.
[0049] It should be noted that, Figure 1This is a schematic diagram illustrating that the true random number generator includes three random number source outputs. The embodiments of this application do not limit the number of random number source outputs in the true random number generator, and can be set according to the actual situation. Furthermore, since the random number source output is a self-owned resource module on the SOC chip, all resource modules on the SOC chip that can generate random noise data can be used as random number source outputs in the true random number generator.
[0050] Therefore, in an exemplary embodiment, such as Figure 2 As shown, each random number source output device 101 is any one of the sensor 201, analog-to-digital converter 202, and memory 203.
[0051] The random number source output unit can be a sensor, an analog-to-digital converter (ADC), or a memory. That is, a true random number generator can include multiple sensors, multiple ADCs, multiple memories, or any combination of sensors, ADCs, and memories. Figure 2 The example shown is a true random number generator consisting of two sensors, two analog-to-digital converters, and one memory.
[0052] Since a sensor is a data acquisition device, it inherently contains random noise when acquiring data. Therefore, a sensor can be used as a random number source output device.
[0053] Furthermore, an analog-to-digital converter (ADC) is a device that converts analog signals into digital signals. The inherent quantization noise and thermal noise of an ADC can cause uncertainty in the lowest bit value during acquisition, resulting in randomness. For example... Figure 3 As shown, Figure 3 Converting continuous analog voltage signals into discrete digital voltage signals, from Figure 3 As can be seen from this, quantization noise exists during the conversion of signals from analog to digital.
[0054] Alternatively, the analog-to-digital converter can be a successive approximation register (SAR) analog-to-digital converter or a Sigma-Delta ADC.
[0055] The memory can be static random-access memory (SRAM). SRAM usually exists in the form of an array. Each SRAM cell stores 1 bit of binary data. Multiple cells can be arranged and combined to form an array to store tens of thousands of data.
[0056] like Figure 4 As shown, Figure 4 The diagram on the left shows the circuit structure of a 6T-SRAM cell. Figure 4 The diagram on the right shows a simplified circuit structure of a 6T-SRAM cell. T1, T2, T3, and T4 are enhancement-mode NMOS transistors. MOSFETs T1 and T2 form an inverter, as do MOSFETs T3 and T4. These two inverters form an SR latch, creating an interlocking structure. When Q is 1, Q must be 0, and vice versa. The SRAM cell circuit relies on this interlocking structure to store data. During the process of the SRAM transitioning from a power-off state to a normal power-on state, the initial data stored in the SRAM cell will move from a chaotic state to a stable state. However, due to the uncertainty of the chaotic state, the Q point in the stable state may be either 0 or 1, making it unpredictable and exhibiting randomness.
[0057] Since the sensors, analog-to-digital converters, and memories all possess randomness, the random number source output device can be any one of the sensors, analog-to-digital converters, and memories.
[0058] The true random number generator provided in this application includes multiple random number source outputters of different types, each outputting different data; the data output by each random number source outputter is used to generate true random numbers. The inclusion of multiple random number source outputters in this true random number generator is equivalent to setting multiple entropy sources for generating random numbers within the generator. By collecting the randomness of multiple entropy sources, the problem of a single entropy source and poor random number generation quality in true random number generators is solved. Furthermore, the design of multiple random number source outputter structures within the true random number generator ensures that even if one random number source outputter malfunctions, random data can still be generated by the remaining outputters without affecting the normal generation of true random numbers, thus solving the problem of random number generation failure caused by a single entropy source malfunction. Additionally, even if the SOC chip does not integrate a true random number generator, other resources within the SOC chip itself can be used to generate true random numbers.
[0059] In one exemplary embodiment, such as Figure 5 As shown, the sensor 201 can be any one of the following: process sensor 501, voltage sensor 502, and temperature sensor 503.
[0060] in, Figure 5 The sensor 201 includes a process sensor 501, a voltage sensor 502, and a temperature sensor 503.
[0061] Since a SOC chip can include sensors such as process sensors, voltage sensors, and temperature sensors, these sensors can be used as random number output sources.
[0062] The following explains why process sensors, voltage sensors, and temperature sensors can be used as random number source output devices.
[0063] For process technology sensors, which include a ring oscillator, information about the chip's manufacturing process can be obtained by counting the number of oscillations of the ring oscillator. However, the inherent circuit noise of the ring oscillator is susceptible to clock jitter errors caused by voltage and temperature fluctuations. Therefore, the least significant bit of each count is different and exhibits randomness. It should be noted that SOC chips typically integrate more than one process technology sensor, usually distributed around the perimeter and center of the chip. Therefore, multiple process technology sensors can be used as random number generators.
[0064] like Figure 6 As shown, Figure 6 This is a schematic diagram of the structure of a process sensor, including a ring oscillator and a counter circuit; for example... Figure 7 As shown, Figure 7 This is a schematic diagram illustrating the noise variation caused by random clock jitter in a ring oscillator.
[0065] Bandgap temperature sensors based on Complementary Metal-Oxide-Semiconductor (CMOS) technology have an analog circuit structure, which inherently contains some circuit noise. Furthermore, temperature sensors, like ADCs, require an ADC to convert the signal into a digital signal. Similar to the aforementioned ADCs, the acquired data exhibits randomness in its least significant bit due to quantization noise and thermal noise. On the other hand, temperature sensors integrated into a System-on-a-Chip (SoC) are simultaneously affected by both external temperature and the SoC's workload when generating real-time temperature values. Since the environment is not a vacuum with constant temperature, these external factors, such as wind and light, all possess a degree of randomness. Therefore, the temperature sensor can be used as a random number generator.
[0066] Furthermore, the reason why a voltage sensor can be used as a random number source output device is the same as that of an analog-to-digital converter, and will not be repeated here in this embodiment.
[0067] It should be noted that the random number source output device in the embodiments of this application may not be limited to sensors such as process sensors, voltage sensors and temperature sensors, analog-to-digital converters and memory, but may also be other unit modules with random properties in the SOC chip.
[0068] In the true random number generator provided in this application embodiment, the sensor type is any one of a process sensor, a voltage sensor, and a temperature sensor. Since process sensors, voltage sensors, and temperature sensors can all cause uncertainty in the minimum data bit value due to their own noise, thus exhibiting randomness, by using any one of the process sensor, voltage sensor, and temperature sensor as a random number source output device, the data output by the random number source output device is made random, thereby achieving the purpose of the true random number generator generating completely random numbers.
[0069] In one exemplary embodiment, such as Figure 8 As shown, each random number source output device 101 is provided with a switch unit 801, which is used to turn the random number source output device on and off.
[0070] The switching unit can control the opening and closing of the random number source output unit.
[0071] For example, when it is necessary to generate truly random numbers using a true random number generator, the corresponding random number source output unit can be turned on by a switching unit.
[0072] It should be noted that a true random number generator includes multiple random number source outputters, and at least two random number source outputters can be enabled as needed.
[0073] When a true random number generator is not needed to generate true random numbers, the corresponding true random number source output can be turned off by switching unit.
[0074] In one exemplary embodiment, each switching unit may be a transistor switch.
[0075] In the true random number generator provided in this application embodiment, each random number source output is equipped with a switching unit, which is used to turn the random number source output on and off. By controlling the on and off of the random number source output through the switching unit, the random number source output can be turned on when the true random number generator is needed to generate true random numbers, thus reducing losses; furthermore, there are multiple random number source outputs, and each random number source output is equipped with a switching unit, so that the user can selectively turn on the random number source outputs to meet user needs.
[0076] In one exemplary embodiment, such as Figure 9 As shown, the true random number generator 100 also includes a processor 901; each random number source output unit 101 is connected to the processor 901; each random number source output unit 101 outputs data to the processor 901, and the processor 901 performs enhanced random number algorithm processing on the data to generate true random numbers.
[0077] With each random number source output device enabled, it can generate data and send the generated data to the processor. The processor can collect the data sent by each random number source output device, integrate the received data, and generate the final true random number based on the integrated data through a hash algorithm.
[0078] The processor may include a data receiving interface, a data integration circuit, and a data processing module. The data receiving interface can receive data sent by each random number source output device and integrate the data through the data integration circuit to obtain integrated data. The data processing module can process the integrated data using a hash algorithm. The data processing module may be a coprocessor unit or a digital signal processor (DSP) unit.
[0079] The data processing module can process the integrated data using the Hash SHA256 digest algorithm to obtain a true random number of a preset number of bits.
[0080] The true random number generator provided in this application embodiment further includes a processor; each random number source outputter is connected to the processor; each random number source outputter outputs data to the processor, and the processor performs enhanced random number algorithm processing on the data to generate true random numbers. Connecting each random number source outputter to the processor enables the processor to generate the final true random numbers using the data generated by each random number source outputter, thereby improving the randomness quality of the random numbers.
[0081] In one exemplary embodiment, such as Figure 10 As shown, the true random number generator 100 also includes multiple signal acquisition units 1001, and each random number source output unit 101 is connected to the processor 901 through a signal acquisition unit 1001.
[0082] Each signal acquisition unit can collect data generated by its corresponding random number source output unit and send it to the processor. Each random number source output unit is connected to the input terminal of one signal acquisition unit, and the output terminal of each signal acquisition unit is connected to the data receiving interface in the processor.
[0083] like Figure 11 As shown, Figure 11 An AK3918EV200 SOC chip capable of generating truly random numbers is presented. This SOC chip includes four process technology sensors, two voltage sensors, one temperature sensor, a SAR ADC, a Sigma-Delta ADC, and three SRAMs. It should be noted that... Figure 11 The example only shows the random number source output unit in the SOC chip; other components are not shown.
[0084] By switching on each random number source output unit, the random number source output units are activated, and then the signal acquisition unit corresponding to each sensor can acquire 256 bytes of data from each sensor, thus acquiring a total of 1.75 KB of data from the sensors. Specifically, for the Sigma-Delta ADC and SAR ADC, the inputs of the Sigma-Delta ADC and SAR ADC can be set to the reference voltage inside the random number generator. The signal acquisition unit corresponding to the Sigma-Delta ADC can acquire 1024 data points at an 8 kHz sampling rate, collecting a total of 2 KB of data; the signal acquisition unit corresponding to the SAR ADC can acquire 1024 data points at a 32 kHz sampling rate, collecting a total of 2 KB of data. 1 KB of data is read from each of the three SRAM signal acquisition units, collecting a total of 3 KB of data from the SRAM.
[0085] After receiving the data sent by each signal collector, the processor combines all the data together to form a data set of 8.75KByte length. Then, it performs a Hash SHA256 digest algorithm on the 8.75KByte data set to obtain a 256-bit random number.
[0086] The true random number generator provided in this application embodiment further includes multiple signal acquisition units, and each random number source output unit is connected to the processor through a signal acquisition unit. By connecting each random number source output unit and the processor through a signal acquisition unit, the signal acquisition unit collects the data generated by the random number source output unit and sends it to the processor, eliminating the need for the processor to retrieve data from each random number source output unit individually, thus improving the speed at which the true random number generator generates true random numbers.
[0087] In one exemplary embodiment, such as Figure 12 As shown, each signal acquisition unit 1001 includes an analog-to-digital converter 1201. The input terminal of each analog-to-digital converter 1201 is connected to a random number source output unit 101, and the output terminal of each analog-to-digital converter 1201 is connected to a processor 901.
[0088] The analog-to-digital conversion unit converts the analog signal output by the random number source output unit into a digital signal and sends the digital signal to the processor. The analog-to-digital conversion unit can be an analog-to-digital converter.
[0089] The processor also includes a communication interface. The processor connects to external devices. After receiving digital signals sent by each signal collector, the processor generates a true random number through each digital signal. Then, it sends the generated true random number to the external device through the communication interface. The external device can be an information security communication terminal device, a U-shield for online banking, a lottery device, or a laser marking device, etc.
[0090] The true random number generator provided in this application embodiment further includes a processor; each random number source output is connected to the processor; each random number source output output output outputs data to the processor, and the processor performs enhanced random number algorithm processing on the data to generate true random numbers. The analog-to-digital conversion unit can convert the analog signal output by the random number source output into a digital signal, thereby improving the reliability of data acquisition.
[0091] It should be noted that each random number source output can also be connected to a signal acquisition unit, which collects the data generated by each random number source output.
[0092] Alternatively, each type of random number source output can be connected to a signal acquisition unit, with each type of signal acquisition unit collecting data generated by the corresponding type of random number source output. For example, please see [link to example]. Figure 11 Four process sensors are connected to one signal acquisition unit, two voltage sensors are connected to one signal acquisition unit, one temperature sensor is connected to one signal acquisition unit, a SAR ADC and a Sigma-Delta ADC are each connected to one signal acquisition unit, and three SRAMs are connected to one signal acquisition unit.
[0093] In this embodiment, the analysis of random number generators such as process sensors, voltage sensors, temperature sensors, analog-to-digital converters, and memory in a SOC chip reveals that these random number generators are affected by circuit noise and thermal noise. By collecting a sufficient amount of data from these random number generators, this noise will be digitally retained in the collected data, typically appearing in the least significant bit. Due to the unpredictable randomness of circuit noise and thermal noise, various types of entropy sources are generated, resulting in random data. After collecting and integrating this data, a hash digest algorithm is executed. Because hash algorithms cannot be reverse-derived, the data obtained through the hash digest algorithm further enhances the unpredictability of the data, thus greatly optimizing the randomness of the random number generator in this application.
[0094] In one exemplary embodiment, the random number generator further includes a power supply, which is connected to each component in the random number generator to supply power to each component; the power supply is also connected to each random number source output, processor, and signal acquisition unit.
[0095] In one embodiment, this application also provides a true random number generation system, which includes the true random number generator provided in any of the above embodiments.
[0096] In one embodiment, this application also provides a system-on-a-chip (SoC) that includes the true random number generation system described in the above embodiments.
[0097] For the principles and technical details of how the various structural components in the true random number generator in this embodiment function, please refer to the description of the foregoing embodiments, which will not be repeated here.
[0098] In related technologies, SOC chips only integrate a true random number generator system of one type of entropy source. In applications, users usually only use this random number generator system to generate random numbers. However, due to the single entropy source, the quality of the generated random numbers is poor and they are easily affected by external interference, which makes the random effect worse. When external interference causes the entropy source to malfunction, the random numbers generated by the random number generator become invalid.
[0099] Based on this, the embodiments of this application use a random number generator system with multiple entropy sources to generate random numbers. The random number generator system described in the above embodiments is integrated into a SOC chip, allowing the SOC chip to collect the randomness of multiple entropy sources. This solves the problems of poor random number generation quality and susceptibility to interference caused by a single entropy source. Furthermore, since the random number generator includes multiple entropy sources, if one entropy source malfunctions while the others continue to function normally, it does not affect the normal generation of random numbers.
[0100] Furthermore, since a single entropy source is likely to have hidden periodicity and probabilistic properties, the random numbers generated by random number generators in related technologies also have a certain periodicity and probabilistic properties, resulting in poor randomness. In contrast, the random number generator in this application includes a multi-entropy source system, which integrates the data generated by all entropy sources through a processor within the random number generator to perform a hash digest algorithm to generate random numbers.
[0101] In this embodiment, the random number generator utilizes the built-in resource modules of the SOC chip. Based on the randomness exhibited by various resource modules such as sensors, ADCs, and SRAM within the SOC chip under circuit noise and thermal noise, a hash digest algorithm is applied to the data generated by each random number source output unit using a data processing module integrated into the processor to obtain random numbers. Therefore, the true random number generator in this embodiment is applicable to situations where a true random number generator is not integrated into the SOC chip. It uses the free resource modules on the SOC chip, such as sensors, memory, and analog-to-digital converters, as random number source output units. The processor on the SOC chip processes the data output by each random number source output unit using an enhanced hash algorithm, thereby generating true random numbers.
[0102] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0103] The embodiments described above are merely illustrative of several implementations of this utility model, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the utility model patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this utility model, and these all fall within the protection scope of this utility model. Therefore, the protection scope of this utility model patent should be determined by the appended claims.
Claims
1. A true random number generator, characterized in that: The true random number generator comprises: a plurality of different types of random number source outputters; the data output by each random number source outputter is different; The data output by each of the random number source outputters is used to generate true random numbers.
2. The true random number generator according to claim 1, characterized in that: Each of the random number source outputters is any one of a sensor, an analog-to-digital converter, and a memory.
3. The true random number generator according to claim 2, characterized in that: The type of the sensor is any one of a process sensor, a voltage sensor, and a temperature sensor.
4. The true random number generator according to any one of claims 1 to 3, characterized in that: Each of the random number source outputters is provided with a switch unit, and the switch unit is used to turn the random number source outputter on and off.
5. The true random number generator according to claim 4, characterized in that: Each of the switch units is a transistor switch.
6. The true random number generator according to any one of claims 1 to 3, characterized in that: The true random number generator also includes a processor; each of the random number source outputters is connected to the processor; Each of the random number source outputters outputs data to the processor, and the processor performs an enhanced random number algorithm on the data to generate the true random number.
7. The true random number generator according to claim 6, characterized in that: The true random number generator also includes a plurality of signal collectors, and each of the random number source outputters is connected to the processor via a signal collector.
8. The true random number generator according to claim 7, characterized in that: Each of the signal collectors comprises an analog-to-digital conversion unit, the input end of each analog-to-digital conversion unit is connected to a random number source outputter, and the output end of each analog-to-digital conversion unit is connected to the processor.
9. A true random number generation system, characterized in that: The true random number generating system comprises the true random number generator as claimed in any one of claims 1 to 8.
10. A system-on-chip, characterized in that: The system-on-chip comprises the true random number generation system as claimed in claim 9.