Ethernet photoelectric COMBO interface
By introducing MAC controller, high-speed digital differential switch, SFP+ optical module and PHY chip into the Ethernet photoelectric COMBO interface, it is connected to the high-speed digital differential switch using the SerDes interface, and is electrically connected to the SFP+ optical module and PHY chip through this switch, respectively. The expansion of optical ports and electrical ports has solved the problems of shortage of supply and expensive supply of dedicated PHYs based on the stand-alone SerDes method in the prior art, and achieved Ethernet transmission greater than gigabits and reduced costs.
Patent Information
- Application Number
- CN202323659872.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2023-12-29
- Publication Date
- 2025-02-18
- Estimated Expiration
- 2033-12-29
AI Technical Summary
In the prior art, the dedicated PHY that extends the COMBO interface based on the stand-alone SerDes method has problems of shortage of supply and expensive prices.
By introducing MAC controller, high-speed digital differential switch, SFP+ optical module and PHY chip into the Ethernet photoelectric COMBO interface, it is connected to the high-speed digital differential switch using the SerDes interface, and is electrically connected to the SFP+ optical module and PHY chip through this switch, respectively. Achieve the expansion of optical ports and electrical ports.
There is no need to rely on dedicated PHY chips to achieve Ethernet transmission greater than gigabit, reducing the cost of expanding COMBO interfaces and solving the problems of shortage of supply and expensive prices.
Smart Images
Figure CN222509316U_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of network communication technology, and in particular to an Ethernet photoelectric COMBO interface. Background Art
[0002] As network speeds continue to increase, 2.5G Ethernet will gradually become popular at this stage, and 5G, 10G and even faster Ethernet will gradually become popular in the future with the development of technology. For Ethernet COMBO interfaces below 1G, there are relatively mature PHYs that encapsulate three interfaces, RGMII, SGMII (based on SerDes), and electrical ports, on a PHY chip, which can be flexibly configured.
[0003] At present, the connection interface between MAC and PHY for Gigabit Ethernet is mainly based on SerDes. It cannot be connected to MAC using the parallel port interface (RGMII) like Gigabit Ethernet PHY. To expand the COMBO interface, it must be expanded by connecting MAC based on SerDes. However, the dedicated PHY for expanding the COMBO interface based on the single-port SerDes method is in short supply and expensive. Utility Model Content
[0004] The embodiment of the present application provides an Ethernet optoelectronic COMBO interface to at least solve the problem of shortage of supply and high price of a dedicated PHY for extending the COMBO interface based on a single-port SerDes method in the related art.
[0005] The embodiment of the present application provides an Ethernet optoelectronic COMBO interface, including a MAC controller, a high-speed digital differential switch, an SFP+ optical module and a PHY; wherein:
[0006] The MAC controller includes a SerDes interface, and the SerDes interface is used to connect to the high-speed digital differential switch;
[0007] The high-speed digital differential switch is electrically connected to the SFP+ optical module and the PHY chip respectively;
[0008] The SFP+ optical module is used to expand the optical port;
[0009] The PHY chip is used to expand the electrical port.
[0010] In one embodiment, the MAC control includes a SerDes interface, and the SerDes interface supports interface protocols including SGMII, HSGMII, XSGMII, 1G BASE-X, 2.5G BASE-X, 5G BASE-X and 10GBASE-X.
[0011] In one embodiment, the high-speed digital differential switch comprises:
[0012] A common differential transceiver port, used for receiving and sending common differential signals;
[0013] Differential transceiver port, used to receive and send independent differential signals;
[0014] The switching control port is used to switch the differential transceiver common end and the differential transceiver complex end.
[0015] In one embodiment, the number of the common differential transceiver ports is 1, and the number of the differential transceiver ports is 2.
[0016] In one embodiment, the SFP+ optical module is an SFP+ optical module that supports interface protocols including SGMII, HSGMII, XSGMII, 1G BASE-X, 2.5G BASE-X, 5G BASE-X, and 10G BASE-X.
[0017] In one embodiment, the PHY chip is a PHY chip that supports SGMII, HSGMII, and XSGMII interface protocols.
[0018] In one embodiment, the PHY chip expands the electrical port through a transformer, and the electrical port is used to plug in a network cable.
[0019] In one embodiment, the MAC controller is installed on a SOC module, and the SOC module is used to control the high-speed digital differential switch according to an access differential signal.
[0020] An Ethernet optoelectronic COMBO interface provided by an embodiment of the present application has at least the following technical effects.
[0021] The MAC controller includes a SerDes interface, which is used to connect to a high-speed digital differential switch, which is electrically connected to an SFP+ optical module and a PHY chip respectively, and the SFP+ optical module is used to expand an optical port, and the PHY chip is used to expand an electrical port. By expanding the COMBO interface, that is, the electrical port and the optical port, through a single-port SerDes method, Ethernet transmission greater than a gigabit is achieved without relying on a dedicated PHY chip, solving the problem of a shortage of supply and high price of a dedicated PHY for expanding the COMBO interface based on a single-port SerDes method in the prior art, and effectively reducing the cost of expanding the COMBO interface.
[0022] Details of one or more embodiments of the present application are set forth in the following drawings and description to make other features, objects, and advantages of the present application more readily apparent. BRIEF DESCRIPTION OF THE DRAWINGS
[0023] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:
[0024] Figure 1 It is a schematic diagram of the connection structure of an Ethernet photoelectric COMBO interface;
[0025] Figure 2 is a structural schematic diagram of a high-speed digital differential switch according to an exemplary embodiment;
[0026] Figure 3 is a connection diagram of a high-speed digital differential switch multiplexing chip according to an exemplary embodiment;
[0027] Figure 4 The figure is a schematic diagram showing the use of an Ethernet optical-electrical COMBO interface according to an exemplary embodiment.
[0028] Reference numerals:
[0029] MAC controller 1; high-speed digital differential switch 2; common differential transceiver port 20; first differential transceiver port 21, second differential transceiver port 22; switch control port 23; SFP+ optical module 3; electrical port PHY 4; optical port 5; electrical port 6. DETAILED DESCRIPTION
[0030] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application is described and illustrated below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not intended to limit the present application. Based on the embodiments provided in the present application, all other embodiments obtained by ordinary technicians in the field without making creative work are within the scope of protection of the present application.
[0031] Obviously, the drawings described below are only some examples or embodiments of the present application. For ordinary technicians in this field, the present application can also be applied to other similar scenarios based on these drawings without creative work. In addition, it can also be understood that although the efforts made in this development process may be complicated and lengthy, for ordinary technicians in this field related to the content disclosed in this application, some changes in design, manufacturing or production based on the technical content disclosed in this application are just conventional technical means, and should not be understood as insufficient content disclosed in this application.
[0032] Reference to "embodiments" in this application means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those of ordinary skill in the art that the embodiments described in this application may be combined with other embodiments without conflict.
[0033] Unless otherwise defined, the technical terms or scientific terms involved in this application should be understood by people with ordinary skills in the technical field to which this application belongs. The words "one", "a", "a", "the" and the like involved in this application do not indicate a quantitative limitation, and may represent the singular or plural. The terms "include", "comprise", "have" and any of their variations involved in this application are intended to cover non-exclusive inclusions; for example, a process, method, system, product or device that includes a series of steps or modules (units) is not limited to the listed steps or units, but may also include steps or units that are not listed, or may also include other steps or units inherent to these processes, methods, products or devices. The words "connect", "connected", "coupled" and the like involved in this application are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. The "multiple" involved in this application refers to two or more. "And / or" describes the association relationship of associated objects, indicating that there may be three relationships, for example, "A and / or B" can represent: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the objects before and after are in an "or" relationship. The terms "first", "second", "third", etc. involved in this application are only used to distinguish similar objects and do not represent a specific ordering of the objects.
[0034] The present application embodiment provides an Ethernet optical COMBO interface, Figure 1 This is a schematic diagram of the connection structure of an Ethernet optical COMBO interface. Figure 1 As shown, an Ethernet optoelectronic COMBO interface includes:
[0035] It includes a MAC controller 1, a high-speed digital differential switch 2, an SFP+ optical module 3 and a PHY chip 4; wherein,
[0036] The MAC controller 1 includes a SerDes interface, and the SerDes interface is used to connect to the high-speed digital differential switch 2 .
[0037] The high-speed digital differential switch 2 is electrically connected to the SFP+ optical module 3 and the PHY chip 4 respectively.
[0038] The SFP+ optical module is used to expand optical port 5.
[0039] The PHY chip is used to expand electrical port 6.
[0040] In summary, an Ethernet optoelectronic COMBO interface provided in an embodiment of the present application, a MAC controller includes a SerDes interface, the SerDes interface is used to connect to a high-speed digital differential switch, the high-speed digital differential switch is electrically connected to an SFP+ optical module and a PHY chip respectively, the SFP+ optical module is used to expand an optical port, and a PHY chip is used to expand an electrical port. By expanding the COMBO interface, that is, the electrical port and the optical port, a greater than Gigabit Ethernet transmission is achieved without relying on a dedicated PHY chip, thereby solving the problem of a shortage of supply and high price of a dedicated PHY for expanding a COMBO interface based on a single-port SerDes method in the prior art, and effectively reducing the cost of expanding the COMBO interface.
[0041] In one embodiment, the MAC control includes a SerDes interface that supports interface protocols including SGMII, HSGMII, XSGMII, 1G BASE-X, 2.5G BASE-X, 5G BASE-X, and 10G BASE-X.
[0042] Optionally, the MAC controller 1 is connected to the high-speed digital differential switch 2 through a SerDes interface. The SerDes interface supports optional interface protocol functions such as SGMII, HSGMII, XSGMII, 1G BASE-X, 2.5G BASE-X, 5G BASE-X, and 10G BASE-X. According to the interface type inserted by the user and the supported rate, the required interface protocol can be automatically determined and selected. It can adapt to different application scenarios and user needs, whether it is traditional 1G Ethernet or high-speed 10G Ethernet. The most suitable interface protocol can be selected according to the actual networking situation, which further improves the adaptability and performance of the system and reduces cost and complexity.
[0043] In one embodiment, the high-speed digital differential switch includes: a common differential transceiver port for receiving and sending a common differential signal, a differential transceiver port for receiving and sending an independent differential signal, and a switching control port for switching between a differential transceiver common port and a differential transceiver complex port.
[0044] Optionally, Figure 2 is a schematic diagram of a high-speed digital differential switch according to an exemplary embodiment. Figure 2As shown, the functional structure of the high-speed digital differential switch circuit includes a common differential transceiver port 20, a first differential transceiver port 21, a second differential transceiver port 22, and a switch control port 23. In this embodiment, the number of common differential transceiver ports is 1, and the number of differential transceiver ports is 2.
[0045] The common differential transceiver port is used to receive and send common differential signals, the differential transceiver port is used to receive and send independent differential signals, and the switching control port is used to switch the differential transceiver common end and the differential transceiver multiple end. The common differential transceiver port 20 can be controlled to be connected to the first differential transceiver port 21 or the second differential transceiver port 22 through the switching control port 23. The single-channel SerDes interface of the MAC controller 1 is multiplexed into two groups, which are respectively connected to the SFP+ optical module 3 and the electrical port PHY4, that is, the SerDes interface is divided or expanded into two multiplexed data channels (optical port and electrical port). According to the type of interface inserted by the user, it can automatically judge and switch to use the SFP+ optical module 3 or the electrical port PHY4.
[0046] Specifically, Figure 3 FIG. 1 is a connection diagram of a high-speed digital differential switch multiplexing chip according to an exemplary embodiment. Figure 3 As shown, the high-speed digital differential switch 2 mainly uses a high-speed digital differential switch multiplexing chip commonly used in the USB Type-C interface, such as chip models FUSB340, PI3USB302, etc. The schematic diagram of the internal circuit function of the chip is as shown in Figure 3 As shown, TX+ / TX- and RX+ / RX- correspond to the common differential transceiver port 20, TX1+ / TX1- and RX1+ / RX1- correspond to the differential transceiver port 21, TX2+ / TX2- and RX2+ / RX2- correspond to the differential transceiver port 22, and SEL / PD corresponds to the switching control port 23.
[0047] In one embodiment, the SFP+ optical module is an SFP+ optical module that supports interface protocols including SGMII, HSGMII, XSGMII, 1GBASE-X, 2.5GBASE-X, 5G BASE-X, and 10G BASE-X.
[0048] Optionally, the SFP+ optical module 3 is mainly a universal SFP+ interface optical module, which supports universal optical modules of interface protocols such as SGMII, HSGMII, XSGMII, 1GBASE-X, 2.5G BASE-X, 5G BASE-X, 10G BASE-X, and the optical module hardware interface type is SFP+. The SFP+ interface optical module extends the optical port 5, which is used to access the optical fiber, and determines whether the optical fiber is accessed through the optical module LOS signal, and connects the signal to the SOC to select the electrical port or the optical port. The SFP+ optical module supports a variety of interface protocols and can realize flexible data transmission in different application scenarios and systems. This versatility and compatibility enable the SFP+ optical module to meet a variety of different needs, from traditional 1G Ethernet to high-speed 10G Ethernet, which can be transmitted through the SFP+ optical module.
[0049] In one embodiment, the PHY chip is a PHY chip that supports SGMII, HSGMII, and XSGMII interface protocols.
[0050] Optionally, the electrical port PHY4 selects the corresponding universal electrical port PHY chip according to the supported rate, and the electrical port 6 is used to access the network cable through the transformer + RJ45 expansion. For example, 1G electrical port PHY chip YT8531S, RTL8201, etc.; 2.5G electrical port PHY chip YT8821S, RTL8221, etc. Other rates are not described here. There are multiple manufacturers and models to choose from according to the rate. The electrical port PHY chip Link signal is used to determine whether the network cable is accessed, and the signal is connected to the SOC to select the electrical port or optical port.
[0051] In one embodiment, the MAC controller is installed on a SOC module, and the SOC module is used to control the high-speed digital differential switch according to the access differential signal.
[0052] Optionally, Figure 4 FIG. 1 is a schematic diagram showing the use of an Ethernet optical COMBO interface according to an exemplary embodiment. Figure 4As shown, when the user inserts an optical fiber or a network cable, the SFP+ optical module or the electrical port PHY reports an access signal to the SOC. According to the judgment of the inserted interface type, the high-speed digital differential switch is controlled to select the corresponding interface. The MAC controller 1 is installed on the SOC (system on chip). The SOC combines RAM, ROM and other required functions to detect the access of the optical port or the electrical port, and controls the high-speed digital differential switch 2 according to the access signal logic. When the user only inserts the electrical port, the high-speed digital differential switch is controlled to switch to the electrical port multiplexing end; when the user only inserts the optical port, the high-speed digital differential switch is controlled to switch to the optical port multiplexing end; when the optical port and the electrical port are inserted at the same time, the user can set the priority switching of the optical port or the electrical port. By expanding the COMBO interface, that is, the electrical port and the optical port, Ethernet transmission greater than 1 Gigabit is achieved without relying on a dedicated PHY chip, which solves the problem of shortage of supply and high price of the dedicated PHY for expanding the COMBO interface based on the single-port SerDes method in the prior art.
[0053] In summary, an Ethernet optoelectronic COMBO interface provided in an embodiment of the present application, a MAC controller includes a SerDes interface, the SerDes interface is used to connect to a high-speed digital differential switch, the high-speed digital differential switch is electrically connected to an SFP+ optical module and a PHY chip respectively, the SFP+ optical module is used to expand an optical port, and a PHY chip is used to expand an electrical port. By expanding the COMBO interface, that is, the electrical port and the optical port, a greater than Gigabit Ethernet transmission is achieved without relying on a dedicated PHY chip, thereby solving the problem of a shortage of supply and high price of a dedicated PHY for expanding a COMBO interface based on a single-port SerDes method in the prior art, and effectively reducing the cost of expanding the COMBO interface.
[0054] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0055] The above embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the utility model patent. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the attached claims.
Claims
1. An Ethernet photoelectric COMBO interface, characterized in that: It includes MAC controller, high-speed digital differential switch, SFP+ optical module and PHY chip; among them, The MAC controller includes a SerDes interface, and the SerDes interface is used to connect to the high-speed digital differential switch; The high-speed digital differential switch is electrically connected to the SFP+ optical module and the PHY chip respectively; The SFP+ optical module is used to expand the optical port; The PHY chip is used to expand the electrical port.
2. The Ethernet optoelectronic COMBO interface according to claim 1, characterized in that: The MAC control includes a SerDes interface, and the SerDes interface supports interface protocols including SGMII, HSGMII, XSGMII, 1GBASE-X, 2.5G BASE-X, 5G BASE-X and 10G BASE-X.
3. The Ethernet optoelectronic COMBO interface according to claim 1, characterized in that: The high-speed digital differential switch comprises: A common differential transceiver port, used for receiving and sending common differential signals; Differential transceiver port, used to receive and send independent differential signals; The switching control port is used to switch the common differential transceiver port and the differential transceiver port.
4. The Ethernet optoelectronic COMBO interface according to claim 3, characterized in that: The number of the common differential transceiver ports is 1, and the number of the differential transceiver ports is 2.
5. The Ethernet optoelectronic COMBO interface according to claim 1, characterized in that: The SFP+ optical module is an SFP+ optical module that supports interface protocols including SGMII, HSGMII, XSGMII, 1G BASE-X, 2.5G BASE-X, 5G BASE-X, and 10G BASE-X.
6. The Ethernet optoelectronic COMBO interface according to claim 1, characterized in that: The PHY chip is a PHY chip that supports SGMII, HSGMII, and XSGMII interface protocols.
7. The Ethernet optoelectronic COMBO interface according to claim 1, characterized in that: The PHY chip expands the electrical port through a transformer, and the electrical port is used to plug in a network cable.
8. The Ethernet optoelectronic COMBO interface according to claim 1, characterized in that: The MAC controller is installed on the SOC module, and the SOC module is used to control the high-speed digital differential switch according to the access differential signal.