Loudspeaker current detection circuit and device
By connecting impedance components in series in the speaker current detection circuit and using the mismatch cancellation module input to compensate current, the problem of degradation of current detection accuracy caused by impedance component mismatch is solved, and a higher detection accuracy is achieved.
Patent Information
- Application Number
- CN202420659354.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-04-01
- Publication Date
- 2025-03-07
- Estimated Expiration
- 2034-04-01
Smart Images
Figure CN222582593U_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of integrated circuits, and in particular to a speaker current detection circuit and device. Background Art
[0002] At present, the output stage of the audio device uses an H-bridge circuit to drive the speaker. In order to prevent the speaker from being damaged due to excessive current and temperature rise, a current detection circuit is often used to detect the current on the speaker. In the related art, since high-precision current detection circuits are required in applications such as battery management, motor control, and overcurrent protection of audio devices, the speaker current detection solution connects a sampling resistor in series with the speaker, and directly obtains the speaker current by measuring the current of the sampling resistor.
[0003] To further improve the current sensing accuracy, refer to Figure 1 , Figure 1 A schematic diagram of a speaker current detection scheme in the related art is shown. In the related art, the differential mode voltage at both ends of the sampling resistor is usually converted into a differential mode current through resistors 1 and 2, and then the differential mode current is converted into a differential voltage signal with a preset multiple of the original differential mode voltage through an amplifier circuit. Finally, the amplified differential voltage signal is measured by an analog-to-digital converter, and the actual differential mode voltage at both ends of the sampling circuit is calculated according to the amplification factor of the amplifier circuit and the measurement result of the analog-to-digital converter. However, when the differential mode voltage at both ends of the sampling resistor is converted into a differential mode current, due to the mismatch between resistors 1 and 2, there is a certain error in the differential mode current input to the amplifier circuit, which reduces the accuracy of the speaker current detection. Utility Model Content
[0004] The present application provides a loudspeaker current detection circuit and device, aiming to solve the current technical problem that the accuracy of loudspeaker current detection is reduced due to mismatch of impedance elements.
[0005] In a first aspect, the present application provides a speaker current detection circuit, the current detection circuit is used to detect the current flowing through a measuring resistor and a speaker connected in series, comprising:
[0006] A first current measurement path and a second current measurement path, wherein an input end of the first current measurement path is connected to one end of the measuring resistor, and an input end of the second current measurement path is connected to the other end of the measuring resistor;
[0007] A measuring module, wherein a first input terminal of the measuring module is connected to an output terminal of the first current measuring path, and a second input terminal of the measuring module is connected to an output terminal of the second current measuring path, so as to measure a differential mode voltage across the resistor;
[0008] Wherein, a first impedance element is connected in series on the first current measurement path, a second impedance element is connected in series on the second current measurement path, and there is a mismatched differential mode current between the first impedance element and the second impedance element;
[0009] The speaker current detection circuit includes a mismatch elimination module, a first output end of the mismatch elimination module is coupled to a first current measurement path, and a second output end of the mismatch elimination module is coupled to a second current measurement path to eliminate the mismatch differential mode current between the first impedance element and the second impedance element.
[0010] In some embodiments, the first output terminal of the mismatch elimination module is used to input a first compensation current to the first current measurement path;
[0011] The second output terminal of the mismatch elimination module is used to input a second compensation current into the second current measurement path;
[0012] The difference between the first compensation current and the second compensation current is equal to the magnitude of the mismatched differential mode current.
[0013] In some embodiments, the mismatch elimination module includes a first fully differential operational amplifier, a first adjustable resistor, and a second adjustable resistor:
[0014] A first differential current signal is connected between the non-inverting input terminal and the inverting input terminal of the first fully differential operational amplifier;
[0015] One end of the first adjustable resistor is connected to the non-inverting input end of the first fully differential operational amplifier, and the other end is connected to the inverting output end of the first fully differential operational amplifier;
[0016] One end of the second adjustable resistor is connected to the inverting input end of the first fully differential operational amplifier, and the other end is connected to the non-inverting output end of the first fully differential operational amplifier;
[0017] The inverting output terminal of the first fully differential operational amplifier is connected to the first current measurement path to input the first compensation current, and the non-inverting output terminal of the first fully differential operational amplifier is connected to the second current measurement path to input the second compensation current.
[0018] In some embodiments, the mismatch cancellation module includes a first operational amplifier, a second operational amplifier, a first resistor, a second resistor, and a third adjustable resistor;
[0019] A first differential voltage signal is connected between the non-inverting input terminal of the first operational amplifier and the non-inverting input terminal of the second operational amplifier;
[0020] One end of the first resistor is connected to the inverting input terminal of the first operational amplifier, and the other end is connected to the output terminal of the first operational amplifier;
[0021] One end of the second resistor is connected to the inverting input terminal of the second operational amplifier, and the other end is connected to the output terminal of the second operational amplifier;
[0022] One end of the third adjustable resistor is connected to the inverting input terminal of the first operational amplifier, and the other end is connected to the inverting input terminal of the second operational amplifier;
[0023] The output terminal of the first operational amplifier is connected to the first current measurement path to input the first compensation current, and the output terminal of the second operational amplifier is connected to the second current measurement path to input the second compensation current.
[0024] In some embodiments, the first current measurement path inputs a first extraction current to a first output terminal of the mismatch cancellation module;
[0025] The second current measurement path inputs a second extraction current to the second output terminal of the mismatch elimination module;
[0026] The difference between the first extracted current and the second extracted current is equal to the magnitude of the mismatched differential mode current.
[0027] In some embodiments, the mismatch elimination module includes a first MOS transistor, a second MOS transistor, and a first adjustable current source;
[0028] A first differential voltage signal is connected between the control end of the first MOS tube and the control end of the second MOS tube;
[0029] The first end of the first MOS tube and the first end of the second MOS tube are connected to the input end of the first adjustable current source, and the output end of the first adjustable current source is connected to the ground end;
[0030] The second end of the first MOS transistor is connected to the first current measurement path to receive the first extracted current, and the second end of the second MOS transistor is connected to the second current measurement path to receive the second extracted current.
[0031] In some embodiments, the mismatch elimination module includes a first adjustable MOS transistor, a second adjustable MOS transistor, and a first fixed current source;
[0032] A first differential voltage signal is connected between the control end of the first adjustable MOS transistor and the control end of the second adjustable MOS transistor;
[0033] The first end of the first adjustable MOS transistor and the first end of the second adjustable MOS transistor are connected to the input end of the first fixed current source, and the output end of the first fixed current source is connected to the ground end;
[0034] The second end of the first adjustable MOS transistor is connected to the first current measurement path to receive the first drawn current, and the second end of the second adjustable MOS transistor is connected to the second current measurement path to receive the second drawn current.
[0035] In some embodiments, the measurement module includes an amplifier and an analog-to-digital converter;
[0036] A first input terminal of the amplifier is connected to an output terminal of the first current measurement path, and a second input terminal of the amplifier is connected to an output terminal of the second current measurement path to amplify a differential mode voltage across the measurement resistor;
[0037] The input of the analog-to-digital converter is connected to the output of the amplifier to measure the differential voltage across the resistor.
[0038] In some embodiments, the first output terminal and the second output terminal of the mismatch cancellation module are connected to an internal circuit of the amplifier; or
[0039] The first output terminal and the second output terminal of the mismatch elimination module are connected to the connection path between the amplifier and the analog-to-digital converter; or
[0040] The first output terminal and the second output terminal of the mismatch elimination module are connected to the internal circuit of the analog-to-digital converter.
[0041] In a second aspect, the present application provides a speaker current detection device, comprising the speaker current detection circuit as described in the first aspect.
[0042] The present application connects a first impedance element in series on the first current measurement path, and connects a second impedance element in series on the second current measurement path. The first impedance element and the second impedance element can convert the differential mode voltage across the measuring resistor into a differential mode current, so that the measuring module can convert the differential mode current into a voltage signal that is a preset multiple of the differential mode voltage and measure it. At the same time, since the first output end of the mismatch elimination module is coupled to the first current measurement path, and the second output end of the mismatch elimination module is coupled to the second current measurement path, the mismatch elimination module can indirectly or directly control the first current measurement path and the second current measurement path, so as to eliminate the mismatched differential mode current between the first impedance element and the second impedance element, and finally avoid the phenomenon of reduced speaker current detection accuracy due to the mismatch between the first impedance element and the second impedance element. BRIEF DESCRIPTION OF THE DRAWINGS
[0043] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.
[0044] Figure 1 It is a schematic diagram of a speaker current detection scheme in the related art;
[0045] Figure 2is a schematic diagram of a speaker current detection circuit provided in an embodiment of the present application;
[0046] Figure 3 is another schematic diagram of a speaker current detection circuit provided in an embodiment of the present application;
[0047] Figure 4 is another schematic diagram of a speaker current detection circuit provided in an embodiment of the present application;
[0048] Figure 5 is another schematic diagram of a speaker current detection circuit provided in an embodiment of the present application;
[0049] Figure 6 is another schematic diagram of a speaker current detection circuit provided in an embodiment of the present application;
[0050] Figure 7 is another schematic diagram of a speaker current detection circuit provided in an embodiment of the present application;
[0051] Figure 8 is another schematic diagram of a speaker current detection circuit provided in an embodiment of the present application;
[0052] Fig. 9 is another schematic diagram of a speaker current detection circuit provided in an embodiment of the present application;
[0053] Fig.10 is another schematic diagram of a speaker current detection circuit provided in an embodiment of the present application;
[0054] Fig.11 is another schematic diagram of a speaker current detection circuit provided in an embodiment of the present application;
[0055] Fig.12 is another schematic diagram of a speaker current detection circuit provided in an embodiment of the present application.
[0056] Among them, the measuring resistor R0, the speaker LO;
[0057] 11 first current measurement path, 12 second current measurement path, 13 first impedance element, 14 second impedance element, 20 measurement module, 21 amplifier, 22 analog-to-digital converter, 30 mismatch elimination module;
[0058] A first compensation current I1, a second compensation current I2, a first extraction current I3, a second extraction current I4, a first differential current signal △Ii, and a first differential voltage signal △Vi;
[0059] A first fully differential operational amplifier OP, a first adjustable resistor Rt1, and a second adjustable resistor Rt2;
[0060] A first operational amplifier OP1, a second operational amplifier OP2, a first resistor R1, a second resistor R2, and a third adjustable resistor Rt3;
[0061] A first MOS tube M1, a second MOS tube M2, and a first adjustable current source It1;
[0062] A first adjustable MOS transistor Mt1, a second adjustable MOS transistor Mt2, and a first fixed current source Is1. DETAILED DESCRIPTION
[0063] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present utility model, not all of the embodiments. Based on the embodiments in the present utility model, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present utility model.
[0064] In this application, the word "exemplary" is used to mean "used as an example, illustration, or description". Any embodiment described in this application as "exemplary" is not necessarily to be construed as being preferred or advantageous over other embodiments. In order to enable any technician in the field to implement and use the utility model, the following description is given. In the following description, details are listed for the purpose of explanation. It should be understood that a person of ordinary skill in the art can recognize that the utility model can be implemented without using these specific details. In other examples, well-known structures and processes will not be elaborated in detail to avoid obscuring the description of the utility model with unnecessary details. Therefore, the utility model is not intended to be limited to the embodiments shown, but is consistent with the widest scope consistent with the principles and features disclosed in this application.
[0065] It should be noted that in the embodiments of the present application, "connection" can be understood as electrical connection, and the connection between two electrical components can be a direct or indirect connection between the two electrical components. For example, the connection between A and B can be either a direct connection between A and B or an indirect connection between A and B through one or more other electrical components.
[0066] The first pole / first end of each transistor used in the embodiments of the present application is one of the source and the drain, and the second pole / second end of each transistor is the other of the source and the drain. Since the source and drain of the transistor can be symmetrical in structure, the source and drain thereof can be structurally indistinguishable, that is, the first pole / first end and the second pole / second end of the transistor in the embodiments of the present application can be structurally indistinguishable. Exemplarily, in the case where the transistor is a P-type transistor, the first pole / first end of the transistor is the source, and the second pole / second end is the drain; exemplarily, in the case where the transistor is an N-type transistor, the first pole / first end of the transistor is the drain, and the second pole / second end is the source.
[0067] In the circuit structure provided in the embodiments of the present application, the first node, the second node and other nodes do not represent actual existing components, but represent the junction points of related couplings in the circuit diagram, that is, these nodes are nodes formed by the equivalent junction points of related couplings in the circuit diagram.
[0068] The embodiments of the present application provide a speaker current detection circuit and device, which are described in detail below.
[0069] First, see Figure 2 , Figure 2 A schematic diagram of a speaker current detection circuit in an embodiment of the present application is shown, wherein the current detection circuit is used to detect the current flowing through the measuring resistor R0 and the speaker LO connected in series, and the speaker current detection circuit includes:
[0070] A first current measurement path 11 and a second current measurement path 12, wherein an input end of the first current measurement path 11 is connected to one end of the measuring resistor R0, and an input end of the second current measurement path 12 is connected to the other end of the measuring resistor R0;
[0071] A measuring module 20, wherein a first input terminal of the measuring module 20 is connected to an output terminal of the first current measuring path 11, and a second input terminal of the measuring module 20 is connected to an output terminal of the second current measuring path 12, so as to measure a differential mode voltage across the resistor R0;
[0072] The first current measurement path 11 is connected in series with a first impedance element 13, the second current measurement path 12 is connected in series with a second impedance element 14, and there is a mismatched differential mode current between the first impedance element 13 and the second impedance element 14;
[0073] The speaker current detection circuit includes a mismatch elimination module 30 , a first output end of the mismatch elimination module 30 is coupled to the first current measurement path 11 , and a second output end of the mismatch elimination module 30 is coupled to the second current measurement path 12 to eliminate the mismatch differential mode current between the first impedance element 13 and the second impedance element 14 .
[0074] Specifically, the measuring resistor R0 and the speaker LO are connected in series between the first node M1 and the second node M2 of the H-bridge circuit, the input end of the first current measurement path 11 is connected to one end of the measuring resistor R0, and the input end of the second current measurement path 12 is connected to the other end of the measuring resistor R0, so that the first current measurement path 11 and the second current measurement path 12 can access the differential mode voltage across the measuring resistor R0 (i.e., the potential signal across the measuring resistor R0). At the same time, since the first input end of the measuring module 20 is connected to the output end of the first current measurement path 11, and the second input end of the measuring module 20 is connected to the output end of the second current measurement path 12, the measuring module 20 can measure the differential mode voltage across the measuring resistor R0 through the first current measurement path 11 and the second current measurement path 12.
[0075] In the embodiment of the present application, a first impedance element 13 is connected in series on the first current measurement path 11, and a second impedance element 14 is connected in series on the second current measurement path 12. The first impedance element 13 and the second impedance element 14 can convert the differential mode voltage across the measuring resistor R0 into a differential mode current, so that the measuring module 20 amplifies the differential mode current into a voltage signal, thereby improving the measurement accuracy of the differential mode voltage across the measuring resistor R0. Exemplarily, the first impedance element 13 can be any one or a combination of multiple of a resistor, a capacitor or an inductor.
[0076] Among them, there is a mismatch between the first impedance element 13 and the second impedance element 14. For example, taking the first impedance element 13 and the second impedance element 14 as resistors, ideally the resistance values of the first impedance element 13 and the second impedance element 14 are equal, but due to the influence of manufacturing process and materials, the sizes (such as the current flow cross-sectional area) and conductor materials of the first impedance element 13 and the second impedance element 14 are not completely consistent, resulting in the resistance values of the first impedance element 13 and the second impedance element 14 being unequal, which in turn leads to a mismatch between the first impedance element 13 and the second impedance element 14.
[0077] Continue reading Figure 2 , in an ideal case, the impedances of the first impedance element 13 and the second impedance element 14 are equal, the current flowing through the first impedance element 13 is Ir1, the current flowing through the second impedance element 14 is Ir2, and the voltage difference across the measuring resistor R0 is △V, then the current flowing through the first impedance element 13, the current flowing through the second impedance element 14 and the voltage difference across the resistor satisfy the following relationship:
[0078] △V / Z=Ir1-Ir2
[0079] △V=V1-V2
[0080] Wherein, Z is the ideal impedance value of the first impedance element 13 and the second impedance element 14 , V1 is the voltage value of one end of the measuring resistor R0 , and V2 is the voltage value of the other end of the measuring resistor R0 .
[0081] However, due to the mismatch between the first impedance element 13 and the second impedance element 14, a mismatched differential mode current will exist between the first impedance element 13 and the second impedance element 14. The magnitude of the mismatched differential mode current is:
[0082] △Ir=△V / △Z
[0083] Wherein, △Ir is the mismatched differential mode current, and △Z is the impedance difference between the first impedance and the second impedance.
[0084] That is to say, after passing through the first impedance element 13 and the second impedance element 14, the differential mode current actually output by the first current measurement path 11 and the second current measurement path 12 is:
[0085] Ir=△V / Z+△V / △Z
[0086] Therefore, due to the mismatch between the first impedance element 13 and the second impedance element 14 , the differential mode current input to the measurement module 20 has a certain error, which reduces the accuracy of the speaker LO current detection.
[0087] In the embodiment of the present application, since the first output end of the mismatch elimination module 30 is coupled to the first current measurement path 11, and the second output end of the mismatch elimination module 30 is coupled to the second current measurement path 12, the mismatch elimination module 30 can extract the current on the first current measurement path 11 and the second current measurement path 12, or the mismatch elimination module 30 can inject current into the first current measurement path 11 and the second current measurement path 12, thereby eliminating the mismatched differential mode current between the first impedance element 13 and the second impedance element 14, and ultimately avoiding the phenomenon of reduced speaker LO current detection accuracy due to the mismatch between the first impedance element 13 and the second impedance element 14.
[0088] It should be noted that the first output end of the mismatch elimination module 30 referred to in the present application is coupled to the first current measurement path 11, and the second output end of the mismatch elimination module 30 is coupled to the second current measurement path 12. It may mean that the first output end of the mismatch elimination module 30 is directly connected to the first current measurement path 11, and the second output end of the mismatch elimination module 30 is directly connected to the second current measurement path 12; it may also mean that the first output end of the mismatch elimination module 30 is indirectly connected to the first current measurement path 11 through other circuit modules (such as the amplifier 21 or the analog-to-digital converter 22), and the second output end of the mismatch elimination module 30 is connected to the second current measurement path 12 through other circuit modules.
[0089] In some embodiments of the present application, for example, for an embodiment in which the mismatch elimination module 30 can inject current into the first current measurement path 11 and the second current measurement path 12, see Figure 3 , Figure 3 Another schematic diagram of the speaker current detection circuit in an embodiment of the present application is shown, wherein the first output end of the mismatch elimination module 30 is used to input the first compensation current I1 to the first current measurement path 11; the second output end of the mismatch elimination module 30 is used to input the second compensation current I2 to the second current measurement path 12, wherein the difference between the first compensation current I1 and the second compensation current I2 is equal to the magnitude of the mismatch differential mode current.
[0090] For example, the current magnitude of the first current measurement path 11 is 0.3A, the current magnitude of the second current measurement path 12 is 0.22A, and in an ideal case where the impedance of the first impedance element 13 and the second impedance element 14 are equal, the differential mode current output by the first current measurement path 11 and the second current path is 0.1A, that is, since the impedance of the second impedance element 14 is less than the impedance of the first impedance element 13, the current of the second current measurement path 12 is too large and a mismatch differential mode current of 0.02A is generated. At this time, the first output end of the mismatch elimination module 30 can input a first compensation current I1 of 0.05A to the first current measurement path 11, and the mismatch elimination module 30 can output a first compensation current I2 of 0.05A to the first current measurement path 11. The second output end of the mismatch elimination module 30 can input a second compensation current I2 with a magnitude of 0.03A to the second current measurement path 12, so that the current magnitude output by the first current measurement path 11 is 0.35A, and the current magnitude output by the second current measurement path 12 is 0.25A. After compensation, the differential mode current output by the first current measurement path 11 and the second current path is 0.1A. Therefore, after the mismatch elimination module 30 inputs the first compensation current I1 to the first current measurement path 11 and the second compensation current I2 to the second current measurement path 12, the mismatch differential mode current between the first impedance element 13 and the second impedance element 14 is finally offset.
[0091] As an exemplary embodiment of the mismatch elimination module 30, see Figure 4 , Figure 4Another schematic diagram of the speaker current detection circuit in the embodiment of the present application is shown, wherein the mismatch elimination module 30 includes a first fully differential operational amplifier OP, a first adjustable resistor Rt1 and a second adjustable resistor Rt2: a first differential current signal △Ii is connected between the non-inverting input terminal and the inverting input terminal of the first fully differential operational amplifier OP; one end of the first adjustable resistor Rt1 is connected to the non-inverting input terminal of the first fully differential operational amplifier OP, and the other end is connected to the inverting output terminal of the first fully differential operational amplifier OP; one end of the second adjustable resistor Rt2 is connected to the inverting input terminal of the first fully differential operational amplifier OP, and the other end is connected to the non-inverting output terminal of the first fully differential operational amplifier OP; the inverting output terminal of the first fully differential operational amplifier OP is connected to the first current measurement path 11 to input the first compensation current I1, and the non-inverting output terminal of the first fully differential operational amplifier OP is connected to the second current measurement path 12 to input the second compensation current I2.
[0092] Specifically, after the first differential current signal △Ii is connected between the non-inverting input terminal and the inverting input terminal of the first fully differential operational amplifier OP, the voltages at the inverting output terminal and the non-inverting output terminal of the first fully differential operational amplifier OP can be changed by changing the resistances of the first adjustable resistor Rt1 and the second adjustable resistor Rt2. After passing through the resistors R01 and R02, the first compensation current I1 can be input into the first current measurement path 11, and the second compensation current I2 can be input into the second current measurement path 12, and the difference between the first compensation current I1 and the second compensation current I2 is equal to the mismatch differential mode current.
[0093] As another exemplary embodiment of the mismatch elimination module 30, see Figure 5 , Figure 5Another schematic diagram of the speaker current detection circuit in the embodiment of the present application is shown, the mismatch elimination module 30 includes a first operational amplifier OP1, a second operational amplifier OP2, a first resistor R1, a second resistor R2 and a third adjustable resistor Rt3; a first differential voltage signal △Vi is connected between the non-inverting input terminal of the first operational amplifier OP1 and the non-inverting input terminal of the second operational amplifier OP2; one end of the first resistor R1 is connected to the inverting input terminal of the first operational amplifier OP1, and the other end is connected to the output terminal of the first operational amplifier OP1; one end of the second resistor R2 is connected to the inverting input terminal of the second operational amplifier OP2, and the other end is connected to the output terminal of the second operational amplifier OP2; one end of the third adjustable resistor Rt3 is connected to the inverting input terminal of the first operational amplifier OP1, and the other end is connected to the inverting input terminal of the second operational amplifier OP2; the output terminal of the first operational amplifier OP1 is connected to the first current measurement path 11 to input the first compensation current I1, and the output terminal of the second operational amplifier OP2 is connected to the second current measurement path 12 to input the second compensation current I2.
[0094] Specifically, a first differential voltage signal △Vi is connected between the non-inverting input terminal of the first operational amplifier OP1 and the non-inverting input terminal of the second operational amplifier OP2, and the current difference between the first compensation current I1 and the second compensation current I2 satisfies the following relationship: I1-I2=△Vi / (R1+R2+Rt3). Since the resistance of the third adjustable resistor Rt3 is adjustable, the difference between the first compensation current I1 and the second compensation current I2 can be made equal to the size of the mismatched differential mode current, thereby ultimately achieving the purpose of offsetting the mismatched differential mode current between the first impedance element 13 and the second impedance element 14.
[0095] In some embodiments of the present application, for example, for an embodiment in which the mismatch elimination module 30 can extract the current of the first current measurement path 11 and the second current measurement path 12, see Figure 6 , Figure 6 Another schematic diagram of the speaker current detection circuit in an embodiment of the present application is shown, wherein the first current measurement path 11 inputs the first extracted current I3 to the first output end of the mismatch elimination module 30; the second current measurement path 12 inputs the second extracted current I4 to the second output end of the mismatch elimination module 30; wherein the difference between the first extracted current I3 and the second extracted current I4 is equal to the magnitude of the mismatch differential mode current.
[0096] For example, the current magnitude of the first current measurement path 11 is 0.4A, the current magnitude of the second current measurement path 12 is 0.48A, and the differential mode current output by the first current measurement path 11 and the second current measurement path is 0.1A under the ideal condition that the impedance of the first impedance element 13 and the second impedance element 14 are equal. That is, since the impedance of the second impedance element 14 is greater than the impedance of the first impedance element 13, the current of the second current measurement path 12 is too small and a mismatch differential mode current of 0.02A is generated. At this time, the first output end of the mismatch elimination module 30 can extract the second current measurement path 11 with a magnitude of 0.1A. The second output end of the mismatch elimination module 30 can extract a second extracted current I4 of 0.08A from the second current measurement path 12, so that the current output by the first current measurement path 11 is 0.3A, and the current output by the second current measurement path 12 is 0.4A. After compensation, the differential mode current output by the first current measurement path 11 and the second current measurement path is 0.1A. Therefore, after the mismatch elimination module 30 extracts the current of the first current measurement path 11 and the second current measurement path 12, the mismatch differential mode current between the first impedance element 13 and the second impedance element 14 is finally offset.
[0097] As another exemplary embodiment of the mismatch elimination module 30, see Figure 7 , Figure 7 Another schematic diagram of the speaker current detection circuit in an embodiment of the present application is shown, wherein the mismatch elimination module 30 includes a first MOS transistor M1, a second MOS transistor M2 and a first adjustable current source It1; a first differential voltage signal △Vi is connected between the control end of the first MOS transistor M1 and the control end of the second MOS transistor M2; a first end of the first MOS transistor M1 and a first end of the second MOS transistor M2 are connected to the input end of the first adjustable current source It1, and an output end of the first adjustable current source It1 is connected to the ground end; a second end of the first MOS transistor M1 is connected to a first current measurement path 11 to receive a first extracted current I3, and a second end of the second MOS transistor M2 is connected to a second current measurement path 12 to receive a second extracted current I4.
[0098] Specifically, when the first differential voltage signal △Vi is connected between the control end of the first MOS tube M1 and the control end of the second MOS tube M2, the current difference between the current flowing through the first MOS tube M1 (i.e., the first extracted current I3) and the current flowing through the second MOS tube M2 (i.e., the second extracted current I4) is controlled by the first differential voltage signal △Vi and the current size of the first adjustable current source It1. Therefore, by changing the current size of the first adjustable current source It1, the difference between the first extracted current I3 and the second extracted current I4 can be changed, so that the difference between the first extracted current I3 and the second extracted current I4 is equal to the size of the mismatched differential mode current, and finally the purpose of offsetting the mismatched differential mode current between the first impedance element 13 and the second impedance element 14 is achieved.
[0099] As another exemplary embodiment of the mismatch elimination module 30, see Figure 8 , Figure 8 Another schematic diagram of the speaker current detection circuit in the embodiment of the present application is shown, wherein the mismatch elimination module 30 includes a first adjustable MOS transistor Mt1, a second adjustable MOS transistor Mt2 and a first fixed current source Is1; a first differential voltage signal △Vi is connected between the control end of the first adjustable MOS transistor Mt1 and the control end of the second adjustable MOS transistor Mt2; a first end of the first adjustable MOS transistor Mt1 and a first end of the second adjustable MOS transistor Mt2 are connected to the input end of the first fixed current source Is1, and an output end of the first fixed current source Is1 is connected to the ground end; a second end of the first adjustable MOS transistor Mt1 is connected to a first current measurement path 11 to receive a first extracted current I3, and a second end of the second adjustable MOS transistor Mt2 is connected to a second current measurement path 12 to receive a second extracted current I4.
[0100] It should be noted that the first adjustable MOS transistor Mt1 and the second adjustable MOS transistor Mt2 may refer to a plurality of MOS transistors connected in parallel, and the control end of each MOS transistor is connected to a differential voltage signal. When the number of parallel MOS transistors in the first adjustable MOS transistor Mt1 and the second adjustable MOS transistor Mt2 is changed, the current flowing through the first adjustable MOS transistor Mt1 (i.e., the first extraction current I3) may be changed, and the current flowing through the second adjustable MOS transistor Mt2 (i.e., the second extraction current I4) may be changed, so that the difference between the first extraction current I3 and the second extraction current I4 is equal to the magnitude of the mismatched differential mode current, and finally the purpose of offsetting the mismatched differential mode current between the first impedance element 13 and the second impedance element 14 is achieved.
[0101] It can be understood that the above embodiments are only exemplary introductions to the implementation process of the present application, and those skilled in the art can make equivalent modified designs based on the present application. For example, the mismatch elimination module 30 can also include a first adjustable MOS transistor Mt1, a second adjustable MOS transistor Mt2, and a first adjustable current source It1. By adjusting the first adjustable MOS transistor Mt1, the second adjustable MOS transistor Mt2, and the first adjustable current source It1, the difference between the first extraction current I3 and the second extraction current I4 is equal to the size of the mismatch differential mode current.
[0102] It should be noted that the first differential voltage signal △Vi and the first differential current signal △Ii in the above embodiment can be obtained through an external circuit, or through the internal circuit structure of the speaker current detection circuit, for example, see Fig. 9 , Fig. 9 Another schematic diagram of the speaker current detection circuit in the embodiment of the present application is shown, wherein the resistors R05 and R06 are connected in series at one end of the measuring resistor R0, and a first differential voltage signal △Vi can be output through both ends of the resistor R06, and then converted into a first differential current signal △Ii through the resistors R03 and R04; for another example, refer to Fig.10 , Fig.10 Another schematic diagram of the speaker current detection circuit in the embodiment of the present application is shown. A resistor R07 can be connected in series on the first current measurement path 11, and a resistor R08 can be connected in series on the second current measurement path 12. The first differential voltage signal △Vi can be output through both ends of the resistor R07.
[0103] In some embodiments of the present application, see Fig.11 , Fig.11 Another schematic diagram of a speaker current detection circuit in an embodiment of the present application is shown, wherein the measurement module 20 includes an amplifier 21 and an analog-to-digital converter 22; a first input end of the amplifier 21 is connected to an output end of the first current measurement path 11, and a second input end of the amplifier 21 is connected to an output end of the second current measurement path 12, so that the differential mode voltage across the measuring resistor R0 can be amplified, and an input end of the analog-to-digital converter 22 is connected to an output end of the amplifier 21, so as to measure the differential mode voltage across the measuring resistor R0 and convert the differential mode voltage into a digital signal.
[0104] In some embodiments of the present application, for example, the first output end of the mismatch elimination module 30 is indirectly connected to the first current measurement path 11 through other circuit modules (such as the amplifier 21 or the analog-to-digital converter 22), and the second output end of the mismatch elimination module 30 is connected to the second current measurement path through other circuit modules. Fig.12 , Fig.12Another schematic diagram of the speaker current detection circuit in an embodiment of the present application is shown, wherein the first output terminal and the second output terminal of the mismatch elimination module 30 are connected to the connection path between the amplifier 21 and the analog-to-digital converter 22. When the amplifier 21 amplifies the differential-mode voltage across the measuring resistor R0, the mismatch elimination module 30 can compensate for the differential-mode voltage output by the amplifier 21, thereby indirectly compensating and eliminating the measurement error caused by the mismatch of the first impedance element 13 and the second impedance element 14.
[0105] It is worth noting that the above content about the speaker current detection circuit is intended to clearly illustrate the implementation verification process of the present application. Those skilled in the art can also make equivalent modified designs under the guidance of the present application. For example, the first output terminal and the second output terminal of the mismatch elimination module 30 can also be connected to the internal circuit of the amplifier 21; for another example, the first output terminal and the second output terminal of the mismatch elimination module 30 can also be connected to the internal circuit of the analog-to-digital converter 22 to indirectly eliminate the measurement error caused by the mismatch of the first impedance element 13 and the second impedance element 14.
[0106] Furthermore, in order to better implement the speaker current detection circuit in the embodiment of the present application, on the basis of the speaker current detection circuit, the present application also provides a speaker LO current detection device, and the speaker LO current detection device includes the speaker current detection circuit as in any of the above embodiments. Since the speaker LO current detection device in the embodiment of the present application is provided with the speaker current detection circuit in the above embodiment, it has all the beneficial effects of the above speaker current detection circuit, which will not be described in detail here.
[0107] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, please refer to the detailed description of other embodiments above, and will not be repeated here.
[0108] The basic concepts have been described above. Obviously, for those skilled in the art, the above detailed disclosure is only for example and does not constitute a limitation of the present application. Although not explicitly stated herein, those skilled in the art may make various modifications, improvements and amendments to the present application. Such modifications, improvements and amendments are suggested in the present application, so such modifications, improvements and amendments still belong to the spirit and scope of the exemplary embodiments of the present application.
[0109] At the same time, the present application uses specific words to describe the embodiments of the present application. For example, "one embodiment", "an embodiment", and / or "some embodiments" refer to a certain feature, structure or characteristic related to at least one embodiment of the present application. Therefore, it should be emphasized and noted that "one embodiment" or "an embodiment" or "an alternative embodiment" mentioned twice or more in different positions in this specification does not necessarily refer to the same embodiment. In addition, some features, structures or characteristics in one or more embodiments of the present application can be appropriately combined.
[0110] Similarly, it should be noted that in order to simplify the description of the disclosure of this application and thus help understand one or more utility model embodiments, in the above description of the embodiments of this application, multiple features are sometimes combined into one embodiment, drawing or description thereof. However, this disclosure method does not mean that the features required by the object of this application are more than the features mentioned in the claims. In fact, the features of the embodiments are less than all the features of the single embodiment disclosed above.
[0111] In some embodiments, numbers describing the number of components and attributes are used. It should be understood that such numbers used in the description of the embodiments are modified by the modifiers "about", "approximately" or "substantially" in some examples. Unless otherwise specified, "about", "approximately" or "substantially" indicate that the numbers are allowed to vary by ±20%. Accordingly, in some embodiments, the numerical parameters used in the specification and claims are approximate values, which may change according to the required features of individual embodiments. In some embodiments, the numerical parameters should take into account the specified significant digits and adopt the general method of retaining digits. Although the numerical domains and parameters used to confirm the breadth of their range in some embodiments of the present application are approximate values, in specific embodiments, the setting of such numerical values is as accurate as possible within the feasible range.
[0112] Each patent, patent application, patent application publication, and other materials, such as articles, books, specifications, publications, documents, etc., cited in this application is hereby incorporated by reference in its entirety, except for application history documents that are inconsistent with or conflicting with the content of this application, and documents that limit the broadest scope of the claims of this application (currently or later attached to this application). It should be noted that if the descriptions, definitions, and / or use of terms in the accompanying materials of this application are inconsistent or conflicting with the content described in this application, the descriptions, definitions, and / or use of terms in this application shall prevail.
[0113] The above is a detailed introduction to a speaker current detection circuit and device provided in the embodiments of the present application. Specific examples are used in this article to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method and core idea of the present invention. At the same time, for those skilled in the art, according to the idea of the present invention, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present invention.
Claims
1. A speaker current detection circuit, characterized in that: The speaker current detection circuit is used to detect the current flowing through the measuring resistor and the speaker connected in series, and includes: a first current measurement path and a second current measurement path, wherein an input end of the first current measurement path is connected to one end of the measuring resistor, and an input end of the second current measurement path is connected to the other end of the measuring resistor; a measuring module, wherein a first input terminal of the measuring module is connected to an output terminal of the first current measurement path, and a second input terminal of the measuring module is connected to an output terminal of the second current measurement path, so as to measure a differential mode voltage across the measuring resistor; Wherein, a first impedance element is connected in series on the first current measurement path, a second impedance element is connected in series on the second current measurement path, and a mismatched differential mode current exists between the first impedance element and the second impedance element; The speaker current detection circuit includes a mismatch elimination module, a first output end of the mismatch elimination module is coupled to the first current measurement path, and a second output end of the mismatch elimination module is coupled to the second current measurement path to eliminate the mismatch differential mode current between the first impedance element and the second impedance element.
2. The speaker current detection circuit according to claim 1, characterized in that: The first output terminal of the mismatch elimination module is used to input a first compensation current into the first current measurement path; The second output terminal of the mismatch elimination module is used to input a second compensation current into the second current measurement path; The difference between the first compensation current and the second compensation current is equal to the magnitude of the mismatched differential mode current.
3. The speaker current detection circuit according to claim 2, characterized in that: The mismatch elimination module includes a first fully differential operational amplifier, a first adjustable resistor and a second adjustable resistor: A first differential current signal is connected between the non-inverting input terminal and the inverting input terminal of the first fully differential operational amplifier; One end of the first adjustable resistor is connected to the non-inverting input end of the first fully differential operational amplifier, and the other end is connected to the inverting output end of the first fully differential operational amplifier; One end of the second adjustable resistor is connected to the inverting input end of the first fully differential operational amplifier, and the other end is connected to the non-inverting output end of the first fully differential operational amplifier; The inverting output terminal of the first fully differential operational amplifier is connected to the first current measurement path to input the first compensation current, and the non-inverting output terminal of the first fully differential operational amplifier is connected to the second current measurement path to input the second compensation current.
4. The speaker current detection circuit according to claim 2, characterized in that: The mismatch elimination module includes a first operational amplifier, a second operational amplifier, a first resistor, a second resistor and a third adjustable resistor; A first differential voltage signal is connected between the non-inverting input terminal of the first operational amplifier and the non-inverting input terminal of the second operational amplifier; One end of the first resistor is connected to the inverting input end of the first operational amplifier, and the other end is connected to the output end of the first operational amplifier; One end of the second resistor is connected to the inverting input end of the second operational amplifier, and the other end is connected to the output end of the second operational amplifier; One end of the third adjustable resistor is connected to the inverting input end of the first operational amplifier, and the other end is connected to the inverting input end of the second operational amplifier; An output terminal of the first operational amplifier is connected to the first current measurement path to input the first compensation current, and an output terminal of the second operational amplifier is connected to the second current measurement path to input the second compensation current.
5. The speaker current detection circuit according to claim 1, wherein: The first current measurement path inputs a first extraction current to a first output terminal of the mismatch elimination module; The second current measurement path inputs a second extraction current to a second output terminal of the mismatch elimination module; The difference between the first extracted current and the second extracted current is equal to the magnitude of the mismatched differential mode current.
6. The speaker current detection circuit as claimed in claim 5, characterized in that: The mismatch elimination module includes a first MOS transistor, a second MOS transistor and a first adjustable current source; A first differential voltage signal is connected between the control end of the first MOS transistor and the control end of the second MOS transistor; The first end of the first MOS transistor and the first end of the second MOS transistor are connected to the input end of the first adjustable current source, and the output end of the first adjustable current source is connected to the ground end; The second end of the first MOS transistor is connected to the first current measurement path to receive the first extracted current, and the second end of the second MOS transistor is connected to the second current measurement path to receive the second extracted current.
7. The speaker current detection circuit according to claim 5, characterized in that: The mismatch elimination module includes a first adjustable MOS transistor, a second adjustable MOS transistor and a first fixed current source; A first differential voltage signal is connected between the control end of the first adjustable MOS transistor and the control end of the second adjustable MOS transistor; The first end of the first adjustable MOS transistor and the first end of the second adjustable MOS transistor are connected to the input end of the first fixed current source, and the output end of the first fixed current source is connected to the ground end; The second end of the first adjustable MOS transistor is connected to the first current measurement path to receive the first extracted current, and the second end of the second adjustable MOS transistor is connected to the second current measurement path to receive the second extracted current.
8. The speaker current detection circuit according to claim 1, wherein: The measuring module includes an amplifier and an analog-to-digital converter; A first input terminal of the amplifier is connected to an output terminal of the first current measurement path, and a second input terminal of the amplifier is connected to an output terminal of the second current measurement path; The input end of the analog-to-digital converter is connected to the output end of the amplifier to measure the differential mode voltage across the measuring resistor.
9. The speaker current detection circuit as claimed in claim 8, characterized in that: The first output terminal and the second output terminal of the mismatch elimination module are connected to the internal circuit of the amplifier; or The first output terminal and the second output terminal of the mismatch elimination module are connected to the connection path between the amplifier and the analog-to-digital converter; or The first output terminal and the second output terminal of the mismatch elimination module are connected to the internal circuit of the analog-to-digital converter.
10. A speaker current detection device, characterized in that: The invention comprises a speaker current detection circuit as claimed in any one of claims 1 to 9.