Power converter and control circuit thereof

Abstract

According to the power converter and the control circuit thereof provided by the utility model, the power converter comprises N controllable switch tubes and an inductor, outputs an error amplification signal according to a feedback signal of an output voltage and a reference voltage, and outputs a first comparison signal according to a current sampling signal and the error amplification signal; outputting a second comparison signal according to the ramp voltage signal and a third voltage threshold; and outputting N control signals according to the first comparison signal and the second comparison signal so as to control on or off of N controllable switching tubes in the power converter. Wherein the third voltage threshold value is generated based on the first voltage threshold value and the second voltage threshold value; the second voltage threshold value is the variable quantity of the ramp voltage signal within the delay time td of the second comparator; the ramp voltage signal and the first voltage threshold are generated according to the input voltage and / or the output voltage, respectively. Through the setting, the influence of the time delay of the second comparator on the switching frequency can be avoided, and the basic constancy of the switching frequency is realized.

Description

Technical Field

[0001] The utility model relates to the field of power converters, in particular to a power converter and a control circuit thereof. Background Art

[0002] Power converters have various topology types such as boost, buck, buck-boost, etc. COT (constant ontime) or CFT (constant off time) can be used to achieve basic constant frequency. Figure 1As shown, it is a schematic diagram of a boost power converter with constant off-time control, the boost converter includes a switch tube M1, a switch tube M2 and an inductor L, the three are connected into a boost topology structure for converting an input voltage Vin into an output voltage Vout for supplying power to a load Rload, a capacitor Cin and a capacitor Cout are respectively arranged at both ends of the input voltage Vin and the output voltage Vout; the error amplifier EA is used to output an error amplification signal Vcomp according to a feedback voltage VFB of the output voltage and a reference voltage Vref, and a compensation module is also arranged at the output end of the error amplifier for compensating the error amplification signal; the first comparator CMP1 outputs a first comparison signal according to a current sampling signal Vsense and the error amplification signal Vcomp. signal V1; the first input terminal of the second comparator CMP2 receives the ramp voltage signal Vramp, which ramp voltage signal Vramp=K1*Vout*Toff / C1 (Formula 1), and the second input terminal receives the first threshold voltage Vth1=K2*Vin (Formula 2), wherein K1 and K2 are both values ​​greater than 0 and less than 1, and the second comparator generates a second comparison signal V2 according to the ramp voltage signal Vramp and the first threshold voltage K2*Vin, and when the ramp voltage signal is equal to the first threshold voltage K2*Vin, the second comparator flips; the first comparison signal V1 and the second comparison signal V2 act on the reset terminal R and the set terminal S of the RS trigger respectively, and the RS trigger outputs a control signal for controlling the switch tubes M1 and M2 to be turned on or off. Among them, according to formula 1 and formula 2, the off time Toff of the boost converter can be calculated as K2*Vin*C1 / (K1*Vout); and Toff=(1-D)*T=Vin*T / Vout, where D represents the duty cycle of the boost converter, and T represents the switching period, then T=K2*C1 / K1 can be calculated. Since K2, C1 and K1 generally have certain values, the switching period T can be made basically constant, and the switching frequency can be basically constant. However, due to the delay of the second comparator CMP2, when the ramp voltage signal reaches the first threshold voltage K2*Vin, the comparator does not flip immediately, but flips after the delay time td, so the off time Toff will be extended by td, which will affect the switching period T, causing the switching frequency to change with Vin and Vout. Therefore, it is necessary to improve the problems existing in the prior art. Utility Model Content

[0003] In order to solve the above technical problems, the utility model provides a power converter and a control circuit thereof.

[0004] According to a first aspect of the utility model, a control circuit of a power converter is provided, wherein the power converter comprises N controllable switch tubes and an inductor, and is used to convert an input voltage into an output voltage, where N is a positive integer greater than or equal to 1; the control circuit comprises:

[0005] An error amplifier, which outputs an error amplified signal according to a feedback signal of the output voltage and a reference voltage;

[0006] A first comparator, wherein a first input terminal receives a current sampling signal, wherein the current sampling signal represents the magnitude of the current flowing through the power converter; a second input terminal receives the error amplification signal; and the first comparator outputs a first comparison signal according to the current sampling signal and the error amplification signal;

[0007] Characterized in that the control circuit also includes:

[0008] A second comparator, wherein the first input terminal receives a ramp voltage signal; the second input terminal receives a third voltage threshold, wherein the third voltage threshold is generated based on the first voltage threshold and the second voltage threshold; and the second comparator outputs a second comparison signal according to the ramp voltage signal and the third voltage threshold;

[0009] A logic and driving module, which outputs N control signals according to the first comparison signal and the second comparison signal, and is used to control the on or off of the N controllable switch tubes respectively;

[0010] The second voltage threshold is the change amount of the ramp voltage signal within the delay time td of the second comparator; the ramp voltage signal and the first voltage threshold are respectively generated according to the input voltage and / or the output voltage.

[0011] Optionally, when the second comparator delay time td is zero, the on or off time of the power converter is determined based on the ramp voltage signal and the first voltage threshold.

[0012] Optionally, the control circuit further includes a ramp voltage generating circuit for generating the ramp voltage signal;

[0013] The ramp voltage generating circuit includes a capacitor, a switch tube and a current source, wherein the current source is generated according to an input voltage and / or an output voltage; the switch tube and the capacitor are connected in parallel; when the switch tube is turned off, the current source acts on the capacitor to charge the capacitor to generate the ramp voltage signal; when the switch tube is turned on, the capacitor is discharged to zero.

[0014] Optionally, the third voltage threshold is equal to the difference between the first voltage threshold and the second voltage threshold.

[0015] Optionally, when the power converter is a boost converter controlled by a constant off-time, the current source is equal to K1*Vout; the first voltage threshold is equal to K2*Vin, the second voltage threshold is equal to K1*Vout*td / C1; the third voltage threshold is equal to the difference between K2*Vin and K1*Vout*td / C1;

[0016] When the power converter is a boost converter with constant on-time control, the current source is equal to K1*Vout; the first voltage threshold is equal to K2*(Vout-Vin), the second voltage threshold is equal to K1*Vout*td / C1; the third voltage threshold is equal to the difference between K2*(Vout-Vin) and K1*Vout*td / C1; wherein K1 and K2 are both greater than 0 and less than 1.

[0017] Optionally, when the power converter is a buck converter controlled by a constant off-time, the current source is equal to K1*Vin; the first voltage threshold is equal to K2*(Vin-Vout), the second voltage threshold is equal to K1*Vin*td / C1; the third voltage threshold is equal to the difference between K2*(Vin-Vout) and K1*Vin*td / C1;

[0018] When the power converter is a buck converter with constant on-time control, the current source is equal to K1*Vin; the first voltage threshold is equal to K2*Vout, the second voltage threshold is equal to K1*Vin*td / C1; the third voltage threshold is equal to the difference between K2*Vout and K1*Vin*td / C1; wherein K1 and K2 are both greater than 0 and less than 1.

[0019] Optionally, when the power converter is a buck-boost converter controlled by a constant off-time, the current source is equal to K1*(Vin+Vout); the first voltage threshold is equal to K2*Vin, the second voltage threshold is equal to K1*(Vin+Vout)*td / C1; the third voltage threshold is equal to the difference between K2*Vin and K1*(Vin+Vout)*td / C1;

[0020] When the power converter is a buck-boost converter with constant on-time control, the current source is equal to K1*(Vin+Vout); the first voltage threshold is equal to K2*Vout, the second voltage threshold is equal to K1*(Vin+Vout)*td / C1; the third voltage threshold is equal to the difference between K2*Vout and K1*(Vin+Vout)*td / C1; wherein K1 and K2 are both greater than 0 and less than 1.

[0021] The utility model also provides a power converter, which includes N controllable switching tubes and an inductor, and is used to convert an input voltage into an output voltage, where N is a positive integer greater than or equal to 1; it is characterized in that the power converter includes the control circuit described above, and controls the conduction or shutdown of the N controllable switching tubes based on the control circuit.

[0022] The beneficial effects of the utility model include at least:

[0023] The utility model provides a power converter and a control circuit thereof, wherein the power converter includes N controllable switch tubes and an inductor, which are used to convert an input voltage into an output voltage, wherein N is a positive integer greater than or equal to 1; an error amplification signal is output according to a feedback signal of the output voltage and a reference voltage; a first comparator outputs a first comparison signal according to a current sampling signal and an error amplification signal; a second comparator outputs a second comparison signal according to a ramp voltage signal and a third voltage threshold; and N control signals are output according to the first comparison signal and the second comparison signal, which are respectively used to control the conduction or shutoff of the N controllable switch tubes. Among them, the third voltage threshold is generated based on the first voltage threshold and the second voltage threshold; the ramp voltage signal and the first voltage threshold are respectively generated according to the input voltage and / or the output voltage; and the second voltage threshold is the variation of the ramp voltage signal within the delay time td of the second comparator. Through the above-mentioned setting, the utility model can avoid the influence of the delay of the second comparator on the switching frequency, and realize the basic constancy of the switching frequency.

[0024] Further, when the delay time td of the second comparator is zero, the on or off time of the power converter is determined based on the ramp voltage signal and the first voltage threshold.

[0025] Further, the third voltage threshold is equal to the difference between the first voltage threshold and the second voltage threshold.

[0026] Furthermore, the power converter may be a boost / buck / boost-boost converter controlled by a constant on-time or a constant off-time.

[0027] It should be noted that the above general description and the following detailed description are merely exemplary and explanatory and cannot limit the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 A schematic diagram of a boost converter with constant off-time control in the prior art is shown;

[0029] Figure 2 A schematic diagram of a power converter and a control circuit thereof provided by the utility model is shown;

[0030] Figure 3A schematic diagram of a boost converter with constant off-time control provided by the utility model is shown;

[0031] Figure 4 The utility model provides Figure 3 A schematic diagram of a working waveform;

[0032] Figure 5 A principle diagram of a boost converter with constant on-time control provided by the utility model is shown. DETAILED DESCRIPTION

[0033] In order to facilitate the understanding of the present invention, the present invention will be described more comprehensively with reference to the relevant drawings. The drawings provide preferred embodiments of the present invention. However, the present invention can be implemented in different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the understanding of the disclosure of the present invention more thorough and comprehensive.

[0034] Figure 2The utility model provides a schematic diagram of a power converter, which includes N controllable switch tubes and inductors, and is used to convert an input voltage Vin into an output voltage Vout, where N is a positive integer greater than or equal to 1. The power converter has a control circuit 100, which includes an error amplifier EA, a first comparator CMP1, a second comparator CMP2, and a logic and drive module. The error amplifier generates an error amplification signal Vcomp according to a feedback signal VFB of the output voltage and a reference voltage Vref, where the feedback signal VFB is a divided voltage of the output voltage Vout (divided by resistors R1 and R2); similarly, a compensation module is also provided at the output end of the error amplifier EA to compensate for the error amplification signal. The first input terminal of the first comparator CMP1 receives a current sampling signal Vsense, which represents the magnitude of the current flowing through the power converter. According to the type of the power converter and its control circuit, the current sampling signal can represent the current in the rising stage of the inductor current or the current in the falling stage of the inductor current; the second input terminal receives the error amplification signal Vcomp; the first comparator CMP1 outputs a first comparison signal V1 according to the current sampling signal and the error amplification signal. The first input terminal of the second comparator CMP2 receives a ramp voltage signal Vramp, and the second input terminal receives a third voltage threshold Vth3, wherein the third voltage threshold Vth3 is generated based on the first voltage threshold Vth1 and the second voltage threshold Vth2; the second comparator CMP2 outputs a second comparison signal V2 according to the ramp voltage signal and the third voltage threshold. The logic and drive module outputs N control signals according to the first comparison signal V1 and the second comparison signal V2, which are respectively used to control the conduction or shutdown of the N controllable switch tubes. The ramp voltage signal and the first voltage threshold are generated according to the input voltage and / or the output voltage respectively. When the delay time td of the second comparator CMP2 is zero, the on or off time of the power converter is determined based on the ramp voltage signal and the first voltage threshold. For example, when the power converter adopts Figure 1 For the same structure as in (boost power converter with constant off-time), see Figure 3 At this time, the ramp voltage signal Vramp and the first voltage threshold Vth1 are Figure 1 The values ​​in are the same, except that the threshold of the second input terminal of the second comparator CMP2 also takes into account the second voltage threshold Vth2, wherein the second voltage threshold is the change amount of the ramp voltage signal within the delay time td of the second comparator.

[0035] Furthermore, if Figure 2As shown, the ramp voltage signal is generated by a ramp voltage generating circuit, which includes a capacitor C1, a switch tube M3 and a current source I1. The switch tube M3 is connected in parallel with the capacitor C1. The control end of the switch tube M3 is controlled by a control signal G3. The control signal G3 is generated according to the type of the power converter and the structure of the control circuit. For example, for Figure 1 or 3, the control signal G3 is the same as the signal G1 at the output end of the RS trigger, so that the capacitor C1 is discharged during the conduction period of the switch tube M1, and the capacitor C1 is charged during the conduction period of the switch tube M2 to generate a ramp voltage signal. Figure 1 Or the structure in 3, the current source I1 = K1*Vout.

[0036] Furthermore, if Figure 3 As shown, the value of the second voltage threshold Vth2 is K1*Vout*td / C1 (the size of the ramp voltage signal generated by the delay time td of the second comparator), and the third voltage threshold Vth3 = the first voltage threshold Vth1-the second voltage threshold Vth2 = K2*Vin-K1*Vout*td / C1; when the ramp voltage signal is equal to the third voltage threshold, it can be calculated that the off time Toff at this time is [K2*Vin*C1 / (K1*Vout)]-td; because the second comparator has a delay and will not flip immediately, the actual off time is [K2*Vin*C1 / (K1*Vout)]-td+td=K2*Vin*C1 / (K1*Vout). It can be seen that through the above settings, the influence of the delay of the second comparator CMP2 on the switching frequency is eliminated. Among them, the delay time td of the second comparator is affected by parameters such as process, temperature, over-drive voltage, input signal rising slope and common-mode voltage. Therefore, the delay time td in the present application can be set to a variable value, which is not fixed, and corresponding values ​​can be set in different application scenarios.

[0037] In addition, it should be noted that Figure 3 It is just a hint Figure 2 An embodiment of the logic and driving module in the embodiment (the logic and driving module includes an RS trigger U1, an inverter and a driver driver), other embodiments can also be used to achieve the same function. In addition, Figure 2-3 The figure only illustrates one implementation of the ramp voltage generating circuit, and other variations may be used to achieve the same function. For example, the ramp voltage signal Vramp may be set in a gradually decreasing form (the difference between a fixed voltage and the capacitor integrated voltage), and the voltage threshold of the second input terminal of the second comparator CMP2 may be correspondingly changed to achieve the same function.

[0038] Further, Figure 4 for Figure 3 Schematic diagram of working waveform for eliminating delay of the second comparator, G1 and G2 represent signals for controlling switch tube M1 and switch tube M2 respectively, and here the high level is used as an example to represent switch tube conduction (switch tube M1 and switch tube M2 are both N-type MOS), at time t0, current source I1 acts on capacitor C1 to start generating a ramp voltage signal, at time t2, the ramp voltage signal reaches the first voltage threshold Vth1, due to the delay td of the second comparator, after time td, at time t3, the second comparator signal V2 flips, causing G1 to become a high level, and G2 to become is low level; it can be seen that the delay td prolongs the conduction time of the switch tube M2 by td (that is, the off time of the power converter); and the utility model adjusts the threshold of the second input terminal of the second comparator, that is, the adjusted threshold is the third voltage threshold, which is equal to the difference between the first voltage threshold and the second voltage threshold, that is, the ramp voltage signal of the second comparator reaches the third voltage threshold Vth3 at time t1, and after the delay time td at time t2, the second comparison signal jumps, G1 becomes a high level, and G2 becomes a low level, that is, the off time of the power converter ends. Therefore, by adjusting the threshold of the second input terminal of the second comparator, the influence of the delay td of the second comparator on the switching frequency is avoided, so that the switching frequency is basically constant.

[0039] Further, Figure 5 The following is a schematic diagram of a constant on-time controlled boost power converter. Figure 3 The difference is that Figure 3 The current sampling signal Vsense in the figure is a current signal representing the rising stage of the inductor current, and the current sampling signal Vsense in the figure is a current signal representing the falling stage of the inductor current. The positive and negative input terminals of the first comparator CMP1 are interchanged, and the set terminal S and the reset terminal R of the RS trigger U1 are interchanged; the third voltage threshold value Vth3 of the signal at the second input terminal of the second comparator CMP2 is K2*(Vout-Vin)-K1*Vout*td / C1, thereby making the switching period T of the power converter equal to K2*C1 / K1, thereby achieving a basically constant switching frequency.

[0040] Similarly, the above description is made by taking a boost converter controlled by a constant on-time or a constant off-time as an example, but the present invention is not limited thereto, and a buck-type or buck-boost power converter controlled by a constant on-time or a constant off-time may also be used to achieve the same function, and it is only necessary to change the current source I1 or the third voltage threshold Vth3 accordingly according to different types of power converters. For example, when Figure 2When the power converter is a buck power converter with constant off-time control, the current source I1 is equal to K1*Vin, the first voltage threshold is equal to K2*(Vin-Vout), the second voltage threshold is equal to K1*Vin*td / C1, and the third voltage threshold is equal to the difference between K2*(Vin-Vout) and K1*Vin*td / C1; when the power converter is a buck converter with constant on-time control, the current source is equal to K1*Vin; the first voltage threshold is equal to K2*Vout, the second voltage threshold is equal to K1*Vin*td / C1; the third voltage threshold is equal to the difference between K2*Vout and K1*Vin*td / C1. When the power converter is a buck-boost converter controlled by constant off-time, the current source is equal to K1*(Vin+Vout); the first voltage threshold is equal to K2*Vin, the second voltage threshold is equal to K1*(Vin+Vout)*td / C1; the third voltage threshold is equal to the difference between K2*Vin and K1*(Vin+Vout)*td / C1; when the power converter is a buck-boost converter controlled by constant on-time, the current source is equal to K1*(Vin+Vout); the first voltage threshold is equal to K2*Vout, the second voltage threshold is equal to K1*(Vin+Vout)*td / C1; the third voltage threshold is equal to the difference between K2*Vout and K1*(Vin+Vout)*td / C1. The working waveform of the inductor current of the buck-boost converter controlled by constant on-time or constant off-time is the same as that of the buck or boost converter, including the inductor current in the rising stage and the inductor current in the falling stage.

[0041] In summary, the power converter and its control circuit provided by the utility model include N controllable switch tubes and inductors, which are used to convert the input voltage into the output voltage, N is a positive integer greater than or equal to 1; an error amplification signal is output according to the output voltage and the reference voltage; the first comparator outputs a first comparison signal according to the current sampling signal and the error amplification signal; the second comparator outputs a second comparison signal according to the ramp voltage signal and the third voltage threshold; N control signals are output according to the first comparison signal and the second comparison signal, which are respectively used to control the conduction or shutdown of the N controllable switch tubes. Among them, the third voltage threshold is generated based on the first voltage threshold and the second voltage threshold; the ramp voltage signal and the first voltage threshold are generated according to the input voltage and / or the output voltage respectively; the second voltage threshold is the change amount of the ramp voltage signal within the delay time td of the second comparator. Through the above-mentioned settings, the utility model can avoid the influence of the delay of the second comparator on the switching frequency and achieve a basically constant switching frequency.

[0042] Further, when the delay time td of the second comparator is zero, the on or off time of the power converter is determined based on the ramp voltage signal and the first voltage threshold.

[0043] Further, the third voltage threshold is equal to the difference between the first voltage threshold and the second voltage threshold.

[0044] Furthermore, the power converter may be a boost / buck / boost-boost converter controlled by a constant on-time or a constant off-time.

[0045] Finally, it should be noted that: Obviously, the above embodiments are only examples for clearly explaining the present invention, and are not intended to limit the implementation methods. For ordinary technicians in the relevant field, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to list all the implementation methods here. The obvious changes or modifications derived from this are still within the scope of protection of the present invention.

Claims

1. A control circuit of a power converter, the power converter comprising N controllable switches and an inductor, for converting an input voltage into an output voltage, where N is a positive integer greater than or equal to 1; the control circuit comprising: An error amplifier, which outputs an error amplified signal according to a feedback signal of the output voltage and a reference voltage; A first comparator, a first input terminal receiving a current sampling signal, wherein the current sampling signal represents the magnitude of the current flowing through the power converter; The second input terminal receives the error amplified signal; The first comparator outputs a first comparison signal according to the current sampling signal and the error amplification signal; Characterized in that the control circuit also includes: A second comparator, wherein the first input terminal receives a ramp voltage signal; the second input terminal receives a third voltage threshold, wherein the third voltage threshold is generated based on the first voltage threshold and the second voltage threshold; and the second comparator outputs a second comparison signal according to the ramp voltage signal and the third voltage threshold; A logic and driving module, which outputs N control signals according to the first comparison signal and the second comparison signal, and is used to control the on or off of the N controllable switch tubes respectively; The second voltage threshold is the change amount of the ramp voltage signal within the delay time td of the second comparator; the ramp voltage signal and the first voltage threshold are respectively generated according to the input voltage and / or the output voltage.

2. The control circuit according to claim 1, characterized in that: When the second comparator delay time td is zero, the on or off time of the power converter is determined based on the ramp voltage signal and the first voltage threshold.

3. The control circuit according to claim 1, characterized in that: The control circuit also includes a ramp voltage generating circuit, which is used to generate the ramp voltage signal; The ramp voltage generating circuit includes a capacitor, a switch tube and a current source, wherein the current source is generated according to an input voltage and / or an output voltage; the switch tube and the capacitor are connected in parallel; when the switch tube is turned off, the current source acts on the capacitor to charge the capacitor to generate the ramp voltage signal; when the switch tube is turned on, the capacitor is discharged to zero.

4. The control circuit according to claim 1, characterized in that: The third voltage threshold is equal to a difference between the first voltage threshold and the second voltage threshold.

5. The control circuit according to claim 3, characterized in that: When the power converter is a boost converter controlled by constant off-time, the current source is equal to K1*Vout; the first voltage threshold is equal to K2*Vin, the second voltage threshold is equal to K1*Vout*td / C1; the third voltage threshold is equal to the difference between K2*Vin and K1*Vout*td / C1; When the power converter is a boost converter with constant on-time control, the current source is equal to K1*Vout; the first voltage threshold is equal to K2*(Vout-Vin), the second voltage threshold is equal to K1*Vout*td / C1; the third voltage threshold is equal to the difference between K2*(Vout-Vin) and K1*Vout*td / C1; wherein K1 and K2 are both greater than 0 and less than 1.

6. The control circuit according to claim 3, characterized in that: When the power converter is a buck converter controlled by constant off-time, the current source is equal to K1*Vin; the first voltage threshold is equal to K2*(Vin-Vout), the second voltage threshold is equal to K1*Vin*td / C1; the third voltage threshold is equal to the difference between K2*(Vin-Vout) and K1*Vin*td / C1; When the power converter is a buck converter with constant on-time control, the current source is equal to K1*Vin; the first voltage threshold is equal to K2*Vout, the second voltage threshold is equal to K1*Vin*td / C1; the third voltage threshold is equal to the difference between K2*Vout and K1*Vin*td / C1; wherein K1 and K2 are both greater than 0 and less than 1.

7. The control circuit according to claim 3, characterized in that: When the power converter is a buck-boost converter with constant off-time control, the current source is equal to K1*(Vin+Vout); the first voltage threshold is equal to K2*Vin, the second voltage threshold is equal to K1*(Vin+Vout)*td / C1; the third voltage threshold is equal to the difference between K2*Vin and K1*(Vin+Vout)*td / C1; When the power converter is a buck-boost converter with constant on-time control, the current source is equal to K1*(Vin+Vout); the first voltage threshold is equal to K2*Vout, the second voltage threshold is equal to K1*(Vin+Vout)*td / C1; the third voltage threshold is equal to the difference between K2*Vout and K1*(Vin+Vout)*td / C1; wherein K1 and K2 are both greater than 0 and less than 1.

8. A power converter, comprising N controllable switch tubes and an inductor, for converting an input voltage into an output voltage, wherein N is a positive integer greater than or equal to 1; characterized in that: The power converter comprises the control circuit according to any one of claims 1 to 7, and controls the on or off of N controllable switching tubes based on the control circuit.

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