Floating low-voltage control circuit and chip

Abstract

The floating low-voltage control circuit comprises a first current mirror, a second current mirror, a third current mirror and a clamping circuit, the power supply end of the first current mirror is electrically connected with a low-voltage power supply, the first end of the first current mirror is electrically connected with the first end of the second current mirror, and the power supply end of the second current mirror is grounded. The second end of the second current mirror is electrically connected with the control end of the clamping circuit, the power supply end of the third current mirror is electrically connected with the high-voltage power supply, the first end of the third current mirror is electrically connected with the first clamping end of the clamping circuit, the second end of the third current mirror is electrically connected with the second clamping end of the clamping circuit, and the first end of the third current mirror is electrically connected with the floating ground end. The floating ground end and the high-voltage power supply are electrically connected with the low-voltage circuit; wherein the voltage of the low-voltage power supply is smaller than that of the high-voltage power supply, so that the voltage difference between the high-voltage power supply and the floating ground end is within a required range.

Description

Technical Field

[0001] The present application relates to the field of chip technology, and in particular to a floating low-voltage control circuit and chip. Background Art

[0002] In analog circuits, there are often high-voltage areas and low-voltage areas. The voltage used in the low-voltage area is relatively low, and the devices required in the low-voltage area have a lower withstand voltage and a smaller area. Devices used in high-voltage areas need to withstand high voltages, and in order to adapt to high-voltage conditions, the surface of the devices in the high-voltage area is relatively large. Therefore, in circuits with high-voltage areas, if you want to reduce the chip area, special designs are required, such as the floating ground design commonly used in the industry.

[0003] However, the existing floating ground design has poor voltage control effect, which can easily cause low-voltage devices to exceed the controllable voltage range for too long, thereby causing damage. Utility Model Content

[0004] Some embodiments of the present application provide a floating low-voltage control circuit and a chip, aiming to provide a floating low-voltage control circuit with better floating voltage control efficiency, and a chip including the floating low-voltage control circuit.

[0005] Some embodiments of the present application provide a floating low-voltage control circuit, including a first current mirror, a second current mirror, a third current mirror, and a clamping circuit;

[0006] The power supply end of the first current mirror is electrically connected to a low-voltage power supply, and the first end of the first current mirror is electrically connected to the first end of the second current mirror; the second end of the second current mirror is electrically connected to the control end of the clamp circuit, the current received by the control end of the clamp circuit is controlled by the current output by the second end of the second current mirror, and the current output by the second end of the second current mirror is controlled by the current output by the first end of the first current mirror;

[0007] The power supply end of the third current mirror is electrically connected to a high-voltage power supply, the first end of the third current mirror is electrically connected to the first clamping end of the clamping circuit, the first clamping end is a floating ground end, and the second end of the third current mirror is electrically connected to the second clamping end of the clamping circuit; the current of the third current mirror and the current of the second current mirror jointly determine the voltage of the floating ground end;

[0008] The high voltage power supply and the floating terminal are used to electrically connect a low voltage circuit; wherein the voltage of the low voltage power supply is lower than the voltage of the high voltage power supply.

[0009] Some other embodiments of the present application provide a floating low-voltage control circuit, including a first current mirror, a second current mirror, a third current mirror, and a clamping circuit;

[0010] The first current mirror is electrically connected to a low-voltage power supply, the first branch of the first current mirror generates a first current signal, the second branch of the first current mirror generates a second current signal, and the second current signal depends on the first current signal; the first current mirror is electrically connected to the second current mirror, the first branch of the second current mirror receives the second current signal, the second branch of the second current mirror outputs a third current signal, and the third current signal depends on the second current signal; the second current mirror is electrically connected to the clamp circuit, and the control end of the clamp circuit receives the fourth current signal;

[0011] The third current mirror is electrically connected to a high voltage power supply, the first branch of the third current mirror generates a fourth current signal, the second branch of the third current mirror generates a fifth current signal, and the fifth current signal depends on the fourth current signal; the output end of the first branch of the third current mirror is electrically connected to the first clamping end and serves as a floating end, the first clamping end of the clamping circuit receives the fourth current signal, and the second clamping end of the clamping circuit receives the fifth current signal; the voltage of the floating end is controlled by the third current signal and the fifth current signal;

[0012] Wherein, the voltage of the low-voltage power supply is lower than the voltage of the high-voltage power supply.

[0013] Some other embodiments of the present application provide a chip, which includes the floating low-voltage control circuit involved in the above embodiments. The chip also includes a low-voltage circuit, wherein the low-voltage end of the low-voltage circuit is electrically connected to the floating end, and the high-voltage end of the low-voltage circuit is electrically connected to a high-voltage power supply.

[0014] The floating low-voltage control circuit and chip provided by the present application are characterized in that the power supply end of the third current mirror is electrically connected to the high-voltage power supply, and the power supply end of the second current mirror is grounded. The first end of the third current mirror is electrically connected to the clamping end of the clamping circuit. The second end of the second current mirror is electrically connected to the control end of the clamping circuit. A current path is formed between the third current mirror, the clamping circuit and the second current mirror, and the clamping circuit clamps the voltage of the floating end based on the second current mirror output current signal and the third current mirror output current signal. Since the second current mirror output current signal is generated based on the first current mirror output current signal, the first current mirror is electrically connected to the low-voltage power supply, so that the voltage difference between the high-voltage power supply and the floating end can be ensured to be within the required range, and the low-voltage circuit electrically connected to the high-voltage power supply and the floating end will not fail due to excessive voltage. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0016] Figure 1A circuit schematic diagram of a floating low-voltage control circuit is provided for some embodiments of the present application;

[0017] Figure 2 A circuit schematic diagram of a floating low-voltage control circuit is provided for other embodiments of the present application.

[0018] Reference numerals:

[0019] 100, first current mirror; 101, first branch; 102, second branch; 200, second current mirror; 201, third branch; 202, fourth branch; 300, clamping circuit; 401, fifth branch; 402, sixth branch; 400, third current mirror; 500, voltage divider circuit; M1, first transistor; M2, second transistor; M3, third transistor; M4, fourth transistor; M5, fifth transistor; M6, sixth transistor; M7, seventh transistor; M8, eighth transistor; M9, ninth transistor; M10, tenth transistor; M11, eleventh transistor; FGND, floating ground terminal; ZD, Zener diode; R1, first resistor; R2, second resistor; R3, third resistor; VDDL, low voltage power supply; VDDH, high voltage power supply; I1, first current signal; I2, second current signal; I3, third current signal; I4, fourth current signal; I5, fifth current signal.

[0020] The above drawings have shown clear embodiments of the present application, which will be described in more detail later. These drawings and text descriptions are not intended to limit the scope of the present application in any way, but to illustrate the concept of the present application to those skilled in the art by referring to specific embodiments. DETAILED DESCRIPTION

[0021] Here, exemplary embodiments will be described in detail, and examples thereof are shown in the accompanying drawings. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. Instead, they are only examples of devices and methods consistent with some aspects of the present application.

[0022] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of this application, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0023] Figure 1 A circuit diagram of a floating low-voltage control circuit provided in some embodiments of the present application, such as Figure 1 As shown, the floating low voltage control circuit includes a first current mirror 100 , a second current mirror 200 , a third current mirror 400 and a clamping circuit 300 .

[0024] The power supply end of the first current mirror 100 is electrically connected to the low voltage power supply VDDL, the first end of the first current mirror 100 is electrically connected to the first end of the second current mirror 200, the power supply end of the second current mirror 200 is grounded, and the second end of the second current mirror 200 is electrically connected to the control end of the clamping circuit 300.

[0025] The power supply end of the third current mirror 400 is electrically connected to the high voltage power supply VDDH, the first end of the third current mirror 400 is electrically connected to the first clamping end of the clamping circuit 300, the second end of the third current mirror 400 is electrically connected to the second clamping end of the clamping circuit 300, and the first end of the third current mirror 400 is electrically connected to the floating ground end FGND. The low voltage circuit is arranged between the high voltage power supply VDDH and the floating ground end FGND. The voltage of the low voltage power supply VDDL is less than the voltage of the high voltage power supply VDDH.

[0026] In which, since the power supply terminal of the first current mirror 100 is electrically connected to the low voltage power supply VDDL, the power supply terminal of the second current mirror 200 is grounded. The first end of the first current mirror 100 is electrically connected to the first end of the second current mirror 200. A current path can be formed between the first current mirror 100 and the second current mirror 200. The second current mirror 200 can output a current that is the same as or β0 times the current in the first current mirror 100.

[0027] Here, the first current mirror 100 and the second current mirror 200 each include two branches. The two branches of the first current mirror 100 are called the first branch 101 and the second branch 102. The two branches of the second current mirror 200 are called the third branch 201 and the fourth branch 202.

[0028] The second branch 102 serves as the first end of the first current mirror 100, the third branch 201 serves as the first end of the second current mirror 200, and the second branch 102 and the third branch 201 are electrically connected, so a current signal can be formed between the second branch 102 and the third branch 201. When the current signal on the first branch 101 is the first current signal I1, the current signal on the second branch 102 is the second current signal I2. The second current signal I2 is β1 times the first current signal I1. Then the current signal on the third branch is also the second current signal I2, and the current on the fourth branch is the third current signal I3, and the third current signal I3 is β2 times the second current signal I2.

[0029] Since the power supply end of the third current mirror 400 is electrically connected to the high voltage power supply VDDH, the power supply end of the second current mirror 200 is grounded. The first end of the third current mirror 400 is electrically connected to the clamping end of the clamping circuit 300. The second end of the second current mirror 200 is electrically connected to the control end of the clamping circuit 300. A current path is formed between the third current mirror 400, the clamping circuit 300 and the second current mirror 200. The clamping circuit 300 clamps the voltage of the floating ground end FGND based on the output current signal of the second current mirror 200 and the output current signal of the third current mirror 400. Since the output current signal of the second current mirror 200 is generated based on the output current signal of the first current mirror 100, the first current mirror 100 is electrically connected to the low voltage power supply VDDL, so that the voltage difference between the high voltage power supply VDDH and the floating ground end FGND can be ensured to be within the required range, and the low voltage circuit electrically connected to the high voltage power supply VDDH and the floating ground end FGND will not fail due to excessive voltage.

[0030] In some embodiments, continue to refer to Figure 1 The clamp circuit 300 includes a sixth transistor M6 and a seventh transistor M7, the control end of the sixth transistor M6 is electrically connected to the second end of the seventh transistor M7, the first end of the sixth transistor M6 is the first clamp end of the clamp circuit 300, and the second end of the sixth transistor M6 is grounded. The first end of the seventh transistor M7 is the second clamp end of the clamp circuit 300, the control end of the seventh transistor M7 is connected to the first end of the sixth transistor M6, and the second end of the seventh transistor M7 is the control end of the clamp circuit 300.

[0031] Here, the working principle of the clamping circuit 300 is explained by taking the sixth transistor M6 and the seventh transistor M7 as P-type transistors as an example.

[0032] Among them, the second end of the second current mirror 200 is electrically connected to the control end of the clamping circuit 300. Under the drive of the output current of the second current mirror 200, the control end voltage of the sixth transistor M6 is pulled down, and the sixth transistor M6 is turned on and is in the linear region. At this time, the sixth transistor M6 is equivalent to a small resistor. Since the high-voltage power supply VDDH at this time is still relatively small and is in the process of increasing, the floating ground end FGND voltage is relatively low at this time.

[0033] Due to the driving of the high-voltage power supply VDDH, the voltage at the power supply terminal of the third current mirror 400 continues to rise, the current on the current path between the third current mirror 400 and the second current mirror 200 gradually increases, the voltage at the control terminal of the sixth transistor M6 increases, the sixth transistor M6 enters the saturation region, and the sixth transistor M6 plays a clamping role. When the voltage at the control terminal of the sixth transistor M6 continues to increase, the first end of the sixth transistor M6 also continues to increase, and the voltage difference between the high-voltage power supply VDDH and the first end of the third current mirror 400 can be clamped, that is, the voltage difference between the high-voltage power supply VDDH and the floating ground terminal FGND is clamped.

[0034] When the sixth transistor M6 starts to play a clamping role, the seventh transistor M7 is in the linear region and the seventh transistor M7 is turned on. As the voltage of the floating ground terminal FGND gradually increases, the seventh transistor M7 enters the saturation region and the seventh transistor M7 plays a clamping role. Due to the driving of the high-voltage power supply VDDH, the voltage of the power supply terminal of the third current mirror 400 gradually increases, and the voltage of the floating ground terminal FGND also gradually increases, thereby achieving the clamping of the voltage difference between the high-voltage power supply VDDH and the second terminal of the third current mirror 400.

[0035] In the above technical scheme, by setting the control end of the sixth transistor to be connected to the second end of the seventh transistor, the control end of the seventh transistor to be connected to the first end of the sixth transistor, the first end of the sixth transistor to be connected to the floating ground end, and the second end of the seventh transistor to be connected to the second end of the second current mirror, it is possible to clamp the voltage of the floating ground end based on the third current signal output by the second current mirror and the fifth current signal output by the third current mirror.

[0036] In some embodiments, continue to refer to Figure 1 The clamp circuit 300 further includes a fifth transistor M5, a first end of the fifth transistor M5 is electrically connected to the second end of the seventh transistor M7, a second end of the fifth transistor M5 is a control end of the clamp circuit 300, and a control end of the fifth transistor M5 is electrically connected to the low voltage power supply VDDL.

[0037] Here, the working principle of the clamping circuit 300 is explained by taking the fifth transistor M5 as an N-type transistor as an example.

[0038] Since the second current mirror 200 is grounded, when the second current mirror 200 outputs current, the voltage at the second end of the fifth transistor M5 drops, and since the control end of the fifth transistor M5 is electrically connected to the low-voltage power supply VDDL, the fifth transistor M5 is gradually turned on. As the fifth transistor M5 is gradually turned on, the second end of the seventh transistor M7 is gradually pulled down, and since the control end of the sixth transistor M6 is electrically connected to the second end of the seventh transistor M7, the sixth transistor M6 is controlled to be gradually turned on. Subsequently, the sixth transistor M6 and the seventh transistor M7 enter the saturation region in turn, and the voltage of the first end of the sixth transistor M6 and the second end of the second and seventh transistors M7 are clamped. The principle of the sixth transistor M6 and the seventh transistor M7 entering the saturation region has been described in the above embodiments and will not be described here.

[0039] In the above technical solution, by providing the fifth transistor M5, the sixth transistor M6 can be controlled to be gradually turned on, thereby avoiding the impact on the low-voltage device caused by the sudden turning on of the sixth transistor M6.

[0040] In some embodiments, continue to refer to Figure 1 The clamp circuit 300 further includes a third resistor R3, a first end of the third resistor R3 is electrically connected to the first end of the sixth transistor M6, and a second end of the third resistor R3 is grounded. The third resistor R3 is used to adjust the current flowing through the sixth transistor M6.

[0041] In some embodiments, continue to refer to Figure 1 The first current mirror 100 includes a first transistor M1, a second transistor M2, and a first resistor R1. The first end of the first transistor M1 is electrically connected to the low voltage power supply VDDL, the second end of the first transistor M1 is electrically connected to the first end of the first resistor R1, the second end of the first resistor R1 is grounded, the control end of the first transistor M1 is electrically connected to the control end of the second transistor M2, the control end of the first transistor M1 is electrically connected to the second end of the first transistor M1, the first end of the second transistor M2 is electrically connected to the low voltage power supply VDDL, and the second end of the second transistor M2 serves as the first end of the first current mirror 100.

[0042] The first branch 101 includes a first transistor M1 and a first resistor R1, and the second branch of the first current mirror circuit 100 includes a second transistor M2. The first resistor R1 is used to adjust the magnitude of the first current signal I1 on the first branch 101. Under the action of the second transistor M2, the first current signal I1 on the first branch 101 outputs a second current signal I2 at its second end.

[0043] In some embodiments, continue to refer to Figure 1, the second current mirror 200 includes a third transistor M3 and a fourth transistor M4. The first end of the third transistor M3 serves as the first end of the second current mirror 200. The second end of the third transistor M3 is grounded, the control end of the third transistor M3 is electrically connected to the first end of the third transistor M3, and the control end of the third transistor M3 is electrically connected to the control end of the fourth transistor M4. The first end of the fourth transistor M4 serves as the second end of the second current mirror 200, and the second end of the fourth transistor M4 is grounded.

[0044] The third branch 201 includes a third transistor M3, and the fourth branch 202 of the second current mirror 200 includes a fourth transistor M4. The second current signal I2 flows through the third transistor M3, and the third current signal I3 flows through the fourth transistor M4.

[0045] In some embodiments, continue to refer to Figure 1 The third current mirror 400 includes an eighth transistor M8, a ninth transistor M9 and a second resistor R2, a first end of the eighth transistor M8 is connected to the high voltage power supply VDDH, a second end of the eighth transistor M8 is electrically connected to the first end of the second resistor R2, a control end of the eighth transistor M8 is electrically connected to the second end of the eighth transistor M8, a control end of the eighth transistor M8 is electrically connected to the control end of the ninth transistor M9, and a second end of the second resistor R2 serves as a first end of the third current mirror 400. A first end of the ninth transistor M9 is connected to the high voltage power supply VDDH, and a second end of the ninth transistor M9 serves as a second end of the third current mirror 400.

[0046] The third current mirror 400 includes a fifth branch circuit 401 and a sixth branch circuit 402. The fifth branch circuit 401 includes an eighth transistor M8 and a second resistor R2. The sixth branch circuit 402 includes a ninth transistor M9. The current flowing through the eighth transistor M8 is the fourth current signal I4, and the current flowing through the ninth transistor M9 is the fifth current signal I5.

[0047] like Figure 1 As shown, some embodiments of the present application provide a floating low voltage control circuit, which includes a first current mirror 100, a second current mirror 200, a third current mirror 400 and a clamping circuit 300. The first current mirror 100 includes a first transistor M1, a second transistor M2 and a first resistor R1. The second current mirror 200 includes a third transistor M3 and a fourth transistor M4. The clamping circuit 300 includes a fifth transistor M5, a sixth transistor M6, a seventh transistor M7 and a third resistor R3. The third current mirror 400 includes an eighth transistor M8, a ninth transistor M9 and a second resistor R2.

[0048] The first end of the first transistor M1 is electrically connected to the low-voltage power supply VDDL, the second end of the first transistor M1 is electrically connected to the first end of the first resistor R1, the second end of the first resistor R1 is grounded, the control end of the first transistor M1 is electrically connected to the control end of the second transistor M2, the control end of the first transistor M1 is electrically connected to the second end of the first transistor M1, and the first end of the second transistor M2 is electrically connected to the low-voltage power supply VDDL.

[0049] The first end of the third transistor M3 is electrically connected to the second end of the second transistor M2, the second end of the third transistor M3 is grounded, and the control end of the third transistor M3 is electrically connected to the first end of the third transistor M3, and the control end of the third transistor M3 is electrically connected to the control end of the fourth transistor M4.

[0050] The second end of the fifth transistor M5 is electrically connected to the first end of the fourth transistor M4, the second end of the fourth transistor M4 is grounded, the control end of the fifth transistor M5 is electrically connected to the low voltage power supply VDDL, the first end of the fifth transistor M5 is electrically connected to the second end of the seventh transistor M7, the control end of the sixth transistor M6 is electrically connected to the second end of the seventh transistor M7, the second end of the sixth transistor M6 is electrically connected to the first end of the third resistor R3, and the second end of the third resistor R3 is grounded.

[0051] The first end of the sixth transistor M6 is electrically connected to the first end of the second resistor R2, the first end of the seventh transistor M7 is electrically connected to the second end of the ninth transistor M9, and the control end of the seventh transistor M7 is electrically connected to the first end of the sixth transistor M6. The first end of the eighth transistor M8 is electrically connected to the high voltage power supply VDDH, the control end of the eighth transistor M8 is electrically connected to the second end of the eighth transistor M8, the second end of the eighth transistor M8 is electrically connected to the second end of the second resistor R2, the control end of the eighth transistor M8 is electrically connected to the control end of the ninth transistor M9, and the first end of the ninth transistor M9 is connected to the high voltage power supply VDDH.

[0052] Here, the design principle of the low-voltage floating control circuit is explained by taking the first transistor M1, the second transistor M2, the sixth transistor M6, the seventh transistor M7, the eighth transistor M8 and the ninth transistor M9 as P-type transistors and the third transistor M3, the fourth transistor M4 and the fifth transistor M5 as N-type transistors.

[0053] When initially powered on, the low voltage power supply VDDL generates a current through the first transistor M1 and the second transistor M2. The current flowing through the first transistor M1 is called the first current signal I1, and the current flowing through the second transistor M2 is called the second current signal I2. When the first transistor M1 and the second transistor M2 are the same size, I1=I2. Then the third current signal I3 is generated through the third transistor M3 and the fourth transistor M4. When the third transistor M3 and the fourth transistor M4 are the same size, I2=I3. It should be noted here that the same size of transistors can mean the same width-to-length ratio.

[0054] The current of the fourth transistor M4 will pull down the drain voltage of the fifth transistor M5. Since the gate of the fifth transistor M5 receives the low voltage power supply VDDL, the fifth transistor M5 is gradually turned on. Since the fifth transistor M5 is gradually turned on, the gate voltage of the sixth transistor M6 is pulled down, and the sixth transistor M6 is turned on and is in the linear region. At this time, the sixth transistor M6 is equivalent to a small resistor. Since the high voltage power supply VDDH at this time is still relatively small and is in the process of increasing, the floating ground terminal FGND voltage at this time is relatively low. At this time, the current of the eighth transistor M8 and the ninth transistor M9 is still relatively small. The gate voltage of the sixth transistor M6 will always be pulled down, and the sixth transistor M6 is in the linear region. Due to the effect of the high voltage power supply VDDH, the voltage of the source of the eighth transistor M8 and the source of the ninth transistor M9 is constantly increasing, and the fourth current signal I4 from the eighth transistor M8 to the ground gradually increases. Correspondingly, the fifth current signal I5 from the ninth transistor M9 to the ground is also constantly increasing. Among them, if the eighth transistor M8 and the ninth transistor M9 are the same size, I4=I5. As the fifth current signal I5 increases, the gate voltage of the sixth transistor M6 increases until the sixth transistor M6 enters a saturation region, and the sixth transistor M6 plays a clamping role.

[0055] When the fourth current signal I4 of the eighth transistor M8 is equal to the first current signal I1 of the first transistor M1, the sixth transistor M6 enters the saturation region. Alternatively, when the fourth current signal I4 of the eighth transistor M8 increases to a specified value, the sixth transistor M6 enters the saturation region.

[0056] After the sixth transistor M6 enters the saturation region, if the gate voltage of the sixth transistor M6 continues to increase, the source voltage of the sixth transistor M6 also continues to increase, thereby being able to control the voltage difference between the source of the sixth transistor M6 and the high voltage power supply VDDH, that is, controlling the voltage difference between the floating ground terminal FGND and the high voltage power supply VDDH, thereby ensuring that the voltage difference across the low voltage circuit is controllable and will not be too high.

[0057] When the sixth transistor M6 just enters the saturation region or enters the saturation region for a short period of time, the seventh transistor M7 is in the linear region and the seventh transistor M7 is turned on. When the floating ground terminal FGND gradually increases, the seventh transistor M7 enters the saturation region, and the seventh transistor M7 plays a clamping role. As the high voltage gradually increases, the floating ground terminal FGND also gradually increases, so that the drain voltage of the ninth transistor M9 also increases, thereby ensuring that the voltage between the source and drain of the ninth transistor M9 will not be too high, so that the voltage difference between the floating ground terminal FGND and the high voltage power supply VDDH can be further guaranteed, and the voltage between the source and drain of the ninth transistor M9 is prevented from being too high, which makes the voltage difference between the floating ground terminal FGND and the high voltage power supply VDDH larger.

[0058] Here, the working principle of the low voltage floating control circuit is explained by taking the first transistor M1, the second transistor M2, the sixth transistor M6, the seventh transistor M7, the eighth transistor M8 and the ninth transistor M9 as P-type transistors and the third transistor M3, the fourth transistor M4 and the fifth transistor M5 as N-type transistors.

[0059] When the circuit is started, the voltage of the gate of the sixth transistor M6 is close to zero, and the sixth transistor M6 is fully turned on. The eighth transistor M8, the second resistor R2, the sixth transistor M6, and the third resistor R3 form a current path from the high-voltage power supply VDDH to the ground. Initially, since the high-voltage power supply VDDH gradually rises, the current to the ground is relatively small at the beginning. At the same time, the voltage difference between the loaded high-voltage power supply VDDH and the floating ground terminal FGND is relatively low, and the voltage at both ends of the low-voltage circuit will not exceed the specified value; as the high-voltage power supply VDDH gradually increases, the current on the current path is relatively large, and the current signal on the eighth transistor M8 is called the fourth current signal I4, and the fifth current signal I5 is generated on the ninth transistor M9 through the third current mirror 400.

[0060] Since the third current signal I3 pulled down by the fourth transistor M4 is less than the fifth current signal I5 poured down by the ninth transistor M9, charge accumulates between the drain of the seventh transistor M7 and the drain of the fifth transistor M5, causing the gate of the sixth transistor M6 to be raised. Since the third current signal I3 pulled down by the fourth transistor M4 is less than the fifth current signal I5 poured down by the ninth transistor M9, the drain of the fifth transistor M5 is raised. Furthermore, due to the transistor source follower effect, the source of the sixth transistor M6 is raised, and the current on the current path formed by the eighth transistor M8, the second resistor R2, the sixth transistor M6, and the third resistor R3 is reduced. Until the fourth current signal I4 on the eighth transistor M8 and the fifth current signal I5 on the ninth transistor M9 are equal.

[0061] Since the magnitude of the fifth current signal I5 on the ninth transistor M9 depends on the magnitude of the third current signal I3 pulled down by the fourth transistor M4 and the voltage magnitude of the high voltage power source VDDH, the third current signal I3 pulled down by the fourth transistor M4 depends on the second current signal I2 in the third transistor M3, and the second current signal I2 in the third transistor M3 depends on the first current signal I1 in the first transistor M1. Therefore, under the action of the fourth transistor M4, the fifth transistor M5, the sixth transistor M6, the seventh transistor M7, the eighth transistor M8 and the ninth transistor M9, the voltage difference between the high voltage power source VDDH and the floating ground terminal FGND can be controlled within a range that allows the low voltage circuit to operate normally.

[0062] In some embodiments, the first transistor M1, the second transistor M2, the eighth transistor M8 and the ninth transistor M9 have the same size, and the first resistor R1 and the second resistor R2 are the same. In this way, the first current signal I1 and the fourth current signal I4 can be the same, so as to ensure that the voltage difference between the source of the first transistor M1 and the second end of the first resistor R1 is equal to the voltage difference between the eighth transistor M8 and the floating ground terminal FGND, and the voltage of the floating ground terminal FGND electrically connected to the low-voltage circuit working in the high-voltage area is raised, so that the low-voltage circuit working in the high-voltage area can work safely and avoid the risk of being burned out.

[0063] Among them, the first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4, the eighth transistor M8 and the ninth transistor M9 are low-voltage devices, and the fifth transistor M5, the sixth transistor M6 and the seventh transistor M7 are high-voltage devices. The operating voltage of the low-voltage device cannot exceed a certain voltage, such as 5V. The operating voltage of the high-voltage device can be relatively large.

[0064] In some embodiments, the size of the fifth transistor M5 is larger than the size of any one of the first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4, the eighth transistor M8, and the ninth transistor M9. The size of the sixth transistor M6 is larger than the size of any one of the first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4, the eighth transistor M8, and the ninth transistor M9. The size of the seventh transistor M7 is larger than the size of any one of the first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4, the eighth transistor M8, and the ninth transistor M9.

[0065] Among them, the first transistor M1, the second transistor M2 and the third transistor M3 are low-voltage devices and work in the low-voltage region. The fourth transistor M4, the eighth transistor M8 and the ninth transistor M9 are low-voltage devices, but work in the high-voltage region. In order to protect the low-voltage devices working in the high-voltage region, a protection transistor is provided for the fourth transistor M4, the eighth transistor M8 and the ninth transistor M9.

[0066] The fifth transistor M5 protects the fourth transistor M4 , the sixth transistor M6 protects the eighth transistor M8 , and the seventh transistor M7 protects the ninth transistor M9 .

[0067] To ensure that the voltage across the fourth transistor M4 does not exceed the specified maximum voltage (such as 5V), the gate of the fifth transistor M5 is electrically connected to the low-voltage power supply VDDL. When the drain voltage of the fifth transistor M5 is low, the voltage applied to the fourth transistor M4 is also low and will not exceed the maximum value of the fourth transistor M4. When the drain voltage of the fifth transistor M5 increases, the fifth transistor M5 enters the saturation region, and the source voltage of the fifth transistor M5 is equal to VDDL-VGS, where VDDL is the voltage of the low-voltage power supply VDDL, and VGS is the voltage difference between the gate and the source when the transistor is turned on. Then, the voltage on the drain of the fourth transistor M4 will definitely not exceed the voltage of the low-voltage power supply VDDL, thereby protecting the fourth transistor M4.

[0068] Similarly, the sixth transistor M6 clamps the floating ground terminal FGND at a relatively large voltage value, so the voltage difference between the high-voltage power supply VDDH and the floating ground terminal FGND is relatively small, thereby protecting the voltage difference between the source and the drain of the eighth transistor M8 from being too large. The seventh transistor M7 clamps the voltage of the drain of the ninth transistor M9 at a relatively large voltage value, and the voltage difference between the high-voltage power supply VDDH and the second terminal of the ninth transistor M9 is relatively small, thereby protecting the voltage difference between the source and the drain of the ninth transistor M9 from being too large.

[0069] Since the current flowing through the low-voltage circuit is fluctuating, and sometimes the fluctuation is relatively large, such as 5mA changes to 500mA, if the current is large, the voltage of the floating ground terminal FGND will be raised, so that the current of the eighth transistor M8 path is reduced, and the mirror effect, the current of the ninth transistor M9 is also reduced, and the current flowing to the ground of the fifth transistor M5 and the fourth transistor M4 is almost unchanged, so the gate of the sixth transistor M6 is pulled down, so that the current of the sixth transistor M6 increases, so that the voltage of the floating ground terminal FGND is pulled down, so that the floating ground terminal FGND is gradually adjusted to a normal range. The circuit of the utility model can also automatically adjust this situation.

[0070] However, because the current of the low-voltage circuit changes too much, the adjustment time of the floating ground terminal FGND will become longer, which will cause the voltage difference at both ends of the low-voltage circuit to be at low voltage for too long, which is not conducive to the normal operation of the module. Therefore, it is necessary to speed up the adverse effects caused by such large current fluctuations.

[0071] In order to solve the above technical problems, Figure 2 A schematic diagram of a floating low-voltage control circuit provided in some embodiments of the present application, such as Figure 2 As shown, the clamping circuit 300 includes a Zener diode ZD, the anode of the Zener diode ZD is electrically connected to the control terminal of the sixth transistor M6, and the cathode of the Zener diode ZD is electrically connected to the control terminal of the seventh transistor M7. When the voltage of the floating ground terminal FGND rises to a certain value, the Zener diode ZD conducts in the reverse direction, so that the current flows from the floating ground terminal FGND, the Zener diode ZD, the fifth transistor M5 and the fourth transistor M4 to the ground, so that the floating ground voltage reaches equilibrium faster.

[0072] In some embodiments, Figure 2 As shown, the first current mirror 100 is a current-adjustable current mirror, which is specifically related to the voltage of the floating ground terminal FGND. In one example, the first current mirror 100 is provided with a control terminal, and the floating ground low-voltage control circuit includes a voltage divider circuit 500, the input terminal of the voltage divider circuit 500 is electrically connected to the floating ground terminal FGND, and the output terminal of the voltage divider circuit 500 is electrically connected to the control terminal of the first current mirror 100. The voltage divider circuit 500 can also be a feedback circuit, and the feedback circuit outputs a feedback signal according to the voltage of the floating ground terminal FGND, and the feedback signal can cause the tenth transistor M10 to be in a saturation region or a linear region.

[0073] When the voltage of the floating ground terminal FGND is less than the first voltage threshold, the voltage of the output terminal of the voltage divider circuit 500 is less than the second voltage threshold, and the first current signal I1 in the first current mirror 100 remains unchanged. When the voltage of the floating ground terminal FGND is greater than the first voltage threshold, the voltage of the output terminal of the voltage divider circuit 500 is greater than the second voltage threshold, and the first current signal I1 of the first current mirror 100 increases as the voltage rises under the voltage control of the control terminal. As a result, the third current signal I3 on ​​the fourth transistor M4 increases, the current on the fifth transistor M5 increases, and the pull-down is greater, so that the control terminal of the sixth transistor M6 is pulled down faster, so that the voltage of the floating ground is pulled down faster, so that the floating ground voltage reaches equilibrium faster.

[0074] In some embodiments, Figure 2 As shown, the first current mirror 100 further includes a tenth transistor M10, a control end of the tenth transistor M10 is electrically connected to the output end of the voltage divider circuit 500, a first end of the tenth transistor M10 is electrically connected to the second end of the first resistor R1, and a second end of the tenth transistor M10 is grounded.

[0075] In some embodiments, Figure 2 As shown, the first current mirror 100 also includes a tenth transistor M10, a control end of the tenth transistor M10 is electrically connected to the output end of the voltage divider circuit 500, a first end of the tenth transistor M10 is electrically connected to the second end of the first transistor M1, and a second end of the tenth transistor M10 is electrically connected to the first end of the first resistor R1.

[0076] Here, the tenth transistor M10 is an N-type transistor as an example. When the voltage of the floating ground terminal FGND is less than the first voltage threshold, the voltage of the output terminal of the voltage divider circuit 500 is less than the second voltage threshold, the tenth transistor M10 is in the saturation region, the equivalent resistance does not change with the voltage of the control terminal of the tenth transistor M10, and the first current signal I1 in the first current mirror 100 remains unchanged. When the voltage of the floating ground terminal FGND is greater than the first voltage threshold, the voltage of the output terminal of the voltage divider circuit 500 is greater than the second voltage threshold, the tenth transistor M10 enters the linear region, the equivalent resistance decreases as the voltage of the control terminal of the tenth transistor M10 increases, and the first current signal I1 of the first current mirror 100 increases as the voltage rises under the control of the voltage of the control terminal. As a result, the third current signal I3 on ​​the fourth transistor M4 increases, the current on the fifth transistor M5 increases, and the pull-down is greater, so that the control terminal of the sixth transistor M6 is pulled down faster, so that the voltage of the floating ground is pulled down faster, so that the floating ground voltage reaches equilibrium faster.

[0077] In order to make the voltage difference between the first end of the first transistor M1 and the second end of the first resistor R1 equal to the voltage difference between the two ends of the low-voltage circuit, so that the low-voltage circuit works in the low-voltage domain, the first resistor R1 is set equal to the second resistor R2. However, since the current of the low-voltage circuit will change, it will cause the voltage fluctuation of the floating ground end FGND. In order to provide a certain margin for the low-voltage circuit, the first resistor R1 can be set as a variable resistor. When the resistance value of the first resistor R1 is larger than the resistance value of the second resistor R2, the voltage difference between the high-voltage power supply VDDH and the floating ground end FGND is less than the voltage difference voltage of the M1 and R1 to the ground path, and the low-voltage circuit works normally under this voltage. If the floating ground drops suddenly, the voltage of the low-voltage circuit will not be too large, so there is a certain margin, and the robustness of the circuit is improved. In addition, the variable resistor can also play a role in adjustment. Different processes lead to a large deviation between the R2 resistor and the R1 resistor (it may also be other MOS devices, etc.), so the resistor R1 is set as a variable resistor to achieve satisfactory results under different process conditions.

[0078] In some embodiments, the third current mirror 400 includes an eleventh transistor M11. A first end of the eleventh transistor M11 is electrically connected to a second end of the ninth transistor M9, a second end of the eleventh transistor M11 serves as a second end of the third current mirror 400, a control end of the eleventh transistor M11 is electrically connected to a control end of the ninth transistor M9, and the eleventh transistor M11 is used to improve circuit matching.

[0079] In the floating low-voltage control circuit described below, specific details are not described repeatedly. For details, please refer to the description of the floating low-voltage control circuit in the previous embodiment, which will not be repeated here.

[0080] like Figure 1 As shown, some embodiments of the present application provide a floating low-voltage control circuit, including a first current mirror 100, a second current mirror 200, a third current mirror 400 and a clamping circuit 300;

[0081] The first current mirror 100 is electrically connected to a low voltage power supply VDDL, the first current mirror 100 is electrically connected to the second current mirror 200, a power supply terminal of the second current mirror 200 is grounded, and the first current mirror 100 outputs a second current signal I2 to the second current mirror 200;

[0082] The second current mirror 200 is electrically connected to the clamp circuit 300, the third current mirror 400 is electrically connected to the high voltage power supply VDDH, the third current mirror 400 is electrically connected to the clamp circuit 300, the second current mirror 200 outputs a third current signal I3, and the clamp circuit 300 is electrically connected to the floating ground terminal FGND; wherein the voltage of the low voltage power supply VDDL is less than the voltage of the high voltage power supply VDDH.

[0083] Since the third current mirror 400 is electrically connected to the high voltage power supply VDDH, the second current mirror 200 is grounded. The third current mirror 400 is electrically connected to the clamping circuit 300. The second current mirror 200 is electrically connected to the clamping circuit 300. A current path is formed between the third current mirror 400, the clamping circuit 300 and the second current mirror 200. The clamping circuit 300 clamps the voltage of the floating terminal FGND based on the output current signal of the second current mirror 200. Since the output current signal of the second current mirror 200 is generated based on the output current signal of the first current mirror 100, the first current mirror 100 is electrically connected to the low voltage power supply VDDL, so that the voltage difference between the high voltage power supply VDDH and the floating terminal FGND can be ensured to be within the required range, and the low voltage circuit electrically connected to the high voltage power supply VDDH and the floating terminal FGND will not fail due to being subjected to excessive voltage.

[0084] In some embodiments, Figure 2As shown, the first current mirror 100 is a current-adjustable current mirror; the floating low-voltage control circuit includes a voltage divider circuit 500, the voltage divider circuit 500 is electrically connected to the floating terminal FGND, and the voltage divider circuit 500 is electrically connected to the first current mirror 100. The voltage divider circuit 500 can also be a feedback circuit, and the feedback circuit outputs a feedback signal according to the voltage of the floating terminal FGND, and the feedback signal can cause M10 to be in a saturation region or a linear region.

[0085] In some embodiments, Figure 1 and Figure 2 As shown, the first current mirror 100 includes a first branch 101 and a second branch 102; the second current mirror 200 includes a third branch 201 and a fourth branch 202; the third current mirror 400 includes a fifth branch 401 and a sixth branch 402; the first branch 101 and the second branch 102 are both electrically connected to a low-voltage power supply VDDL, the first branch 101 and the second branch 102 are electrically connected, and the second branch 102 is electrically connected to the third branch 201; the third branch 201 and the fourth branch 202 are both grounded, the third branch 201 and the fourth branch 202 are electrically connected, and the fourth branch 202 is electrically connected to the clamping circuit 300; the fifth branch 401 and the sixth branch 402 are both electrically connected to a high-voltage power supply VDDH, the fifth branch 401 and the sixth branch 402 are electrically connected, and the fifth branch 401 and the sixth branch 402 are both electrically connected to the clamping circuit 300.

[0086] In some embodiments, Figure 1 and Figure 2 As shown, the first branch 101 includes a first transistor M1 and a first resistor R1, and the second branch 102 includes a second transistor M2.

[0087] A first end of the first transistor M1 is electrically connected to a low voltage power supply VDDL, a second end of the first transistor M1 is electrically connected to a first end of a first resistor R1, a second end of the first resistor R1 is grounded, a control end of the first transistor M1 is electrically connected to a second end of the first transistor M1, and a control end of the first transistor M1 is electrically connected to a control end of the second transistor M2;

[0088] A first end of the second transistor M2 is electrically connected to the low voltage power supply VDDL, and a second end of the second transistor M2 is connected to the third branch 201;

[0089] Accordingly, the third branch 201 includes a third transistor M3, and the fourth branch 202 includes a fourth transistor M4;

[0090] A first end of the third transistor M3 is connected to the second branch 102; a second end of the third transistor M3 is grounded, a control end of the third transistor M3 is electrically connected to the first end of the third transistor M3, and a control end of the third transistor M3 is electrically connected to a control end of the fourth transistor M4;

[0091] A first end of the fourth transistor M4 is connected to the sixth branch 402, and a second end of the fourth transistor M4 is grounded;

[0092] Accordingly, the fifth branch 401 includes an eighth transistor M8 and a second resistor R2, and the sixth branch 402 includes a ninth transistor M9;

[0093] A first end of the eighth transistor M8 is connected to the high voltage power supply VDDH, a second end of the eighth transistor M8 is electrically connected to a first end of the second resistor R2, a second end of the second resistor R2 is connected to the clamping circuit 300, a control end of the eighth transistor M8 is electrically connected to a second end of the eighth transistor M8, and a control end of the eighth transistor M8 is electrically connected to a control end of the ninth transistor M9;

[0094] A first terminal of the ninth transistor M9 is connected to the high voltage power supply VDDH, and a second terminal of the ninth transistor M9 is connected to the clamping circuit 300 .

[0095] In some embodiments, Figure 1 and Figure 2 As shown, the clamp circuit 300 includes a sixth transistor M6 and a seventh transistor M7;

[0096] The control end of the sixth transistor M6 is electrically connected to the second end of the seventh transistor M7, the first end of the sixth transistor M6 is connected to the fifth branch 401, and the second end of the sixth transistor M6 is grounded;

[0097] A first end of the seventh transistor M7 is connected to the sixth branch 402 , and a second end of the seventh transistor M7 is connected to the fourth branch 202 .

[0098] In some embodiments, Figure 1 and Figure 2 As shown, the clamping circuit 300 further includes a fifth transistor M5;

[0099] A first end of the fifth transistor M5 is electrically connected to a second end of the seventh transistor M7 , a second end of the fifth transistor M5 is connected to the fourth branch 202 , and a control end of the fifth transistor M5 is electrically connected to a low voltage power source VDDL.

[0100] In some embodiments, Figure 2 As shown, the clamping circuit 300 includes a Zener diode ZD, an anode of the Zener diode ZD is electrically connected to the control end of the sixth transistor M6, and a cathode of the Zener diode ZD is electrically connected to the control end of the seventh transistor M7.

[0101] In some embodiments, Figure 1 and Figure 2 As shown, the clamping circuit 300 further includes a third resistor R3, a first end of the third resistor R3 is electrically connected to the first end of the sixth transistor M6, and a second end of the third resistor R3 is grounded.

[0102] In some embodiments, Figure 2 As shown, the first current mirror 100 is a current-adjustable current mirror, and the first current mirror 100 is provided with a control terminal;

[0103] The floating low-voltage control circuit further includes a voltage divider circuit 500, the input end of the voltage divider circuit 500 is electrically connected to the floating ground end FGND, and the output end of the voltage divider circuit 500 is electrically connected to the control end of the first current mirror 100. The floating low-voltage control circuit further includes a feedback circuit (located at the voltage divider circuit 500, and the specific circuit module is not shown in the figure), the input end of the feedback circuit is electrically connected to the floating ground end FGND, and the output end of the feedback circuit is electrically connected to the control end of the first current mirror 100.

[0104] In some embodiments, Figure 2 As shown, the first current mirror 100 further includes: a tenth transistor M10, a control end of the tenth transistor M10 is electrically connected to the output end of the voltage divider circuit 500;

[0105] The first end of the tenth transistor M10 is electrically connected to the second end of the first resistor R1, and the second end of the tenth transistor M10 is grounded; or, the first end of the tenth transistor M10 is electrically connected to the second end of the first transistor M1, and the second end of the tenth transistor M10 is electrically connected to the first end of the first resistor R1.

[0106] In some embodiments, Figure 2 As shown, the third current mirror 400 includes an eleventh transistor M11;

[0107] A first end of the eleventh transistor M11 is electrically connected to the second end of the ninth transistor M9 , a second end of the eleventh transistor M11 is connected to the clamping circuit 300 , and a control end of the eleventh transistor M11 is electrically connected to the control end of the ninth transistor M9 .

[0108] In some embodiments, the first transistor M1 , the second transistor M2 , the eighth transistor M8 , and the ninth transistor M9 have the same size, and the first resistor R1 and the second resistor R2 have the same size.

[0109] In some embodiments, the size of the fifth transistor M5 is greater than the size of any one of the first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4, the eighth transistor M8, and the ninth transistor M9;

[0110] The size of the sixth transistor M6 is greater than the size of any one of the first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4, the eighth transistor M8 and the ninth transistor M9;

[0111] The size of the seventh transistor M7 is greater than the size of any one of the first transistor M1 , the second transistor M2 , the third transistor M3 , the fourth transistor M4 , the eighth transistor M8 , and the ninth transistor M9 .

[0112] In some embodiments, the transistors used in the first current mirror, the second current mirror, and the third current mirror are low voltage devices, and the transistors used in the clamping circuit are high voltage devices.

[0113] In some embodiments, a Zener diode is provided between the floating terminal and the ground as a discharge channel.

[0114] In some embodiments, the first current signal is adjustable.

[0115] In some embodiments, the first current mirror is provided with a control terminal; the control terminal of the first current mirror is controlled by a floating terminal, and when the voltage of the floating terminal increases, the first current signal increases.

[0116] In some embodiments, the floating low voltage control circuit further includes a voltage divider circuit, the voltage divider circuit is electrically connected to the floating end, and the voltage divider circuit is electrically connected to the first current mirror for adjusting the first current signal.

[0117] Some embodiments of the present application provide a chip, which includes the floating low-voltage control circuit involved in the above embodiments, and the chip also includes a low-voltage circuit, the low-voltage end of the low-voltage circuit is electrically connected to the floating ground end FGND, and the high-voltage end of the low-voltage circuit is electrically connected to the high-voltage power supply VDDH.

[0118] In some embodiments, the chip further includes a capacitor, a first end of the capacitor is electrically connected to a power supply end of the low voltage circuit, and a second end of the capacitor is electrically connected to a ground end of the low voltage circuit.

[0119] Those skilled in the art will readily appreciate other embodiments of the present application after considering the specification and practicing the present application. The present application is intended to cover any modification, use or adaptation of the present application, which follows the general principles of the present application and includes common knowledge or customary techniques in the art that are not disclosed in the present application. The specification and examples are intended to be exemplary only, and the true scope and spirit of the present application are indicated by the following claims.

[0120] It should be understood that the present application is not limited to the precise structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present application is limited only by the appended claims.

Claims

1. A floating low voltage control circuit, characterized in that: It includes a first current mirror, a second current mirror, a third current mirror and a clamping circuit; The power supply end of the first current mirror is electrically connected to a low-voltage power supply, and the first end of the first current mirror is electrically connected to the first end of the second current mirror; the second end of the second current mirror is electrically connected to the control end of the clamp circuit, the current received by the control end of the clamp circuit is controlled by the current output by the second end of the second current mirror, and the current output by the second end of the second current mirror is controlled by the current output by the first end of the first current mirror; The power supply end of the third current mirror is electrically connected to a high-voltage power supply, the first end of the third current mirror is electrically connected to the first clamping end of the clamping circuit, the first clamping end is a floating ground end, and the second end of the third current mirror is electrically connected to the second clamping end of the clamping circuit; the current of the third current mirror and the current of the second current mirror jointly determine the voltage of the floating ground end; The high voltage power supply and the floating terminal are used to electrically connect a low voltage circuit; wherein the voltage of the low voltage power supply is lower than the voltage of the high voltage power supply.

2. The floating low voltage control circuit according to claim 1, characterized in that: The first current mirror comprises a first transistor, a second transistor and a first resistor; the first end of the first transistor is electrically connected to the low-voltage power supply, the second end of the first transistor is electrically connected to the first end of the first resistor, the second end of the first resistor is coupled to the ground, the control end of the first transistor is electrically connected to the second end of the first transistor, and the control end of the first transistor is electrically connected to the control end of the second transistor; the first end of the second transistor is electrically connected to the low-voltage power supply, and the second end of the second transistor serves as the first end of the first current mirror; The second current mirror comprises a third transistor and a fourth transistor; the first end of the third transistor serves as the first end of the second current mirror; the second end of the third transistor is coupled to the ground, the control end of the third transistor is electrically connected to the first end of the third transistor, and the control end of the third transistor is electrically connected to the control end of the fourth transistor; the first end of the fourth transistor serves as the second end of the second current mirror, and the second end of the fourth transistor is coupled to the ground; The clamping circuit includes a fifth transistor, a sixth transistor, a seventh transistor and a third resistor; the first end of the fifth transistor is electrically connected to the second end of the seventh transistor, the second end of the fifth transistor is the control end of the clamping circuit, and the control end of the fifth transistor is electrically connected to the low-voltage power supply; the control end of the sixth transistor is electrically connected to the second end of the seventh transistor, the first end of the sixth transistor is the first clamping end of the clamping circuit, the second end of the sixth transistor is electrically connected to the first end of the third resistor, and the second end of the third resistor is coupled to the ground; the first end of the seventh transistor is the second clamping end of the clamping circuit; The third current mirror includes an eighth transistor, a ninth transistor and a second resistor; the first end of the eighth transistor is connected to the high-voltage power supply, the second end of the eighth transistor is electrically connected to the first end of the second resistor, the second end of the second resistor serves as the first end of the third current mirror, the control end of the eighth transistor is electrically connected to the second end of the eighth transistor, and the control end of the eighth transistor is electrically connected to the control end of the ninth transistor; the first end of the ninth transistor is connected to the high-voltage power supply, and the second end of the ninth transistor serves as the second end of the third current mirror; the first end of the third current mirror is electrically connected to the floating ground end, and the second end of the third current mirror is electrically connected to the second clamping end of the clamping circuit.

3. The floating low voltage control circuit according to claim 2, characterized in that: The fifth transistor, the sixth transistor, and the seventh transistor are high-voltage devices.

4. The floating low voltage control circuit according to claim 3, characterized in that: The clamping circuit includes a Zener diode, an anode of the Zener diode is electrically connected to the control end of the sixth transistor, and a cathode of the Zener diode is electrically connected to the control end of the seventh transistor.

5. The floating low voltage control circuit according to claim 3, characterized in that: The first current mirror is a current-adjustable current mirror, and is provided with a control end. The control end of the first current mirror is controlled by the floating end, and when the floating end voltage increases, the current output by the first end of the first current mirror increases.

6. The floating low voltage control circuit according to claim 5, characterized in that: The floating low-voltage control circuit also includes a voltage divider circuit, the input end of the voltage divider circuit is electrically connected to the floating end, and the output end of the voltage divider circuit is electrically connected to the control end of the first current mirror. When the floating end voltage increases, the output end voltage of the voltage divider circuit increases, and the current output by the first end of the first current mirror increases.

7. The floating low voltage control circuit according to claim 6, characterized in that: The first current mirror further includes: a tenth transistor, a control end of the tenth transistor being electrically connected to the output end of the voltage divider circuit; The first end of the tenth transistor is electrically connected to the second end of the first resistor, and the second end of the tenth transistor is coupled to ground; or, the first end of the tenth transistor is electrically connected to the second end of the first transistor, and the second end of the tenth transistor is electrically connected to the first end of the first resistor.

8. The floating low voltage control circuit according to claim 2, characterized in that: The first resistor is a variable resistor.

9. The floating low voltage control circuit according to claim 3, characterized in that: The third current mirror comprises an eleventh transistor; The first end of the eleventh transistor is electrically connected to the second end of the ninth transistor, the second end of the eleventh transistor serves as the second end of the third current mirror, and the control end of the eleventh transistor is electrically connected to the control end of the ninth transistor.

10. The floating low voltage control circuit according to claim 3, characterized in that: The first transistor, the second transistor, the eighth transistor, and the ninth transistor have the same size and are low-voltage devices, and the resistance value of the first resistor is the same as the resistance value of the second resistor.

11. A floating low voltage control circuit, characterized in that: It includes a first current mirror, a second current mirror, a third current mirror and a clamping circuit; The first current mirror is electrically connected to a low voltage power supply, a first branch of the first current mirror generates a first current signal, a second branch of the first current mirror generates a second current signal, and the second current signal depends on the first current signal; The first current mirror is electrically connected to the second current mirror, a third branch of the second current mirror receives the second current signal, a fourth branch of the second current mirror outputs a third current signal, and the third current signal depends on the second current signal; The second current mirror is electrically connected to the clamp circuit, and a control end of the clamp circuit receives the third current signal; The third current mirror is electrically connected to a high voltage power supply, the fifth branch of the third current mirror generates a fourth current signal, the sixth branch of the third current mirror generates a fifth current signal, and the fifth current signal depends on the fourth current signal; the output end of the fifth branch of the third current mirror is electrically connected to the first clamping end and serves as a floating ground end, the first clamping end of the clamping circuit receives the fourth current signal, and the second clamping end of the clamping circuit receives the fifth current signal; the voltage of the floating ground end is controlled by the third current signal and the fifth current signal; Wherein, the voltage of the low-voltage power supply is lower than the voltage of the high-voltage power supply.

12. The floating low voltage control circuit according to claim 11, characterized in that: The transistors used in the first current mirror, the second current mirror and the third current mirror are low voltage devices, and the transistors used in the clamping circuit are high voltage devices.

13. The floating low voltage control circuit according to claim 12, characterized in that: A Zener diode is arranged between the floating terminal and the ground as a discharge channel.

14. The floating low voltage control circuit according to claim 12, characterized in that: The first current signal is adjustable.

15. The floating low voltage control circuit according to claim 14, characterized in that: The first current mirror is provided with a control end; the control end of the first current mirror is controlled by the floating end, and when the voltage of the floating end increases, the first current signal increases.

16. The floating low voltage control circuit according to claim 15, characterized in that: The floating low-voltage control circuit further includes a voltage divider circuit, wherein the voltage divider circuit is electrically connected to the floating end, and the voltage divider circuit is electrically connected to the first current mirror for adjusting the first current signal.

17. A chip, characterized in that: The chip includes a floating low-voltage control circuit as described in any one of claims 1 to 10, or any one of claims 11 to 15, and the chip also includes a low-voltage circuit, a low-voltage end of the low-voltage circuit is electrically connected to the floating end, and a high-voltage end of the low-voltage circuit is electrically connected to the high-voltage power supply.

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