Interface circuit capable of outputting LVDS signal and EDP signal
By designing an interface circuit including power supply power, EDP_LVDS signal receiving circuit, EDP signal output circuit and LVDS signal output circuit, the problem of the LVDS signal and EDP signal display motherboard frequently switching the central processor output interface is solved, and an interface supports the output of LVDS and EDP signals at the same time, simplifying the use process.
Patent Information
- Application Number
- CN202420860974.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-04-24
- Publication Date
- 2025-03-25
- Estimated Expiration
- 2034-04-24
AI Technical Summary
In the prior art, the LVDS signal display motherboard and the EDP signal display motherboard need to frequently switch the display signal output interface of the central processor, which is troublesome to use.
An interface circuit is designed, arranged between the central processor and the display motherboard, including a power supply power supply, an EDP_LVDS signal receiving circuit, an EDP signal output circuit and an LVDS signal output circuit, which can simultaneously receive and output LVDS signals and EDP signals.
It realizes an interface that can not only receive and output LVDS signals to the LVDS signal display motherboard, but also receive and output EDP signals to the EDP signal display motherboard, without switching the signal output interface of the central processor, which is simple to use and saves time and effort.
Smart Images
Figure CN222672318U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of interface circuits, in particular to an interface circuit capable of outputting LVDS signals and EDP signals. Background Art
[0002] In the computer field, the central processing unit (CPU) is one of the main devices of electronic computers and the core component of computers. Its main function is to interpret computer instructions and process data in computer software. All operations in the computer are performed by the CPU, which is the core component responsible for reading instructions, decoding instructions and executing instructions. Now CPU is widely used in many electronic devices, such as mobile terminals, industrial control terminals, PCs, etc.
[0003] LVDS (Low-Voltage Differential Signaling) is a signal transmission mode proposed by National Semiconductor Corporation in 1994. It is a level standard. The LVDS interface, also known as the RS-644 bus interface, is a data transmission and interface technology that only appeared in the 1990s.
[0004] EDP (Embedded Displayport) is an internal digital interface based on the Displayport architecture and protocol. EDP is widely used in various embedded display panel products such as notebook computers, tablet computers, etc. EDP signals are mainly composed of MainLink, AUXCH and HPD.
[0005] At present, the display signal of the display mainboard is usually an EDP signal or LVDS signal sent by the central processing unit, which is received by the display mainboard of the display screen and finally displayed on the display screen. The display mainboard can usually only directly display one display signal. The most widely used display mainboards are LVDS signal display mainboard and EDP signal display mainboard. Therefore, when the display mainboard is an LVDS signal display mainboard, it is necessary to use an LVDS signal transmission line to connect the LVDS signal output interface of the central processing unit to transmit the LVDS signal to the LVDS signal display mainboard for display; when the display mainboard is an EDP signal display mainboard, it is necessary to switch to an EDP signal transmission line to connect the EDP signal output interface of the central processing unit to transmit the EDP signal to the EDP signal display mainboard for display. The frequent switching is very troublesome for users. Utility Model Content
[0006] In order to solve the problems in the prior art, the utility model provides an interface circuit capable of outputting LVDS signals and EDP signals, which is arranged between a central processing unit and a display mainboard. Through the coordinated power supply, EDP_LVDS signal receiving circuit, EDP signal output circuit and LVDS signal output circuit, an interface circuit can be realized that can receive and output LVDS signals to an LVDS signal display mainboard, and can receive and output EDP signals to an EDP signal display mainboard. The utility model is simple to use, saves time and effort, and solves the problem in the prior art that the LVDS signal display mainboard and the EDP signal display mainboard need to frequently switch the display signal output interface of the central processing unit, which is very troublesome.
[0007] The utility model provides an interface circuit capable of outputting LVDS signals and EDP signals, which is arranged between a central processing unit and a display mainboard, and comprises a power supply, an EDP_LVDS signal receiving circuit, an EDP signal output circuit and an LVDS signal output circuit. The input end of the EDP_LVDS signal receiving circuit is connected to the output end of the central processing unit, the power supply is connected to the EDP_LVDS signal receiving circuit, the EDP signal output circuit and the LVDS signal output circuit for power supply, the output end of the EDP_LVDS signal receiving circuit is connected to the input end of the EDP signal output circuit and the input end of the LVDS signal output circuit, the output end of the EDP signal output circuit can be connected to the input end of the EDP signal display mainboard, the output end of the LVDS signal output circuit can be connected to the input end of the LVDS signal display mainboard, the EDP_LVDS signal receiving circuit can transmit the EDP signal sent by the central processing unit to the EDP signal display mainboard through the EDP signal output circuit, and the EDP_LVDS signal receiving circuit can transmit the LVDS signal sent by the central processing unit to the LVDS signal display mainboard through the LVDS signal output circuit.
[0008] The utility model is further improved, the EDP_LVDS signal receiving circuit is provided with a display signal receiving interface LVDS_EDP_IN, the display signal receiving interface LVDS_EDP_IN is provided with 44 pins, wherein the 19th, 21st, 23rd, 25th, 27th, 29th, 31st, 33rd, 35th, 37th, 2nd, 4th, 6th, 8th, 10th, 12th, 14th, 16th, 18th, 20th pins of the display signal receiving interface LVDS_EDP_IN can receive the LVDS signal output by the central processor, the display signal receiving interface LVDS The 32nd, 34th, 36th and 38th pins of _EDP_IN can receive the EDP signal output by the central processing unit, the 19th, 21st, 23rd, 25th, 27th, 29th, 31st, 33, 35, 37, 2, 4, 6, 8, 10, 12, 14, 16, 18 and 20th pins of the display signal receiving interface LVDS_EDP_IN are connected to the input end of the LVDS signal output circuit, and the 32nd, 34th, 36th and 38th pins of the display signal receiving interface LVDS_EDP_IN are connected to the input end of the EDP signal output circuit.
[0009] The utility model is further improved, the LVDS signal output circuit includes a display signal output interface LVDS_OUT, the display signal output interface LVDS_OUT is provided with 30 pins, the 18th, 17th, 12th, 11th, 10th, 9th, 8th, 7th, 16th, 15th, 30th, 29th, 24th, 23rd, 22nd, 21st, 20th, 19th, 28th, 27th pins of the display signal output interface LVDS_OUT are respectively connected to the 19th, 21st, 23rd, 24th, 25th, 26th, 27th pins of the display signal receiving interface LVDS_EDP_IN The 18th, 17th, 12th, 11th, 10th, 9th, 8th, 7th, 16th, 15th, 30th, 29th, 24th, 23th, 22th, 21st, 20th pins of the display signal output interface LVDS_OUT are also connected to the input end of the LVDS signal display motherboard, and the 1st, 2nd, and 3rd pins of the display signal output interface LVDS_OUT are connected to the power supply.
[0010] The utility model is further improved, the EDP signal output circuit includes a display signal output interface EDP_OUT, the display signal output interface EDP_OUT is provided with 20 pins, the 8th, 7th, 6th, 5th pins of the display signal output interface EDP_OUT are respectively connected to the 32nd, 34th, 36th, 38th pins of the display signal receiving interface LVDS_EDP_IN, the 8th, 7th, 6th, 5th pins of the display signal output interface EDP_OUT are also connected to the input end of the EDP signal display mainboard, and the 1st and 2nd pins of the display signal output interface EDP_OUT are connected to the power supply.
[0011] The utility model is further improved, and the model of the display signal receiving interface LVDS_EDP_IN is LCD40_49_SM.
[0012] The utility model is further improved, and the model of the display signal output interface LVDS_OUT is PH2X15_dip.
[0013] The utility model is further improved, and the model of the display signal output interface EDP_OUT is PH2X10_dip.
[0014] Compared with the prior art, the beneficial effects of the utility model are as follows: an interface circuit capable of outputting LVDS signals and EDP signals is provided, which is arranged between a central processing unit and a display mainboard; through a power supply, an EDP_LVDS signal receiving circuit, an EDP signal output circuit and an LVDS signal output circuit that cooperate with each other, the EDP_LVDS signal receiving circuit can transmit the EDP signal emitted by the central processing unit to the EDP signal display mainboard through the EDP signal output circuit; the EDP_LVDS signal receiving circuit can transmit the LVDS signal emitted by the central processing unit to the LVDS signal display mainboard through the LVDS signal output circuit; the purpose of an interface being able to receive and output LVDS signals to the LVDS signal display mainboard and to receive and output EDP signals to the EDP signal display mainboard can be achieved; no matter the display mainboard is an LVDS signal display mainboard or an EDP signal display mainboard, there is no need to switch the signal output interface of the central processing unit; the utility model is simple to use, saves time and effort, and solves the problem in the prior art that the LVDS signal display mainboard and the EDP signal display mainboard need to frequently switch the display signal output interface of the central processing unit, which is very troublesome. BRIEF DESCRIPTION OF THE DRAWINGS
[0015] In order to more clearly illustrate the solutions in the present application or the prior art, a brief introduction is given below to the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0016] Figure 1 The utility model is a circuit diagram of an interface circuit capable of outputting LVDS signals and EDP signals;
[0017] Figure 2 The utility model is a circuit diagram of an interface circuit capable of outputting LVDS signals and EDP signals;
[0018] Figure 3 The utility model is a circuit diagram of an interface circuit capable of outputting LVDS signals and EDP signals. DETAILED DESCRIPTION
[0019] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by technicians in the technical field of this application; the terms used in the specification of the application herein are only for the purpose of describing specific embodiments and are not intended to limit this application; the terms "including" and "having" and any variations thereof in the specification and claims of this application and the above-mentioned drawings are intended to cover non-exclusive inclusions. The terms "first", "second", etc. in the specification and claims of this application or the above-mentioned drawings are used to distinguish different objects, not to describe a specific order.
[0020] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.
[0021] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the accompanying drawings.
[0022] like Figure 1-3As shown, the utility model provides an interface circuit capable of outputting LVDS signals and EDP signals, which is arranged between a central processing unit and a display mainboard, and includes a power supply, an EDP_LVDS signal receiving circuit, an EDP signal output circuit and an LVDS signal output circuit. The input end of the EDP_LVDS signal receiving circuit is connected to the output end of the central processing unit, the power supply is connected to the EDP_LVDS signal receiving circuit, the EDP signal output circuit and the LVDS signal output circuit for power supply, the output end of the EDP_LVDS signal receiving circuit is connected to the input end of the EDP signal output circuit and the input end of the LVDS signal output circuit, the output end of the EDP signal output circuit can be connected to the input end of the EDP signal display mainboard, and the output end of the LVDS signal output circuit can be connected to the input end of the LVDS signal display mainboard. In this embodiment, the EDP_LVDS signal receiving circuit can transmit the EDP signal emitted by the central processing unit to the EDP signal display mainboard through the EDP signal output circuit, and the EDP_LVDS signal receiving circuit can transmit the LVDS signal emitted by the central processing unit to the LVDS signal display mainboard through the LVDS signal output circuit, thereby achieving the purpose of an interface that can both receive and output LVDS signals to the LVDS signal display mainboard and receive and output EDP signals to the EDP signal display mainboard. Regardless of whether the display mainboard is an LVDS signal display mainboard or an EDP signal display mainboard, there is no need to switch the signal output interface of the central processing unit, which is simple to use and saves time and effort.
[0023] like Figure 1As shown, the EDP_LVDS signal receiving circuit is provided with a display signal receiving interface LVDS_EDP_IN, the model of the display signal receiving interface LVDS_EDP_IN is LCD40_49_SM, and the display signal receiving interface LVDS_EDP_IN is provided with 44 pins, among which the 19th, 21st, 23rd, 25th, 27th, 29th, 31st, 33rd, 35th, 37th, 2nd, 4th, 6th, 8th, 10th, 12th, 14th, 16th, 18th, 20th pins of the display signal receiving interface LVDS_EDP_IN can receive the LVDS signal output by the central processing unit , the 32nd, 34th, 36th, and 38th pins of the display signal receiving interface LVDS_EDP_IN can receive the EDP signal output by the central processing unit, the 19th, 21st, 23rd, 25th, 27th, 29th, 31st, 33rd, 35th, 37th, 2nd, 4th, 6th, 8th, 10th, 12th, 14th, 16th, 18th, and 20th pins of the display signal receiving interface LVDS_EDP_IN are connected to the input end of the LVDS signal output circuit, and the 32nd, 34th, 36th, and 38th pins of the display signal receiving interface LVDS_EDP_IN are connected to the input end of the EDP signal output circuit. In this embodiment, the DP_LVDS signal receiving circuit can simultaneously receive the LVDS signal and the EDP signal sent by the central processing unit, and transmit the LVDS signal sent by the central processing unit to the LVDS signal display mainboard through the LVDS signal output circuit, and transmit the EDP signal sent by the central processing unit to the EDP signal display mainboard through the EDP signal output circuit.
[0024] like Figure 2 As shown, the LVDS signal output circuit includes a display signal output interface LVDS_OUT, the model of the display signal output interface LVDS_OUT is PH2X15_dip, the display signal output interface LVDS_OUT has 30 pins, and the 18th, 17th, 12th, 11th, 10th, 9th, 8th, 7th, 16th, 15th, 30th, 29th, 24th, 23rd, 22nd, 21st, 20th, 19th, 28th, 27th pins of the display signal output interface LVDS_OUT are respectively connected to the 18th, 17th, 12th, 11th, 10th, 9th, 8th, 7th pins of the display signal output interface LVDS_OUT The 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20 pins are connected, the 18, 17, 12, 11, 10, 9, 8, 7, 16, 15, 30, 29, 24, 23, 22, 21, 20, 19, 28, 27 pins of the display signal output interface LVDS_OUT are also connected to the input end of the LVDS signal display motherboard, and the 1, 2, 3 pins of the display signal output interface LVDS_OUT are connected to the power supply. In this embodiment, the LVDS signal output circuit can transmit the LVDS signal to the LVDS signal display motherboard.
[0025] like Figure 3 As shown, the EDP signal output circuit includes a display signal output interface EDP_OUT, the model of the display signal output interface EDP_OUT is PH2X10_dip, the display signal output interface EDP_OUT is provided with 20 pins, the 8th, 7th, 6th, and 5th pins of the display signal output interface EDP_OUT are respectively connected to the 32nd, 34th, 36th, and 38th pins of the display signal receiving interface LVDS_EDP_IN, the 8th, 7th, 6th, and 5th pins of the display signal output interface EDP_OUT are also connected to the input end of the EDP signal display mainboard, and the 1st and 2nd pins of the display signal output interface EDP_OUT are connected to the power supply. In this embodiment, the EDP signal output circuit can transmit the EDP signal to the EDP signal display mainboard.
[0026] As can be seen from the above, the utility model provides an interface circuit capable of outputting LVDS signals and EDP signals, which is arranged between a central processing unit and a display mainboard. Through the power supply, EDP_LVDS signal receiving circuit, EDP signal output circuit and LVDS signal output circuit that cooperate with each other, the EDP_LVDS signal receiving circuit can transmit the EDP signal emitted by the central processing unit to the EDP signal display mainboard through the EDP signal output circuit, and the EDP_LVDS signal receiving circuit can transmit the LVDS signal emitted by the central processing unit to the LVDS signal display mainboard through the LVDS signal output circuit. The purpose of an interface being able to receive and output LVDS signals to the LVDS signal display mainboard and to receive and output EDP signals to the EDP signal display mainboard can be achieved. Regardless of whether the display mainboard is an LVDS signal display mainboard or an EDP signal display mainboard, there is no need to switch the signal output interface of the central processing unit. The utility model is simple to use, saves time and effort, and solves the problem in the prior art that the LVDS signal display mainboard and the EDP signal display mainboard need to frequently switch the display signal output interface of the central processing unit, which is very troublesome.
[0027] The specific implementation methods described above are preferred implementation methods of the present utility model, and are not intended to limit the specific implementation scope of the present utility model. The scope of the present utility model includes but is not limited to the specific implementation methods. All equivalent changes made in accordance with the present utility model are within the protection scope of the present utility model.
Claims
1. An interface circuit capable of outputting LVDS signals and EDP signals, arranged between a central processing unit and a display mainboard, characterized in that: It includes a power supply, an EDP_LVDS signal receiving circuit, an EDP signal output circuit and an LVDS signal output circuit, wherein the input end of the EDP_LVDS signal receiving circuit is connected to the output end of the central processing unit, the power supply is connected to the EDP_LVDS signal receiving circuit, the EDP signal output circuit and the LVDS signal output circuit for power supply, the output end of the EDP_LVDS signal receiving circuit is connected to the input end of the EDP signal output circuit and the input end of the LVDS signal output circuit, the output end of the EDP signal output circuit can be connected to the input end of the EDP signal display mainboard, the output end of the LVDS signal output circuit can be connected to the input end of the LVDS signal display mainboard, the EDP_LVDS signal receiving circuit can transmit the EDP signal emitted by the central processing unit to the EDP signal display mainboard through the EDP signal output circuit, and the EDP_LVDS signal receiving circuit can transmit the LVDS signal emitted by the central processing unit to the LVDS signal display mainboard through the LVDS signal output circuit.
2. The interface circuit capable of outputting LVDS signals and EDP signals according to claim 1, characterized in that: The EDP_LVDS signal receiving circuit is provided with a display signal receiving interface LVDS_EDP_IN, and the display signal receiving interface LVDS_EDP_IN is provided with 44 pins, wherein the 19th, 21st, 23rd, 25th, 27th, 29th, 31st, 33rd, 35th, 37th, 2nd, 4th, 6th, 8th, 10th, 12th, 14th, 16th, 18th, 20th pins of the display signal receiving interface LVDS_EDP_IN can receive the LVDS signal output by the central processor, and the display signal receiving interface LVDS_EDP_I The 32nd, 34th, 36th and 38th pins of N can receive the EDP signal output by the central processing unit, the 19th, 21st, 23rd, 25th, 27th, 29th, 31st, 33, 35, 37, 2, 4, 6, 8, 10, 12, 14, 16, 18 and 20th pins of the display signal receiving interface LVDS_EDP_IN are connected to the input end of the LVDS signal output circuit, and the 32nd, 34th, 36th and 38th pins of the display signal receiving interface LVDS_EDP_IN are connected to the input end of the EDP signal output circuit.
3. The interface circuit capable of outputting LVDS signals and EDP signals according to claim 2, characterized in that: The LVDS signal output circuit comprises a display signal output interface LVDS_OUT, wherein the display signal output interface LVDS_OUT is provided with 30 pins, and the 18th, 17th, 12th, 11th, 10th, 9th, 8th, 7th, 16th, 15th, 30th, 29th, 24th, 23rd, 22nd, 21st, 20th, 19th, 28th, 27th pins of the display signal output interface LVDS_OUT are respectively connected to the 19th, 21st, 23rd, 25th, 27th, 28th, 29th, 24th, 23rd, 22nd, 21st, 20th, 19th, 28th, 27th pins of the display signal receiving interface LVDS_EDP_IN Pins 9, 31, 33, 35, 37, 2, 4, 6, 8, 10, 12, 14, 16, 18, and 20 of the display signal output interface LVDS_OUT are connected, and pins 18, 17, 12, 11, 10, 9, 8, 7, 16, 15, 30, 29, 24, 23, 22, 21, 20, 19, 28, and 27 of the display signal output interface LVDS_OUT are also connected to the input end of the LVDS signal display motherboard, and pins 1, 2, and 3 of the display signal output interface LVDS_OUT are connected to the power supply.
4. The interface circuit capable of outputting LVDS signals and EDP signals according to claim 3, characterized in that: The EDP signal output circuit includes a display signal output interface EDP_OUT, and the display signal output interface EDP_OUT is provided with 20 pins. The 8th, 7th, 6th, and 5th pins of the display signal output interface EDP_OUT are respectively connected to the 32nd, 34th, 36th, and 38th pins of the display signal receiving interface LVDS_EDP_IN, and the 8th, 7th, 6th, and 5th pins of the display signal output interface EDP_OUT are also connected to the input end of the EDP signal display mainboard, and the 1st and 2nd pins of the display signal output interface EDP_OUT are connected to the power supply.
5. The interface circuit capable of outputting LVDS signals and EDP signals according to claim 4, characterized in that: The model of the display signal receiving interface LVDS_EDP_IN is LCD40_49_SM.
6. The interface circuit capable of outputting LVDS signals and EDP signals according to claim 5, characterized in that: The model of the display signal output interface LVDS_OUT is PH2X15_dip.
7. The interface circuit capable of outputting LVDS signals and EDP signals according to claim 6, characterized in that: The model of the display signal output interface EDP_OUT is PH2X10_dip.