Interface power supply control circuit, computer mainboard and computer

Abstract

The utility model relates to the technical field of computers, and discloses an interface power supply control circuit, which comprises a communication interface connected with at least two card insertion modules; the plug-in card detection module comprises a NOT gate, a first AND gate, a second AND gate and an OR gate, the input end of the NOT gate, the first input end of the first AND gate and the first input end and the second input end of the second AND gate are all connected with configuration pins of the communication interface, and the second input end of the first AND gate is connected with the output end of the NOT gate; the first input end and the second input end of the OR gate are respectively connected with the output end of the first AND gate and the output end of the second AND gate; and the power supply control module is respectively connected with the output end of the OR gate and a configuration pin of the communication interface so as to output a voltage corresponding to a voltage control signal to the communication interface according to the voltage control signal output by the output end of the OR gate. Through the above mode, the interface can be compatible with plug-in cards with two voltage requirements.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of computer technology, and specifically to an interface power control circuit, a computer mainboard, and a computer. Background Art

[0002] The normal operation of the circuit board depends on the conversion of stable external power and internal power. At present, the uninterruptible power supply (UPS) technology in the field of AC to DC and the buck conversion circuit (BUCK circuit) in the field of DC to DC can ensure the continuity of the power supply of the circuit board, and have great advantages in power conversion and maintaining the energy supply of the circuit board.

[0003] Currently, multi-function interfaces that can support a variety of different plug-in cards are increasingly being used on motherboards, such as the M.2KEY B interface. Since such an interface may need to support two or more plug-in cards with different voltages, the voltage compatibility issue must be considered during the design. However, USP technology is an AC power switching technology and cannot solve the problem of the above-mentioned multi-function interface being compatible with plug-in cards of different voltages. The traditional BUCK power circuit design cannot automatically change the output voltage according to the type of plug-in card, that is, it cannot be compatible with two plug-in cards on the same multi-function interface. Summary of the invention

[0004] In view of the above problems, the embodiments of the present application provide an interface power control circuit, a computer mainboard and a computer, so that the interface can be compatible with plug-in cards with two voltage requirements.

[0005] According to one aspect of an embodiment of the present application, an interface power control circuit is provided, which includes: a communication interface, which can be connected to at least two card modules; a card detection module, which includes a NOT gate, a first AND gate, a second AND gate and an OR gate, wherein the input end of the NOT gate, the first input end of the first AND gate, the first input end and the second input end of the second AND gate are all connected to the configuration pin of the communication interface, the second input end of the first AND gate is connected to the output end of the NOT gate, and the first input end and the second input end of the OR gate are respectively connected to the output end of the first AND gate and the output end of the second AND gate, and the card detection module is used to detect the configuration pin state of the communication interface to generate a voltage control signal corresponding to the configuration pin state; a power control module, which is respectively connected to the output end of the OR gate and the configuration pin of the communication interface to output a voltage corresponding to the voltage control signal to the communication interface according to the voltage control signal output by the output end of the OR gate of the card detection module.

[0006] In an optional manner, the configuration pins of the communication interface include a first pin, a second pin, a third pin and a voltage output pin; the first pin is connected to the input end of the NOT gate, the second pin and the third pin are respectively connected to the first input end and the second input end of the second AND gate, the third pin is also connected to the first input end of the first AND gate, and the voltage output pin is connected to the power control module; the OR gate generates a voltage control signal corresponding to the level state of the first pin, the second pin and the third pin according to the level state of the first pin, the second pin and the third pin detected by the NOT gate, the first AND gate and the second AND gate; the power control module outputs a voltage corresponding to the voltage control signal to the voltage output pin according to the voltage control signal output by the OR gate.

[0007] In an optional manner, the card insertion detection module also includes a first buffer and a second buffer; the input ends of the first buffer and the second buffer are respectively connected to the second pin and the third pin, the output end of the first buffer is connected to the first input end of the second AND gate, and the output end of the second buffer is respectively connected to the first input end of the first AND gate and the second input end of the second AND gate; the first buffer and the second buffer are used to delay the level signals of the second pin and the third pin so that the level signals of the first pin, the second pin and the third pin reach the first AND gate and the second AND gate at the same time.

[0008] In an optional manner, the card insertion detection module also includes multiple first capacitors; the first ends of the multiple first capacitors are respectively connected to the power input ends of the NOT gate, the first AND gate, the second AND gate and the OR gate, and the second ends of the multiple first capacitors are grounded; the power input ends of the NOT gate, the first AND gate, the second AND gate and the OR gate are respectively connected to the power supply, and the first capacitors are used to filter the voltage of the power input to the power input ends of the NOT gate, the first AND gate, the second AND gate and the OR gate.

[0009] In an optional manner, the power control module includes: a power chip, including a feedback voltage pin, for outputting a feedback voltage through the feedback voltage pin; a switching unit, including a first resistor and a second resistor connected in series, the first end of the first resistor being respectively connected to the feedback voltage pin of the power chip and the configuration pin of the communication interface, the second end of the first resistor being connected to the first end of the second resistor, and the second end of the second resistor being grounded, wherein the second resistor includes a first sub-resistor and a second sub-resistor connected in parallel, the second sub-resistor including a resistive device and a field effect transistor connected in series, the gate of the field effect transistor being connected to the output end of an OR gate; the field effect transistor is turned on or off in response to a voltage control signal, so that the first end of the first resistor outputs a first predetermined voltage or a second predetermined voltage obtained by the first resistor voltage-divided feedback voltage to the configuration pin of the communication interface.

[0010] In an optional manner, when the voltage control signal is in a first level state, the field effect transistor is turned on so that the resistive device is connected in parallel with the first sub-resistor to form a second resistor, the second resistor is connected in series with the first resistor as a voltage divider resistor, and the first end of the first resistor outputs a first predetermined voltage to the configuration pin of the communication interface; when the voltage control signal is in a second level state, the field effect transistor is turned off so that the first sub-resistor is connected in series with the first resistor as a voltage divider resistor, and the first end of the first resistor outputs a second predetermined voltage to the configuration pin of the communication interface.

[0011] In an optional manner, the plug-in card module is a user identification card or a memory card; when the plug-in card module connected to the communication interface is a user identification card, the first end of the first resistor outputs a first predetermined voltage to the configuration pin of the communication interface; when the plug-in card module connected to the communication interface is a memory card, the first end of the first resistor outputs a second predetermined voltage to the configuration pin of the communication interface.

[0012] In an optional manner, the power control module also includes a filtering module; one end of the filtering module is respectively connected to the first end of the first resistor and the configuration pin of the communication interface, and the other end is grounded; the filtering module includes a plurality of second capacitors connected in parallel, for filtering the voltage output from the first end of the first resistor.

[0013] According to another aspect of an embodiment of the present application, a computer mainboard is provided, comprising a substrate and an interface power control circuit provided by any of the above embodiments, wherein the communication connection between the communication interface, the card insertion detection module and the power control module is realized through a printed circuit on the substrate.

[0014] According to another aspect of the embodiments of the present application, a computer is provided, including the computer mainboard provided by any of the above embodiments.

[0015] In the interface power control circuit provided by the embodiment of the present application, by connecting the input ends of the NOT gate, the first AND gate, and the second AND gate in the card detection module with the configuration pin of the communication interface, the configuration pin state of the communication interface can be detected; by connecting the output end of the NOT gate with the input end of the first AND gate, and by connecting the input end of the OR gate with the output ends of the first AND gate and the second AND gate respectively, the OR gate can output a voltage control signal corresponding to the configuration pin state of the communication interface; by connecting the power control module with the output end of the OR gate and the configuration pin of the communication interface respectively, the power control module can output a voltage corresponding to the voltage control signal to the communication interface according to the voltage control signal output by the OR gate. The configuration pin state of the communication interface detected by the card detection module can control the power control module to switch the voltage required for the operation of the card module according to the card module connected to the communication interface, so that the function of automatically switching the output voltage of the interface for different card modules can be realized through a pure hardware circuit, so that the interface can be compatible with card modules with two voltage requirements.

[0016] The above description is only an overview of the technical solution of the present application. In order to more clearly understand the technical means of the present application, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Various other advantages and benefits will become apparent to those of ordinary skill in the art by reading the detailed description of the preferred embodiments below. The accompanying drawings are only for the purpose of illustrating the preferred embodiments and are not to be considered as limiting the present application. Also, the same reference symbols are used throughout the accompanying drawings to represent the same components. In the accompanying drawings:

[0018] Figure 1 A schematic diagram of the structure of an interface power supply control circuit provided by an embodiment of the present invention;

[0019] Figure 2 A schematic diagram of the structure of a card insertion detection module provided in an embodiment of the present invention;

[0020] Figure 3 A schematic diagram of the structure of a power control module provided in an embodiment of the present invention;

[0021] Figure 4 A schematic diagram of the structure of a computer motherboard provided by an embodiment of the present invention;

[0022] Figure 5 A schematic diagram of the structure of a computer provided in an embodiment of the present invention.

[0023] The reference numerals in the specific implementation manner are as follows:

[0024] 1000. Computer;

[0025] 1. Computer motherboard;

[0026] 10. Interface power supply control circuit; 20. Base plate;

[0027] 100. Communication interface;

[0028] 200, card insertion detection module; 210, NOT gate; 220, first AND gate; 230, second AND gate; 240, OR gate; 250, first buffer; 260, second buffer; 270, first capacitor; 280, power supply;

[0029] 300, power control module; 310, power chip; 320, switching unit; 321, first resistor; 322, second resistor; 3221, first sub-resistor; 3222, second sub-resistor; R, resistive device; FET, field effect transistor; 330, filtering module; 331, second capacitor. DETAILED DESCRIPTION

[0030] The following embodiments of the technical solution of the present application will be described in detail in conjunction with the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solution of the present application, and are therefore only used as examples, and cannot be used to limit the scope of protection of the present application.

[0031] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by technicians in the technical field to which this application belongs; the terms used herein are only for the purpose of describing specific embodiments and are not intended to limit this application; the terms "including" and "having" in the specification and claims of this application and the above-mentioned figure descriptions and any variations thereof are intended to cover non-exclusive inclusions.

[0032] In the description of the embodiments of the present application, the technical terms "first", "second", etc. are only used to distinguish different objects, and cannot be understood as indicating or implying relative importance or implicitly indicating the number, specific order or primary and secondary relationship of the indicated technical features. In the description of the embodiments of the present application, the meaning of "multiple" is more than two, unless otherwise clearly and specifically defined.

[0033] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0034] In the description of the embodiments of the present application, the term "and / or" is only a description of the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent: A exists, A and B exist at the same time, and B exists. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.

[0035] In the description of the embodiments of the present application, the term "multiple" refers to more than two (including two). Similarly, "multiple groups" refers to more than two groups (including two groups), and "multiple pieces" refers to more than two pieces (including two pieces).

[0036] In the description of the embodiments of the present application, the technical terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, which are only for the convenience of describing the embodiments of the present application and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the embodiments of the present application.

[0037] In the description of the embodiments of the present application, unless otherwise clearly specified and limited, technical terms such as "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, and it can be the internal connection of two elements or the interaction relationship between two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the embodiments of the present application can be understood according to the specific circumstances.

[0038] UPS power technology is a battery static uninterruptible power supply device, which consists of a rectifier, an inverter, an AC static switch and a battery pack. Under normal circumstances, the mains power is converted into DC by the rectifier to charge the battery pack, and at the same time, the inverter outputs high-quality AC purified power to supply important loads, so that they are not interfered by the voltage, frequency and harmonics of the mains power. When the mains power is cut off for some reason, the device automatically switches to the battery pack, the battery discharges, and the inverter supplies power to important loads.

[0039] The BUCK circuit is a DC-DC converter based on the principle of inductive energy storage. In the BUCK circuit, by adjusting the input duty cycle of the pulse width modulation (PWM) wave, the on and off states of the switch tube can be controlled, thereby converting the DC voltage provided by the input power supply into an adjustable low voltage output, thereby providing the required power supply voltage for different circuits.

[0040] Currently, multi-function interfaces that can support a variety of different plug-in cards are increasingly being used on motherboards, such as the M.2KEY B interface, which supports functions including storage, 4G / 5G communications, and Wi-Fi. For example, according to the M.2 interface specification, a memory card compatible with the M.2KEY B interface requires a voltage of 3.3V, while a 5G card requires a voltage of 3.8V. Since the same multi-function interface may need to support two or more cards with different voltages, this requires that voltage compatibility must be considered during design.

[0041] Usually, manufacturers will automatically equip corresponding plug-in cards according to the functions implemented by the multi-function interface, and plug-in cards with different voltage values ​​are usually dedicated to their specific use without considering compatibility issues. Therefore, if you want to be compatible with two plug-in cards with different voltages in the same multi-function interface, you need to take measures to prevent damage or malfunction caused by voltage mismatch.

[0042] In response to the above problems, USP technology is an AC power switching technology, which cannot solve the problem of the above-mentioned multi-function interface being compatible with cards of different voltages. The traditional BUCK power supply circuit is designed as a single fixed output and cannot automatically change the output voltage according to the type of card, that is, it cannot be compatible with two types of cards on the same multi-function interface.

[0043] The applicant has discovered that the configuration pins of different types of plug-in cards have different level states. By designing a logic judgment circuit to detect the level state of the card configuration pins, the different types of plug-in cards and the voltage required for the card operation can be determined. Then, the logic judgment circuit is used to control the power supply to output the voltage required for the card operation according to the different types of cards. The function of automatically switching the output voltage for different cards can be realized through a pure hardware circuit, so that the interface can be compatible with cards with two voltage requirements.

[0044] See also Figure 1 , Figure 1 The schematic diagram of the interface power control circuit structure provided by the embodiment of the application is shown. The interface power control circuit 10 includes a communication interface 100, a card insertion detection module 200 and a power control module 300. The communication interface 100 can be connected to at least two card insertion modules. The card insertion detection module 200 includes a NOT gate 210, a first AND gate 220, a second AND gate 230 and an OR gate 240. The input terminal 1 of the NOT gate 210, the first input terminal 1 of the first AND gate 220, the first input terminal 1 and the second input terminal 2 of the second AND gate 230 are all connected to the configuration pins ( Figure 1 The second input terminal 2 of the first AND gate 220 is connected to the output terminal 2 of the NOT gate 210, the first input terminal 1 and the second input terminal 2 of the OR gate 240 are connected to the output terminal 3 of the first AND gate 220 and the output terminal 3 of the second AND gate 230 respectively, and the card insertion detection module 200 is used to detect the configuration pin state of the communication interface 100 to generate a voltage control signal corresponding to the configuration pin state. The power control module 300 is respectively connected to the output terminal 3 of the OR gate 240 and the configuration pin ( Figure 1 The middle pin 5 is connected to output a voltage corresponding to the voltage control signal to the communication interface 100 according to the voltage control signal output by the output terminal 243 of the OR gate 240 of the card insertion detection module 200.

[0045] In the embodiment of the present application, an interface power control circuit is taken as an M.2KEY B interface power control circuit as an example for explanation, wherein the M.2KEY B interface (that is, the communication interface 100) is arranged on a computer substrate, and the communication connection between the M.2KEY B interface, the card insertion detection module 200 and the power control module 300 is realized through a printed circuit on the computer substrate.

[0046] The communication interface 100 is a physical interface with multiple pins, which can be adapted to a variety of card modules. For example, the communication interface 100 can be adapted to a memory card, a SIM card (including various types of mobile network SIM cards such as 2G, 3G, 4G, and 5G), a wireless communication module such as WiFi / Bluetooth, or an interface card for expanding functions.

[0047] Among them, the configuration pins of different card modules have different level states. Therefore, by detecting the level states of the configuration pins 1, 3, and 4 of the communication interface 100 connected to the card module, the type of the card module connected to the communication interface 100 can be determined.

[0048] As shown in Table 1, the type of the plug-in module is different, and the level state of the configuration pin of the plug-in module has a total of 16 combination numbers. Correspondingly, the configuration pin state of the communication interface 100 also has 16 identical combination numbers. Therefore, when the configuration pin state of the communication interface 100 when it is not connected to the plug-in module is determined as combination number 16, and when configuration pin 1, configuration pin 2, configuration pin 3, and configuration pin 4 are A, B, C, and D inputs respectively, then That is, input A is input to the NOT gate 210 through the input terminal 1 of the NOT gate 210, and is output through the output terminal 2 of the NOT gate 210. Then, The first AND gate 220 is inputted via the first input terminal 1, and after being ANDed with the input D inputted via the second input terminal 2 of the first AND gate 220, the input is outputted via the output terminal 3 of the first AND gate 220. Input C and input D are input into the second AND gate 230 through the first input terminal 1 and the second input terminal 2 of the second AND gate 230 respectively. After the input C and the input D are ANDed, C·D is output through the output terminal 3 of the second AND gate 230. Finally, the output The output C·D is input into the OR gate 240 through the first input terminal 1 and the second input terminal 2 of the OR gate 240, and the output After being phase-ORed with the output C·D, the voltage control signal is output through the output terminal 3 of the OR gate 240.

[0049] Table 1

[0050]

[0051]

[0052] It can be seen that when the level states of the configuration pins 1, 3, and 4 of the communication interface 100 are combination numbers 5, 6, 7, 8, and 15, the voltage control signal output by the output terminal 3 of the OR gate 240 is 1, and the type of the corresponding plug-in module is a 5G card; when the level states of the configuration pins 1, 3, and 4 of the communication interface 100 are combination numbers 1, 2, 3, 4, 9, 10, 11, 12, 13, and 14, the voltage control signal output by the output terminal 3 of the OR gate 240 is 0, and the type of the corresponding plug-in module is a memory card.

[0053] The power control module 300 is a circuit module that can provide voltage to the configuration pin 5 of the communication interface 100 according to the voltage control signal output by the card insertion detection module 200. For example, when the voltage control signal output by the output terminal 3 of the OR gate 240 is 1, the power control module 300 outputs a first predetermined voltage to the configuration pin 5 of the communication interface 100 for the normal operation of the user identification card (such as a 5G card); when the voltage control signal output by the output terminal 3 of the OR gate 240 is 0, the power control module 300 outputs a second predetermined voltage to the configuration pin 5 of the communication interface 100 for the normal operation of the memory card.

[0054] In some embodiments, the configuration pins of the communication interface 100 may include a first pin 1, a second pin 3, a third pin 4, and a voltage output pin 5. Among them, the first pin 1 is connected to the input terminal 1 of the NOT gate 210, the second pin 3 is connected to the first input terminal 1 of the second AND gate 230, the third pin 4 is respectively connected to the first input terminal 1 of the first AND gate 220 and the second input terminal 2 of the second AND gate 230, and the voltage output pin 5 is connected to the power control module 300.

[0055] In this case, the NOT gate 210, the first AND gate 220 and the second AND gate 230 can detect the level states of the first pin 1, the second pin 3 and the third pin 4, and the output terminal 3 of the OR gate 240 outputs a voltage control signal corresponding to the level states of the first pin 1, the second pin 3 and the third pin 4, so that the power control module 300 outputs a voltage corresponding to the voltage control signal to the voltage output pin 5.

[0056] It can be seen from Table 1 that when the combination sequence of the level states of the first pin 1, the second pin 3 and the third pin 4 is 5, 6, 7, 8, 15, the voltage control signal output by the output terminal 3 of the OR gate 240 is 1, and the power control module 300 outputs the first predetermined voltage for the normal operation of the 5G card to the voltage output pin 5; when the combination sequence of the level states of the first pin 1, the second pin 3 and the third pin 4 is 1, 2, 3, 4, 9, 10, 11, 12, 13, 14, the voltage control signal output by the output terminal 3 of the OR gate 240 is 0, and the power control module 300 outputs the second predetermined voltage for the normal operation of the memory card to the voltage output pin 5.

[0057] In the interface power control circuit 10 provided in the embodiment of the present application, by connecting the input ends of the NOT gate 210, the first AND gate 220, and the second AND gate 230 in the card insertion detection module 200 to the configuration pin of the communication interface 100, the configuration pin state of the communication interface 100 can be detected; by connecting the output end of the NOT gate 210 to the input end of the first AND gate 220, and by connecting the input end of the OR gate 240 to the output ends of the first AND gate 220 and the second AND gate 230 respectively, the OR gate 240 can output a voltage control signal corresponding to the configuration pin state of the communication interface 100; by connecting the power control module 300 to the output end of the OR gate 240 and the configuration pin of the communication interface 100 respectively, the power control module 300 can output a voltage corresponding to the voltage control signal to the communication interface 100 according to the voltage control signal output by the OR gate 240. By detecting the configuration pin status of the communication interface 100 by the card detection module 200, the power control module 300 can be controlled to switch the voltage required for the operation of the card module according to the card module connected to the communication interface 100, so that the function of automatically switching the output voltage of the interface for different card modules can be realized through a pure hardware circuit, so that the interface can be compatible with card modules with two voltage requirements.

[0058] The electronic components of the logic gate need a certain amount of time to change their states when processing signals. Therefore, the level signal of the first pin 1 passes through the NOT gate 210 and is then input into the first AND gate 220. There is a delay in the time when the signal output from the NOT gate 210 reaches the first AND gate 220, so that the time when the level signal of the first pin 1 reaches the first AND gate 220 is later than the time when the level signals of the second pin 3 and the third pin 4 reach the first AND gate 220 and the second AND gate 230, which may cause the output of the card insertion detection module 200 to be incorrect or burrs to appear.

[0059] In order to avoid the above problems, this application further proposes an implementation method, please continue to refer to Figure 1 , and combined with Figure 2 , Figure 2The schematic diagram of the structure of the card insertion detection module provided by the embodiment of the present application is shown. As shown in the figure, the card insertion detection module 200 further includes a first buffer 250 and a second buffer 260. The input terminals A of the first buffer 250 and the second buffer 260 are connected to the second pin 3 and the third pin 4 respectively, the output terminal Y of the first buffer 250 is connected to the first input terminal 1 of the second AND gate 230, and the output terminal Y of the second buffer 260 is connected to the first input terminal 1 of the first AND gate 220 and the second input terminal 2 of the second AND gate 230 respectively. The first buffer 250 and the second buffer 260 are used to delay the level signals of the second pin 3 and the third pin 4, so that the level signals of the first pin 1, the second pin 3 and the third pin 4 reach the first AND gate 220 and the second AND gate 230 at the same time.

[0060] A first buffer 250 is added to the input end of the second AND gate 230, so that the level signal of the second pin 3 is first input into the first buffer 250 through the input end A of the first buffer 250 before being input into the second AND gate 230, and then output from the output end Y of the first buffer 250 to the second AND gate 230 after being delayed by the first buffer 250, so that the time when the level signal of the second pin 3 arrives at the second AND gate 230 is the same as the time when the level signal of the first pin 1 arrives at the first AND gate 220. Similarly, a second buffer 260 is added to the input ends of the first AND gate 220 and the second AND gate 230, so that the level signal of the third pin 4 is first input into the second buffer 260 through the input end A of the second buffer 260 before being input into the first AND gate 220 and the second AND gate 230, and then output from the output end Y of the second buffer 260 to the first AND gate 220 and the second AND gate 230 respectively after being delayed by the second buffer 260, so that the time when the level signal of the third pin 4 reaches the first AND gate 220 and the second AND gate 230 is the same as the time when the level signal of the first pin 1 reaches the first AND gate 220.

[0061] Through the above scheme, the level signals of the second pin 3 and the third pin 4 can match the propagation delay of the level signal of the first pin 1, that is, the output signal of the level signal of the first pin 1 after passing through the NOT gate 210 can reach the first AND gate 220 and the second AND gate 230 at the same time as the level signals of the second pin 3 and the third pin 4, thereby avoiding glitches in the circuit of the card insertion detection module 200.

[0062] In order to ensure the normal operation of the card insertion detection module 200, the present application further proposes an implementation method, please continue to refer to Figure 1 and Figure 2As shown in the figure, the card insertion detection module 200 also includes a plurality of first capacitors 270. The first ends of the plurality of first capacitors 270 are respectively connected to the power input ends of the NOT gate 210, the first AND gate 220, the second AND gate 230 and the OR gate 240, and the second ends of the plurality of first capacitors 270 are grounded. The power input ends of the NOT gate 210, the first AND gate 220, the second AND gate 230 and the OR gate 240 are respectively connected to the power supply 280, and the first capacitors 270 are used to filter the voltage input from the power supply 280 to the power input ends of the NOT gate 210, the first AND gate 220, the second AND gate 230 and the OR gate 240.

[0063] In an embodiment of the present application, the first capacitor 270 of the NOT gate 210, the first AND gate 220, the second AND gate 230 and the OR gate 240 can filter out high-frequency interference signals input to the logic gates to which they are connected, and keep the power lines of the NOT gate 210, the first AND gate 220, the second AND gate 230 and the OR gate 240 clean, thereby ensuring the normal operation of the circuit.

[0064] In order to make the power control module 300 output a corresponding predetermined voltage to the card module, the present application further proposes an implementation method, please continue to refer to Figure 1 , and combined with Figure 3 , Figure 3 The schematic diagram of the structure of the power control module provided by the embodiment of the present application is shown. As shown in the figure, the power control module 300 includes a power chip 310 and a switching unit 320. The power chip 310 includes a feedback voltage pin 1, which is used to output the feedback voltage through the feedback voltage pin 1. The switching unit 320 includes a first resistor 321 and a second resistor 322 connected in series, the first end of the first resistor 321 is respectively connected to the feedback voltage pin 1 of the power chip 310 and the configuration pin 5 of the communication interface 100, the second end of the first resistor 321 is connected to the first end of the second resistor 322, and the second end of the second resistor 322 is grounded, wherein the second resistor 322 includes a first sub-resistor 3221 and a second sub-resistor 3222 connected in parallel, and the second sub-resistor 3222 includes a resistive device R and a field effect transistor FET connected in series, and the gate G of the field effect transistor FET is connected to the output terminal 3 of the OR gate 240. The field effect transistor FET is turned on or off in response to the voltage control signal, so that the first end of the first resistor 321 outputs the first predetermined voltage or the second predetermined voltage obtained by dividing the feedback voltage of the first resistor 321 to the configuration pin 5 of the communication interface 100 .

[0065] The power chip 310 may be a BUCK power IC, and the power output voltage is adjusted through the switching unit 320 .

[0066] In this embodiment, the resistive device R may be a resistor, and the resistive device R and the field effect transistor FET may be connected in series as follows: Figure 3As shown, the two ends of the resistive device R are respectively connected to the second end of the first resistor 321 and the drain D of the field effect transistor FET, and the source S of the field effect transistor FET is grounded. It can also mean that the drain D of the field effect transistor FET is connected to the second end of the first resistor 321, the source S of the field effect transistor FET is connected to one end of the resistive device R, and the other end of the resistive device R is grounded.

[0067] like Figure 2 As shown, the gate G of the field effect transistor FET is connected to the output terminal 3 of the OR gate 240. When the voltage control signal output by the OR gate 240 is in the first level state 1, the field effect transistor FET is turned on, and the resistive device R is grounded to form a loop, so that the resistive device R is connected to the switching unit 320 and connected in parallel with the first sub-resistor 3221 to form a second resistor 322. The second resistor 322 is connected in series with the first resistor 321 as a voltage-dividing resistor. The first predetermined voltage output by the first end of the first resistor 321 to the configuration pin 5 of the communication interface 100 is the voltage obtained by the voltage-dividing feedback voltage of the first resistor 321 at this time; when the voltage control signal output by the OR gate 240 is in the first level state 0, the field effect transistor FET is turned off, and the resistive device R is not grounded to form a loop, so that the resistive device R cannot be connected to the switching unit 320. Therefore, the first sub-resistor 3221 is connected in series with the first resistor 321 as a voltage-dividing resistor. The second predetermined voltage output by the first end of the first resistor 321 to the configuration pin 5 of the communication interface 100 is the voltage obtained by the voltage-dividing feedback voltage of the first resistor 321 at this time.

[0068] The voltage control signal output by the OR gate 240 controls the conduction or cutoff of the field effect transistor FET, and changes the ratio of the voltage divider resistor formed by the first resistor 321 and the second resistor 322 in series, so that the first end of the first resistor 321 can output the first predetermined voltage or the second predetermined voltage obtained by the feedback voltage output by the first resistor 321 divided by the power supply chip 310 to the communication interface 100, thereby realizing the switching of the voltage output to the communication interface 100 for different card modules.

[0069] In order to provide a more stable output voltage for the card module, the present application further proposes an implementation method, please continue to refer to Figure 3 As shown in the figure, the power control module 300 also includes a filter module 330. One end of the filter module 330 is respectively connected to the first end of the first resistor 321 and the configuration pin 5 of the communication interface 100, and the other end is grounded. The filter module 330 includes a plurality of second capacitors 331 connected in parallel to filter the voltage output from the first end of the first resistor 321 to reduce high-frequency noise and interference in the output voltage and provide a more stable voltage to the card module.

[0070] According to another aspect of the embodiment of the present application, a computer motherboard is provided. Figure 4 , Figure 4 A schematic diagram of the structure of a computer motherboard provided in an embodiment of the present application is shown. As shown in the figure, the computer motherboard 1 includes a substrate 20 and an interface power control circuit 10 provided in any of the above embodiments, wherein a communication interface 100 is arranged on the substrate 20, and the communication connection between the communication interface 100, the card insertion detection module 200 and the power control module 300 is realized through a printed circuit on the substrate 20.

[0071] According to another aspect of the embodiment of the present application, a computer is provided. Figure 5 , Figure 5 A schematic diagram of the structure of a computer provided in an embodiment of the present application is shown. As shown in the figure, the computer 1000 includes the computer mainboard 1 provided in the above embodiment.

[0072] In the embodiment of the present application, the card detection module 200 detects the configuration pin status of the communication interface 100, and thus the card module connected to the communication interface 100 can be determined. After the type of the card module is determined, the voltage required for the operation of the card module can be obtained. According to the voltage required, the card detection module 100 sends a voltage control signal to control the power control module 300 to switch the output voltage to the same voltage as the voltage required by the card module, thereby realizing the automatic switching of the output voltage of the interface for different card modules through a pure hardware circuit, so as to be compatible with card modules with two voltage requirements.

Claims

1. An interface power control circuit, characterized in that: The circuit comprises: A communication interface capable of connecting to at least two types of card modules; A card insertion detection module, comprising a NOT gate, a first AND gate, a second AND gate and an OR gate, wherein an input end of the NOT gate, a first input end of the first AND gate, a first input end and a second input end of the second AND gate are all connected to a configuration pin of the communication interface, a second input end of the first AND gate is connected to an output end of the NOT gate, and a first input end and a second input end of the OR gate are respectively connected to an output end of the first AND gate and an output end of the second AND gate, and the card insertion detection module is used to detect a configuration pin state of the communication interface to generate a voltage control signal corresponding to the configuration pin state; The power control module is connected to the output end of the OR gate and the configuration pin of the communication interface respectively, so as to output a voltage corresponding to the voltage control signal to the communication interface according to the voltage control signal output by the output end of the OR gate of the card insertion detection module.

2. The circuit according to claim 1, characterized in that The configuration pins of the communication interface include a first pin, a second pin, a third pin and a voltage output pin; The first pin is connected to the input end of the NOT gate, the second pin and the third pin are respectively connected to the first input end and the second input end of the second AND gate, the third pin is also connected to the first input end of the first AND gate, and the voltage output pin is connected to the power control module; The OR gate generates a voltage control signal corresponding to the level states of the first pin, the second pin and the third pin according to the level states of the first pin, the second pin and the third pin detected by the NOT gate, the first AND gate and the second AND gate; The power control module outputs a voltage corresponding to the voltage control signal to the voltage output pin according to the voltage control signal output by the OR gate.

3. The circuit according to claim 2, characterized in that The card insertion detection module also includes a first buffer and a second buffer; The input ends of the first buffer and the second buffer are connected to the second pin and the third pin respectively, the output end of the first buffer is connected to the first input end of the second AND gate, and the output end of the second buffer is connected to the first input end of the first AND gate and the second input end of the second AND gate respectively; The first buffer and the second buffer are used to delay the level signals of the second pin and the third pin so that the level signals of the first pin, the second pin and the third pin reach the first AND gate and the second AND gate at the same time.

4. The circuit according to claim 1, characterized in that The card insertion detection module further includes a plurality of first capacitors; The first ends of the plurality of first capacitors are respectively connected to the power input ends of the NOT gate, the first AND gate, the second AND gate and the OR gate, and the second ends of the plurality of first capacitors are grounded; The power input ends of the NOT gate, the first AND gate, the second AND gate and the OR gate are respectively connected to a power supply, and the first capacitor is used to filter the voltage of the power input to the power input ends of the NOT gate, the first AND gate, the second AND gate and the OR gate.

5. The circuit according to claim 1, characterized in that The power control module comprises: A power chip, comprising a feedback voltage pin, configured to output a feedback voltage through the feedback voltage pin; A switching unit, comprising a first resistor and a second resistor connected in series, wherein a first end of the first resistor is respectively connected to a feedback voltage pin of the power chip and a configuration pin of the communication interface, a second end of the first resistor is connected to a first end of the second resistor, and a second end of the second resistor is grounded, wherein the second resistor comprises a first sub-resistor and a second sub-resistor connected in parallel, the second sub-resistor comprises a resistive device and a field effect transistor connected in series, and a gate of the field effect transistor is connected to an output end of the OR gate; The field effect transistor is turned on or off in response to the voltage control signal, so that the first end of the first resistor outputs a first predetermined voltage or a second predetermined voltage obtained by dividing the feedback voltage by the first resistor to the configuration pin of the communication interface.

6. The circuit according to claim 5, characterized in that: When the voltage control signal is in the first level state, the field effect tube is turned on, so that the resistive device is connected in parallel with the first sub-resistor to form the second resistor, the second resistor is connected in series with the first resistor as a voltage divider resistor, and the first end of the first resistor outputs the first predetermined voltage to the configuration pin of the communication interface; When the voltage control signal is in the second level state, the field effect transistor is turned off, so that the first sub-resistor is connected in series with the first resistor as a voltage divider resistor, and the first end of the first resistor outputs the second predetermined voltage to the configuration pin of the communication interface.

7. The circuit according to claim 5, characterized in that: The card insertion module is a user identification card or a memory card; When the card module connected to the communication interface is a user identification card, the first end of the first resistor outputs the first predetermined voltage to the configuration pin of the communication interface; When the card module connected to the communication interface is a memory card, the first end of the first resistor outputs the second predetermined voltage to the configuration pin of the communication interface.

8. The circuit according to claim 5, characterized in that The power control module also includes a filtering module; One end of the filter module is connected to the first end of the first resistor and the configuration pin of the communication interface respectively, and the other end is grounded; The filtering module includes a plurality of second capacitors connected in parallel and configured to filter the voltage outputted from the first end of the first resistor.

9. A computer motherboard, characterized in that: It comprises a substrate and an interface power control circuit as described in any one of claims 1 to 8, wherein the communication connection between the communication interface, the card insertion detection module and the power control module is realized through a printed circuit on the substrate.

10. A computer, characterized in that: The computer comprises the computer mainboard as claimed in claim 9.

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