Semiconductor test structure
By designing a semiconductor test structure, using alternately arranged test units and test pads, the test current is output to determine short circuit, which solves the problem of contact plug short circuit monitoring in semiconductor devices, and achieves rapid and effective testing, improving device performance and yield.
Patent Information
- Application Number
- CN202421455838.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-06-24
- Publication Date
- 2025-03-28
- Estimated Expiration
- 2034-06-24
AI Technical Summary
As the feature size of semiconductor devices decreases, short circuit problems between contact plugs become serious, affecting device performance and yield, and it is difficult for the prior art to monitor this short circuit phenomenon quickly and effectively.
A semiconductor test structure is designed, including a first test unit and a second test unit arranged alternately, and a first test current is outputted through the first test signal to determine whether there is a short circuit between the first series structure and the second series structure.
This test structure can quickly and effectively determine whether there is a short circuit between the contact plugs, reducing the testing cost and time, and improving the performance and yield of semiconductor devices.
Smart Images
Figure CN222690684U_ABST
Abstract
Description
Technical Field
[0001] The disclosed embodiments relate to the field of semiconductor technology, and in particular, to a semiconductor test structure. Background Art
[0002] In order to improve the integration of circuits, the metal layers of large-scale integrated circuits mostly use multi-layer metal wiring. The contact plug (CT) in the semiconductor device is a channel connecting the front-end transistor and the back-end metal line. As the feature size of the product decreases, the feature size (CT CD, contact critical dimension) of the contact plug gradually decreases. The short circuit between the contact plugs caused by the metal residues in the etching process reduces the performance and yield of the semiconductor device. Utility Model Content
[0003] An embodiment of the present disclosure provides a semiconductor test structure that can monitor whether a short circuit abnormality occurs between contact plugs.
[0004] A semiconductor test structure, comprising:
[0005] A plurality of first test units, a plurality of second test units, a first test pad, and a second test pad; the first test units and the second test units are arranged alternately; the plurality of first test units are connected end to end in sequence to form a first series structure, one end of the first series structure is connected to the first test pad; the plurality of second test units are connected end to end in sequence to form a second series structure, one end of the second series structure is connected to the second test pad;
[0006] The first test pad and the second test pad output a first test current in response to a first test signal, and the first test current is used to confirm the relationship between the first series structure and the second series structure.
[0007] In one embodiment, the semiconductor test structure further includes:
[0008] A first metal wire, used to connect two adjacent first test units;
[0009] The second metal wire is used to connect two adjacent second test units.
[0010] In one embodiment, the first metal line and the second metal line are disposed in different layers.
[0011] In one embodiment, each test unit includes a plurality of active areas and a plurality of third metal lines, wherein contact plugs are disposed in the active areas, and the third metal line connects two adjacent contact plugs in two adjacent active areas.
[0012] In one embodiment, two adjacent test units in the same series structure are connected via the contact plug.
[0013] In one embodiment, the third metal line in the first test unit and the third metal line in the second test unit are disposed in the same layer.
[0014] In one embodiment, the contact plug includes at least one of a shared plug and a normal plug.
[0015] In one embodiment, two adjacent test units in the same series structure are connected via a shared plug.
[0016] In one embodiment, the semiconductor test structure includes two first test pads and two second test pads, the opposite ends of the first series structure are connected to the first test pads, and the opposite ends of the second series structure are connected to the second test pads;
[0017] The test pads at two opposite ends of the same series structure output a second test current in response to a second test signal, and the second test current is used to confirm the contact resistance of the corresponding series structure.
[0018] In one embodiment, the semiconductor test structure further includes:
[0019] The fourth metal wire is used to connect the first test pad and one end of the first series structure, and is also used to connect the second test pad and one end of the second series structure.
[0020] In the above-mentioned semiconductor test structure, the first test unit in the first series structure and the second test unit in the second series structure are arranged alternately, and the first test pad connected to the first series structure and the second test pad connected to the second series structure respond to the first test signal, and the output of the first test current can be used to determine whether there is a short circuit problem between the first series structure and the second series structure. The test cost is low and the time is short. BRIEF DESCRIPTION OF THE DRAWINGS
[0021] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure or related technologies, the drawings required for use in the embodiments or related technical descriptions will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.
[0022] Figure 1 A scanning electron microscope image of a typical shared contact plug with a short circuit problem;
[0023] Figure 2 is a schematic structural diagram of a semiconductor test structure in some embodiments;
[0024] Figure 3 Schematic diagram of semiconductor test structure in some other embodiments.
[0025] Description of reference numerals:
[0026] The first test unit 102 , the second test unit 104 , the first test pad 106 , the second test pad 108 , the first metal line 110 , the second metal line 112 , the active region 202 , the third metal line 204 , the contact plug 206 , the shared contact plug 302 , and the normal contact plug 304 . DETAILED DESCRIPTION
[0027] In order to facilitate understanding of the embodiments of the present disclosure, the embodiments of the present disclosure will be described more fully below with reference to the relevant drawings. The preferred embodiments of the embodiments of the present disclosure are shown in the drawings. However, the embodiments of the present disclosure can be implemented in many different forms and are not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the embodiments of the present disclosure more thorough and comprehensive.
[0028] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which the disclosed embodiments belong. The terms used herein in the specification of the disclosed embodiments are only for the purpose of describing specific embodiments and are not intended to limit the disclosed embodiments. The term "and / or" used herein includes any and all combinations of one or more of the related listed items.
[0029] In the description of the embodiments of the present disclosure, it should be understood that the terms "upper", "lower", "vertical", "horizontal", "inside", "outside", etc. indicating orientations or positional relationships are based on the methods or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the embodiments of the present disclosure and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the embodiments of the present disclosure.
[0030] It is understood that the terms "first", "second", etc. used in the present disclosure may be used herein to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish a first element from another element. For example, without departing from the scope of the present disclosure, a first series structure may be referred to as a second series structure, and similarly, a second series structure may be referred to as a first series structure. Both the first series structure and the second series structure are series structures, but they are not the same series structure.
[0031] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the description of the present disclosure, the meaning of "multiple" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined. In the description of the present disclosure, the meaning of "several" is at least one, such as one, two, etc., unless otherwise clearly and specifically defined.
[0032] Typically, six transistors are used to store one bit of data signal in a random access static memory (SRAM). As the feature size of the device decreases, the aspect ratio of the contact plug increases and the bottom feature size (Bottom CD) decreases, resulting in an increase in byproducts (such as polymers) during the etching process, and poor contact (open) between the structure at the bottom of the contact plug and the contact plug. Metal residues in contact with adjacent contact plugs during the etching process cause short circuits between the contact plugs, affecting the product yield of the SRAM. It is essential to quickly and effectively monitor whether short circuits occur between adjacent contact plugs. How to quickly and effectively monitor whether short circuits occur between adjacent contact plugs has become an urgent problem to be solved. Figure 1 FIG. 1 is a scanning electron microscope image of a typical shared contact plug having a short circuit problem. In the figure, the metal residues between adjacent shared contact plugs 1 cause a short circuit problem between two adjacent shared contact plugs 1 .
[0033] Figure 2 is a schematic diagram of a semiconductor test structure in some embodiments, for example, Figure 2 The X direction is the first direction, the Y direction is the second direction, and the Z direction is the third direction. The X direction and the Y direction intersect, and the Z direction is perpendicular to the X direction and the Y direction, respectively.
[0034] In order to solve the above problems, the present disclosure provides a semiconductor test structure, such as Figure 2 As shown, in this embodiment, the semiconductor test structure includes: a plurality of first test units 102, a plurality of second test units 104, a first test pad 106 and a second test pad 108; the first test units 102 and the second test units 104 are arranged alternately; a plurality of the first test units 102 are connected end to end in sequence to form a first series structure, one end of the first series structure is connected to the first test pad 106; a plurality of the second test units 104 are connected end to end in sequence to form a second series structure, one end of the second series structure is connected to the second test pad 108;
[0035] The first test pad 106 and the second test pad 108 output a first test current in response to a first test signal, and the first test current is used to confirm the relationship between the first series structure and the second series structure.
[0036] The first test unit 102 and the second test unit 104 are alternately arranged along the first direction X, and the first test unit 102 and the adjacent second test unit 104 are insulated and spaced apart; a plurality of the first test units 102 are electrically connected, and a plurality of the second test units 104 are electrically connected.
[0037] Multiple structures A are connected end to end in sequence means that: when ... structure A1, structure A2, structure A3... are arranged in sequence, the two opposite ends of structure A in the extension direction are respectively called the head end and the tail end, and structure A2 is adjacent to structure A1 and structure A3 respectively, the head end of structure A2 is adjacent to the tail end of structure A1 and the tail end of structure A3 respectively, and the tail end of structure A2 is adjacent to the head end of structure A1 and the head end of structure A3 respectively; wherein, the head end of structure A2 is electrically connected to the tail end of structure A1, the tail end of structure A2 is electrically connected to the head end of structure A3, the tail end of structure A3 is electrically connected to the head end of the next structure A, and the head end of structure A1 is electrically connected to the tail end of the previous structure, thereby forming a series structure.
[0038] The first test signal is a preset voltage loaded between the first test pad 106 and the second test pad 108, the first test current is a first current between the first test pad 106 and the second test pad 108, the first test pad 106 and the second test pad 108 are electrically connected to different series structures respectively, and whether there is a short circuit between the first series structure and the second series structure can be determined according to the magnitude of the first current. Exemplarily, when the first test current is the first preset current, it is determined that a short circuit occurs between the first series structure and the second series structure; when the first test current is the second preset current, it is determined that an insulation setting is provided between the first series structure and the second series structure; wherein the first preset current is the current between the first test pad 106 and the second test pad 108 when there is a short circuit between the first series structure and the second series structure, and the second preset current is the current between the first test pad 106 and the second test pad 108 when there is insulation between the first series structure and the second series structure.
[0039] In the above-mentioned semiconductor test structure, the first test unit in the first series structure and the second test unit in the second series structure are arranged alternately, and the first test pad connected to the first series structure and the second test pad connected to the second series structure respond to the first test signal, and the output of the first test current can be used to determine whether there is a short circuit problem between the first series structure and the second series structure. The test cost is low and the time is short.
[0040] like Figure 2 As shown, in one embodiment, the semiconductor test structure also includes: a first metal wire 110 and a second metal wire 112; the first metal wire 110 is used to connect two adjacent first test units 102; the second metal wire 112 is used to connect two adjacent second test units 104, wherein the first metal wire 110 and the second series structure are insulated, and the second metal wire 112 and the first series structure are insulated.
[0041] In one embodiment, the first metal line 110 and the second metal line 112 are disposed in different layers. For example, in the third direction Z, the first metal line 110 is disposed on an upper layer of the second metal line 112 , or the first metal line 110 is disposed on a lower layer of the second metal line 112 .
[0042] In one embodiment, the first metal line 110 and the second metal line 112 are disposed in the same layer.
[0043] In one embodiment, each test unit includes a plurality of active areas 202 and a plurality of third metal lines 204, wherein the active area 202 is provided with a contact plug 206, and the third metal line 204 connects two adjacent contact plugs 206 in two adjacent active areas 202. Exemplarily, in the third direction Z, the third metal line 204 in the same test unit is located above the active area 202 in the same test unit. The semiconductor test structure can confirm the process window, find problems in advance in the design process of the semiconductor device, shorten the actual time, and reduce the design cost.
[0044] Specifically, the first test unit 102 includes a plurality of active regions 202 and a plurality of third metal lines 204, wherein the active regions 202 are provided with contact plugs 206, and the third metal lines 204 in the first test unit 102 are electrically connected to two adjacent contact plugs 206 in two adjacent active regions 202 in the first test unit 102. The second test unit 104 includes a plurality of active regions 202 and a plurality of third metal lines 204, wherein the active regions 202 are provided with contact plugs 206, and the third metal lines 204 in the second test unit 104 are electrically connected to two adjacent contact plugs 206 in two adjacent active regions 202 in the second test unit 104.
[0045] In one embodiment, two adjacent test cells in the same series structure are connected via the contact plug 206 .
[0046] Specifically, two adjacent first test units 102 in the first series structure are electrically connected via a contact plug 206 in the active region 202 at the end; two adjacent second test units 104 in the second series structure are electrically connected via a contact plug 206 in the active region 202 at the end.
[0047] In one embodiment, the first series structure and the first test pad 106 are connected via a contact plug 206 .
[0048] In one embodiment, the second series structure and the second test pad 108 are connected via a contact plug 206 .
[0049] In some embodiments, the structures of any two active regions 202 in the first test unit 102 are the same or different.
[0050] In some embodiments, the structures of the active regions 202 in different first test units 102 are the same or different.
[0051] In some embodiments, the structures of any two active regions 202 in the second test unit 104 are the same or different.
[0052] In some embodiments, the structures of the active regions 202 in different second test units 104 are the same or different.
[0053] In some embodiments, the number of active regions 202 in each first test unit 102 is the same.
[0054] In some embodiments, the number of active regions 202 in each first test unit 102 is different.
[0055] In some embodiments, the number of active regions 202 in each second test unit 104 is the same.
[0056] In some embodiments, the number of active regions 202 in each second test unit 104 is different.
[0057] In one embodiment, the third metal line 204 in the first test unit 102 and the third metal line 204 in the second test unit 104 are disposed in the same layer to simplify the manufacturing process.
[0058] In some embodiments, the third metal lines 204 in the first test unit 102 are located in the same layer; the third metal lines 204 in different first test units 102 are located in different layers or in the same layer.
[0059] In some embodiments, the third metal lines 204 in the second test unit 104 are located in the same layer; the third metal lines 204 in different second test units 104 are located in different layers or in the same layer.
[0060] In one embodiment, the third metal line 204 in the first test unit 102 and the third metal line 204 in the second test unit 104 are disposed in different layers.
[0061] In one embodiment, the third metal line 204 and the first metal line 110 in the first test unit 102 are disposed in different layers.
[0062] In one embodiment, the third metal line 204 and the first metal line 110 in the first test unit 102 are disposed in the same layer.
[0063] In some embodiments, the third metal line 204 and the second metal line 112 in the second test unit 104 are located in the same layer.
[0064] In some embodiments, the third metal line 204 and the second metal line 112 in the second test unit 104 are located in different layers.
[0065] In one embodiment, the contact plug 206 includes at least one of a shared plug 302 and a normal plug 304. Exemplarily, the contact plug 206 in the active area 202 is a shared plug 302; the contact plug 206 in the active area 202 is a normal plug 304; and the contact plug 206 in the active area 202 includes both a shared plug 302 and a normal plug 304.
[0066] It can be understood that, when there are multiple contact plugs 202 in the same active region 202 , adjacent contact plugs 202 in the same active region 202 are arranged at intervals.
[0067] In one embodiment, two adjacent test units in the same series structure are connected via a shared plug 302. Specifically, two adjacent first test units 102 in the first series structure are electrically connected via a shared plug 302, and two adjacent second test units 104 in the second series structure are electrically connected via a shared plug 302.
[0068] In one embodiment, two adjacent test units in the same series structure are connected via a normal plug 304 .
[0069] In one embodiment, the first series structure and the first test pad 106 are connected via a shared plug 302 .
[0070] In one embodiment, the second series structure and the second test pad 108 are connected via a shared plug 302 .
[0071] In one embodiment, the first series structure and the first test pad 106 are connected via a normal plug 304 .
[0072] In one embodiment, the second series structure and the second test pad 108 are connected via a normal plug 304 .
[0073] Figure 3 Schematic diagrams of semiconductor test structures in other embodiments, such as Figure 3 As shown, in one embodiment, the semiconductor test structure includes two first test pads 106 and two second test pads 108, the first two opposite ends of the first series structure are connected to the first test pads 106, and the second two opposite ends of the second series structure are connected to the second test pads 108; wherein, the test pads at the two opposite ends of the same series structure respond to the second test signal and output a second test current, and the second test current is used to confirm the contact resistance of the corresponding series structure. Through this setting, while monitoring whether there is a short circuit between the first series structure and the second series structure, the contact resistance in the first series structure and the second series structure can be tested, saving the area and test time corresponding to the test structure.
[0074] Specifically, the first test pads 106 at the opposite ends of the first series structure respond to the second test signal and output the second test current of the first series structure, and the contact resistance of the first series structure can be confirmed by the second test current of the first series structure. The second test pads 108 at the opposite ends of the second series structure respond to the second test signal and output the second test current of the second series structure, and the contact resistance of the second series structure can be confirmed by the second test current of the second series structure. It can be understood that the second test signal is the second test voltage, and the second test current is the second current, and the contact resistance of the series structure corresponding to the second current can be determined by the second test voltage and the second current.
[0075] In one embodiment, the semiconductor test structure further includes: a fourth metal line connecting the first test pad 106 and one end of the first series structure, and also used to connect the second test pad 108 and one end of the second series structure.
[0076] In some embodiments, a semiconductor test structure is used to test whether there is a short circuit between adjacent contact plugs in a static random access memory (SRAM).
[0077] Exemplarily, the semiconductor test structure includes three first test units 102, three second test units 104, two first test pads 106 and two second test pads 108; the first test units 102 and the second test units 104 are alternately arranged along the first direction X; wherein the first test unit 102 and the second test unit 104 each include a plurality of active areas 202 arranged at intervals along the second direction Y, the active area 202 extends along the second direction Y, and the active area 202 is provided with shared contact plugs 302 and normal contact plugs 304 arranged at intervals, and in the second direction Y, both ends of the active area 202 are shared contact plugs 302; the shared contact plugs at one end of the active area 202 of the same test unit The contact plug 302 and the shared contact plug 302 at one end of the adjacent active region 202 are electrically connected via the third metal wire 204 to form a test unit, and both ends of the test unit are shared contact plugs 302; the first test unit 102 is connected head to tail in sequence via the first metal wire 110, and the first metal wire 110 is respectively connected to the shared contact plugs 302 at the head and tail of different first test units 102 to form a first series structure; the second test unit 104 is connected head to tail in sequence via the second metal wire 112, and the second metal wire 112 is respectively connected to the shared contact plugs 302 at the head and tail of different second test units 104 to form a second series structure, and both ends of the first series structure and the second series structure are The shared contact plug 302 is a shared contact plug 302, the shared contact plugs 302 at opposite ends of the first series structure are connected to the first test pad 106 through a fourth metal wire, and the shared contact plugs 302 at opposite ends of the second series structure are connected to the second test pad 108 through a fourth metal wire; wherein the first series structure and the second series structure are insulated from each other, and the insulation setting means that no current exists between the two in an ideal state; the third metal wire 204 in each first test unit 102, the third metal wire 204 in each second test unit 104 and the second metal wire 112 are located in the same structural layer, the first metal wire 110 and the second metal wire 112 are located in different structural layers, and any first test pad and any second test pad are connected to each other. A first test signal (first test voltage) is applied between the two test pads, and a first test current (first current) is output. Through the first test current, it can be determined whether a short circuit occurs between the first series structure and the second series structure; the two first test pads respond to the second test signal (second test voltage) and output a second test current (second current) corresponding to the first series structure. Through the second test current corresponding to the first series structure, the resistance of the first series structure can be obtained; the two second test pads respond to the second test signal (second test voltage) and output a second test current (second current) corresponding to the second series structure. Through the second test current corresponding to the second series structure, the resistance of the second series structure can be obtained.
[0078] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0079] The above-mentioned embodiments only express several implementation methods of the embodiments of the present disclosure, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the embodiments of the present disclosure, and these all belong to the protection scope of the embodiments of the present disclosure.
Claims
1. A semiconductor test structure, characterized in that: include: A plurality of first test units, a plurality of second test units, a first test pad and a second test pad; the first test units and the second test units are arranged alternately; A plurality of the first test units are connected end to end in sequence to form a first series structure, one end of the first series structure is connected to the first test pad; a plurality of the second test units are connected end to end in sequence to form a second series structure, one end of the second series structure is connected to the second test pad; The first test pad and the second test pad output a first test current in response to a first test signal, and the first test current is used to confirm the relationship between the first series structure and the second series structure.
2. The semiconductor test structure according to claim 1, characterized in that: Semiconductor test structures also include: A first metal wire, used to connect two adjacent first test units; The second metal wire is used to connect two adjacent second test units.
3. The semiconductor test structure according to claim 2, characterized in that: The first metal line and the second metal line are disposed in different layers.
4. The semiconductor test structure according to claim 1, characterized in that: Each test unit includes a plurality of active areas and a plurality of third metal lines. Contact plugs are arranged in the active areas. The third metal line connects two adjacent contact plugs in two adjacent active areas.
5. The semiconductor test structure according to claim 4, characterized in that: Two adjacent test units in the same series structure are connected via the contact plug.
6. The semiconductor test structure according to claim 4, characterized in that: The third metal line in the first test unit and the third metal line in the second test unit are arranged in the same layer.
7. The semiconductor test structure according to any one of claims 4 to 6, characterized in that: The contact plug includes at least one of a shared plug and a normal plug.
8. The semiconductor test structure according to claim 7, characterized in that: Two adjacent test units in the same series structure are connected via a shared plug.
9. The semiconductor test structure according to claim 1, characterized in that: The semiconductor test structure comprises two first test pads and two second test pads, the opposite ends of the first series structure are connected to the first test pads, and the opposite ends of the second series structure are connected to the second test pads; The test pads at two opposite ends of the same series structure output a second test current in response to a second test signal, and the second test current is used to confirm the contact resistance of the corresponding series structure.
10. The semiconductor test structure according to claim 1, characterized in that: Semiconductor test structures also include: The fourth metal wire is used to connect the first test pad and one end of the first series structure, and is also used to connect the second test pad and one end of the second series structure.