Interface protection circuit

Abstract

The utility model discloses an interface protection circuit which comprises a surge protection circuit, an interface (J1) is a five-pin compatible interface on DCE and comprises four signal pins which are respectively a first signal pin connection, a second signal pin connection, a third signal pin connection and a fourth signal pin connection of T + / A, T- / B, R + and R-signals and a fifth pin ground; and the surge protection circuits with the same structure are arranged between any two signal pins of the interface. The surge protection circuit structurally comprises a first bidirectional diode, a second bidirectional diode and a third bidirectional diode; the first bidirectional diode is arranged between one signal pin of the interface and the ground, the third bidirectional diode is arranged between the other signal pin of the interface and the ground, and the second bidirectional diode is arranged between the two signal pins of the interface (J1). According to the utility model, the bidirectional diode is grounded to release electrostatic surge current, so that a good protection effect can be achieved, and the circuit is simple and can meet the requirements of users.

Description

Technical Field

[0001] The utility model relates to the field of communication interfaces, in particular to an interface protection circuit with electrostatic protection. Background Art

[0002] After use and development, the serial communication interface standards have the following types. RS232, RS422 and RS485 are all serial data interface standards, which were originally formulated and issued by the Electronic Industries Association (EIA). RS232 was issued in 1962 and named EIA-232-E as an industrial standard to ensure compatibility between products of different manufacturers. The standard was originally formulated as a remote communication connection between data terminal equipment DTE (Data Terminal Equipment) and data communication equipment DCE (Data Communication Equipment). Therefore, the formulation of this standard did not consider the application requirements of computer systems. However, it is currently widely used as a near-end connection standard between computers and terminals or peripherals. In recent years, with the development of embedded system technology, various intelligent devices and instruments have been widely used.

[0003] like Figure 1 As shown, interface J1 is an interface that is hardware compatible with R232, RS485 and RS422. When the interface is R232, pins 2 and 3 are TX and RX signals respectively, pins 1 and 4 are floating, and pin 5 is grounded; when the interface is RS485, pins A and B signals are pins 1 and 2 respectively, pins 3 and 4 are floating, and pin 5 is still grounded; when the interface is RS422, pins 1, 2, 3, and 4 are T+, T-, R+, and R- respectively, and pin 5 is still grounded.

[0004] like Figure 2As shown in the figure, it is a typical schematic diagram of signal transmission at present. In the Tx_A signal transmission path, it includes a primary signal buffer, a secondary signal buffer, a primary signal inverter and a secondary signal inverter. The primary signal buffer is composed of an operational amplifier U1:A and a resistor R3. The in-phase input terminal of the amplifier is connected to the Tx_A signal, the reverse input terminal is connected to the output terminal through a feedback resistor R3, the power supply terminal is connected to the VccB power supply signal, the ground terminal is connected to the signal ground, and the output signal of the output terminal is Tx_A1. The circuit structure of the secondary signal buffer is the same as that of the primary signal buffer. The difference lies in the different amplification ratio parameters of the amplifier. The power supply terminal of the amplifier U1:B of the secondary signal buffer is connected to VccB, and the ground terminal is connected to the signal ground. The output signal of the secondary signal buffer is Tx_A2, which completes the tracking of the previous signal. It also suppresses glitch signals caused by hot plugging and other factors; the primary signal inverter is composed of a transistor Q3, the base of the transistor Q3 is connected to the output signal Tx_A2 of the secondary buffer through a resistor R5, the emitter of the transistor Q3 is grounded, the collector is connected to the power supply VccB after voltage stabilization through a resistor R6, and a connection tap is set on the connection line between the collector of the transistor Q3 and the resistor R6 as the output end of the primary signal inverter, and the inverted signal Tx_A3 is output; the secondary signal inverter is composed of a transistor Q4, the base of Q4 is connected to the output signal Tx_A3 of the primary signal inverter through a resistor R7, the emitter of Q4 is grounded, the collector is connected to the power supply VccB through a resistor R8, and a connection tap is set on the connection line between the collector and the resistor R8 as the output end of the secondary signal inverter, and the signal Rx_B is output.

[0005] At present, these interfaces are connected by cables, which may generate high voltage due to static electricity or other events, which may damage the communication interface equipment (DCE). Therefore, in many cases, these interface lines (pins) need to be protected from static electricity. Therefore, static electricity protection is performed on the interface in the power supply, such as Figure 3As shown, the power interface module includes a voltage follower circuit and a surge suppression circuit. Specifically, the capacitor C1, the voltage follower circuit and the voltage stabilizing circuit are connected in parallel in sequence according to the current direction. After the three are connected in parallel, one end is connected to the input power supply A, wherein the capacitor C1 is used to filter the external input voltage, and the other end of C1 is grounded; the voltage follower circuit includes a transistor Q1, a voltage stabilizing diode Z1, a resistor R1 and a capacitor C2, wherein the collector of the transistor Q1 is connected in parallel with the resistor R1 and the capacitor C1 and then connected to the power supply A, the base of the transistor Q1 is connected to the negative electrode of the voltage stabilizing diode Z1, the positive electrode of the voltage stabilizing diode Z1 is grounded, the resistor R1 is connected in series with the capacitor C2, the other end of the capacitor C2 is grounded, and the connection line between the resistor R1 and the capacitor C1 is connected to the connection line between the base of the transistor Q1 and the voltage stabilizing diode Z1; the working principle of the voltage follower circuit is: the power supply A charges C2 through R1, because the voltage across the capacitor C2 cannot change suddenly, so at this time the base-emitter voltage of Q1 is less than the conduction voltage of Q1, and Q1 is in the cut-off state; when the two ends of the capacitor When the voltage rises to the base-emitter voltage required for Q1 to turn on, Q1 starts to turn on, and the output voltage after turning on is sent to the voltage stabilizing circuit for voltage stabilization; the voltage stabilizing circuit is implemented by a voltage stabilizing diode Z2, the cathode of the voltage stabilizing diode Z2 is connected to the emitter of the transistor Q1, and the anode of the voltage stabilizing diode Z2 is grounded, and the voltage stabilizing circuit can effectively suppress the surge voltage caused by the hot plug process; the output end of the voltage stabilizing circuit is connected to a surge current suppression circuit, and the specific connection method is: an inductor L1 is connected to the output end of the connecting line between the transistor Q1 and the voltage stabilizing diode Z2, and a capacitor C3 is connected in series at the other end of the inductor L1, and the other end of the capacitor C3 is grounded, and a tap is set on the connecting line between the inductor L1 and the capacitor C3 as the output end of the power supply and outputs the power supply VccA, wherein the inductor L1 performs surge current suppression on the output voltage after surge voltage suppression, and the capacitor C3 filters the voltage signal after current suppression, and finally outputs a stable voltage VccA.

[0006] Such an interface circuit is complex and cannot meet the needs of users. Summary of the invention

[0007] The utility model provides an interface protection circuit to solve the problem that the current communication interface circuit is complex and cannot meet the needs of users.

[0008] The technical solution adopted by the utility model is: an interface protection circuit, including a surge protection circuit, the interface (J1) is a five-pin compatible interface on the DCE, including 4 signal pins, which are respectively connected to the 1st, 2nd, 3rd, and 4th signal pins of T+ / A, T- / B, R+, and R- signals, and the 5th pin is grounded; the surge protection circuit with the same structure is arranged between any two signal pins of the interface. The structure of the surge protection circuit includes a first bidirectional diode, a second bidirectional diode, and a third bidirectional diode;

[0009] The first bidirectional diode is arranged between a signal pin of the interface and the ground, the third bidirectional diode is arranged between another signal pin of the interface and the ground, and the second bidirectional diode is arranged between the two signal pins of the interface (J1).

[0010] Furthermore, in the above-mentioned interface protection circuit: the surge protection circuit structure also includes a self-recovery fuse arranged between the bidirectional diode and the interface and the pin.

[0011] Furthermore, in the above-mentioned interface protection circuit: the specification of the self-resetting fuse is 0.1A60V.

[0012] Furthermore, in the above-mentioned interface protection circuit: the surge protection circuit structure also includes a grounding capacitor between each pin of the interface and the ground.

[0013] Furthermore, in the above-mentioned interface protection circuit: the grounding capacitor has a capacity of 3-8PF.

[0014] Furthermore, in the above interface protection circuit: the output or input signal of the DCE is connected between the resettable fuse and the bidirectional diode.

[0015] Furthermore, in the above interface protection circuit: when the output or input signal of the DCE is connected to the signal pin of the interface (J1), it also includes a level boosting circuit, and the level boosting circuit includes a 3.3V power supply and a current limiting resistor.

[0016] In the utility model, a bidirectional diode is used to ground and release the electrostatic surge current, so that a good protection effect can be achieved, the circuit is simple, and the needs of users can be met.

[0017] The present invention is described in more detail below in conjunction with specific embodiments and accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 This is a schematic diagram of the interface signal allocation on the DCE;

[0019] Figure 2 It is the signal input and output on DCE;

[0020] Figure 3 This is the power supply schematic on the DCE circuit board;

[0021] Figure 4 This is the interface protection circuit of embodiment 1 of the utility model. DETAILED DESCRIPTION

[0022] In order to make the purpose, technical solution and advantages of the utility model more clear, the utility model is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the utility model and are not used to limit the utility model.

[0023] The utility model embodiment 1 discloses a Figure 1 The interface protection circuit on the interface J1 shown in the figure is mainly used to absorb the surge current in the interface. It is an interface protection circuit set on any two interface signal lines (pins), including a surge protection circuit. The interface J1 is as shown in FIG. Figure 1 As shown, it is a five-pin compatible interface on DCE, including 4 signal pins, which are connected to the 1st, 2nd, 3rd, and 4th signal pins of T+ / A, T- / B, R+, and R- signals, and the 5th pin is connected to the ground; two surge protection circuits with the same structure are set between any two signal pins of the interface. The structure of the surge protection circuit includes a first bidirectional diode D4, a second bidirectional diode D5, and a third bidirectional diode D6; that is, three bidirectional diodes, forming a surge protection circuit, the first bidirectional diode D4 is set between a signal pin of the interface and the ground, that is, between the 1st pin of the interface J1 and the ground, the third bidirectional diode D6 is set between another signal pin of the interface and the ground, that is, between the 2nd pin of the interface J1 and the ground, and the second bidirectional diode is set between the two signal pins of the interface J1. In this embodiment, since there are two pairs of signals on the interface J1, namely T+, T-; R+, R-; two pairs, such a surge protection circuit is set on each pair to absorb the uncertain static electricity or other surge current outside the interface into the ground, and also absorb the voltage on the signal lines in a row. A grounded signal line is connected in parallel to each line. Under normal current and voltage conditions, it is not affected. The bidirectional diode is not turned on to isolate it. As long as there is a surge current, the bidirectional diode will introduce the surge current into the ground, and will not affect other devices on the DCE circuit board, so these devices are protected. As for the third bidirectional diode, it is to absorb the surge when the voltage difference on a pair of signal lines is greater than the set value, and short-circuit the two interface signal pins to resolve the surge.

[0024] like Figure 4 As shown, it is a surge protection circuit connected to the 1st and 2nd signal pins of the interface J1. In fact, surge protection circuits with the same structure are also symmetrically set on the 3rd and 4th signal pins.

[0025] In addition, in this embodiment, when the signal pin is connected to the DCE circuit board, a resettable fuse is also used, and the specification of the resettable fuse is 0.1A60V. Figure 4As shown in the figure, each signal pin can use such a resettable fuse when connected to the circuit board to isolate the large current entering the circuit board. In addition, each signal pin can also be grounded through a grounding capacitor when connected to the circuit board to ensure that when there is current flowing in, the charge is absorbed to protect the subsequent circuit board, such as Figure 4 As shown, the grounding capacitance is 3-8PF.

[0026] In practice, when the signal reaches the signal pin, it is introduced between the bidirectional diode and the self-recovery fuse, such as Figure 4 As shown, whether the interface is R232, the 2nd and 3rd pins are TX and RX signals respectively, the 1st and 4th pins are suspended, and the 5th pin is grounded; or RS485, the A and B signals are the 1st and 2nd pins, the 3rd and 4th pins are suspended, and the 5th pin is still grounded; when it is RS422, the 1st, 2nd, 3rd, and 4th pins are T+, T-, R+, and R- respectively. When the signal is introduced to the signal pin, a voltage raising circuit can also be introduced to raise the introduced signal voltage to 3.3V. The 3.3V power supply signal is output through a diode D11 and a current limiting resistor R1, and then connected to the signal pin together with the signal line on the circuit board.

Claims

1. An interface protection circuit, including a surge protection circuit, wherein the interface (J1) is a five-pin compatible interface on a DCE, including four signal pins, which are respectively connected to the 1st, 2nd, 3rd, and 4th signal pins of T+ / A, T- / B, R+, and R- signals, and the 5th pin is connected to the ground; characterized in that: The surge protection circuit with the same structure is arranged between any two signal pins of the interface (J1); the structure of the surge protection circuit includes a first bidirectional diode, a second bidirectional diode, and a third bidirectional diode; The first bidirectional diode is arranged between a signal pin of the interface and the ground, the third bidirectional diode is arranged between another signal pin of the interface and the ground, and the second bidirectional diode is arranged between the two signal pins of the interface (J1).

2. The interface protection circuit according to claim 1, characterized in that: The surge protection circuit structure also includes a self-recovery fuse arranged between the bidirectional diode and the interface (J1) and the pin.

3. The interface protection circuit according to claim 2, characterized in that: The specification of the resettable fuse is 0.1A60V.

4. The interface protection circuit according to claim 1, characterized in that: The surge protection circuit structure also includes a grounding capacitor between each pin of the interface (J1) and the ground.

5. The interface protection circuit according to claim 4, characterized in that: The grounding capacitor has a capacity of 3-8PF.

6. The interface protection circuit according to claim 2, characterized in that: The output or input signal of the DCE is connected between the resettable fuse and the bidirectional diode.

7. The interface protection circuit according to claim 2, characterized in that: When the output or input signal of the DCE is connected to the signal pin of the interface (J1), a level boosting circuit is also included. The level boosting circuit includes a 3.3V power supply and a current limiting resistor.

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