Charge pump circuit, chip and electronic equipment

Abstract

The utility model provides a charge pump circuit, a chip and electronic equipment, and belongs to the technical field of electronics. The charge pump circuit comprises a first charge pump branch and a second charge pump branch, and the first charge pump branch comprises a first switch tube unit used for charging and a second switch tube unit used for providing branch control voltage. The second charge pump branch comprises a third switching tube unit used for charging and a fourth switching tube unit used for providing branch control voltage; the first switch tube unit, the second switch tube unit, the third switch tube unit and the fourth switch tube unit respectively comprise a field effect tube with a deep N well; when the charge pump circuit works, the substrate and the first end of the field effect transistor with the deep N well are in short circuit, and the first end of the field effect transistor with the deep N well is connected with a high-level voltage end. According to the invention, the circuit damage risk can be reduced.

Description

Technical Field

[0001] The present application relates to the field of electronic technology, and in particular to a charge pump circuit, a chip and an electronic device. Background Art

[0002] The charge pump circuit is a common DC voltage conversion circuit, which consists of switches and capacitors. It can convert low voltage into high voltage. Compared with the BOOST DC / DC converter with inductor, it has the advantages of small size, low cost and high power density. The cross-coupled charge pump has a simple structure, clear principle and mature architecture. It is particularly suitable for raising the voltage domain inside the power supply and driving the gate of the power MOS (Metal Oxide Semiconductor) tube at the subsequent stage. It is widely used in PD (Power Delivery) power transmission systems.

[0003] The threshold of the gate-to-substrate voltage of the MOS tube selected in the charge pump circuit is usually 5V. However, in actual applications, the gate-to-substrate voltage of the MOS tube is close to 10V for a long time, far exceeding the withstand voltage requirement of less than 5V, so there is a great risk of damage. Utility Model Content

[0004] In order to solve the problems of the prior art, the embodiments of the present application provide a charge pump circuit, a chip and an electronic device, which can reduce the risk of circuit damage. The technical solution is as follows:

[0005] According to one aspect of the present application, a charge pump circuit is provided, the charge pump circuit comprising a first charge pump branch and a second charge pump branch, the first charge pump branch comprising a first switch tube unit for charging and a second switch tube unit for providing a branch control voltage, the second charge pump branch comprising a third switch tube unit for charging and a fourth switch tube unit for providing a branch control voltage;

[0006] The first switch tube unit, the second switch tube unit, the third switch tube unit and the fourth switch tube unit respectively include a field effect tube with a deep N well;

[0007] When the charge pump circuit is working, the substrate and the first end of the field effect transistor with the deep N well are short-circuited, and the first end of the field effect transistor with the deep N well is connected to the high level voltage end.

[0008] According to another aspect of the present application, a chip is provided, comprising the above-mentioned charge pump circuit.

[0009] According to another aspect of the present application, an electronic device is provided, comprising the above-mentioned charge pump circuit.

[0010] In the present application, when the charge pump circuit is working, the substrate and the first end of the field effect tube with a deep N well in the first switch tube unit, the second switch tube unit, the third switch tube unit, and the fourth switch tube unit are short-circuited. On this basis, the gate-substrate voltage of the tube can be reduced, thereby reducing the risk of damage. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Further details, features and advantages of the present application are disclosed in the following description of exemplary embodiments in conjunction with the accompanying drawings, in which:

[0012] Figure 1 A schematic diagram of a charge pump circuit provided according to an exemplary embodiment of the present application is shown;

[0013] Figure 2 Another charge pump circuit schematic diagram provided according to an exemplary embodiment of the present application is shown;

[0014] Figure 3 A schematic diagram of a first charge pump branch provided according to an exemplary embodiment of the present application is shown;

[0015] Figure 4 Another schematic diagram of a first charge pump branch provided according to an exemplary embodiment of the present application is shown;

[0016] Figure 5 A schematic diagram of a second charge pump branch provided according to an exemplary embodiment of the present application is shown;

[0017] Figure 6 shows another schematic diagram of a second charge pump branch provided according to an exemplary embodiment of the present application;

[0018] Figure 7 A schematic diagram of another charge pump circuit provided according to an exemplary embodiment of the present application is shown. DETAILED DESCRIPTION

[0019] The embodiments of the present application will be described in more detail below with reference to the accompanying drawings. Although certain embodiments of the present application are shown in the accompanying drawings, it should be understood that the present application can be implemented in various forms and should not be construed as being limited to the embodiments described herein. Instead, these embodiments are provided to provide a more thorough and complete understanding of the present application. It should be understood that the drawings and embodiments of the present application are only for exemplary purposes and are not intended to limit the scope of protection of the present application.

[0020] The term "including" and its variations used in this document are open inclusions, that is, "including but not limited to". The term "based on" means "based at least in part on". The term "one embodiment" means "at least one embodiment"; the term "another embodiment" means "at least one other embodiment"; the term "some embodiments" means "at least some embodiments". Relevant definitions of other terms will be given in the description below. It should be noted that the concepts of "first", "second", etc. mentioned in this application are only used to distinguish different devices, modules or units, and are not used to limit the order or interdependence of the functions performed by these devices, modules or units.

[0021] It should be noted that the modifications of "one" and "plurality" mentioned in the present application are illustrative rather than restrictive, and those skilled in the art should understand that unless otherwise clearly indicated in the context, it should be understood as "one or more".

[0022] The names of the messages or information exchanged between multiple devices in the embodiments of the present application are only used for illustrative purposes and are not used to limit the scope of these messages or information.

[0023] An embodiment of the present application provides a charge pump circuit. The protection circuit provided by the embodiment can be integrated in a chip or set in an electronic device.

[0024] like Figure 1 The charge pump circuit schematic diagram shown in the figure may include a first charge pump branch 1 and a second charge pump branch 2. The first charge pump branch 1 may include a first switch tube unit M1 for charging and a second switch tube unit M2 for providing a branch control voltage. The second charge pump branch 2 may include a third switch tube unit M3 for charging and a fourth switch tube unit M4 for providing a branch control voltage.

[0025] The first switch tube unit M1 , the second switch tube unit M2 , the third switch tube unit M3 and the fourth switch tube unit M4 respectively include field effect tubes with deep N-wells.

[0026] When the charge pump circuit is working, the substrate and the first end of the field effect transistor with a deep N well are short-circuited, and the first end of the field effect transistor with a deep N well is connected to the high level voltage end. The field effect transistor with a deep N well may be a PMOS tube or an NMOS tube, and its first end may refer to an input end, that is, a source of the PMOS tube or a drain of the NMOS tube.

[0027] Specifically, the first charge pump branch 1 may further include a first capacitor unit C1, a second capacitor unit C2 and a ninth switch tube unit M9, and the second charge pump branch 2 may further include a third capacitor unit C3, a fourth capacitor unit C4 and a tenth switch tube unit M10.

[0028] like Figure 2 In the schematic diagram of the charge pump circuit shown, the first end of the first switch tube unit M1 is connected to the high-level voltage end, the second end is connected to the first end of the first capacitor unit C1, and the control end is connected to the second end of the third switch tube unit M3; the first end of the second switch tube unit M2 is connected to the high-level voltage end, the second end is connected to the first end of the second capacitor unit C2, and the control end is connected to the second end of the fourth switch tube unit M4; the first end of the ninth switch tube unit M9 is connected to the first end of the first capacitor unit C1, and the second end is connected to the voltage output end of the charge pump circuit; the first end of the third switch tube unit M3 is connected to the high-level voltage end, the second end is connected to the first end of the third capacitor unit C3, and the control end is connected to the second end of the first switch tube unit M1; the first end of the fourth switch tube unit M4 is connected to the high-level voltage end, the second end is connected to the first end of the fourth capacitor unit C4, and the control end is connected to the second end of the third switch tube unit M3; the first end of the tenth switch tube unit M10 is connected to the first end of the third capacitor unit C3, and the second end is connected to the voltage output end of the charge pump circuit.

[0029] The implementation principle is as follows:

[0030] In this embodiment, the first switch tube unit M1, the second switch tube unit M2, the third switch tube unit M3, and the fourth switch tube unit M4 are PMOS tubes, and the ninth switch tube unit M9 and the tenth switch tube unit M10 are NMOS tubes. The voltage connected to the high-level voltage terminal is VIN (for example, 5V), and the output voltage of the voltage output terminal is VOUT (for example, 10V).

[0031] The second end of the first capacitor unit C1 is connected to the first clock signal end, and is used to receive the first clock signal CLK1. The second end of the second capacitor unit C2 is connected to the second clock signal end, and is used to receive the second clock signal CLK2. The second end of the third capacitor unit C3 is connected to the third clock signal end, and is used to receive the third clock signal CLK3. The second end of the fourth capacitor unit C4 is connected to the fourth clock signal end, and is used to receive the fourth clock signal CLK4.

[0032] Among them, CLK1 and CLK2 are in opposite phases, CLK3 and CLK4 are in opposite phases, CLK1 and CLK4 are in the same phase, and CLK2 and CLK3 are in the same phase.

[0033] At the moment when the charge pump circuit is initially powered on, if CLK1 is high (VIN domain), the voltage at the first terminal of the first capacitor unit C1 is charged high to close to VIN. At this time, the third switch tube unit M3 is turned on, so the voltage at the first terminal of the third capacitor unit C3 is precharged to close to VIN (it should be noted that the analysis of this embodiment ignores the source-drain voltage Vds of the tube). At this time, CLK4 is high, the voltage at the first terminal of the fourth capacitor unit C4 is charged high to close to VIN, the second switch tube unit M2 is turned on, and the voltage at the first terminal of the second capacitor unit C2 is precharged to close to VIN. Since the drain voltage and gate voltage of the ninth switch tube unit M9 and the tenth switch tube unit M10 are both VIN (high level) at this time, the ninth switch tube unit M9 and the tenth switch tube unit M10 are both turned off.

[0034] At the next moment, CLK3 is high, and according to the charge conservation, the voltage at the first end of the third capacitor unit C3 is pumped up to 2VIN. Correspondingly, CLK2 is high, the fourth switch tube unit M4 is turned on, and the voltage at the first end of the fourth capacitor unit C4 is precharged to close to VIN. Since the drain voltage of the tenth switch tube unit M10 is 2VIN and the gate voltage is VIN at this time, the tenth switch tube unit M10 is turned on. At the same time, since the source voltage of the first switch tube unit M1 is VIN and the gate voltage is 2VIN at this time, the first switch tube unit M1 is turned on, and the voltage at the first end of the first capacitor unit C1 is precharged to close to VIN. Since the drain voltage of the ninth switch tube unit M9 is VIN and the gate voltage is VIN at this time, the ninth switch tube unit M9 is turned off. That is, the second charge pump branch 2 is turned on, the first charge pump branch 1 is turned off, and the output voltage VOUT at the voltage output end is 2VIN.

[0035] At the next moment, CLK1 is high, and the voltage at the first terminal of the first capacitor unit C1 is pumped up to 2VIN according to the charge conservation. Correspondingly, CLK4 is high, the second switch tube unit M2 is turned on, and the voltage at the first terminal of the second capacitor unit C2 is precharged to close to VIN. Since the drain voltage of the ninth switch tube unit M9 is 2VIN and the gate voltage is VIN at this time, the ninth switch tube unit M9 is turned on. At the same time, since the source voltage of the third switch tube unit M3 is VIN and the gate voltage is 2VIN at this time, the third switch tube unit M3 is turned on, and the voltage at the first terminal of the third capacitor unit C3 is precharged to close to VIN. Since the drain voltage of the tenth switch tube unit M10 is VIN and the gate voltage is VIN at this time, the tenth switch tube unit M10 is turned off. That is, the first charge pump branch 1 is turned on, the second charge pump branch 2 is turned off, and the output voltage VOUT at the voltage output end is 2VIN.

[0036] In this way, the charge pump circuit can stably output an output voltage of 2VIN.

[0037] At the same time, in the working process of the charge pump circuit described above, the substrate and the first end of the field effect tube with deep N well in the first switch tube unit M1, the second switch tube unit M2, the third switch tube unit M3, and the fourth switch tube unit M4 are short-circuited, that is, the substrate-source short-circuited. On this basis, the gate-substrate voltage of the tube can be reduced. For example, in the application scenario where VIN is 5V and VOUT is 10V, the gate-substrate voltage of the tube can be made less than or equal to 5V, meeting the withstand voltage requirements, thereby reducing the risk of damage.

[0038] Optional, such as Figure 3 As shown in the schematic diagram of the first charge pump branch, the first charge pump branch 1 may also include a fifth switch tube unit M5, a first end of the fifth switch tube unit M5 is connected to the first end of the field effect tube with a deep N well in the first switch tube unit M1, and a second end of the fifth switch tube unit M5 is connected to the substrate of the field effect tube with a deep N well in the first switch tube unit M1.

[0039] The implementation principle is as follows:

[0040] When the charge pump circuit is working, the fifth switch tube unit M5 can be controlled to be turned on, so as to short-circuit the substrate source of the field effect tube with the deep N well in the first switch tube unit M1.

[0041] In a possible implementation, the fifth switch tube unit M5 may include an NMOS tube, whose source is connected to the substrate of the field effect tube with a deep N well in the first switch tube unit M1, whose drain is connected to the source of the field effect tube with a deep N well in the first switch tube unit M1, and whose gate may receive an inverted signal of an enable signal of a charge pump circuit. When the charge pump circuit is working, the enable signal is at a high level, and the gate voltage of the fifth switch tube unit M5 is at a low level, and the fifth switch tube unit M5 is turned on.

[0042] In another possible implementation, the fifth switch tube unit M5 may include a PMOS tube, whose drain is connected to the substrate of the field effect tube with a deep N well in the first switch tube unit M1, the source is connected to the source of the field effect tube with a deep N well in the first switch tube unit M1, and the gate may receive the in-phase signal of the enable signal of the charge pump circuit. When the charge pump circuit is working, the enable signal is at a high level, then the gate voltage of the fifth switch tube unit M5 is also at a high level, and the fifth switch tube unit M5 is turned on.

[0043] Optionally, the fifth switch tube unit M5 includes a field effect tube with a deep N well. Of course, the fifth switch tube unit M5 may also include other types of switch tubes to meet the requirement of being turned on when the charge pump circuit is working, and the substrate source of the field effect tube with a deep N well in the first switch tube unit M1 can be short-circuited.

[0044] Optional, such as Figure 4As shown in the schematic diagram of the first charge pump branch, the first charge pump branch 1 may further include a sixth switch tube unit M6, a first end of the sixth switch tube unit M6 is connected to the substrate of the field effect transistor with a deep N well in the first switch tube unit M1, and a second end of the sixth switch tube unit M6 is grounded.

[0045] The implementation principle is as follows:

[0046] When the charge pump circuit is not working, if the voltage VIN connected to the high-level voltage terminal is high, due to the existence of the parasitic PN junction of the tube, there is leakage in the first charge pump branch 1, forming a leakage path from the high-level voltage terminal through the first switch tube unit M1 and the ninth switch tube unit M9 to the voltage output terminal, thereby causing abnormal circuit power consumption.

[0047] To solve this problem, the sixth switch tube unit M6 is provided in this embodiment. When the charge pump circuit is not working, the sixth switch tube unit M6 can be controlled to be turned on, so as to ground the substrate of the field effect tube with deep N well in the first switch tube unit M1 to prevent circuit leakage.

[0048] In a possible implementation, the sixth switch tube unit M6 may include an NMOS tube, whose drain is connected to the substrate of the field effect tube with a deep N well in the first switch tube unit M1, the source is grounded, and the gate can receive the same phase signal of the enable signal of the charge pump circuit. When the charge pump circuit is not working, the enable signal is at a low level, and the gate voltage of the sixth switch tube unit M6 is also at a low level, and the sixth switch tube unit M6 is turned on.

[0049] In another possible implementation, the sixth switch tube unit M6 may include a PMOS tube, whose source is connected to the substrate of the field effect tube with a deep N well in the first switch tube unit M1, the drain is grounded, and the gate may receive an inverted signal of an enable signal of the charge pump circuit. When the charge pump circuit is not working, the enable signal is at a low level, and the gate voltage of the sixth switch tube unit M6 is at a high level, and the sixth switch tube unit M6 is turned on.

[0050] Optionally, the sixth switch tube unit M6 includes a field effect tube with a deep N well. Of course, the sixth switch tube unit M6 may also include other types of switch tubes to meet the requirement of being turned on when the charge pump circuit is not working, and the substrate of the field effect tube with a deep N well in the first switch tube unit M1 may be grounded.

[0051] In the case where the first charge pump branch 1 includes both the fifth switch tube unit M5 and the sixth switch tube unit M6, that is, the fifth switch tube unit M5 and the sixth switch tube unit M6 are simultaneously used to perform substrate switching on the first switch tube unit M1, the substrate source is short-circuited when the charge pump circuit is working, and the substrate is grounded when the charge pump circuit is not working, thereby realizing the functions of leakage prevention and high voltage resistance at the same time.

[0052] The implementation principle of the second charge pump branch 2 is the same as that of the first charge pump branch 1 , which will not be described in detail below.

[0053] Optional, such as Figure 5 As shown in the schematic diagram of the second charge pump branch, the second charge pump branch 2 may also include a seventh switch tube unit M7, a first end of the seventh switch tube unit M7 is connected to the first end of the field effect tube with a deep N well in the third switch tube unit M3, and a second end of the seventh switch tube unit M7 is connected to the substrate of the field effect tube with a deep N well in the third switch tube unit M3.

[0054] Optionally, the seventh switch tube unit M7 may include a field effect tube with a deep N well. Of course, the seventh switch tube unit M7 may also include other types of switch tubes to meet the requirement of being turned on when the charge pump circuit is working, and the substrate source of the field effect tube with a deep N well in the third switch tube unit M3 can be short-circuited.

[0055] Optional, such as Figure 6 As shown in the schematic diagram of the second charge pump branch, the second charge pump branch 2 may further include an eighth switch tube unit M8, a first end of the eighth switch tube unit M8 is connected to the substrate of the field effect transistor with a deep N well in the third switch tube unit M3, and a second end of the eighth switch tube unit M8 is grounded.

[0056] Optionally, the eighth switch tube unit M8 includes a field effect tube with a deep N well. Of course, the eighth switch tube unit M8 may also include other types of switch tubes to meet the requirement of being turned on when the charge pump circuit is not working, and the substrate of the field effect tube with a deep N well in the third switch tube unit M3 may be grounded.

[0057] For the second switch tube unit M2 and the fourth switch tube unit M4, since there is a capacitor barrier on the path or they are connected to the gate of the MOS tube, there is no leakage path, and substrate switching may not be performed for area considerations.

[0058] Optional, such as Figure 7 As shown in the schematic diagram of the charge pump circuit, the charge pump circuit may further include an eleventh switch tube unit M11, wherein a first end of the eleventh switch tube unit M11 is connected to a voltage output end of the charge pump circuit, and a second end is grounded.

[0059] The implementation principle is as follows:

[0060] When the charge pump circuit is not working, in order to ensure that the output voltage is 0, the voltage output terminal of the charge pump circuit can be connected to the ground through the eleventh switch tube unit M11.

[0061] In a possible implementation, the eleventh switch tube unit M11 may include a PMOS tube, whose source is connected to the voltage output terminal, the drain is grounded, and the gate can receive the inverted signal of the enable signal of the charge pump circuit. When the charge pump circuit is not working, the enable signal is at a low level, then the gate voltage of the eleventh switch tube unit M11 is at a high level, and the eleventh switch tube unit M11 is turned on.

[0062] In another possible implementation, the eleventh switch tube unit M11 may include an NMOS tube, whose drain is connected to the voltage output terminal, the source is grounded, and the gate can receive the same phase signal of the enable signal of the charge pump circuit. When the charge pump circuit is not working, the enable signal is at a low level, and the gate voltage of the eleventh switch tube unit M11 is also at a low level, and the eleventh switch tube unit M11 is turned on.

[0063] Optionally, the eleventh switch tube unit M11 may include a lateral diffused metal oxide semiconductor LDMOS tube. In some application scenarios, the output voltage of the charge pump circuit is relatively high, such as 10V, so a high-voltage resistant LDMOS tube may be used to prevent the tube from being broken down.

[0064] The embodiments of the present application can achieve the following beneficial effects:

[0065] (1) When the charge pump circuit is working, the substrate and the first end of the field effect transistor with a deep N well in the first switch tube unit, the second switch tube unit, the third switch tube unit, and the fourth switch tube unit are short-circuited. On this basis, the gate-substrate voltage of the tube can be reduced, thereby reducing the risk of damage.

[0066] (2) The substrate is switched by the fifth switch tube unit, the sixth switch tube unit, the seventh switch tube unit, and the eighth switch tube unit. When the charge pump circuit is working, the substrate source is short-circuited, and when the charge pump circuit is not working, the substrate is grounded, thereby realizing the functions of preventing leakage and withstanding high voltage at the same time.

[0067] The exemplary embodiment of the present application also provides a chip, including the charge pump circuit provided in the embodiment of the present application. When the charge pump circuit provided in the embodiment is working, the substrate and the first end of the field effect tube with a deep N well in the first switch tube unit, the second switch tube unit, the third switch tube unit, and the fourth switch tube unit are short-circuited. On this basis, the gate-substrate voltage of the tube can be reduced, thereby reducing the risk of damage to the chip circuit.

[0068] The exemplary embodiment of the present application also provides an electronic device, including the charge pump circuit provided by the embodiment of the present application. When the charge pump circuit provided by the embodiment is working, the substrate and the first end of the field effect tube with a deep N well in the first switch tube unit, the second switch tube unit, the third switch tube unit, and the fourth switch tube unit are short-circuited. On this basis, the gate-substrate voltage of the tube can be reduced, thereby reducing the risk of damage to the electronic device circuit.

Claims

1. A charge pump circuit, characterized in that: The charge pump circuit comprises a first charge pump branch and a second charge pump branch, wherein the first charge pump branch comprises a first switch tube unit for charging and a second switch tube unit for providing a branch control voltage, and the second charge pump branch comprises a third switch tube unit for charging and a fourth switch tube unit for providing a branch control voltage; The first switch tube unit, the second switch tube unit, the third switch tube unit and the fourth switch tube unit respectively include a field effect tube with a deep N well; When the charge pump circuit is working, the substrate and the first end of the field effect transistor with the deep N well are short-circuited, and the first end of the field effect transistor with the deep N well is connected to the high level voltage end.

2. The charge pump circuit according to claim 1, characterized in that: The first charge pump branch also includes a fifth switch tube unit, a first end of the fifth switch tube unit is connected to the first end of the field effect tube with a deep N well in the first switch tube unit, and a second end of the fifth switch tube unit is connected to the substrate of the field effect tube with a deep N well in the first switch tube unit.

3. The charge pump circuit according to claim 2, characterized in that: The fifth switch tube unit includes a field effect tube with a deep N-well.

4. The charge pump circuit according to claim 1, characterized in that: The first charge pump branch further includes a sixth switch tube unit, a first end of the sixth switch tube unit is connected to the substrate of the field effect tube with the deep N well in the first switch tube unit, and a second end of the sixth switch tube unit is grounded.

5. The charge pump circuit according to claim 4, characterized in that: The sixth switch tube unit includes a field effect tube with a deep N-well.

6. The charge pump circuit according to claim 1, characterized in that: The second charge pump branch also includes a seventh switch tube unit, a first end of the seventh switch tube unit is connected to the first end of the field effect tube with a deep N well in the third switch tube unit, and a second end of the seventh switch tube unit is connected to the substrate of the field effect tube with a deep N well in the third switch tube unit.

7. The charge pump circuit according to claim 6, characterized in that: The seventh switch tube unit includes a field effect tube with a deep N-well.

8. The charge pump circuit according to claim 1, characterized in that: The second charge pump branch further includes an eighth switch tube unit, a first end of the eighth switch tube unit is connected to the substrate of the field effect tube with a deep N-well in the third switch tube unit, and a second end of the eighth switch tube unit is grounded.

9. The charge pump circuit according to claim 8, characterized in that: The eighth switch tube unit includes a field effect tube with a deep N-well.

10. The charge pump circuit according to claim 1, characterized in that: The first charge pump branch further includes a first capacitor unit, a second capacitor unit and a ninth switch tube unit, and the second charge pump branch further includes a third capacitor unit, a fourth capacitor unit and a tenth switch tube unit; The first end of the first switch tube unit is connected to the high level voltage end, the second end is connected to the first end of the first capacitor unit, and the control end is connected to the second end of the third switch tube unit; The first end of the second switch tube unit is connected to the high level voltage end, the second end is connected to the first end of the second capacitor unit, and the control end is connected to the second end of the fourth switch tube unit; The first end of the ninth switch tube unit is connected to the first end of the first capacitor unit, and the second end is connected to the voltage output end of the charge pump circuit; The first end of the third switch tube unit is connected to the high level voltage end, the second end is connected to the first end of the third capacitor unit, and the control end is connected to the second end of the first switch tube unit; The first end of the fourth switch tube unit is connected to the high level voltage end, the second end is connected to the first end of the fourth capacitor unit, and the control end is connected to the second end of the third switch tube unit; The first end of the tenth switch tube unit is connected to the first end of the third capacitor unit, and the second end is connected to the voltage output end of the charge pump circuit.

11. The charge pump circuit according to claim 1, characterized in that: The charge pump circuit also includes an eleventh switch tube unit; The first end of the eleventh switch tube unit is connected to the voltage output end of the charge pump circuit, and the second end is grounded.

12. The charge pump circuit according to claim 11, characterized in that: The eleventh switch tube unit includes a lateral diffused metal oxide semiconductor LDMOS tube.

13. A chip, characterized in that: The invention comprises a charge pump circuit as claimed in any one of claims 1 to 12.

14. An electronic device, characterized in that: The invention comprises a charge pump circuit as claimed in any one of claims 1 to 12.

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