Display substrate and display device

Abstract

The utility model provides a display substrate and a display device. The display substrate comprises a back plate, a pixel area, a packaging layer and a metal grid layer which are sequentially arranged in a stacked mode in the first direction. The pixel region comprises a pixel definition layer and a light-emitting device, the pixel definition layer comprises a pixel opening, at least part of the light-emitting device is located in the pixel opening, the light-emitting device comprises an anode layer, a plurality of light-emitting layers and a cathode layer which are sequentially stacked in the first direction, and a charge generation layer is arranged between every two adjacent light-emitting layers in the light-emitting layers; the metal grid layer is electrically connected with the cathode layer through the first via hole of the packaging layer; the backboard comprises a compensation circuit, the metal grid layer is electrically connected with the compensation circuit, and the compensation circuit is used for conducting voltage compensation on the cathode layer. According to the technical scheme, the problems of color cast and uneven light emission of the display device can be effectively solved.

Description

Technical Field

[0001] The present application relates to the technical field of display equipment, and more specifically, to a display substrate and a display device. Background Art

[0002] Compared with the traditional active-matrix organic light-emitting diode (AMLOED) display technology, silicon-based organic light-emitting diode (OLED) microdisplay uses single-crystal silicon chips as the substrate and uses mature complementary metal oxide semiconductor (CMOS) technology to make its pixel size smaller and more integrated. It can be made into near-eye display products comparable to large-screen displays and has attracted widespread attention. Based on its technical advantages and broad market, silicon-based OLED microdisplay will set off a new wave of near-eye display in the military and consumer electronics fields, bringing users an unprecedented visual experience.

[0003] Most of the existing high-pixel-density silicon-based OLED full-color products use the technology of combining white light OLED with color filters, and the device structure used is generally a two-layer or single-layer OLED silicon-based micro-display device. Both single-layer OLED silicon-based micro-display devices and two-layer OLED silicon-based micro-display devices face serious electrical crosstalk problems, especially two-layer OLED silicon-based micro-display devices, because there is a charge generation layer between the light-emitting layers, the electrical crosstalk is more serious. The existence of electrical crosstalk will seriously affect the contrast and color purity of the product and other optical parameters.

[0004] The existing technology uses a pixel definition layer to isolate the charge generation layer of the stacked OLED, thereby improving the electrical crosstalk problem of the silicon-based OLED device. However, this technology will cause leakage problems of the light-emitting device in the pixel area on the pixel definition layer side, resulting in color deviation and uneven light emission in the display device in the low grayscale range. Utility Model Content

[0005] In view of the above problems, the embodiments of the present application provide a display substrate and a display device, which can effectively improve the problems of color cast and uneven light emission of the display device.

[0006] In a first aspect, a display substrate is provided, comprising a backplane, a pixel area, an encapsulation layer and a metal grid layer which are sequentially stacked along a first direction; the pixel area comprises a pixel definition layer and a light-emitting device, the pixel definition layer comprises a pixel opening, the light-emitting device is at least partially located in the pixel opening, the light-emitting device comprises an anode layer, a plurality of light-emitting layers and a cathode layer which are sequentially stacked along the first direction, a charge generating layer is arranged between two adjacent light-emitting layers in the plurality of light-emitting layers, the metal grid layer is electrically connected to the cathode layer through a first via hole in the encapsulation layer; the backplane comprises a compensation circuit, the metal grid layer is electrically connected to the compensation circuit, and the compensation circuit is used to perform voltage compensation on the cathode layer.

[0007] In combination with the first aspect, in certain implementations of the first aspect, the metal grid layer includes multiple main tree lines, the main tree lines extend along the second direction, each main tree line is connected to multiple first branch lines, the first branch lines extend along a third direction, the second direction is perpendicular to the first direction, and the third direction is perpendicular to the first direction and the second direction.

[0008] In combination with the first aspect, in some implementations of the first aspect, the backplane includes multiple compensation circuits, and each main tree line is connected to a corresponding compensation circuit.

[0009] In combination with the first aspect, in some implementations of the first aspect, an orthographic projection of the first branch line on the backplane does not overlap with an orthographic projection of the pixel opening on the backplane.

[0010] In combination with the first aspect, in some implementations of the first aspect, the plurality of first branch lines are arranged at equal intervals along the second direction.

[0011] In combination with the first aspect, in some implementations of the first aspect, the first branch line is electrically connected to the cathode layer through a first via hole of the packaging layer, and an end of the main branch line in the second direction is electrically connected to the compensation circuit.

[0012] In combination with the first aspect, in certain implementations of the first aspect, the display substrate includes a display area and a non-display area surrounding the display area, the first branch line is electrically connected to the cathode layer in the display area, and the main branch line is electrically connected to the compensation circuit in the non-display area.

[0013] In combination with the first aspect, in certain implementations of the first aspect, the non-display area is provided with a second via extending along the first direction, the second via extends from the metal grid layer to the backplane, and the main tree line is electrically connected to the compensation circuit through the second via.

[0014] In combination with the first aspect, in certain implementations of the first aspect, the pixel area includes multiple sub-pixel areas, a gap is provided between two adjacent sub-pixel areas in the multiple sub-pixel areas, and the main tree line and / or the first branch line are arranged in the gap; the multiple sub-pixel areas include multiple R sub-pixel areas, multiple G sub-pixel areas and multiple B sub-pixel areas, and in the second direction and / or the third direction, the distance between the main tree line and / or the first branch line and the R sub-pixel area and the distance between the main tree line and / or the first branch line and the G sub-pixel area are respectively smaller than the distance between the main tree line and / or the first branch line and the B sub-pixel area.

[0015] In combination with the first aspect, in certain implementations of the first aspect, in the second direction and / or the third direction, the distance between the first via hole and the R sub-pixel region and the distance between the first via hole and the G sub-pixel region are respectively smaller than the distance between the first via hole and the B sub-pixel region.

[0016] In combination with the first aspect, in certain implementations of the first aspect, in the second direction, two first branch lines are arranged between two adjacent B sub-pixel regions, the two first branch lines are electrically connected through a second branch line, and the second branch line extends along the second direction.

[0017] In combination with the first aspect, in certain implementations of the first aspect, the grayscale interval of the display substrate includes a first grayscale interval and a second grayscale interval, wherein the grayscale value of the first grayscale interval is less than the grayscale value of the second grayscale interval, and the voltage compensation value of the compensation circuit for the cathode layer in the first grayscale interval is greater than the voltage compensation value of the compensation circuit for the cathode layer in the second grayscale interval.

[0018] In combination with the first aspect, in certain implementations of the first aspect, in the first gray scale interval, the voltage compensation value of the cathode layer by the compensation circuit ranges from 0.2V to 0.4V.

[0019] In a second aspect, a display device is provided, comprising a display substrate according to any possible implementation of the first aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 is a schematic structural diagram of a display substrate disclosed in the prior art;

[0021] Figure 2 is a schematic structural diagram of a display substrate disclosed in one embodiment of the present application;

[0022] Figure 3 is a schematic structural diagram of a display substrate disclosed in one embodiment of the present application;

[0023] Figure 4 is a schematic structural diagram of a display substrate disclosed in one embodiment of the present application;

[0024] Figure 5 It is a schematic structural diagram of a display substrate disclosed in one embodiment of the present application. DETAILED DESCRIPTION

[0025] The technical solutions in the embodiments of the present application will be described below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments.

[0026] The technical solution in the embodiment of the present application will be described below in conjunction with the drawings in the embodiment of the present application. In the description of the embodiment of the present application, unless otherwise specified, " / " means or, for example, A / B can mean A or B; "and / or" in this article is only a description of the association relationship of associated objects, indicating that there can be three relationships, for example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone.

[0027] In the following, the terms "first" and "second" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In addition, in the description of this embodiment, unless otherwise specified, "plurality" means two or more.

[0028] References to "one embodiment" or "some embodiments" etc. described in the embodiments of the present application mean that one or more embodiments of the present application include specific features, structures or characteristics described in conjunction with the embodiment. Therefore, the statements "in one embodiment", "in some embodiments", "in some other embodiments", "in some other embodiments", etc. that appear in different places in this specification do not necessarily refer to the same embodiment, but mean "one or more but not all embodiments", unless otherwise specifically emphasized in other ways. The terms "including", "comprising", "having" and their variations all mean "including but not limited to", unless otherwise specifically emphasized in other ways.

[0029] Compared with traditional AMLOED display technology, silicon-based OLED microdisplay uses single-crystal silicon chips as the substrate and uses mature complementary metal oxide semiconductor (CMOS) technology to make its pixel size smaller and more integrated. It can be made into near-eye display products comparable to large-screen displays and has attracted widespread attention. Based on its technical advantages and broad market, silicon-based OLED microdisplay will set off a new wave of near-eye display in the military and consumer electronics fields, bringing users an unprecedented visual experience.

[0030] Most of the existing high-pixel-density silicon-based OLED full-color products use the technology of combining white light OLED with color filters, and the device structure used is generally a two-layer or single-layer OLED silicon-based micro-display device. Both single-layer OLED silicon-based micro-display devices and two-layer OLED silicon-based micro-display devices face serious electrical crosstalk problems, especially two-layer OLED silicon-based micro-display devices, because there is a charge generation layer between the light-emitting layers, the electrical crosstalk is more serious. The existence of electrical crosstalk will seriously affect the contrast and color purity of the product and other optical parameters.

[0031] The existing technology uses a pixel definition layer to isolate the charge generation layer of the stacked OLED, thereby improving the electrical crosstalk problem of the silicon-based OLED device. However, this technology will cause leakage problems of the light-emitting device in the pixel area on the pixel definition layer side, resulting in color deviation and uneven light emission in the display device in the low grayscale range.

[0032] For example, see Figure 1 , the pixel definition layer 15 is provided with a partition structure 151. Due to the existence of the partition structure 151, the charge generation layer 124 is broken at the end of the partition structure 151, thereby forming a laterally discontinuous charge generation layer 124, which solves the lateral color crosstalk problem of the silicon-based OLED display device. However, due to the existence of the partition structure 151, an evaporation shadow will be generated on the inner side of the pixel definition layer 15, resulting in a leakage problem in the light-emitting device 12 in the pixel opening. This leakage problem will cause the B pixel in the low grayscale range (lighting up to 10 grayscales) to light up early, lowering the color scale of the R / G pixel. As the voltage decreases, the R / G pixel at the low grayscale gradually weakens, and the color point tends to move negatively, ultimately causing the display device to have a serious color deviation in the low grayscale range.

[0033] In view of this, an embodiment of the present application provides a display substrate and a display device. Specifically, the display substrate includes a backplane, a light-emitting device, a packaging layer, and a metal grid layer stacked in sequence along a first direction. A compensation circuit is provided in the backplane, and the compensation circuit is electrically connected to the metal grid layer. At the same time, the metal grid layer is electrically connected to the cathode layer of the light-emitting device through the first via hole of the packaging layer, thereby realizing the electrical connection between the compensation circuit and the cathode layer, and the compensation circuit is used to perform voltage compensation on the cathode layer. After the compensation circuit performs voltage compensation on the cathode layer, the lighting efficiency of the R / G pixels can be appropriately improved, and the offset difference between the R / G pixels and the B pixels can be reduced, thereby effectively improving the color deviation and uneven light emission problems of the display device.

[0034] The embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0035] Figure 2 and Figure 3 This is a schematic structural diagram of a display substrate provided in an embodiment of the present application. Figure 2It is only a partial schematic structural diagram of the display area 20 of the display substrate 10. Figure 3 2 is a partial schematic structural diagram of a display substrate 10 including a display area 20 and a non-display area 30 .

[0036] like Figure 2 As shown, the display substrate 10 includes a backplane 11, a pixel area, a packaging layer 13 and a metal mesh layer 14 which are sequentially stacked along a first direction.

[0037] In the embodiment of the present application, the first direction refers to the thickness direction of the display substrate 10, for example, Figure 2 As for the x direction shown in the figure, it should be understood that the x direction is only an exemplary description of the first direction and does not constitute a limitation on the first direction of the present application. For the convenience of description, the first direction is described as the x direction below.

[0038] Specifically, Figure 2 As shown, the pixel area includes a pixel definition layer 15 and a light-emitting device 12. The pixel definition layer 15 includes a pixel opening, and the light-emitting device 12 is at least partially located in the pixel opening. The light-emitting device 12 includes an anode layer 121, a plurality of light-emitting layers 122, and a cathode layer 123 stacked in sequence along the x direction. A charge generation layer 124 is arranged between two adjacent light-emitting layers 122 in the plurality of light-emitting layers 122. For example, along the x direction, the R pixel light-emitting layer 122, the G pixel light-emitting layer 122, the charge generation layer 124, and the B pixel light-emitting layer 122 are stacked in sequence. It should be noted that, since the energy level difference between red light and green light is small, the energy levels of the two can match each other, so the charge generation layer 124 may not be arranged between the R pixel light-emitting layer 122 and the G pixel light-emitting layer 122; and the energy level of blue light is large, and the energy level difference between red light and green light is large, so the charge generation layer 124 needs to be arranged between the G pixel light-emitting layer 122 and the B pixel light-emitting layer 122.

[0039] The metal grid layer 14 is electrically connected to the cathode layer 123 through the first via hole 131 of the encapsulation layer 13. Figure 3 The back plate 11 includes a compensation circuit 111 , the metal grid layer 14 is electrically connected to the compensation circuit 111 , and the compensation circuit 111 is used to perform voltage compensation on the cathode layer 123 .

[0040] The charge generation layer 124 is used to generate carriers, transport carriers and inject carriers to the light-emitting layers 122 on both sides. The charge generation layer 124 is usually composed of an organic material with a high carrier transport rate and doped with an active metal (usually metal Li). Under the action of an electric field, the charge generation layer 124 undergoes charge separation, with electrons being transported to the electron transport layer and holes being transported to the hole transport layer (usually a p-type organic material). The separation of electrons and holes provides nearly double the amount of carriers for the light-emitting layer 122, achieving a luminous efficiency several times that of a single-layer white light OLED device at the same current density.

[0041] The encapsulation layer 13 may be a SiON, SiN, SiO multilayer encapsulation structure prepared by atomic layer deposition or plasma enhanced chemical vapor deposition process.

[0042] In the embodiment of the present application, the light-emitting layer 122 can be a white light-emitting device. In order to achieve color display of pixels, the light-emitting areas can be distinguished based on the display colors. By setting color filters of different colors, each light-emitting area can emit light of different colors.

[0043] In the embodiment of the present application, a compensation circuit 111 is provided in the back panel 11, and the compensation circuit 111 is electrically connected to the cathode layer 123 of the light-emitting device 12 through the metal grid layer 14 on the packaging layer 13, so that the compensation circuit 111 can perform voltage compensation for the cathode layer 123, and appropriately increase the voltage of the cathode layer 123, thereby improving the lighting efficiency of the R / G pixels, so as to reduce the offset difference between the R / G pixels and the B pixels at low grayscale, thereby effectively improving the color deviation and uneven light emission problems of the display device.

[0044] In the embodiment of the present application, the metal grid layer 14 is disposed in the display area 20 and extends to the non-display area 30. The non-display area 30 is electrically connected to the compensation circuit 111 in the backplane 11. Figures 2 to 4 The structure of the metal mesh layer 14 of the display substrate 10 provided in the embodiment of the present application is described in detail.

[0045] refer to Figure 4 The metal grid layer 14 includes a plurality of main branch lines 141 , and each main branch line 141 is connected to a plurality of first branch lines 142 .

[0046] Specifically, the main tree line 141 extends along the second direction, and the first branch line 142 extends along the third direction. The second direction is perpendicular to the x direction, and the third direction is perpendicular to the x direction and the second direction.

[0047] In some embodiments, the main tree line 141 may also extend along a third direction, and the first branch line 142 may extend along a second direction.

[0048] For example, Figures 2 to 4 As shown, the second direction is the y direction, such as Figure 4 As shown, the third direction is the z direction. It should be understood that the y direction is only an exemplary description of the second direction, and the z direction is only an exemplary description of the third direction, and does not constitute a limitation on the second direction and the third direction of the present application. For the convenience of description, the second direction is the y direction and the third direction is the z direction.

[0049] In the embodiment of the present application, the structure of the metal grid layer 14 is designed to extend the main tree line 141 along the y (z) direction and a plurality of first branch lines 142 connected to the main tree line 141 and extending along the z (y) direction, thereby dividing the display area 20 into a plurality of areas. Figure 4 The structural design of the metal grid layer 14 divides the display area 20 into four areas (divided by the dotted line L) and adjusts the values ​​of the compensation voltages of different areas according to the leakage conditions of the light-emitting devices 12 in different areas, thereby flexibly adjusting the voltages of the cathode layers 123 of the light-emitting devices 12 in different areas. In the embodiment of the present application, the value of the voltage compensation that can be obtained by the cathode layer 123 of a certain area can be controlled by controlling the number of compensation circuits 111 connected to the certain area.

[0050] In the embodiment of the present application, a plurality of compensation circuits 111 are provided in the backplane 11 , and each main tree line 141 is connected to a corresponding compensation circuit 111 , so that the connections of the compensation circuits 111 between different main tree lines 141 will not affect each other.

[0051] In some embodiments, Figure 2 As shown, the first branch line 142 is electrically connected to the cathode layer 123 through the first via hole 131 , that is, the first branch line 142 is electrically connected to the cathode layer 123 in the display area 20 .

[0052] In some embodiments, the non-display area 30 is provided with a second via extending along the x direction, the second via extending from the metal grid layer 14 to the backplane 11 , and the main tree line 141 is electrically connected to the compensation circuit 111 through the second via.

[0053] For example, Figure 3 As shown, in the non-display area 30 , there is only the encapsulation layer 13 between the main tree line 141 and the cathode layer 123 , so a second via 132 is set on the encapsulation layer 13 , and the main tree line 141 is electrically connected to the compensation circuit 111 in the backplane 11 through the second via 132 .

[0054] In some embodiments, Figure 2 As shown, the orthographic projection of the first branch line 142 on the back plate 11 does not overlap with the orthographic projection of the pixel opening on the back plate 11 .

[0055] It should be noted that, in the embodiment of the present application, the pixel opening of the pixel definition layer 15 is an opening that penetrates the pixel definition layer 15 in the x-direction, that is, the setting of the pixel opening makes the pixel definition layer 15 discontinuous in the y-direction.

[0056] In the embodiment of the present application, the orthographic projection of the first branch line 142 on the back plate 11 does not overlap with the orthographic projection of the pixel opening on the back plate 11 , that is, the first branch line 142 is designed around the outside of the pixel opening.

[0057] In some embodiments, when the main tree line 141 extends along the y direction, the plurality of first branch lines 142 are arranged at equal intervals along the y direction.

[0058] In some embodiments, when the main tree line 141 extends along the z-direction, the plurality of first branch lines 142 are arranged at equal intervals along the z-direction.

[0059] In some embodiments, Figure 5 As shown, the pixel area includes a plurality of sub-pixel areas 17, a gap is provided between two adjacent sub-pixel areas in the plurality of sub-pixel areas, and the main tree line 141 and / or the first branch line 142 are arranged in the gap.

[0060] In some embodiments, the plurality of sub-pixel regions 17 include a plurality of R sub-pixel regions 171, a plurality of G sub-pixel regions 172, and a plurality of B sub-pixel regions 173. In the y direction and / or the z direction, the distance between the main tree line 141 and / or the first branch line 142 and the R sub-pixel region 171 and the distance between the main tree line 141 and / or the first branch line 142 and the G sub-pixel region 172 are respectively smaller than the distance between the main tree line 141 and / or the first branch line 142 and the B sub-pixel region 173. The efficiency of the R / G pixel due to leakage loss at low grayscale can be further improved.

[0061] That is to say, the distance between the orthographic projection of the main tree line 141 and / or the first branch line 142 on the back panel 11 and the orthographic projection of the R sub-pixel area 171 on the back panel 11, and the distance between the orthographic projection of the main tree line 141 and / or the first branch line 142 on the back panel 11 and the orthographic projection of the G sub-pixel area 172 on the back panel 11 are respectively smaller than the distance between the orthographic projection of the main tree line 141 and / or the first branch line 142 on the back panel 11 and the orthographic projection of the B sub-pixel area 173 on the back panel 11.

[0062] In some embodiments, Figure 2 As shown, in the y direction, the distance between the first via hole 131 and the R sub-pixel region 171 and the distance between the first via hole 131 and the G sub-pixel region 172 are respectively smaller than the distance between the first via hole 131 and the B sub-pixel region 173 .

[0063] In some embodiments, in the z direction, the distance between the first via hole 131 and the R sub-pixel region 171 and the distance between the first via hole 131 and the G sub-pixel region 172 are respectively smaller than the distance between the first via hole 131 and the B sub-pixel region 173 .

[0064] That is to say, the distance between the orthographic projection of the first via hole 131 on the back plate 11 and the orthographic projection of the R sub-pixel area 171 on the back plate 11, and the distance between the orthographic projection of the first via hole 131 on the back plate 11 and the orthographic projection of the G sub-pixel area 172 on the back plate 11 are respectively smaller than the distance between the orthographic projection of the first via hole 131 on the back plate 11 and the orthographic projection of the B sub-pixel area 173 on the back plate 11.

[0065] In some embodiments, Figure 5 As shown, when the main tree line 141 extends along the y direction and the first branch line 142 extends along the z direction, in the y direction, two first branch lines 142 are arranged between two adjacent B sub-pixel areas 173, and the two first branch lines 142 are electrically connected through the second branch line 143, and the second branch line extends along the y direction.

[0066] In some embodiments, when the main tree line 141 extends along the z direction and the first branch line 142 extends along the y direction, in the z direction, two first branch lines 142 are arranged between two adjacent B sub-pixel areas 173, and the two first branch lines 142 are electrically connected through the second branch line 143, and the second branch line extends along the z direction.

[0067] In this way, the R / G pixels can be surrounded by the first branch line 142, the second branch line 143 and the main branch line 141 of the metal grid layer, further improving the efficiency of the R / G pixels due to leakage loss at low grayscale.

[0068] In some embodiments, the grayscale interval of the display substrate includes a first grayscale interval and a second grayscale interval, wherein the grayscale value of the first grayscale interval is less than the grayscale value of the second grayscale interval, and the voltage compensation value of the compensation circuit 111 to the cathode layer 123 in the first grayscale interval is greater than the voltage compensation value of the compensation circuit 111 to the cathode layer 123 in the second grayscale interval. The compensation circuit is implemented to compensate the voltage of the cathode layer 123 at low grayscale.

[0069] In some embodiments, in the first gray scale interval, the voltage compensation value of the cathode layer 123 provided by the compensation circuit 111 ranges from 0.2V to 0.4V.

[0070] It should be understood that in the embodiment of the present application, the voltage compensation value of the cathode layer 123 by the compensation circuit 111 is flexibly adjusted according to the lighting conditions of the R / G / B pixels in the light-emitting device 12 .

[0071] In some embodiments, the encapsulation layer 13 further includes a cover glass layer located on a side of the encapsulation layer 13 away from the base substrate and an optical glue layer for adhering the cover glass layer.

[0072] In some embodiments, Figure 2 and Figure 3As shown, the display substrate 10 further includes a color filter 16 , which is disposed on a side of the cover glass layer away from the base substrate.

[0073] In some embodiments, an OLED micro-signal driving circuit is fabricated on the back panel 11, wherein the driving circuit is connected to the pixel array through a tungsten hole of a CMOS standard process; the pixel array is composed of an anode layer 121, and the anode layer 121 specifically includes a reflective metal layer and a transparent conductive micro-cavity adjustment layer. The anode layer 121 can be fabricated using a Ti / Al / TiN or Ti / Al / ITO structure.

[0074] An embodiment of the present application further provides a display device, comprising the display substrate 10 in any of the above-mentioned possible embodiments.

[0075] The display device may be a display device such as an OLED display, and any product or component with a display function such as a television, a digital camera, a mobile phone, a tablet computer, etc. including these display devices.

[0076] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A display substrate, characterized in that: It includes a backplane, a pixel area, a packaging layer and a metal grid layer which are sequentially stacked along a first direction, wherein the first direction is the thickness direction of the display substrate; The pixel area includes a pixel definition layer and a light emitting device; The pixel definition layer includes a pixel opening, the light-emitting device is at least partially located in the pixel opening, the light-emitting device includes an anode layer, a plurality of light-emitting layers and a cathode layer sequentially stacked along the first direction, a charge generation layer is arranged between two adjacent light-emitting layers in the plurality of light-emitting layers, and the metal grid layer is electrically connected to the cathode layer through a first via hole in the encapsulation layer; The back plate includes a compensation circuit, the metal grid layer is electrically connected to the compensation circuit, and the compensation circuit is used to perform voltage compensation on the cathode layer.

2. The display substrate according to claim 1, characterized in that: The metal grid layer includes a plurality of main tree lines extending along a second direction, each of the main tree lines being connected to a plurality of first branch lines extending along a third direction, the second direction being perpendicular to the first direction, and the third direction being perpendicular to the first direction and the second direction.

3. The display substrate according to claim 2, characterized in that: The backplane includes a plurality of compensation circuits, and each main tree line is correspondingly connected to one compensation circuit.

4. The display substrate according to claim 2, characterized in that: An orthographic projection of the first branch line on the backplane does not overlap with an orthographic projection of the pixel opening on the backplane.

5. The display substrate according to claim 2, characterized in that: The plurality of first branch lines are arranged at equal intervals along the second direction.

6. The display substrate according to claim 2, characterized in that: The first branch line is electrically connected to the cathode layer through the first via hole, and an end of the main line in the second direction is electrically connected to the compensation circuit.

7. The display substrate according to claim 2, characterized in that: The display substrate includes a display area and a non-display area surrounding the display area. The first branch line is electrically connected to the cathode layer in the display area, and the main branch line is electrically connected to the compensation circuit in the non-display area.

8. The display substrate according to claim 7, characterized in that: The non-display area is provided with a second via hole extending along the first direction, the second via hole extends from the metal grid layer to the backplane, and the main tree line is electrically connected to the compensation circuit through the second via hole.

9. The display substrate according to claim 2, characterized in that: The pixel area includes a plurality of sub-pixel areas, a gap is provided between two adjacent sub-pixel areas among the plurality of sub-pixel areas, and the main tree line and / or the first branch line are arranged in the gap; The multiple sub-pixel areas include multiple R sub-pixel areas, multiple G sub-pixel areas and multiple B sub-pixel areas. In the second direction and / or the third direction, the distance between the main tree line and / or the first branch line and the R sub-pixel area and the distance between the main tree line and / or the first branch line and the G sub-pixel area are respectively smaller than the distance between the main tree line and / or the first branch line and the B sub-pixel area.

10. The display substrate according to claim 9, characterized in that: In the second direction and / or the third direction, the distance between the first via hole and the R sub-pixel region and the distance between the first via hole and the G sub-pixel region are respectively smaller than the distance between the first via hole and the B sub-pixel region.

11. The display substrate according to claim 9, characterized in that: In the second direction, two first branch lines are arranged between two adjacent B sub-pixel regions, the two first branch lines are electrically connected through a second branch line, and the second branch line extends along the second direction.

12. The display substrate according to any one of claims 1 to 11, characterized in that: The grayscale interval of the display substrate includes a first grayscale interval and a second grayscale interval, wherein the grayscale value of the first grayscale interval is smaller than the grayscale value of the second grayscale interval, and the voltage compensation value of the compensation circuit for the cathode layer in the first grayscale interval is greater than the voltage compensation value of the compensation circuit for the cathode layer in the second grayscale interval.

13. The display substrate according to claim 12, characterized in that: In the first gray scale interval, the voltage compensation value of the cathode layer by the compensation circuit ranges from 0.2V to 0.4V.

14. A display device, characterized in that: The display substrate comprises the display substrate as claimed in any one of claims 1 to 13.

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