Display substrate and display device

Abstract

The utility model discloses a display substrate and a display device. The display substrate comprises a substrate, a pixel limiting layer arranged on one side of the substrate and a plurality of sub-pixels, and the pixel limiting layer comprises a plurality of pixel limiting structures and a plurality of pixel openings limited by the pixel limiting structures; the sub-pixel comprises a light-emitting device, and the light-emitting device comprises a first electrode, a second electrode located on the side, away from the substrate, of the first electrode, and a light-emitting functional layer located between the first electrode and the second electrode; wherein the pixel limiting layer comprises a partition structure layer and a first limiting layer arranged on the side, away from the substrate, of the partition structure layer, the partition structure layer comprises at least one film layer, and the first limiting layer is made of an organic material; wherein the pixel limiting structure between at least two adjacent sub-pixels comprises a first partition structure formed by a partition structure layer on at least one side face of the pixel opening, and at least part of at least one film layer in the light-emitting functional layer is disconnected at the first partition structure.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display substrate and a display device. Background Art

[0002] As a new generation of light-emitting display technology after liquid crystal display panels, organic light-emitting diode (OLED) display panels have the advantages of wide viewing angle, high contrast, bright colors, and flexible display. They have been widely used in various mobile phones, laptops, and wearable devices.

[0003] However, in the related art, there is a problem of crosstalk between adjacent sub-pixels. Utility Model Content

[0004] The embodiments of the present application provide a display substrate and a display device, which can solve the problem of crosstalk between adjacent sub-pixels.

[0005] According to a first aspect of an embodiment of the present application, a display substrate is provided, comprising a substrate, a pixel defining layer disposed on one side of the substrate, and a plurality of sub-pixels, wherein the pixel defining layer comprises a plurality of pixel defining structures, and a plurality of pixel openings defined by the plurality of pixel defining structures, wherein the pixel openings are configured to define light-emitting areas of the sub-pixels;

[0006] The sub-pixel includes a light-emitting device, the light-emitting device includes a first electrode and a second electrode located on a side of the first electrode away from the substrate, and a light-emitting functional layer located between the first electrode and the second electrode, the light-emitting functional layer includes a plurality of film layers;

[0007] The pixel defining layer includes a partition structure layer and a first defining layer arranged on a side of the partition structure layer away from the substrate, the partition structure layer includes at least one film layer, and the first defining layer is an organic material;

[0008] Among them, the pixel defining structure between at least two adjacent sub-pixels includes a first partition structure formed by the partition structure layer on at least one side of the pixel opening, and at least a portion of at least one film layer in the light-emitting functional layer is disconnected at the first partition structure.

[0009] In some embodiments, the first partition structure is formed by inward contraction of at least one side of the partition structure layer toward the pixel opening;

[0010] The material of the partition structure layer is an inorganic material.

[0011] In some embodiments, the partition structure layer includes a first sub-membrane layer and a second sub-membrane layer stacked in sequence in a direction away from the substrate, the first sub-membrane layer is at least partially arranged on a side of the first electrode away from the substrate, and the first partition structure is formed by the first sub-membrane layer being retracted relative to the edge of the second sub-membrane layer.

[0012] In some embodiments, the pixel defining structure between at least two adjacent sub-pixels further includes a second partition structure located between the two adjacent sub-pixels, and at least a portion of at least one film layer in the light-emitting functional layer is disconnected at the second partition structure.

[0013] In some embodiments, in a direction perpendicular to the plane where the substrate is located, the first partition structure and the second partition structure have different heights.

[0014] In some embodiments, at least part of the pixel defining structure further includes a first partition groove, the first partition groove at least penetrates the first defining layer and at least part of the film layer of the partition structure layer, and the first partition groove exposes the second partition structure.

[0015] In some embodiments, the partition structure layer includes a third sub-film layer, a first sub-film layer, and a second sub-film layer stacked in sequence in a direction away from the substrate, and the first sub-film layer is at least partially disposed on a side of the first electrode away from the substrate;

[0016] The first partition structure is formed by the first sub-film layer being retracted relative to the edge of the second sub-film layer;

[0017] The second partition structure is formed by at least the first sub-film layer being retracted relative to the edge of the second sub-film layer;

[0018] In a direction perpendicular to the plane where the substrate is located, the thickness of the third sub-film layer at the first partition groove is greater than 0.

[0019] In some embodiments, the partition structure layer further includes a fourth sub-film layer disposed between the third sub-film layer and the first sub-film layer;

[0020] The second partition structure is formed by the first sub-membrane layer and the fourth sub-membrane layer being retracted relative to the edge of the second sub-membrane layer.

[0021] In some embodiments, the first sub-film layer and the fourth sub-film layer are made of the same material.

[0022] In some embodiments, the materials of the first sub-layer and the fourth sub-layer include silicon oxide, and the materials of the third sub-layer and the second sub-layer include silicon nitride.

[0023] In some embodiments, the orthographic projection of the third sub-film layer on the substrate and the orthographic projection of the fourth sub-film layer on the substrate do not overlap with the orthographic projection of the first electrode on the substrate.

[0024] In some embodiments, the plurality of sub-pixels include a red sub-pixel, a green sub-pixel, and a blue sub-pixel;

[0025] In the red sub-pixel, the green sub-pixel and the blue sub-pixel, the pixel defining structure includes the first partition structure;

[0026] At least one of the two adjacent sub-pixels located on both sides of the second partition structure is a red sub-pixel or a green sub-pixel.

[0027] In some embodiments, the orthographic projection of the first partition structure on the substrate is a closed ring;

[0028] The orthographic projection of the second partition structure on the base is in the shape of a non-closed ring.

[0029] In some embodiments, in at least part of the pixel defining structure, the edge of the first defining layer facing the pixel opening has a first climbing portion, and the slope angle of the first climbing portion is less than or equal to 42 degrees, and the slope angle is the angle between the tangent of the first climbing portion and a plane parallel to the substrate.

[0030] In some embodiments, the pixel defining layer further comprises a second defining layer disposed on a side of the first defining layer away from the substrate, and the second defining layer is an inorganic material;

[0031] At least part of the pixel defining structure also includes a second partition groove located between two adjacent sub-pixels, the second partition groove penetrates the second defining layer, and in a direction perpendicular to the plane where the substrate is located, the thickness of the first defining layer at the second partition groove is greater than 0.

[0032] In some embodiments, the display substrate includes a display area and a non-display area at least located on one side of the display area, and at least part of the sub-pixels are located in the display area;

[0033] The display substrate further comprises at least one first portion located in the non-display area, wherein the first portion is at least composed of the partition structure layer;

[0034] The display substrate further includes a first conductive layer disposed between the base and the pixel defining layer, the first conductive layer includes a first wiring located in the non-display area, and the second electrode is connected to the first wiring at one side of the first portion on a plane parallel to the base;

[0035] The first limiting layer includes a first slope, the first slope is located at the connection between the second electrode and the first wiring, and the second electrode is extended on the first slope and then connected to the first wiring.

[0036] In some embodiments, the display substrate also includes a first insulating layer arranged between the first electrode and the base, the first insulating layer is an organic material, the partition structure layer includes at least one venting hole located in the non-display area, the venting hole at least penetrates the partition structure layer, the partition structure layer is filled with organic material, and the first limiting layer is connected to the first insulating layer through the organic material in the venting hole.

[0037] According to a second aspect of an embodiment of the present application, a display device is provided, comprising the display substrate described in any one of the above.

[0038] In some embodiments of the present application, by setting a partition structure layer, the pixel definition structure between at least two adjacent sub-pixels includes a first partition structure formed by the partition structure layer on at least one side of the pixel opening, and at least part of at least one film layer in the light-emitting functional layer is disconnected at the first partition structure, which can improve or avoid the lateral charge migration phenomenon between adjacent sub-pixels, thereby improving or solving the problem of crosstalk between adjacent sub-pixels. At the same time, a first definition layer is provided on the side of the partition structure layer away from the substrate, and the first definition layer is an organic material. On the plane parallel to the substrate, the first definition layer fills the side of the pattern of the partition structure layer (the first definition layer covers the side of the first part) to form a slope with a gentle slope (first slope), and the slope with a gentle slope (first slope) can well carry the second electrode at the connection between the second electrode and the first wiring. The second electrode extends on the slope with a gentle slope (first slope) and then connects to the first wiring, thereby avoiding the second electrode from being broken at this point, that is, the pixel definition layer of the embodiment of the present application has the problem of preventing the connection of the conductive layers on the upper and lower sides of the pixel definition layer from being broken.

[0039] In some embodiments of the present application, by setting the first limiting layer, the thickness of the isolation structure layer is relatively small, thereby avoiding the problem of short circuit between the first electrode and the second electrode caused by abnormality of the isolation structure layer wrapping the edge of the first electrode (abnormality of the first sub-membrane layer partially covering the first electrode). That is, when the isolation structure layer wraps the edge of the first electrode abnormally, the first limiting layer also covers the first electrode, thereby preventing the first electrode and the second electrode from short circuiting. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] Figure 1 A schematic diagram of a problem existing in a related technology provided in an embodiment of the present application;

[0041] Figure 2 An overall schematic diagram of a display substrate provided in an embodiment of the present application;

[0042] Figure 3 A first partial top view schematic diagram of a display substrate provided in an embodiment of the present application;

[0043] Figure 4 A schematic diagram of a first cross-sectional structure of a display substrate provided in an embodiment of the present application;

[0044] Figure 5 A schematic diagram of a second cross-sectional structure of a display substrate provided in an embodiment of the present application;

[0045] Figure 6 A schematic diagram of a third cross-sectional structure of a display substrate provided in an embodiment of the present application;

[0046] Figure 7 A schematic diagram of a fourth cross-sectional structure of a display substrate provided in an embodiment of the present application;

[0047] Figure 8 A schematic diagram of a first cross-sectional structure of a non-display area of ​​a display substrate provided in an embodiment of the present application;

[0048] Fig. 9 A schematic diagram of a second cross-sectional structure of a non-display area of ​​a display substrate provided in an embodiment of the present application;

[0049] Fig.10 A schematic diagram of a third cross-sectional structure of a non-display area of ​​a display substrate provided in an embodiment of the present application;

[0050] Fig.11 A schematic diagram of the first verification result provided in the embodiment of the present application;

[0051] Fig.12 A schematic diagram of a second verification result provided in an embodiment of the present application;

[0052] Fig.13 A fifth cross-sectional structural schematic diagram of a display substrate provided in an embodiment of the present application;

[0053] Fig.14 A sixth cross-sectional structural schematic diagram of a display substrate provided in an embodiment of the present application;

[0054] Fig.15 A third verification result schematic diagram provided for an embodiment of the present application;

[0055] Fig.16 A second partial top view schematic diagram of a display substrate provided in an embodiment of the present application;

[0056] Fig.17 A third partial top view schematic diagram of a display substrate provided in an embodiment of the present application;

[0057] Fig.18 A seventh cross-sectional structural schematic diagram of a display substrate provided in an embodiment of the present application;

[0058] Fig.19 A schematic diagram of a first process step of a method for manufacturing a display substrate provided in an embodiment of the present application;

[0059] Fig. 20 A schematic diagram of a first intermediate process of a display area of ​​a method for manufacturing a display substrate provided in an embodiment of the present application;

[0060] Fig.21 A schematic diagram of a first intermediate process in a non-display area of ​​a method for manufacturing a display substrate provided in an embodiment of the present application;

[0061] Fig. 22 A schematic diagram of a second intermediate process of a display area of ​​a method for manufacturing a display substrate provided in an embodiment of the present application;

[0062] Fig.23 A schematic diagram of a second intermediate process in a non-display area of ​​a method for manufacturing a display substrate provided in an embodiment of the present application;

[0063] Fig.24 A schematic diagram of a third intermediate process of a display area of ​​a method for manufacturing a display substrate provided in an embodiment of the present application;

[0064] Fig.25 A schematic diagram of a third intermediate process in a non-display area of ​​a method for manufacturing a display substrate provided in an embodiment of the present application;

[0065] Fig.26 A schematic diagram of a fourth intermediate process of a display area of ​​a method for manufacturing a display substrate provided in an embodiment of the present application;

[0066] Fig. 27 A schematic diagram of a fourth intermediate process of a non-display area of ​​a method for manufacturing a display substrate provided in an embodiment of the present application;

[0067] Fig.28 A schematic diagram of a fifth intermediate process of a display area of ​​a method for manufacturing a display substrate provided in an embodiment of the present application;

[0068] Fig.29 A schematic diagram of a fifth intermediate process in a non-display area of ​​a method for manufacturing a display substrate provided in an embodiment of the present application;

[0069] Fig.30A schematic diagram of a sixth intermediate process of a non-display area of ​​a method for manufacturing a display substrate provided in an embodiment of the present application;

[0070] Fig.31 A schematic diagram of a seventh intermediate process of a non-display area of ​​a method for manufacturing a display substrate provided in an embodiment of the present application;

[0071] Fig.32 A schematic diagram of a second process step of a method for manufacturing a display substrate provided in an embodiment of the present application. DETAILED DESCRIPTION

[0072] In order to better understand the technical solutions provided by the embodiments of this specification, the technical solutions of the embodiments of this specification are described in detail below through the accompanying drawings and specific embodiments. It should be understood that the embodiments of this specification and the specific features in the embodiments are detailed descriptions of the technical solutions of the embodiments of this specification, rather than limitations on the technical solutions of this specification. In the absence of conflict, the embodiments of this specification and the technical features in the embodiments can be combined with each other.

[0073] In this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply that there is any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that the process, method, article or equipment including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or equipment. In the absence of more restrictions, the elements limited by the statement "comprise one..." do not exclude the existence of other identical elements in the process, method, article or equipment including the elements. The term "more than two" includes two or more than two situations.

[0074] In the related art, there is a problem of crosstalk between adjacent sub-pixels. For example, when a sub-pixel is lit, the current in the lit sub-pixel will flow horizontally to the adjacent sub-pixel, causing the adjacent sub-pixel to light up abnormally. In the related art, some isolation structures are set to prevent the problem of crosstalk between adjacent sub-pixels, but these isolation structures have the problem of occupying a large area (layout), or are not suitable for stacked light-emitting devices, or cannot well isolate sub-pixels of different colors.

[0075] In related technologies, such as Figure 1 As shown, Figure 1 A schematic diagram of a problem existing in a related technology provided in an embodiment of the present application. Figure 1The display panel includes a substrate 11, a first insulating layer 13 arranged on the substrate 11 (the first insulating layer 13 can be a flat layer), a first conductive layer arranged on the first insulating layer 13 (the first conductive layer can be a first electrode layer 14, and the first conductive layer 14 includes a plurality of first electrodes 141 of a plurality of light-emitting devices located in the display area AA), a pixel defining layer 15 arranged on the first conductive layer, a light-emitting functional layer 16 arranged on the pixel defining layer, a second electrode 17 arranged on the light-emitting functional layer 16, and an encapsulation layer 19 arranged on the second electrode 17. Figure 1 The cross-sectional structure of part of the film layer in the non-display area BB of the display panel is shown. Figure 1 In the example, the first conductive layer is the first electrode layer 14, the first conductive layer includes the first wiring 142, and the display panel includes the first portion 101D. Figure 1 The first portion 101D is illustrated as a part of the pixel defining layer 15. Figure 1 At the first dotted circle 101X1, on a plane parallel to the substrate 11, the second electrode 17 is connected to the first wiring 142 on one side of the first portion 101D. The inventors have found that in the related art, it is very easy to have a broken wire at the connection between the second electrode 17 and the first wiring 142, especially when the material of the pixel defining layer 15 is a non-polar material, this kind of broken wire is particularly serious.

[0076] In view of this, the present application provides a display substrate and a manufacturing method thereof, and a display device, which can solve or improve at least one of the above problems.

[0077] The present application provides a display substrate, comprising a substrate, a pixel defining layer disposed on one side of the substrate, and a plurality of sub-pixels, wherein the pixel defining layer comprises a plurality of pixel defining structures, and a plurality of pixel openings defined by the plurality of pixel defining structures, wherein the pixel openings are configured to define light-emitting areas of the sub-pixels;

[0078] The sub-pixel includes a light-emitting device, the light-emitting device includes a first electrode and a second electrode located on a side of the first electrode away from the substrate, and a light-emitting functional layer located between the first electrode and the second electrode, the light-emitting functional layer includes a plurality of film layers;

[0079] The pixel defining layer includes a partition structure layer and a first defining layer arranged on a side of the partition structure layer away from the substrate, the partition structure layer includes at least one film layer, and the first defining layer is an organic material;

[0080] Among them, the pixel defining structure between at least two adjacent sub-pixels includes a first partition structure formed by the partition structure layer on at least one side of the pixel opening, and at least a portion of at least one film layer in the light-emitting functional layer is disconnected at the first partition structure.

[0081] The present application also provides a method for manufacturing the above-mentioned display substrate.

[0082] The present application also provides a display panel including the above-mentioned display substrate.

[0083] The present application also provides a display device including the above-mentioned display substrate.

[0084] See also Figures 2 to 7 , Figure 2 This is an overall schematic diagram of a display substrate provided in an embodiment of the present application. Figure 3 A first partial top view schematic diagram of a display substrate provided in an embodiment of the present application; Figure 4 A schematic diagram of a first cross-sectional structure of a display substrate provided in an embodiment of the present application; Figure 5 A schematic diagram of a second cross-sectional structure of a display substrate provided in an embodiment of the present application; Figure 6 A schematic diagram of a third cross-sectional structure of a display substrate provided in an embodiment of the present application; Figure 7 A fourth cross-sectional structural schematic diagram of a display substrate provided in an embodiment of the present application. Figure 4 Indicated in Figure 3 The cross-sectional structure at the dotted line CC, or Figure 4 Schematically, the display substrate only includes the first partition structure. Figure 5 and Figure 6 Indicated in Figure 3 The cross-sectional structure at the dashed line DD, or Figure 5 and Figure 6 It is illustrated that the display substrate includes both a first partition structure and a second partition structure. Figure 5 and Figure 6 The structures in are the same or similar, except that Figure 6 A portion of the film layer on the side of the pixel defining layer away from the substrate is also illustrated.

[0085] See also Figures 8 to 9 , Figure 8 A schematic diagram of a first cross-sectional structure of a non-display area of ​​a display substrate provided in an embodiment of the present application; Fig. 9 A schematic diagram of a second cross-sectional structure of a non-display area of ​​a display substrate provided in an embodiment of the present application; Fig.10 A schematic diagram of a third cross-sectional structure of a non-display area of ​​a display substrate provided in an embodiment of the present application. Figure 8 and Fig. 9 The structure is the same as Fig. 9 Some logos or numbers are also added.

[0086] The present application provides a display substrate 100, the display substrate 100 includes a substrate 11, a pixel defining layer 15 disposed on one side of the substrate 11, and a plurality of sub-pixels 10P, the pixel defining layer 15 includes a plurality of pixel defining structures 151, and a plurality of pixel openings 15K1 defined by the plurality of pixel defining structures 151, the pixel openings 15K1 are configured to define a light emitting area of ​​the sub-pixel 10P; the sub-pixel 10P includes a light emitting device OEL, the light emitting device OEL includes a first electrode 141 and a second electrode 17 located on a side of the first electrode 141 away from the substrate 11, and a The light-emitting functional layer 16 between the pixels 10P and the sub-pixels 10P includes a light-emitting functional layer 16, the light-emitting functional layer 16 includes a plurality of film layers; wherein the pixel defining layer 15 includes a partition structure layer 15A and a first defining layer 15B arranged on the side of the partition structure layer 15A away from the substrate 11, the partition structure layer 15A includes at least one film layer, and the first defining layer 15B is an organic material; wherein the pixel defining structure 151 between at least two adjacent sub-pixels 10P includes a first partition structure 10g1 formed by the partition structure layer 15A on at least one side of the pixel opening 15K1, and at least a portion of at least one film layer in the light-emitting functional layer 16 is disconnected at the first partition structure 10g1.

[0087] For example, the substrate 11 may be glass or a flexible substrate 11 , and the flexible substrate 11 may be polyimide, which is not limited here.

[0088] For example, the film structure of the display substrate 100 may include: a substrate 11, a driving circuit layer disposed on one side of the substrate 11, a first electrode layer 14 disposed on a side of the driving circuit layer away from the substrate 11, and a pixel defining layer 15 disposed on a side of the first electrode layer 14 away from the substrate 11. The first electrode layer 14 includes a plurality of first electrodes 141 arranged in an array, and the pixel defining layer 15 includes a plurality of pixel defining structures 151 and a plurality of pixel openings 15K1, wherein the pixel openings 15K1 expose the corresponding first electrodes 141.

[0089] By way of example, in some embodiments, the display substrate 100 may include a plurality of light-emitting devices OEL, and the light-emitting device OEL includes: a first electrode 141 disposed on one side of a substrate 11, a light-emitting functional layer 16 disposed on a side of the first electrode 141 away from the substrate 11, and a second electrode 17 disposed on a side of the light-emitting functional layer 16 away from the substrate 11. One of the first electrode 141 and the second electrode 17 is an anode, and the other is a cathode. In the present application, the first electrode 141 is an anode and the second electrode 17 is a cathode.

[0090] For example, in some embodiments, the driving circuit layer may include a plurality of pixel driving circuits, the first electrode 141 is electrically connected to a corresponding pixel driving circuit, and the pixel driving circuit is used to drive the light emitting device OEL to emit light.

[0091] For example, please combine Figure 6 and Figure 8 , an example is given of a film structure of a display substrate 100, the film structure of the display substrate 100 includes: a substrate 11, a first metal layer 12 disposed on the substrate, a first insulating layer 13 disposed on the first metal layer 12, a first electrode layer 14 disposed on the first insulating layer 13, a pixel defining layer 15 disposed on the first electrode layer 14, a light-emitting functional layer 16 disposed at least in the pixel opening 15K1, a second electrode 17 disposed on the light-emitting functional layer 16, and an encapsulation layer 19 disposed on the second electrode 17. The encapsulation layer 19 is formed by stacking at least one inorganic material layer and at least one organic material layer, for example, the encapsulation layer 19 includes a first inorganic material sublayer 191 disposed on the second electrode 17, a first organic material sublayer 192 disposed on the first inorganic material sublayer 191, and a second inorganic material sublayer 193 disposed on the first organic material sublayer 192.

[0092] For example, in Figure 6 In the embodiment, the first metal layer 12 includes a plurality of drain electrodes 121 (or source electrodes), the drain electrodes 121 may be a part of a pixel driving circuit, and the first electrodes 141 are connected to corresponding drain electrodes 121 .

[0093] For example, the light emitting device OEL may be a stacked light emitting device (Tandem, a series light emitting device) or a single-layer light emitting device.

[0094] For example, Figure 6 The light emitting device OEL is shown as a stacked light emitting device. Figure 6 The example in the figure shows that the light-emitting functional layer 16 includes a first light-emitting unit 161, a charge generation layer 162 (CGL) and a second light-emitting unit 163 stacked on the first electrode 141. The light-emitting functional layer 16 may also include any one of the film layers such as a hole transport layer HTL, a hole injection layer HIL, an electron injection layer EIL, an electron transport layer ETL, a hole blocking layer HBL and an electron blocking layer EBL. The light-emitting functional layer 16 may also include other numbers of light-emitting units or / and charge generation layers.

[0095] For example, the charge generation layer 162 (CGL) may include an N-type charge generation layer and a P-type charge generation layer. The charge generation layer 162 (CGL) mainly provides electron carriers for lower light emitting units and hole carriers for upper light emitting units.

[0096] For example, the charge generation layer 162 (CGL), the hole transport layer HTL, the hole injection layer HIL, the electron injection layer EIL, the electron transport layer ETL, the hole blocking layer HBL and the electron blocking layer EBL are all common film layers of multiple sub-pixels 10P, which can be called common layers, and the light-emitting device OEL includes at least one of these common layers.

[0097] For example, at least part of at least one film layer in the light-emitting functional layer 16 is disconnected at the first partition structure 10g1. The charge generation layer 162 (CGL) and other film layers may be disconnected at the first partition structure 10g1, or any one of the hole transport layer HTL, hole injection layer HIL, electron injection layer EIL, electron transport layer ETL, hole blocking layer HBL and electron blocking layer EBL and other film layers may be disconnected at the first partition structure 10g1.

[0098] For example, the charge generation layer 162 (CGL) has a relatively high conductivity. When the charge generation layer 162 (CGL) is a whole-surface film layer, the charge generation layer 162 (CGL) of two adjacent light-emitting devices OEL is a continuous film layer, and there is a lateral charge migration phenomenon, which causes the display substrate 100 to have spectral crosstalk at low grayscales, such as easily causing crosstalk between adjacent sub-pixels, resulting in color deviation of the display substrate 100. For example, the charge generation layer 162 (CGL) easily causes crosstalk between sub-pixels of different colors at low brightness, resulting in low grayscale color deviation. In an embodiment of the present application, at least a portion of at least one film layer in the light-emitting functional layer 16 is disconnected at the first partition structure 10g1, which can improve or avoid the lateral charge migration phenomenon between adjacent sub-pixels 10P, thereby improving or solving the problem of crosstalk between adjacent sub-pixels.

[0099] For example, in some other embodiments, in the display substrate 100, when the second electrode 17 is a whole-surface film layer, there is a lateral charge migration phenomenon, which causes spectral crosstalk in the display substrate 100 at low grayscales, resulting in uneven colors in the display substrate 100, which has a significant impact on the uniformity of the display product. In the embodiment of the present application, at least part of the second electrode 17 is disconnected at the first partition structure 10g1, which can improve or avoid the lateral charge migration phenomenon between adjacent sub-pixels 10P, thereby improving or solving the problem of crosstalk between adjacent sub-pixels.

[0100] In some embodiments, please combine Figure 2 and Figure 8The display substrate 100 includes a display area AA and a non-display area BB at least located on one side of the display area AA, and at least part of the sub-pixels 10P are located in the display area AA; the display substrate 100 also includes at least one first portion 101D located in the non-display area BB, and the first portion 101D is at least composed of a partition structure layer 15A; the display substrate 100 also includes a first conductive layer arranged between the substrate 11 and the pixel defining layer 15, the first conductive layer includes a first wiring 142 located in the non-display area BB, and on a plane parallel to the substrate 11, the second electrode 17 is connected to the first wiring 142 on one side of the first portion 101D; the first defining layer 15B includes a first slope 15XP, the first slope 15XP is located at the connection between the second electrode 17 and the first wiring 142, and the second electrode 17 extends on the first slope 15XP and then connects to the first wiring 142.

[0101] For example, the first portion 101D may be a transition region located in the non-display area BB, and the first conductive layer may be a first electrode layer 14 including a plurality of first electrodes 141 located in the display area AA and a first trace 142 located in the non-display area.

[0102] By way of example, in some embodiments, the display substrate 100 or the display panel 1000 may include a pad area, which is electrically connected to a circuit board or a driving chip, and the first wiring 142 is connected between the pad area and the second electrode 17 , and the display substrate 100 or the display panel 1000 may supply a signal to the second electrode 17 through the first wiring 142 .

[0103] For example, in some embodiments, Figure 8 As shown, the display substrate 100 or the display panel 1000 may include a pad area, which is electrically connected to a circuit board or a driving chip. The display substrate 100 includes a second routing line 122, for example, the second routing line 122 is patterned by the first metal layer 12, the second routing line 122 is connected to the first routing line 142, the first routing line 142 is connected to the second electrode 17, and the second routing line 122 is connected between the pad area and the first routing line 142. The display substrate 100 or the display panel 1000 can supply signals to the second electrode 17 through the second routing line 122 and the first routing line 142 in sequence.

[0104] For example, the pixel defining layer 15 includes a partition structure layer 15A and a first defining layer 15B arranged on the side of the partition structure layer 15A away from the substrate 11. The first defining layer 15B is an organic material, and forms a first slope 15XP at the connection between the second electrode 17 and the first wiring 142. The first defining layer 15B of the organic material can form a transitionally gentle slope. The first slope 15XP can carry the second electrode 17. The second electrode 17 extends on the first slope 15XP and then connects to the first wiring 142, thereby avoiding the second electrode 17 from breaking here. Therefore, the pixel defining layer 15 of the embodiment of the present application has the problem of preventing the connection between the conductive layers on the upper and lower sides of the pixel defining layer 15 from breaking.

[0105] For example, in some embodiments, the edge of the positive projection of the first electrode 141 on the substrate 11 is located within the range of the positive projection of the first defining layer 15B of the pixel defining structure 151 on the substrate 11, and the thickness of the partition structure layer 15A is relatively small, thereby avoiding the problem of short circuit between the first electrode 141 and the second electrode 17 caused by the abnormality of the partition structure layer 15A wrapping the edge of the first electrode 14 (the first sub-membrane layer 15A1 partially covers the first electrode 141).

[0106] In some embodiments of the present application, by setting a partition structure layer 15A, the pixel defining structure 151 between at least two adjacent sub-pixels 10P includes a first partition structure 10g1 formed by the partition structure layer 15A on at least one side of the pixel opening 15K1, and at least a portion of at least one film layer in the light-emitting functional layer 16 is disconnected at the first partition structure 10g1, which can improve or avoid the lateral migration of charges between adjacent sub-pixels 10P, thereby improving or solving the problem of crosstalk between adjacent sub-pixels. At the same time, a first defining layer 15B is provided on the side of the partition structure layer 15A away from the substrate 11. The first defining layer 15B is an organic material. On a plane parallel to the substrate 11, the first defining layer 15B fills the side of the pattern of the partition structure layer 15A (the first defining layer 15B covers the side of the first part 101D) to form a slope with a gentle slope (first slope 15XP). The slope with a gentle slope (first slope 15XP) can well support the second electrode 17 at the connection between the second electrode 17 and the first wiring 142. The second electrode 17 extends on the slope with a gentle slope (first slope 15XP) and then connects to the first wiring 142, thereby avoiding the second electrode 17 from breaking at this point. That is, the pixel defining layer 15 of the embodiment of the present application has the problem of preventing the connection between the conductive layers on the upper and lower sides of the pixel defining layer 15 from breaking.

[0107] In some embodiments of the present application, by setting the first limiting layer 15B, the thickness of the partition structure layer 15A is relatively small, thereby avoiding the problem of short circuit between the first electrode 141 and the second electrode 17 caused by the abnormality of the partition structure layer 15A wrapping the edge of the first electrode 14 (the first sub-membrane layer 15A1 partially covers the first electrode 141), that is, when the partition structure layer 15A wraps the edge of the first electrode 14 abnormally, the first limiting layer 15B also covers the first electrode 141, thereby preventing the first electrode 141 and the second electrode 17 from short circuiting.

[0108] In some embodiments, the first partition structure 10g1 is formed by the partition structure layer 15A being retracted toward at least one side of the pixel opening 15K1; the material of the partition structure layer 15A is an inorganic material.

[0109] For example, Figure 4 As shown, the first partition structure 10g1 is an undercut structure.

[0110] For example, when the material of the partition structure layer 15A is an inorganic material, a first partition structure 10g1 with a preset shape can be well formed. The size of the first partition structure 10g1 is small, so that the first partition structure 10g1 occupies a small area (layout), which is suitable for stacked light-emitting devices and high-resolution display panels.

[0111] For example, when the material of the partition structure layer 15A is an inorganic material, the side of the pattern of the partition structure layer 15A (the side of the first part 101D) is steeper. If the pixel defining layer 15 does not include the first defining layer 15B, the second electrode 17 is more likely to break at the connection with the first wiring 142. In the embodiment of the present application, by setting the first defining layer 15B, the problem of the second electrode 17 breaking at the connection with the first wiring 142 can be well improved or prevented.

[0112] In some embodiments, the partition structure layer 15A includes a first sub-membrane layer 15A1 and a second sub-membrane layer 15A2 stacked in sequence in a direction away from the substrate 11, the first sub-membrane layer 15A1 is at least partially disposed on a side of the first electrode 141 away from the substrate 11, and the first partition structure 10g1 is formed by the first sub-membrane layer 15A1 being retracted relative to an edge of the second sub-membrane layer 15A2.

[0113] For example, the first partition structure 10g1 is formed by the first sub-film layer 15A1 being retracted relative to the edge of the second sub-film layer 15A2, that is, at the first partition structure 10g1, the edge of the second sub-film layer 15A2 exceeds the edge of the first sub-film layer 15A1 by a certain distance.

[0114] For example, on a plane parallel to the substrate 11, the width of the first partition structure 10g1 (i.e., the width of the first sub-membrane layer 15A1 that is retracted relative to the edge of the second sub-membrane layer 15A2) is 0.5 microns to 4 microns, and the width of the first partition structure 10g1 can be any value among 0.5 microns, 1 micron, 1.5 microns, 2 microns, 2.5 microns, 3 microns, 3.5 microns and 4 microns.

[0115] For example, on a plane parallel to the substrate 11, the width of the second partition structure 10g2 (i.e., the width of the first sub-membrane layer 15A1 that is retracted relative to the edge of the second sub-membrane layer 15A2) is 0.5 microns to 4 microns, and the width of the second partition structure 10g2 can be any value among 0.5 microns, 1 micron, 1.5 microns, 2 microns, 2.5 microns, 3 microns, 3.5 microns and 4 microns.

[0116] For example, the first sub-layer 15A1 is at least partially disposed on a side of the first electrode 141 away from the substrate 11 , that is, the first sub-layer 15A1 at least partially covers the first electrode 141 to prevent the side of the first electrode 141 from being exposed and causing poor display.

[0117] In some embodiments, Figure 5 and Figure 6 As shown, the pixel defining structure 151 between at least two adjacent sub-pixels 10P further includes a second partition structure 10g2 located between the two adjacent sub-pixels 10P, and at least a portion of at least one film layer in the light-emitting functional layer 16 is disconnected at the second partition structure 10g2.

[0118] For example, at least a portion of at least one film layer in the light-emitting functional layer 16 is disconnected at the second partition structure 10g2, which can improve or avoid the lateral charge migration phenomenon between adjacent sub-pixels 10P, thereby improving or solving the problem of crosstalk between adjacent sub-pixels.

[0119] For example, the display substrate 100 includes both the first partition structure 10g1 and the second partition structure 10g2, which can better improve or avoid the lateral charge migration phenomenon between adjacent sub-pixels 10P, thereby improving or solving the problem of crosstalk between adjacent sub-pixels.

[0120] For example, the display substrate 100 includes both the first partition structure 10g1 and the second partition structure 10g2, and the first partition structure 10g1 and / or the second partition structure 10g2 are arranged at different locations to adapt to the spacing between sub-pixels of different colors.

[0121] For example, the display substrate 100 includes both the first partition structure 10g1 and the second partition structure 10g2, and the first partition structure 10g1 and / or the second partition structure 10g2 are arranged in the corresponding sub-pixels of different colors, which can better improve or avoid the lateral migration of charges between adjacent sub-pixels 10P, thereby improving or solving the problem of crosstalk between adjacent sub-pixels.

[0122] For example, in some other embodiments, at least a portion of the second electrode 17 is disconnected at the second partition structure 10g2, which can improve or avoid the lateral charge migration phenomenon between adjacent sub-pixels 10P, thereby improving or solving the problem of crosstalk between adjacent sub-pixels.

[0123] For example, Figure 6 The light emitting device OEL is shown as a stacked light emitting device. Figure 6 exemplarily illustrates that the light emitting functional layer 16 includes a first light emitting unit 161 , a charge generating layer 162 (CGL), and a second light emitting unit 163 stacked on the first electrode 141 .

[0124] For example, please combine Figure 3 The plurality of sub-pixels 10P include a red sub-pixel 10P2, a green sub-pixel 10P3 and a blue sub-pixel 10P1.

[0125] For example, in some embodiments, the red sub-pixel 10P2 includes a red light-emitting device, the red light-emitting device includes a first light-emitting unit 161, a charge generation layer 162 (CGL), and a second light-emitting unit 163, in which the first light-emitting unit 161 and the second light-emitting unit 163 both emit red light. In some embodiments, the green sub-pixel 10P3 includes a green light-emitting device, the green light-emitting device includes a first light-emitting unit 161, a charge generation layer 162 (CGL), and a second light-emitting unit 163, in which the first light-emitting unit 161 and the second light-emitting unit 163 both emit green light. In some embodiments, the blue sub-pixel 10P1 includes a blue light-emitting device, the blue light-emitting device includes a first light-emitting unit 161, a charge generation layer 162 (CGL), and a second light-emitting unit 163, in which the first light-emitting unit 161 and the second light-emitting unit 163 both emit blue light. The lengths of the microcavities in the red light-emitting device, the green light-emitting device and the blue light-emitting device are different. In the direction perpendicular to the plane of the substrate 11, the distance from the charge generation layer 162 (CGL) to the first electrode 141 in the red light-emitting device, the distance from the charge generation layer 162 (CGL) to the first electrode 141 in the green light-emitting device, and the distance from the charge generation layer 162 (CGL) to the first electrode 141 in the blue light-emitting device are different. By simultaneously providing the first partition structure 10g1 and the second partition structure 10g2, at least one light-emitting functional layer 16 on the outside of light-emitting devices of different colors can be effectively disconnected.

[0126] For example, in some embodiments, the distance from the charge generation layer 162 (CGL) to the first electrode 141 in the red light-emitting device and the distance from the charge generation layer 162 (CGL) to the first electrode 141 in the green light-emitting device are both greater than the distance from the charge generation layer 162 (CGL) to the first electrode 141 in the blue light-emitting device. The first partition structure 10g1 can disconnect the charge generation layer 162 (CGL) in the blue light-emitting device, and the second partition structure 10g2 can disconnect the charge generation layer 162 (CGL) in the red light-emitting device and the charge generation layer 162 (CGL) in the green light-emitting device. By simultaneously providing the first partition structure 10g1 and the second partition structure 10g2, different microcavity lengths of different color sub-pixels / different color light-emitting devices can be accommodated, and the lateral charge migration phenomenon between adjacent sub-pixels 10P of multiple colors can be improved or avoided, thereby improving or solving the crosstalk problem existing in a display substrate with multiple color sub-pixels.

[0127] In some embodiments, Figure 5 and Figure 6 As shown, in a direction perpendicular to the plane where the base 11 is located, the first partition structure 10g1 and the second partition structure 10g2 have different heights.

[0128] For example, Figure 5 As shown, the height of the first partition structure 10g1 is the distance between the surface of the retracted region thereof away from the substrate 11 and the surface close to the substrate 11 .

[0129] For example, Figure 5 As shown, the height of the second partition structure 10g2 is the distance between the surface of the retracted region thereof away from the substrate 11 and the surface close to the substrate 11 .

[0130] For example, Figure 5 As shown, in a direction perpendicular to the plane where the substrate 11 is located, the height of the first partition structure 10g1 is a first height h1, and the height of the second partition structure 10g2 is a second height h2. The heights of the first partition structure 10g1 and the second partition structure 10g2 are different, so that the first partition structure 10g1 and the second partition structure 10g2 can adapt to the needs of sub-pixels of different colors.

[0131] For example, in the direction perpendicular to the plane of the substrate 11, the first partition structure 10g1 and the second partition structure 10g2 have different heights, which can adapt to the different microcavity lengths of different color sub-pixels / different color light-emitting devices, and can improve or avoid the lateral charge migration phenomenon between adjacent sub-pixels 10P of multiple colors, thereby improving or solving the crosstalk problem existing in the display substrate with multiple color sub-pixels.

[0132] For example, Figure 5 and Figure 6 As shown in the figure, it is illustrated that in the direction perpendicular to the plane where the substrate 11 is located, the first height h1 of the first partition structure 10g1 is smaller than the second height h2 of the second partition structure 10g2. When the distance from the charge generation layer 162 (CGL) to the first electrode 141 in the red light-emitting device and the distance from the charge generation layer 162 (CGL) to the first electrode 141 in the green light-emitting device are both greater than the distance from the charge generation layer 162 (CGL) to the first electrode 141 in the blue light-emitting device, the first partition structure 10g1 can make the charge generation layer in the blue light-emitting device 162 (CGL) is disconnected, and the second partition structure 10g2 can disconnect the charge generation layer 162 (CGL) in the red light emitting device and the charge generation layer 162 (CGL) in the green light emitting device. By simultaneously setting the first partition structure 10g1 and the second partition structure 10g2, different microcavity lengths of sub-pixels of different colors / light emitting devices of different colors can be adapted, and the lateral charge migration phenomenon between adjacent sub-pixels 10P of multiple colors can be improved or avoided, thereby improving or solving the crosstalk problem existing in the display substrate with multiple color sub-pixels.

[0133] In some embodiments, Figure 5 and Figure 6 As shown, at least part of the pixel defining structure 151 further includes a first partition groove 15K2, which at least penetrates the first defining layer 15B and at least part of the film layer of the partition structure layer 15A, and exposes the second partition structure 10g2.

[0134] For example, the first partition groove 15K2 exposes the second partition structure 10g2, and at least one film layer in the light-emitting functional layer 16 and at least a portion of the second electrode 17 are disconnected from the second partition structure 10g2 through the first partition groove 15K2.

[0135] It should be noted that Figure 6 It is shown in FIG. 1 that the light-emitting functional layer 16 is disconnected at the first partition structure 10g1 and the second partition structure 10g2 . The actual shape of the light-emitting functional layer 16 being disconnected at the first partition structure 10g1 and the second partition structure 10g2 may also be other shapes.

[0136] In some embodiments, Figure 5 and Figure 6 As shown, the partition structure layer 15A includes a third sub-membrane layer 15A3, a first sub-membrane layer 15A1 and a second sub-membrane layer 15A2 which are stacked in sequence along a direction away from the substrate 11, and the first sub-membrane layer 15A1 is at least partially arranged on the side of the first electrode 141 away from the substrate 11; the first partition structure 10g1 is formed by the first sub-membrane layer 15A1 being retracted relative to the edge of the second sub-membrane layer 15A2; the second partition structure 10g2 is at least formed by the first sub-membrane layer 15A1 being retracted relative to the edge of the second sub-membrane layer 15A2; in the direction perpendicular to the plane where the substrate 11 is located, the thickness of the third sub-membrane layer 15A3 at the first partition groove 15K2 is greater than 0.

[0137] For example, Figure 5 and Figure 6 As shown, at the edge of the pixel opening 10 , the first sub-film layer 15A1 partially covers the surface of the first electrode 141 away from the substrate 11 , thereby protecting the first electrode 141 and preventing the side end surface of the first electrode 141 from being exposed.

[0138] For example, Figure 5 and Figure 6 As shown, in the direction perpendicular to the plane of the substrate 11, the thickness of the third sub-film layer 15A3 at the first partition groove 15K2 is greater than 0, that is, during the etching process of the first partition groove 15K2 or the second partition structure 10g2, etching to the first insulating layer 13 (the first insulating layer 13 may be a flat layer arranged between the substrate 11 and the first electrode layer 14) can be avoided, thereby protecting the first insulating layer 13.

[0139] In some embodiments, Figure 5 and Figure 6 As shown, the partition structure layer 15A also includes a fourth sub-film layer 15A4 arranged between the third sub-film layer 15A3 and the first sub-film layer 15A1; the second partition structure 10g2 is formed by the first sub-film layer 15A1 and the fourth sub-film layer 15A4 being retracted relative to the edge of the second sub-film layer 15A2.

[0140] For example, the first partition structure 10g1 is formed by the first sub-membrane layer 15A1 being retracted relative to the edge of the second sub-membrane layer 15A2, and the second partition structure 10g2 is formed by the first sub-membrane layer 15A1 and the fourth sub-membrane layer 15A4 being retracted relative to the edge of the second sub-membrane layer 15A2, so that the second height h2 of the second partition structure 10g2 is greater than the first height h1 of the first partition structure 10g1.

[0141] For example, in a direction perpendicular to the plane of the substrate 11, the thickness of the second sub-film layer 15A2 ranges from 5 nanometers to 50 nanometers. For example, the thickness of the second sub-film layer 15A2 can be any value among 5 nanometers, 10 nanometers, 20 nanometers, 25 nanometers, 30 nanometers, 35 nanometers and 40 nanometers.

[0142] For example, in a direction perpendicular to the plane of the substrate 11 , the thickness of the first sub-film layer 15A1 ranges from 5 nanometers to 200 nanometers. For example, the thickness of the first sub-film layer 15A1 can be any value among 5 nanometers, 40 nanometers, 50 nanometers, 100 nanometers, 150 nanometers, and 200 nanometers.

[0143] For example, in a direction perpendicular to the plane of the substrate 11, the thickness of the fourth sub-film layer 15A4 ranges from 5 nanometers to 200 nanometers. For example, the thickness of the fourth sub-film layer 15A4 can be any value among 5 nanometers, 30 nanometers, 50 nanometers, 100 nanometers, 150 nanometers, and 200 nanometers.

[0144] For example, in a direction perpendicular to the plane where the substrate 11 is located, the thickness of the third sub-layer 15A3 is less than or equal to 1000 nanometers.

[0145] For example, the first defining layer 15B may be made of photosensitive resin or photoresist material, and the thickness of the first defining layer 15B in a direction perpendicular to the plane where the substrate 11 is located is less than or equal to 3 micrometers.

[0146] For example, the first metal layer 12 adopts a titanium / aluminum / titanium stacked structure. In a direction perpendicular to the plane where the substrate 11 is located, the first metal layer can be a stacked structure of 50 nanometers thick titanium, 400 nanometers thick aluminum and 50 nanometers thick titanium.

[0147] For example, the first electrode layer 14 or the first electrode 141 can adopt a stacked structure of indium tin oxide / silver / indium tin oxide (ITO / Ag / ITO). In the direction perpendicular to the plane where the substrate 11 is located, the first electrode layer 14 or the first electrode 141 can be a stacked structure of indium tin oxide with a thickness of 8 nanometers, silver with a thickness of 100 nanometers, and indium tin oxide with a thickness of 8 nanometers.

[0148] In some embodiments, Figure 5 and Figure 6 As shown, the first sub-film layer 15A1 and the fourth sub-film layer 15A4 are made of the same material.

[0149] For example, the first sub-film layer 15A1 and the fourth sub-film layer 15A4 are made of the same material, and the first sub-film layer 15A1 and the fourth sub-film layer 15A4 can be formed into the second partition structure 10g2 by the same etching process, thereby reducing the number of manufacturing process steps.

[0150] In some embodiments, the material of the first sub-layer 15A1 and the fourth sub-layer 15A4 includes silicon oxide, and the material of the third sub-layer 15A3 and the second sub-layer 15A2 includes silicon nitride.

[0151] For example, the first sub-layer 15A1 is partially covered on the surface of the first electrode 141 away from the substrate 11. The first sub-layer 15A1 uses silicon nitride to maintain the surface flatness of the first electrode 141 and avoids the uneven surface of the first electrode 141 caused by the use of silicon oxide.

[0152] In some embodiments, Figure 5 and Figure 6 As shown, the orthographic projection of the third sub-film layer 15A3 on the substrate 11 and the orthographic projection of the fourth sub-film layer 15A4 on the substrate 11 do not overlap with the orthographic projection of the first electrode 141 on the substrate 11 .

[0153] For example, the orthographic projection of the third sub-membrane layer 15A3 on the substrate 11 and the orthographic projection of the fourth sub-membrane layer 15A4 on the substrate 11 do not overlap with the orthographic projection of the first electrode 141 on the substrate 11, and the first partition structure 10g1 is formed by the first sub-membrane layer 15A1 being retracted relative to the edge of the second sub-membrane layer 15A2. The first partition structure 10g1 is formed by the first sub-membrane layer 15A1 being retracted relative to the edge of the second sub-membrane layer 15A2, so that the second height h2 of the second partition structure 10g2 is greater than the first height h1 of the first partition structure 10g1.

[0154] In some embodiments, Figure 3 , Figure 5 and Figure 6As shown, multiple sub-pixels 10P include a red sub-pixel 10P2, a green sub-pixel 10P3 and a blue sub-pixel 10P1; in the red sub-pixel 10P2, the green sub-pixel 10P3 and the blue sub-pixel 10P1, the pixel defining structure 151 includes a first partition structure 10g1; and among the two adjacent sub-pixels 10P located on both sides of the second partition structure 10g2, at least one is a red sub-pixel 10P2 or a green sub-pixel 10P3.

[0155] For example, in some embodiments, the display substrate 100 includes both the first partition structure 10g1 and the second partition structure 10g2.

[0156] By way of example, in some embodiments, the display substrate 100 includes a first partition structure 10g1 and a second partition structure 10g2 at the same time, and the first partition structure 10g1 is provided on the side of each pixel defining structure 151 facing the pixel opening 15K1, the second partition structure 10g2 is provided on the pixel defining structure 151 between a red sub-pixel 10P2 and other sub-pixels 10P (the other sub-pixels 10P may be another red sub-pixel 10P2), and the second partition structure 10g2 is provided on the pixel defining structure 151 between a green sub-pixel 10P3 and other sub-pixels 10P (the other sub-pixels 10P may be another green sub-pixel 10P3).

[0157] For example, in some other embodiments, the display substrate 100 only includes the first partition structure 10g1, and in the pixel defining structure 151 that defines the red sub-pixel 10P2, the green sub-pixel 10P3, and the blue sub-pixel 10P1, the pixel defining structure 151 includes the first partition structure 10g1.

[0158] For example, in some other embodiments, the display substrate 100 only includes the second partition structure 10g2, and the two adjacent sub-pixels 10P located on both sides of the second partition structure 10g2 can be any one of the red sub-pixel 10P2, the green sub-pixel 10P3 and the blue sub-pixel 10P1.

[0159] For example, in some other embodiments, when a blue sub-pixel 10P1 is disposed adjacent to another blue sub-pixel 10P1, the pixel defining structure 151 between the two adjacent blue sub-pixels 10P1 may not include the second partition structure 10g2.

[0160] In some embodiments, Figure 3 , Figure 5 and Figure 6 As shown, the orthographic projection of the first partition structure 10g1 on the base 11 is a closed ring; the orthographic projection of the second partition structure 10g2 on the base 11 is a non-closed ring.

[0161] For example, the positive projection of the first partition structure 10g1 on the substrate 11 is a closed ring, that is, the first partition structure 10g1 is arranged around the pixel opening 15K1, which can better disconnect at least one film layer in the light-emitting functional layer 16, so that the length of the disconnection of at least one film layer in the light-emitting functional layer 16 is larger, which can better improve or avoid the lateral migration of charges between adjacent sub-pixels 10P, thereby improving or solving the problem of crosstalk between adjacent sub-pixels.

[0162] For example, the positive projection of the second partition structure 10g2 on the substrate 11 is a non-closed ring, which can prevent the second electrode 17 from being disconnected into an isolated island at the second partition structure 10g2, maintain the electrical connectivity of the second electrode 17 in each sub-pixel 10P, and maintain the uniformity of the electrical signal supply and electrical signal in the second electrode 17 in each sub-pixel 10P.

[0163] For example, Figure 3 As shown, it can be understood that a second partition structure 10g2 is arranged around the red sub-pixel 10P2, and the second partition structure 10g2 includes a plurality of second partition structure segments, and there is a connecting portion 10g21 between adjacent second partition structure segments. The connecting portion 10g21 can maintain the electrical connection between the second electrode 17 in the red sub-pixel 10P2 and other sub-pixels.

[0164] For example, Figure 3 As shown, it can be understood that a plurality of second partition structures 10g2 are arranged around the red sub-pixel 10P2, and a connecting portion 10g21 is provided between two adjacent second partition structures 10g2, and the connecting portion 10g21 can maintain the electrical connection between the second electrode 17 in the red sub-pixel 10P2 and other sub-pixels.

[0165] For example, Figure 3 As shown, by disposing the second partition structure 10g2 and the connecting portion 10g21, the second electrode 17 is in a grid shape in each sub-pixel 10P, which can maintain the uniformity of the electrical signal in the second electrode 17 on each sub-pixel 10P.

[0166] In some embodiments, Figure 5 As shown, in at least part of the pixel defining structure 151, the edge of the first defining layer 15B facing the pixel opening 15K1 has a first climbing portion 15BP1, and the slope angle θ of the first climbing portion 15BP1 is less than or equal to 42 degrees, and the slope angle is the angle between the tangent of the first climbing portion 15BP1 and a plane parallel to the substrate 11.

[0167] For example, since the pixel defining layer 15 includes a partition structure layer 15A and a first defining layer 15B arranged on the side of the partition structure layer 15A away from the substrate 11, the slope angle θ of the first climbing portion 15BP1 is set to be less than or equal to 42 degrees. In the direction perpendicular to the substrate 11, the thickness of the light-emitting functional layer 16 matches the thickness of the pixel defining layer and the slope angle θ of the first climbing portion 15BP1, so that the light extraction efficiency of the light-emitting device OEL is improved.

[0168] In some embodiments, Figure 7 As shown, the pixel defining layer 15 also includes a second defining layer 15C arranged on the side of the first defining layer 15B away from the substrate 11, and the second defining layer 15C is an inorganic material; at least part of the pixel defining structure 151 also includes a second partition groove 15K3 located between two adjacent sub-pixels 10P, and the second partition groove 15K3 runs through the second defining layer 15C. In the direction perpendicular to the plane of the substrate 11, the thickness of the first defining layer 15B at the second partition groove 15K3 is greater than 0.

[0169] For example, the first defining layer 15B is an organic material. When the first defining layer 15B is not completely cured, it may degas under physical conditions such as heating or UV irradiation during the manufacturing process. This phenomenon may cause bubbling, breaking or peeling of the light-emitting functional layer 16. The first defining layer 15B degasses slightly, and the released gas may chemically or physically react with the film layer in the light-emitting functional layer 16, thereby destroying the integrity of the light-emitting functional layer 16 and reducing the mobility of the lateral charge migration between adjacent sub-pixels 10P, thereby improving or solving the problem of crosstalk between adjacent sub-pixels.

[0170] For example, the second partition groove 15K3 penetrates the second definition layer 15C, the thickness of the first definition layer 15B at the second partition groove 15K3 is greater than 0, and the light emitting functional layer 16 can contact the first definition layer 15B through the second partition groove 15K3.

[0171] For example, the second partition groove 15K3 may be in a slit shape or a strip shape.

[0172] In some embodiments, please combine Figure 2 and Figure 8The display substrate 100 includes a display area AA and a non-display area BB at least located on one side of the display area AA, and at least part of the sub-pixels 10P are located in the display area AA; the display substrate 100 also includes at least one first portion 101D located in the non-display area BB, and the first portion 101D is at least composed of a partition structure layer 15A; the display substrate 100 also includes a first conductive layer arranged between the substrate 11 and the pixel defining layer 15, the first conductive layer includes a first wiring 142 located in the non-display area BB, and on a plane parallel to the substrate 11, the second electrode 17 is connected to the first wiring 142 on one side of the first portion 101D; the first defining layer 15B includes a first slope 15XP, the first slope 15XP is located at the connection between the second electrode 17 and the first wiring 142, and the second electrode 17 extends on the first slope 15XP and then connects to the first wiring 142.

[0173] For example, the pixel defining layer 15 includes a partition structure layer 15A and a first defining layer 15B arranged on the side of the partition structure layer 15A away from the substrate 11. The first defining layer 15B is an organic material, and forms a first slope 15XP at the connection between the second electrode 17 and the first wiring 142. The first defining layer 15B of the organic material can form a transitionally gentle slope. The first slope 15XP can carry the second electrode 17. The second electrode 17 extends on the first slope 15XP and then connects to the first wiring 142, thereby avoiding the second electrode 17 from breaking here. Therefore, the pixel defining layer 15 of the embodiment of the present application has the problem of preventing the connection between the conductive layers on the upper and lower sides of the pixel defining layer 15 from breaking.

[0174] In some embodiments, please combine Figure 2 and Figure 8 The display substrate 100 also includes a first insulating layer 13 disposed between the first electrode 141 and the substrate 11. The first insulating layer 13 is an organic material. The partition structure layer 15A includes at least one vent hole 15AA1 located in the non-display area BB. The vent hole 15AA1 at least penetrates the partition structure layer 15A. The partition structure layer 15A is filled with organic material. The first limiting layer 15B is connected to the first insulating layer 13 through the organic material in the vent hole 15AA1.

[0175] For example, the partition structure layer 15A filled with organic material may be the first defining layer 15B.

[0176] For example, the first limiting layer 15B is connected to the first insulating layer 13 through the organic material in the venting hole 15AA1. The first insulating layer 13 is an organic material. When the first insulating layer 13 is not completely cured, it will degas under physical conditions such as heating or UV irradiation during the manufacturing process. The partition structure layer 15A is an inorganic material. The partition structure layer 15A has excellent gas barrier properties. The first limiting layer 15B is connected to the first insulating layer 13 through the organic material in the venting hole 15AA1, so that the gas released from the first insulating layer 13 can escape from the first limiting layer 15B, thereby avoiding bubbling, breakage or peeling of the inorganic materials in the film layer such as the partition structure layer 15A.

[0177] See also Figure 11 to Figure 12 , Fig.11 A schematic diagram of the first verification result provided in the embodiment of the present application; Fig.12 A schematic diagram of the second verification result provided in an embodiment of the present application.

[0178] See also Figure 3 , Figure 6 and Fig.11 , measure the brightness of each part of the display substrate or display panel on the same straight line, and the sub-pixels of the same color are located on the measurement line. Fig.11 (a) shows the measurement results of the related technology. Fig.11 (b) shows the measurement results of the present application (having the first partition structure 10g1 and the second partition structure 10g2 of the present application). Fig.11 (a) and Fig.11 In (b), the horizontal axis represents the measured distance or length (the measuring instrument moves and measures according to a certain measurement step length, and the horizontal axis unit is micrometer), and the vertical axis represents the light intensity (in candela). Fig.11 (a) and Fig.11 The dotted box 101k in (b) represents the light intensity or brightness of the area between two adjacent light-emitting devices. Fig.11 (a) and Fig.11 The dotted circle 101q in (b) represents the light intensity or brightness in the light emitting device. Fig.11 As can be seen from (a), in the related art, since the charge generation layer 162 (CGL) or other film layer of two adjacent light-emitting devices OEL is a continuous film layer, there is a lateral charge migration phenomenon, which causes spectral crosstalk on the display substrate 100 and also causes the area between the two adjacent light-emitting devices OEL to emit light. Fig.11As can be seen from (b), in the present application, due to the first partition structure 10g1 and the second partition structure 10g2, the charge generation layer 162 (CGL) or other film layer of two adjacent light-emitting devices OEL is a discontinuous film layer, which improves or avoids the lateral charge migration phenomenon between adjacent sub-pixels 10P, improves the crosstalk of the display substrate 100, and also improves or avoids the light emission in the area between two adjacent light-emitting devices OEL.

[0179] In addition, the inventors adopted Fig.11 The measurement method shown measures the brightness of various parts on the display substrate or display panel on different straight lines. Sub-pixels of the same color are located on the measurement line, or sub-pixels of different colors are located on the measurement line. Compared with the related art, the embodiment of the present application greatly improves the crosstalk phenomenon between adjacent sub-pixels 10P, and also improves or avoids the effect of luminescence in the area between two adjacent light-emitting devices OEL.

[0180] See also Figure 3 , Figure 6 and Fig.12 , measure the spectrum of different pure color images, and also measure the spectrum of different grayscales or different brightness under pure color images, such as measuring the spectrum of red images, green images and blue images, Fig.11 The figure shows the spectrum of the red screen at 413 nit (413 nits) and 111 nit (111 nits). Fig.12 The horizontal axis represents the wavelength (in nanometers), and the vertical axis represents the light intensity (in candela). Fig.12 It can be seen that no matter in the case of high grayscale (413 nits) or low grayscale (111 nits), no light intensity is emitted in the green wavelength and blue wavelength ranges. This shows that by adopting the technical solution of the present application, under the red screen, the green sub-pixels and blue sub-pixels adjacent to the red sub-pixels do not emit light, and no crosstalk occurs.

[0181] In addition, the inventor measured the spectra of different grayscales or different brightnesses under the green screen, and found that with the technical solution of the present application, the red sub-pixel and the blue sub-pixel adjacent to the green sub-pixel did not emit light under the green screen, and no crosstalk occurred. The inventor measured the spectra of different grayscales or different brightnesses under the blue screen, and found that with the technical solution of the present application, the red sub-pixel and the green sub-pixel adjacent to the blue sub-pixel did not emit light under the blue screen, and no crosstalk occurred.

[0182] In addition, the inventor has measured that in a display panel with a color gamut design value of DCIP3 (98%), the technical solution of the present application is adopted. Since the first partition structure 10g1 and the second partition structure 10g2 make the charge generation layer 162 (CGL) or other film layer of two adjacent light-emitting devices OEL a discontinuous film layer, the lateral charge migration phenomenon between adjacent sub-pixels 10P is improved or avoided, the spectral crosstalk of the display substrate 100 is improved, and the regional luminescence between two adjacent light-emitting devices OEL is also improved or avoided, so that the color gamut value of the display panel is increased to 102.39%. Therefore, through the technical solution of the present application, the spectral crosstalk of the display substrate 100 is improved, the regional luminescence between two adjacent light-emitting devices OEL is improved or avoided, and the color gamut (color saturation) is also improved.

[0183] See also Figures 13 to 15 , Fig.13 A fifth cross-sectional structural schematic diagram of a display substrate provided in an embodiment of the present application; Fig.14 A sixth cross-sectional structural schematic diagram of a display substrate provided in an embodiment of the present application; Fig.15 The third verification result diagram provided in the embodiment of the present application is shown in FIG. Fig.11 This is a cross-sectional structure before the charge generation layer 162 is formed. Fig.12 The cross-sectional structure is formed after the charge generation layer 162 is formed and after the baking process. Fig.12 It is also the final cross-sectional structure of the display substrate 100 or the cross-sectional structure of the display panel 1000 .

[0184] For example, before forming the charge generation layer 162, the slope angle θ of the first climbing portion 15BP1 is made larger by controlling processes such as curing temperature and time. When forming the charge generation layer 162, the formed charge generation layer 162 is easily disconnected at the first climbing portion 15BP1 or near the first climbing portion 15BP1, which can reduce the mobility of the lateral migration of charges between adjacent sub-pixels 10P, thereby improving or solving the problem of crosstalk between adjacent sub-pixels. After forming the charge generation layer 162, or after forming all the film layers of the light-emitting functional layer 16, a baking process is performed to make the slope angle θ of the first climbing portion 15BP1 smaller. When the second electrode 17 is formed, it is not easy for the second electrode 17 to be disconnected at the first climbing portion 15BP1 or near the first climbing portion 15BP1, thereby improving the voltage uniformity on the second electrode 17; at the same time, in the direction perpendicular to the substrate 11, the thickness of the light-emitting functional layer 16 is matched with the thickness of the pixel defining layer and the slope angle θ of the first climbing portion 15BP1, so that the light extraction efficiency of the light-emitting device OEL is improved.

[0185] For example, in some embodiments, Figure 5As shown in Fig. 14, in the direction perpendicular to the plane where the substrate 11 is located, the thickness of the first limiting layer 15B is 5 microns to 15 microns, for example, the thickness of the first limiting layer 15B is any value of 5 microns, 6 microns, 7 microns, 8 microns, 9 microns, 10 microns, 11 microns, 12 microns, 13 microns, 14 microns and 15 microns. By setting a thicker first limiting layer 15B, with the slope angle θ of the first climbing portion 15BP1 being less than or equal to 42 degrees, the light extraction efficiency of the display substrate or display panel can be better improved. At the same time, by setting a thicker first limiting layer 15B, with the slope angle θ of the first climbing portion 15BP1 being larger, when forming the charge generation layer 162, it is easy to make the formed charge generation layer 162 disconnected in the first climbing portion 15BP1 or near the first climbing portion 15BP1, which can reduce the mobility of the lateral migration of charges between adjacent sub-pixels 10P, thereby improving or solving the problem of crosstalk between adjacent sub-pixels.

[0186] For example, before forming the charge generation layer 162, the slope angle θ of the first climbing portion 15BP1 is larger, and the slope angle θ of the first climbing portion 15BP1 is greater than or equal to 80 degrees. For example, the slope angle θ of the first climbing portion 15BP1 is any one of 80 degrees, 81 degrees, 82 degrees, 83 degrees, 84 degrees and 85 degrees.

[0187] For example, after the charge generating layer 162 is formed and in the cross-sectional structure formed after the baking process, or in the final cross-sectional structure of the display substrate 100 or the cross-sectional structure of the display panel 1000, the slope angle θ of the first climbing portion 15BP1 is set to be less than or equal to 42 degrees. For example, the slope angle θ of the first climbing portion 15BP1 is any one of 42 degrees, 41 degrees, 40 degrees, 39 degrees, 38 degrees and 35 degrees.

[0188] For example, the slope angle θ of the first climbing portion 15BP1 is set to be less than or equal to 42 degrees (or at the same time, the thickness of the first limiting layer 15B is 5 microns to 15 microns in the direction perpendicular to the plane of the substrate 11), and the thickness of the light-emitting functional layer 16 is matched with the thickness of the pixel defining layer and the slope angle θ of the first climbing portion 15BP1 in the direction perpendicular to the substrate 11. Due to the setting of the first limiting layer 15B, the reflection of large-angle emitted light can be increased, the forward (positive viewing angle) light in the sub-pixel can be increased, and the light output efficiency of the light-emitting device can be improved.

[0189] For example, Fig.13 and Fig.14As shown, in some embodiments, the pixel defining layer 15 only includes the first defining layer 15B, and does not include the partition structure layer 15A, that is, the pixel defining layer 15 only includes organic materials, and after the charge generating layer 162 is formed and in the cross-sectional structure formed after the baking process, or in the final cross-sectional structure of the display substrate 100 or the cross-sectional structure of the display panel 1000, the slope angle θ of the first climbing portion 15BP1 is set to be less than or equal to 42 degrees.

[0190] For example, Figure 4 As shown, in some embodiments, the pixel defining layer 15 includes a first defining layer 15B, and other film layers outside the first defining layer 15B, for example, the pixel defining layer 15 also includes a partition structure layer 15A, and after the charge generating layer 162 is formed and in the cross-sectional structure formed after the baking process, or in the final cross-sectional structure of the display substrate 100 or the cross-sectional structure of the display panel 1000, the slope angle θ of the first climbing portion 15BP1 is set to be less than or equal to 42 degrees.

[0191] Please combine Fig.14 and Fig.15 , Fig.15 The figure shows the brightness gain effect at the normal viewing angle under different slope angles θ (or the light output efficiency gain under different slope angles θ). Fig.15 The horizontal axis represents the slope angle θ of the first climbing portion 15BP1 (the slope angle θ ranges from 35 degrees to 85 degrees), and the vertical axis represents the brightness gain or the luminous efficiency gain. The positive viewing angle brightness gain is the ratio of the brightness at a slope angle θ to the brightness of the display panel of the related art. Fig.15 It can be seen that when the slope angle θ of the first climbing portion 15BP1 is less than or equal to 42 degrees, the brightness gain at the normal viewing angle increases (or the luminous efficiency increases). For example, when the slope angle θ is 40 degrees, the brightness gain at the normal viewing angle is 124.04%.

[0192] See also Figures 16 to 18 , Fig.16 A second partial top view schematic diagram of a display substrate provided in an embodiment of the present application; Fig.17 A third partial top view schematic diagram of a display substrate provided in an embodiment of the present application; Fig.18 This is a seventh cross-sectional structural diagram of a display substrate provided in an embodiment of the present application. Fig.16 and Fig.17 Different shapes of the second partition groove 15K3 are shown.

[0193] For example, in some embodiments, Figure 7As shown, the pixel defining layer 15 includes a first defining layer 15B, and a second defining layer 15C arranged on the side of the first defining layer 15B away from the substrate 11, the first defining layer 15B is an organic material, and the second defining layer 15C is an inorganic material; at least part of the pixel defining structure 151 also includes a second partition groove 15K3 located between two adjacent sub-pixels 10P, the second partition groove 15K3 runs through the second defining layer 15C, and in the direction perpendicular to the plane of the substrate 11, the thickness of the first defining layer 15B at the second partition groove 15K3 is greater than 0.

[0194] For example, the first defining layer 15B is an organic material. When the first defining layer 15B is not completely cured, it may degas under physical conditions such as heating or UV irradiation during the manufacturing process. This phenomenon may cause bubbling, breaking or peeling of the light-emitting functional layer 16. The first defining layer 15B degasses slightly, and the released gas may chemically or physically react with the film layer in the light-emitting functional layer 16, thereby destroying the integrity of the light-emitting functional layer 16 and reducing the mobility of the lateral charge migration between adjacent sub-pixels 10P, thereby improving or solving the problem of crosstalk between adjacent sub-pixels.

[0195] For example, the second partition groove 15K3 penetrates the second definition layer 15C, the thickness of the first definition layer 15B at the second partition groove 15K3 is greater than 0, and the light emitting functional layer 16 can contact the first definition layer 15B through the second partition groove 15K3.

[0196] For example, compared to Figure 7 Example, Fig.18 The pixel defining layer 15 illustrated in the figure includes a first defining layer 15B and a second defining layer 15C disposed on a side of the first defining layer 15B away from the substrate 11 , and the pixel defining layer 15 does not include a partition structure layer 15A.

[0197] For example, in Figure 7 and Fig.18 In some embodiments, the display substrate 1000 may include only the second partitioning groove 15K3, or the display substrate 1000 may include both the first partitioning structure 10g1 and the second partitioning groove 15K3.

[0198] For example, in Figure 7 and Fig.18 In some embodiments, the second partition groove 15K3 may be disposed on the pixel defining structure 151 between any two adjacent sub-pixels 10P.

[0199] For example, in Figure 7 and Fig.18 In the example implementations, such as Fig.16 and Fig.17As shown, in some embodiments, due to incomplete curing of the first limiting layer 15B, outgassing may occur under physical conditions such as heating or UV irradiation during the manufacturing process, and the released gas will not chemically or physically react with the second electrode 17. The positive projection of the first partition structure 10g1 on the substrate 11 can be a closed ring, which can better improve or avoid the lateral migration of charges between adjacent sub-pixels 10P, thereby improving or solving the problem of crosstalk between adjacent sub-pixels.

[0200] It should be noted that, in some embodiments, Fig.14 and Fig.18 Exemplary features may be combined, for example, the pixel defining layer 15 includes a first defining layer 15B and a second defining layer 15C.

[0201] It should be noted that, in some embodiments, the pixel defining layer 15 includes a first defining layer 15B and a second defining layer 15C, and at least part of the pixel defining structure 151 also includes a second partition groove 15K3 located between two adjacent sub-pixels 10P.

[0202] It should be noted that, in some other embodiments, the pixel defining layer 15 includes a first defining layer 15B and a second defining layer 15C, and the edge of the first defining layer 15B facing the pixel opening 15K1 has a first climbing portion 15BP1, and the slope angle of the first climbing portion 15BP1 is less than or equal to 42 degrees, and the slope angle is the angle between the tangent of the first climbing portion 15BP1 and a plane parallel to the substrate 11.

[0203] It should be noted that, in some other embodiments, the pixel defining layer 15 includes a first defining layer 15B and a second defining layer 15C, the slope angle of the first climbing portion 15BP1 is less than or equal to 42 degrees, and at least part of the pixel defining structure 151 also includes a second partition groove 15K3 located between two adjacent sub-pixels 10P.

[0204] See also Figures 8 to 10 , illustrating that the non-display area BB of the display substrate 100 includes a crack prevention area 103, a dam area 104, a cathode overlapping area 105, and a residual area of ​​the light-emitting functional layer 16. The residual area of ​​the light-emitting functional layer 16 is used to provide an error area for the manufacturing process of the light-emitting functional layer 16 to ensure that the light-emitting functional layer 16 is uniformly formed in the display area. The cathode overlapping area 105 is located on the side of the residual area of ​​the light-emitting functional layer 16 away from the display area AA. In the cathode overlapping area 105, the second electrode 17 is connected to the first wiring 142 on one side of the first portion 101D. The dam area 104 is located on the side of the cathode overlapping area 105 away from the display area AA. The dam area 104 includes a plurality of dams 201. The dams 201 are composed of at least one layer of organic material. Figure 8It is shown that the dam 201 is composed of a part of the first insulating layer 13, a part of the first limiting layer 15B and a part of the support column layer 18, and the dam 201 is used to prevent the organic material in the encapsulation layer 19 from diffusing to the edge of the display substrate 100. The anti-crack area 103 is located on the side of the dam area 104 away from the display area AA, and the anti-crack area 103 is used to prevent cutting cracks. The display substrate package 100 includes a plurality of anti-crack units 1031 located in the anti-crack area 103, and an anti-crack groove 1032 is provided between two adjacent crack units 1031. The anti-crack unit 1031 can be formed by patterning a plurality of inorganic material film layers.

[0205] For example, Figure 8 As shown, at least one vent hole 15AA1 is provided in the first wiring 142 , and at least one vent hole 15AA1 is provided in the first portion 101D.

[0206] For example, Fig.10 It is illustrated that the display substrate 100 also includes at least one pad terminal 15HP arranged between the anti-crack unit 1031 and the dam 201, a portion of the first insulating layer 13 (the first pattern 131 of the first insulating layer 13) covers both ends of the pad terminal 15HP, and the first insulating layer 13 (the first pattern 131 of the first insulating layer 13) exposes the pad terminal 15HP through an opening, and the pad terminal 15HP is used to connect to a circuit board or a driving chip.

[0207] For example, the non-display area BB of the display substrate 100 or the display panel 1000 includes a plurality of frame areas, wherein the pad terminal 15HP may be disposed in at least one frame area. Figure 8 and Fig. 9 The cross-sectional structure of the border area where the pad terminal 15HP is not provided is shown. Fig.10 The cross-sectional structure of the frame region where the pad terminal 15HP is provided is shown.

[0208] For example, Fig.10 In the example, the second wiring 122 connects the corresponding

[0209] For example, please combine Figure 8 and Fig. 9 As shown, on a plane parallel to the substrate 11, the distance A1 from the edge of the display area AA to the edge of the light-emitting functional layer 16 is 50 μm to 2000 μm, for example, it can be any value among 50 μm, 100 μm, 200 μm, 300 μm, 400 μm, 500 μm, 600 μm, 700 μm, 800 μm, 900 μm, 1000 μm, 1100 μm and 1200 μm.

[0210] For example, please combine Figure 8 and Fig. 9As shown, on a plane parallel to the substrate 11, a distance B1 from an edge of the display area AA to an edge of the second electrode 17 is 500 μm to 8000 μm, for example, it can be any value among 500 μm, 1000 μm, 2000 μm, 3000 μm, 4000 μm, 5000 μm, 6000 μm, 7000 μm and 8000 μm.

[0211] For example, please combine Figure 8 and Fig. 9 As shown, on a plane parallel to the substrate 11, the width of the connection portion C1 between the second electrode 17 and the first wiring 142 is 200 to 3000 microns, for example, it can be any value among 200 microns, 400 microns, 600 microns, 800 microns, 1000 microns, 1200 microns, 1400 microns, 1600 microns, 1800 microns, 2000 microns, 2200 microns, 2400 microns and 3000 microns.

[0212] For example, please combine Figure 8 and Fig. 9 As shown, on a plane parallel to the substrate 11, the width of the connection portion D1 between the first routing line 142 and the second routing line 122 is 200 to 3000 microns, for example, it can be any value among 200 meters, 500 microns, 800 microns, 1100 microns, 1400 microns, 1700 microns, 2000 microns, 2300 microns and 2600 microns.

[0213] For example, please combine Figure 8 and Fig. 9 As shown, on a plane parallel to the substrate 11, the width E1 of the second trace 122 can be 50 microns to 4000 microns, for example, it can be any value among 50 microns, 100 microns, 300 microns, 600 microns, 900 microns, 1200 microns, 1500 microns, 1800 microns, 2100 microns, 2400 microns and 2700 microns.

[0214] For example, please combine Figure 8 and Fig. 9 As shown, on a plane parallel to the substrate 11, the width from the edge of the dam 201 farthest from the display area AA to the edge H1 of the encapsulation layer can be 10 μm to 500 μm, for example, can be any value of 10 μm, 30 μm, 40 μm, 60 μm, 80 μm, 100 μm, 120 μm, 140 μm, 160 μm, 180 μm, 210 μm, 230 μm, 260 μm and 280 μm.

[0215] For example, please combine Figure 8 and Fig. 9As shown, on a plane parallel to the substrate 11, the distance between two adjacent dams 201 (the distance J1 between the first dam and the second dam, and the distance J2 between the second dam and the third dam) can be 2 microns to 500 microns. For example, it can be any value among 2 microns, 5 microns, 10 microns, 20 microns, 30 microns, 40 microns, 50 microns, 60 microns, 70 microns, 80 microns, 90 microns, 100 microns, 110 microns, 120 microns, 130 microns and 150 microns.

[0216] For example, please combine Figure 8 and Fig. 9 As shown, on a plane parallel to the substrate 11, the width of the dam 201 (the width K1 of the first dam, the width K2 of the second dam, and the width K3 of the third dam) can be 2 microns to 500 microns. For example, it can be any value among 2 microns, 5 microns, 10 microns, 20 microns, 30 microns, 40 microns, 50 microns, 60 microns, 70 microns, 80 microns, 90 microns, 100 microns, 110 microns, 120 microns, 130 microns and 150 microns.

[0217] For example, please combine Figure 8 and Fig. 9 As shown, on a plane parallel to the substrate 11, a distance M1 from an edge of the anti-crack groove 1032 closest to the display area AA to a dam 201 farthest from the display area AA is 50 to 1500 microns, for example, can be any value among 50 microns, 100 microns, 200 microns, 300 microns, 400 microns, 500 microns, 600 microns, 700 microns, 800 microns and 900 microns.

[0218] For example, please combine Figure 8 and Fig. 9 As shown, on a plane parallel to the substrate 11, the distance N1 from the edge of the anti-crack groove 1032 closest to the display area AA to the edge of the encapsulation layer 19 is 10 to 1500 microns, for example, it can be any value among 10 microns, 50 microns, 100 microns, 200 microns, 300 microns, 400 microns, 500 microns, 600 microns, 700 microns, 800 microns and 900 microns.

[0219] For example, please combine Figure 8 and Fig. 9 As shown, on a plane parallel to the substrate 11, the width S1 of the anti-crack unit 1031 and the width W1 of the anti-crack groove 1032 are 0.5 to 100 microns, for example, can be any value of 0.5 microns, 2 microns, 4 microns, 6 microns, 8 microns, 10 microns, 12 microns, 14 microns, 16 microns, 20 microns, 30 microns, 40 microns, 50 microns and 100 microns.

[0220] For example, please combine Figure 8 and Fig. 9 As shown, on a plane parallel to the substrate 11, the total width P1 of the anti-crack unit 1031 and the anti-crack groove 1032 is 2 to 200 microns, for example, it can be any value among 2 microns, 10 microns, 20 microns, 30 microns, 40 microns, 50 microns, 60 microns, 70 microns, 80 microns, 90 microns, 100 microns, 110 microns and 150 microns.

[0221] For example, please combine Figure 8 and Fig. 9 As shown, on a plane parallel to the base 11, a distance Q1 from the edge of the display substrate 100 to the anti-crack groove 1032 farthest from the display area AA is 10 to 2000 microns, for example, it can be any value among 10 microns, 20 microns, 40 microns, 50 microns, 100 microns, 200 microns, 300 microns, 400 microns, 500 microns, 600 microns, 700 microns, 800 microns and 900 microns.

[0222] For example, please combine Figure 8 and Fig. 9 As shown, on a plane parallel to the substrate 11, a width R1 of the non-display area BB of the display substrate 100 is 100 μm to 10,000 μm, for example, it can be any value among 100 μm, 500 μm, 1,000 μm, 2,000 μm, 3,000 μm, 4,000 μm, 5,000 μm, 6,000 μm, 7,000 μm, 8,000 μm and 9,000 μm.

[0223] For example, please combine Figure 8 and Fig. 9 As shown, on a plane parallel to the substrate 11, the width T1 of the vent hole 15AA1 in the first trace 142 is 2 microns to 50 microns, for example, it can be any value among 2 microns, 10 microns, 15 microns, 20 microns, 25 microns, 30 microns, 35 microns, 40 microns, 45 microns and 50 microns.

[0224] For example, please combine Figure 8 and Fig. 9 As shown, on a plane parallel to the substrate 11, the distance from the first organic material sublayer 192 in the encapsulation layer 19 to the edge of the second electrode 17 is 10 microns to 500 microns. For example, it can be any value among 10 microns, 20 microns, 30 microns, 40 microns, 50 microns, 60 microns, 70 microns, 80 microns, 90 microns, 100 microns, 200 microns, 300 microns, 400 microns and 500 microns.

[0225] For example, Fig.10As shown, on a plane parallel to the substrate 11, the distance M2 from the edge of the pad terminal to the dam 201 farthest from the display area AA is 50 to 1500 microns, for example, it can be any value among 50 microns, 100 microns, 200 microns, 300 microns, 400 microns, 500 microns, 600 microns, 700 microns, 800 microns, 900 microns, 1000 microns, 1100 microns, 1200 microns, 1300 microns, 1400 microns and 1500 microns.

[0226] For example, Fig.10 As shown, on a plane parallel to the substrate 11, the distance from the pattern of the first insulating layer 13 (the edge of the pad area, the edge of the first pattern 131 of the first insulating layer 13) arranged on the side of the pad terminal 15HP away from the substrate 11 to the edge N2 of the packaging layer is 50 to 1500 microns, for example, it can be any value of 50 microns, 100 microns, 200 microns, 300 microns, 400 microns, 500 microns, 600 microns, 700 microns, 800 microns, 900 microns, 1000 microns, 1100 microns, 1200 microns, 1300 microns, 1400 microns and 1500 microns.

[0227] See also Figures 19 to 31 , Fig.19 A schematic diagram of a first process step of a method for manufacturing a display substrate provided in an embodiment of the present application; Fig. 20 A schematic diagram of a first intermediate process of a display area of ​​a method for manufacturing a display substrate provided in an embodiment of the present application; Fig.21 A schematic diagram of a first intermediate process in a non-display area of ​​a method for manufacturing a display substrate provided in an embodiment of the present application; Fig. 22 A schematic diagram of a second intermediate process of a display area of ​​a method for manufacturing a display substrate provided in an embodiment of the present application; Fig.23 A schematic diagram of a second intermediate process in a non-display area of ​​a method for manufacturing a display substrate provided in an embodiment of the present application; Fig.24 A schematic diagram of a third intermediate process of a display area of ​​a method for manufacturing a display substrate provided in an embodiment of the present application; Fig.25 A schematic diagram of a third intermediate process in a non-display area of ​​a method for manufacturing a display substrate provided in an embodiment of the present application; Fig.26 A schematic diagram of a fourth intermediate process of a display area of ​​a method for manufacturing a display substrate provided in an embodiment of the present application; Fig. 27 A schematic diagram of a fourth intermediate process of a non-display area of ​​a method for manufacturing a display substrate provided in an embodiment of the present application; Fig.28 A schematic diagram of a fifth intermediate process of a display area of ​​a method for manufacturing a display substrate provided in an embodiment of the present application; Fig.29A schematic diagram of a fifth intermediate process in a non-display area of ​​a method for manufacturing a display substrate provided in an embodiment of the present application; Fig.30 A schematic diagram of a sixth intermediate process of a non-display area of ​​a method for manufacturing a display substrate provided in an embodiment of the present application; Fig.31 This is a schematic diagram of the seventh intermediate process of a non-display area of ​​a method for manufacturing a display substrate provided in an embodiment of the present application.

[0228] The present application also provides a method for manufacturing a display substrate, which can be used to manufacture any of the display substrates 100 described above. The method for manufacturing a display substrate includes: step S100, step S200, step S300, step S400, and step S500.

[0229] Step 100, providing a substrate.

[0230] For example, Fig. 20 As shown, a substrate 11 is provided. The substrate 11 may be glass or a flexible substrate 11. The flexible substrate 11 may be polyimide, which is not limited here.

[0231] Step 200: forming a plurality of first electrodes on one side of a substrate.

[0232] For example, Fig. 20 and Fig.21 As shown, a driving circuit layer is formed on one side of the substrate 11 , and the driving circuit layer may include a plurality of pixel driving circuits. The first electrode 141 is electrically connected to the corresponding pixel driving circuit, and the pixel driving circuit is used to drive the light emitting device OEL to emit light.

[0233] For example, Fig. 20 and Fig.21 As shown, the manufacturing method of the display substrate includes: forming a first metal layer 12 on one side of the substrate 11, and in the display area AA, the first metal layer 12 includes a plurality of drain electrodes 121 (or source electrodes); forming a first insulating layer 13 on a side of the first metal layer 12 away from the substrate 11, the first insulating layer 13 can be an organic material, and the first insulating layer 13 can be a flat layer; forming a first electrode layer 14 on a side of the first insulating layer 13 away from the substrate 11, and in the display area AA, the first electrode layer 14 includes a plurality of first electrodes 141, and the first electrodes 141 are connected to the corresponding drain electrodes 121 through vias in the first insulating layer 13.

[0234] For example, Fig. 20 and Fig.21 As shown, in the non-display area BB, the first metal layer 12 includes a second wiring 122 , and the first electrode layer 14 includes a first wiring 142 . The first wiring 142 is connected to the second wiring 122 through a via hole in the first insulating layer 13 .

[0235] For example, Fig. 20 and Fig.21 As shown, in the non-display area BB, when the first insulating layer 13 is formed, the first insulating layer 13 is also patterned to form a plurality of dams 201 in the first sub-layer portion 13D.

[0236] For example, Figure 8 As shown, in some embodiments, at least one first sublayer portion 13D is covered by a dam inorganic material layer 15AD, and the dam inorganic material layer 15AD is formed by patterning inorganic material film layers such as the partition structure layer 15A. At least one vent hole 15AA1 can also be set in the dam inorganic material layer 15AD to connect the film layers of organic materials located in different film layers in the dam 201 so that the gas in the film layers of the organic material can be released.

[0237] For example, Fig. 20 and Fig.21 As shown, in the non-display area BB, when the first electrode layer 14 is patterned, vent holes 15AA1 are formed in the film layer of the first electrode layer 14 such as the first wiring 141 to facilitate the connection of the organic material film layers on the upper and lower sides of the first electrode layer 14.

[0238] Step 300, forming a pixel defining layer on a side of the first electrode away from the substrate, the pixel defining layer including a plurality of pixel defining structures, and a plurality of pixel openings of a plurality of sub-pixels defined by the plurality of pixel defining structures, the pixel openings exposing the first electrode; wherein the pixel defining layer includes a partition structure layer and a first defining layer arranged on a side of the partition structure layer away from the substrate, the partition structure layer includes at least one film layer, and the first defining layer is an organic material; wherein the pixel defining structure between at least two adjacent sub-pixels includes a first partition structure formed by the partition structure layer on at least one side of the pixel opening.

[0239] For example, Figures 22 to 30 As shown, a pixel defining layer 15 is formed on a side of the first electrode 141 away from the substrate 11, and the pixel defining layer 15 includes a plurality of pixel defining structures 151, and a plurality of pixel openings 15K1 of a plurality of sub-pixels 10P defined by the plurality of pixel defining structures 151, and the pixel openings 15K1 expose the first electrode 141; wherein, the pixel defining layer 15 includes a partition structure layer 15A and a first defining layer 15B arranged on a side of the partition structure layer 15A away from the substrate 11, the partition structure layer 15A includes at least one film layer, and the first defining layer 15B is an organic material; wherein, the pixel defining structure 151 between at least two adjacent sub-pixels 10P includes a first partition structure 10g1 formed by the partition structure layer 15A on at least one side of the pixel opening 15K1.

[0240] Step 400: forming a light-emitting functional layer on a side of the first electrode away from the substrate, wherein the light-emitting functional layer comprises a plurality of film layers, and at least a portion of at least one film layer in the light-emitting functional layer is disconnected at a first partition structure.

[0241] For example, Fig.31 As shown, a light-emitting functional layer 16 is formed on a side of the first electrode 141 away from the substrate 11 , and the light-emitting functional layer 16 includes a plurality of film layers, and at least a portion of at least one film layer in the light-emitting functional layer 16 is disconnected at the first partition structure 10g1 .

[0242] Step 500: forming a second electrode on a side of the light-emitting functional layer away from the substrate.

[0243] For example, Fig.31 As shown, a second electrode 17 is formed on a side of the light-emitting functional layer 16 away from the substrate 11 .

[0244] In some embodiments, the step of forming the pixel defining layer 15 on the side of the first electrode 141 away from the substrate 11 (step S300 ) includes: step S301 , step S302 , step S303 , and step S304 .

[0245] Step S301, as Fig. 22 and 23 As shown, a third sub-film layer 15A3 of the partition structure layer 15A is formed on the substrate 11, and a fourth sub-film layer 15A4 of the partition structure layer 15A is formed on the side of the third sub-film layer 15A3 away from the substrate 11. The third sub-film layer 15A3 and the fourth sub-film layer 15A4 are patterned by the same patterning process, and the orthographic projection of the third sub-film layer 15A3 on the substrate 11 and the orthographic projection of the fourth sub-film layer 15A4 on the substrate 11 do not overlap with the orthographic projection of the first electrode 141 on the substrate 11.

[0246] For example, the third sub-film layer 15A3 and the fourth sub-film layer 15A4 are patterned by the same patterning process, which can reduce the number of manufacturing process steps.

[0247] Step S302, as Fig.24 and 25 As shown, a first sub-film layer 15A1 of the partition structure layer 15A is formed on the side of the fourth sub-film layer 15A4 and the first electrode 141 away from the substrate 11, and a second sub-film layer 15A2 of the partition structure layer 15A is formed on the side of the first sub-film layer 15A1 away from the substrate 11.

[0248] Step S303, as Fig.26 and 27 As shown, a first defining layer 15B is formed on a side of the second sub-layer 15A2 away from the substrate 11 , and the first defining layer 15B is patterned.

[0249] For example, after the first defining layer 15B is patterned, the first defining layer 15B includes a plurality of pixel defining structure 15 portions located in the display area AA and a plurality of second sub-layer portions 15BD of a plurality of banks 201 located in the non-display area BB.

[0250] For example, Fig.28 and 29 As shown, between step S303 and step S304, it can also include: forming a support column layer 18 on the side of the first limiting layer 15B away from the substrate 11, the support column layer 18 includes a plurality of support columns 181 located at least in the display area AA, and a plurality of third sublayer portions 182D of a plurality of dams 201 located in the non-display area BB.

[0251] Step S304, as Fig.30 As shown, the first sub-film layer 15A1 and the second sub-film layer 15A2 are patterned by the same patterning process to form a first partition structure 10g1.

[0252] For example, the first sub-layer 15A1 and the second sub-layer 15A2 are patterned by the same patterning process, which can reduce the number of process steps.

[0253] For example, the first defining layer 15B is patterned in step S303 , and the first defining layer 15B can be used as a mask for patterning the first sub-film layer 15A1 and the second sub-film layer 15A2 , thereby reducing the number of masks and saving costs.

[0254] In some embodiments, Fig.28 and Fig.30 As shown, in the step of patterning the first sub-film layer 15A1 and the second sub-film layer 15A2 by the same patterning process (step S304), a second partition structure 10g2 located between two at least partially adjacent sub-pixels 10P in the pixel defining structure 151 is also formed; at least a portion of at least one film layer in the light-emitting functional layer 16 is disconnected at the second partition structure 10g2.

[0255] For example, since the materials of the first sub-membrane layer 15A1 and the fourth sub-membrane layer 15A4 are the same, after etching the first sub-membrane layer 15A1, the fourth sub-membrane layer 15A4 is also etched, that is, when the first sub-membrane layer 15A1 and the second sub-membrane layer 15A2 are patterned in the same patterning process, the fourth sub-membrane layer 15A4 is also etched to form a second partition structure 10g2.

[0256] In some embodiments, please combine Fig.13 and Fig.14In the step of forming the light-emitting functional layer 16 on the side of the first electrode 141 away from the substrate 11 (step S400), a charge generating layer 162 in the light-emitting functional layer 16 is formed; after forming the charge generating layer 162 and before forming the second electrode 17 on the side of the light-emitting functional layer 16 away from the substrate 11, the manufacturing method of the display substrate 100 also includes: baking the display substrate 100, wherein after baking the display substrate 100, in at least part of the pixel defining structure 151, the edge of the first defining layer 15B facing the pixel opening 15K1 has a first climbing portion 15BP1, and the slope angle of the first climbing portion 15BP1 is less than or equal to 42 degrees, and the slope angle is the angle between the tangent of the first climbing portion 15BP1 and the plane parallel to the substrate 11.

[0257] In some embodiments, please combine Figure 7 and Fig.18 The step of forming a pixel defining layer 15 on the side of the first electrode 141 away from the substrate 11 also includes: forming a second defining layer 15C on the side of the first defining layer 15B away from the substrate 11, the second defining layer 15C is an inorganic material, at least part of the pixel defining structure 151 also includes a second partition groove 15K3 located between two adjacent sub-pixels 10P, the second partition groove 15K3 runs through the second defining layer 15C, and in a direction perpendicular to the plane of the substrate 11, the thickness of the first defining layer 15B at the second partition groove 15K3 is greater than 0.

[0258] In some embodiments, the display substrate 100 includes a display area AA and a non-display area BB located at least on one side of the display area AA, and at least part of the sub-pixels 10P are located in the display area AA; the display substrate 100 also includes at least one first portion 101D located in the non-display area BB, and the first portion 101D is at least composed of a partition structure layer 15A; before the step of forming the pixel defining layer 15 on the side of the first electrode 141 away from the substrate 11, the step further includes: forming a first conductive layer ( Figure 8 The first electrode layer 14 is shown as a first conductive layer, the first conductive layer includes a first wiring 142 located in the non-display area BB; in the step of forming the pixel defining layer 15 on the side of the first electrode 141 away from the substrate 11, the first defining layer 15B forms a first slope 15XP (such as Fig.29 After the step of forming the second electrode 17 on the side of the light-emitting functional layer 16 away from the substrate 11, on a plane parallel to the substrate 11, the second electrode 17 is connected to the first wiring 142 on one side of the first portion 101D, the first slope 15XP is located at the connection between the second electrode 17 and the first wiring 142, and the second electrode 17 is extended on the first slope 15XP and connected to the first wiring 142 (please refer to Figures 8 to 10 ).

[0259] See also Fig.32 , Fig.32 A schematic diagram of a second process step of a method for manufacturing a display substrate provided in an embodiment of the present application; Fig.32 Another method for manufacturing a display substrate provided by the present application is illustrated. Figures 4 to 7 ,as well as Fig.14 The display substrates exemplified in the above can all be manufactured by using the manufacturing method of the display substrate, and the manufacturing method of the display substrate includes: step K100, step K200, step K300, step K400, step K500 and step K600.

[0260] K100, providing a substrate.

[0261] K200, forming a plurality of first electrodes on one side of the substrate.

[0262] K300, forming a pixel defining layer on a side of the first electrode away from the substrate, the pixel defining layer comprising a plurality of pixel defining structures, and a plurality of pixel openings of a plurality of sub-pixels defined by the plurality of pixel defining structures, the pixel openings exposing the first electrode; wherein the pixel defining layer comprises a first defining layer, and the first defining layer is an organic material.

[0263] K400, forming a charge generation layer in the light-emitting functional layer on a side of the first electrode away from the substrate.

[0264] K500, baking the substrate. After baking the display substrate, in at least part of the pixel defining structure, the edge of the first defining layer facing the pixel opening has a first climbing portion, and the slope angle of the first climbing portion is less than or equal to 42 degrees, and the slope angle is the angle between the tangent of the first climbing portion and a plane parallel to the substrate.

[0265] For example, when the charge generation layer 162 is formed (before the substrate is baked), the slope angle θ of the first climbing portion 15BP1 is large, and the slope angle θ of the first climbing portion 15BP1 is greater than or equal to 80 degrees. For example, the slope angle θ of the first climbing portion 15BP1 is any value of 80 degrees, 81 degrees, 82 degrees, 83 degrees, 84 degrees and 85 degrees. When the charge generation layer 162 is formed (before the substrate is baked), the slope angle θ of the first climbing portion 15BP1 is large, which makes it easy for the formed charge generation layer 162 to be disconnected at the first climbing portion 15BP1 or near the first climbing portion 15BP1, which can reduce the mobility of the lateral migration of charges between adjacent sub-pixels 10P, thereby improving or solving the problem of crosstalk between adjacent sub-pixels.

[0266] For example, after the charge generating layer 162 is formed and in the cross-sectional structure formed after the baking process, or in the final cross-sectional structure of the display substrate 100 or the cross-sectional structure of the display panel 1000, the slope angle θ of the first climbing portion 15BP1 is set to be less than or equal to 42 degrees. For example, the slope angle θ of the first climbing portion 15BP1 is any one of 42 degrees, 41 degrees, 40 degrees, 39 degrees, 38 degrees and 35 degrees.

[0267] For example, the slope angle θ of the first climbing portion 15BP1 is set to be less than or equal to 42 degrees (or at the same time, the thickness of the first limiting layer 15B is 5 microns to 15 microns in the direction perpendicular to the plane of the substrate 11), and the thickness of the light-emitting functional layer 16 is matched with the thickness of the pixel defining layer and the slope angle θ of the first climbing portion 15BP1 in the direction perpendicular to the substrate 11. Due to the setting of the first limiting layer 15B, the reflection of large-angle emitted light can be increased, the forward (positive viewing angle) light in the sub-pixel can be increased, and the light output efficiency of the light-emitting device can be improved.

[0268] For example, Fig.13 and Fig.14 As shown, in some embodiments, the pixel defining layer 15 only includes the first defining layer 15B, and does not include the partition structure layer 15A, that is, the pixel defining layer 15 only includes organic materials, and after the charge generating layer 162 is formed and in the cross-sectional structure formed after the baking process, or in the final cross-sectional structure of the display substrate 100 or the cross-sectional structure of the display panel 1000, the slope angle θ of the first climbing portion 15BP1 is set to be less than or equal to 42 degrees.

[0269] For example, Figure 4 As shown, in some embodiments, the pixel defining layer 15 includes a first defining layer 15B, and other film layers other than the first defining layer 15B, for example, the pixel defining layer 15 also includes a partition structure layer 15A and / or a second defining layer 15C, and after the charge generating layer 162 is formed and in the cross-sectional structure formed after the baking process, or in the final cross-sectional structure of the display substrate 100 or the cross-sectional structure of the display panel 1000, the slope angle θ of the first climbing portion 15BP1 is set to be less than or equal to 42 degrees.

[0270] For example, in some embodiments, Figure 5As shown in Fig. 14, in the direction perpendicular to the plane where the substrate 11 is located, the thickness of the first limiting layer 15B is 5 microns to 15 microns, for example, the thickness of the first limiting layer 15B is any value of 5 microns, 6 microns, 7 microns, 8 microns, 9 microns, 10 microns, 11 microns, 12 microns, 13 microns, 14 microns and 15 microns. By setting a thicker first limiting layer 15B, with the slope angle θ of the first climbing portion 15BP1 being less than or equal to 42 degrees, the light extraction efficiency of the display substrate or display panel can be better improved. At the same time, by setting a thicker first limiting layer 15B, with the slope angle θ of the first climbing portion 15BP1 being larger, when forming the charge generation layer 162, it is easier to make the formed charge generation layer 162 disconnected in the first climbing portion 15BP1 or near the first climbing portion 15BP1, which can reduce the mobility of the lateral migration of charges between adjacent sub-pixels 10P, thereby improving or solving the problem of crosstalk between adjacent sub-pixels.

[0271] K600: forming a second electrode on a side of the light-emitting functional layer away from the substrate.

[0272] The present application also provides a display panel, which includes the display substrate 100 of any one of the above items, or the display panel includes the display substrate 100 of any combination of the above items, or the display panel is manufactured using the manufacturing method of any one of the above display substrates.

[0273] The present application also provides a display device, which includes the display substrate 100 of any one of the above items, or the display device includes the display substrate 100 of any combination of the above items, or the display device is manufactured using the manufacturing method of the display substrate of any one of the above items.

[0274] For example, in some implementations, the display device may be a display panel.

[0275] For example, the display device may be a mobile phone, a laptop computer, a television, etc.

[0276] It should be noted that in the above embodiments, the description of each embodiment has its own emphasis, and for parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0277] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application.

[0278] Although the preferred embodiments of this specification have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of this specification.

[0279] Obviously, those skilled in the art can make various changes and modifications to this specification without departing from the spirit and scope of this specification. Thus, if these modifications and variations of this specification fall within the scope of the claims of this specification and their equivalents, this specification is also intended to include these modifications and variations.

Claims

1. A display substrate, characterized in that: The invention comprises a substrate, a pixel defining layer disposed on one side of the substrate, and a plurality of sub-pixels, wherein the pixel defining layer comprises a plurality of pixel defining structures and a plurality of pixel openings defined by the plurality of pixel defining structures, wherein the pixel openings are configured to define light emitting areas of the sub-pixels; The sub-pixel includes a light-emitting device, the light-emitting device includes a first electrode and a second electrode located on a side of the first electrode away from the substrate, and a light-emitting functional layer located between the first electrode and the second electrode, the light-emitting functional layer includes a plurality of film layers; The pixel defining layer includes a partition structure layer and a first defining layer arranged on a side of the partition structure layer away from the substrate, the partition structure layer includes at least one film layer, and the first defining layer is an organic material; Among them, the pixel defining structure between at least two adjacent sub-pixels includes a first partition structure formed by the partition structure layer on at least one side of the pixel opening, and at least a portion of at least one film layer in the light-emitting functional layer is disconnected at the first partition structure.

2. The display substrate according to claim 1, characterized in that: The first partition structure is formed by inward contraction of at least one side surface of the partition structure layer toward the pixel opening; The material of the partition structure layer is an inorganic material.

3. The display substrate according to claim 2, characterized in that: The partition structure layer includes a first sub-membrane layer and a second sub-membrane layer stacked in sequence in a direction away from the substrate, the first sub-membrane layer is at least partially arranged on a side of the first electrode away from the substrate, and the first partition structure is formed by the first sub-membrane layer being retracted relative to the edge of the second sub-membrane layer.

4. The display substrate according to claim 1, characterized in that: The pixel defining structure between at least two adjacent sub-pixels further includes a second partition structure located between the two adjacent sub-pixels, and at least a portion of at least one film layer in the light-emitting functional layer is disconnected at the second partition structure.

5. The display substrate according to claim 4, characterized in that: In a direction perpendicular to the plane where the base is located, the first partition structure and the second partition structure have different heights.

6. The display substrate according to claim 4, characterized in that: At least part of the pixel defining structure further includes a first partition groove, the first partition groove at least penetrates the first defining layer and at least part of the film layer of the partition structure layer, and the first partition groove exposes the second partition structure.

7. The display substrate according to claim 6, characterized in that: The partition structure layer comprises a third sub-film layer, a first sub-film layer and a second sub-film layer which are sequentially stacked in a direction away from the substrate, wherein the first sub-film layer is at least partially arranged on a side of the first electrode away from the substrate; The first partition structure is formed by the first sub-film layer being retracted relative to the edge of the second sub-film layer; The second partition structure is formed by at least the first sub-film layer being retracted relative to the edge of the second sub-film layer; In a direction perpendicular to the plane where the substrate is located, the thickness of the third sub-film layer at the first partition groove is greater than 0.

8. The display substrate according to claim 7, characterized in that: The partition structure layer further includes a fourth sub-film layer disposed between the third sub-film layer and the first sub-film layer; The second partition structure is formed by the first sub-membrane layer and the fourth sub-membrane layer being retracted relative to the edge of the second sub-membrane layer.

9. The display substrate according to claim 8, characterized in that: The first sub-film layer and the fourth sub-film layer are made of the same material.

10. The display substrate according to claim 9, characterized in that: The materials of the first sub-layer and the fourth sub-layer include silicon oxide, and the materials of the third sub-layer and the second sub-layer include silicon nitride.

11. The display substrate according to claim 8, characterized in that: The orthographic projection of the third sub-film layer on the substrate and the orthographic projection of the fourth sub-film layer on the substrate do not overlap with the orthographic projection of the first electrode on the substrate.

12. The display substrate according to claim 4, characterized in that: The plurality of sub-pixels include red sub-pixels, green sub-pixels and blue sub-pixels; In the red sub-pixel, the green sub-pixel and the blue sub-pixel, the pixel defining structure includes the first partition structure; At least one of the two adjacent sub-pixels located on both sides of the second partition structure is a red sub-pixel or a green sub-pixel.

13. The display substrate according to claim 4, characterized in that: The orthographic projection of the first partition structure on the base is a closed ring; The orthographic projection of the second partition structure on the base is in the shape of a non-closed ring.

14. The display substrate according to claim 1, characterized in that: In at least part of the pixel defining structure, the edge of the first defining layer facing the pixel opening has a first climbing portion, and the slope angle of the first climbing portion is less than or equal to 42 degrees, and the slope angle is the angle between the tangent of the first climbing portion and a plane parallel to the substrate.

15. The display substrate according to claim 1, characterized in that: The pixel defining layer further comprises a second defining layer disposed on a side of the first defining layer away from the substrate, wherein the second defining layer is an inorganic material; At least part of the pixel defining structure also includes a second partition groove located between two adjacent sub-pixels, the second partition groove penetrates the second defining layer, and in a direction perpendicular to the plane where the substrate is located, the thickness of the first defining layer at the second partition groove is greater than 0.

16. The display substrate according to any one of claims 1 to 15, characterized in that: The display substrate comprises a display area and a non-display area at least located on one side of the display area, and at least part of the sub-pixels are located in the display area; The display substrate further comprises at least one first portion located in the non-display area, wherein the first portion is at least composed of the partition structure layer; The display substrate further includes a first conductive layer disposed between the base and the pixel defining layer, the first conductive layer includes a first wiring located in the non-display area, and the second electrode is connected to the first wiring at one side of the first portion on a plane parallel to the base; The first limiting layer includes a first slope, the first slope is located at the connection between the second electrode and the first wiring, and the second electrode is extended on the first slope and then connected to the first wiring.

17. The display substrate according to claim 16, characterized in that: The display substrate also includes a first insulating layer arranged between the first electrode and the base, the first insulating layer is an organic material, the partition structure layer includes at least one air release hole located in the non-display area, the air release hole at least penetrates the partition structure layer, the partition structure layer is filled with organic material, and the first limiting layer is connected to the first insulating layer through the organic material in the air release hole.

18. A display device, characterized in that: The invention comprises the display substrate as claimed in any one of claims 1 to 17.

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