Output compensation signal generator and tester
By designing an op amp circuit in the signal generation device to form a feedback compensation loop, the test error problem caused by the voltage drop of the connection line when the signal generation device outputs the test signal is solved, and more accurate test signal output and higher test accuracy are achieved.
Patent Information
- Application Number
- CN202420763213.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-04-12
- Publication Date
- 2025-04-01
- Estimated Expiration
- 2034-04-12
AI Technical Summary
When the existing signal generation device outputs the test signal to the unit under test, there is an error in the test result due to the voltage drop on the connection line.
A signal generation device for output compensation is designed, and a feedback compensation loop is formed by connecting the operational amplifier circuit to the measured unit to form a feedback compensation loop, and the initial analog signal operation is amplified into an initial test signal, and the actual received signal is compensated according to the initial analog signal, and the accurate test signal is finally output.
By compensating for the voltage drop on the connection line, the accuracy of the output test signal is improved, thereby improving the test accuracy of the unit under test.
Smart Images

Figure CN222704644U_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of chip testing, and in particular to a signal generating device and a testing machine for output compensation. Background Art
[0002] A signal generator, such as an arbitrary waveform generator, is an electronic device that can generate various signal waveforms. It is one of the important tools in the field of modern electronic testing and measurement. In semiconductor automatic test equipment products, the signal generator can be used as an excitation voltage source or signal source for the unit under test.
[0003] In the prior art, when a signal generating device outputs a test signal to a unit under test through a connecting line, a voltage drop on the connecting line may cause an error in the test of the unit under test. Utility Model Content
[0004] Based on this, it is necessary to provide a signal generating device and a testing machine for output compensation in order to solve the above technical problems.
[0005] In a first aspect, an embodiment of the present application provides a signal generating device for output compensation, the device comprising:
[0006] A control unit, used for generating an initial digital signal;
[0007] A digital-to-analog conversion unit, connected to the control unit, and configured to convert the initial digital signal into an initial analog signal;
[0008] An operational amplifier circuit is connected to the digital-to-analog conversion unit and to the unit under test to form a feedback compensation loop, and is used to operationally amplify the initial analog signal into an initial test signal to the unit under test, and to compensate the actual received signal of the unit under test obtained according to the initial analog signal and then output a final test signal to the unit under test.
[0009] In one embodiment, the operational amplifier circuit includes a first operational amplifier unit and a second operational amplifier unit connected to the unit under test to form the feedback compensation loop; wherein,
[0010] The input end of the second operational amplifier unit is connected to the unit under test to obtain an actual received signal of the unit under test;
[0011] The non-phase input terminal of the first operational amplifier unit is connected to the digital-to-analog conversion unit, the inverting input terminal of the first operational amplifier unit is connected to the output terminal of the second operational amplifier unit, and the output terminal of the first operational amplifier unit is connected to the unit under test, so as to operationally amplify the initial analog signal into an initial test signal to the unit under test, and output a final test signal to the unit under test after compensating the actual received signal according to the initial analog signal.
[0012] In one embodiment, the gain of the second operational amplifier unit is 1.
[0013] In one embodiment, the device further comprises:
[0014] The filtering unit is connected between the digital-to-analog conversion unit and the operational amplifier circuit, and is used to select corresponding filtering parameters according to the initial analog signal and perform filtering processing on the initial analog signal.
[0015] In one embodiment, the filtering unit includes at least two filtering circuits with different filtering parameters, and a first switch unit respectively connected to each of the filtering circuits; wherein,
[0016] The first switch unit is used to control the access of the corresponding filter circuit.
[0017] In one embodiment, the filtering circuit comprises two filters connected in cascade.
[0018] In one embodiment, the filter includes a third operational amplifier unit, a first resistor, a second resistor, a first capacitor and a second capacitor, the first resistor and the second resistor are connected in series at the non-inverting input terminal of the third operational amplifier unit, one end of the second capacitor is connected to a reference ground, and the other end is connected to the non-inverting input terminal of the third operational amplifier unit; the first capacitor is connected between the middle node of the first resistor and the second resistor and the output terminal of the third operational amplifier unit, and the inverting input terminal of the third operational amplifier unit is connected to its output terminal.
[0019] In one embodiment, the filtering unit further includes a through circuit and a second switch unit connected to the through circuit, and the second switch unit is used to control access to the through circuit.
[0020] In one embodiment, the device further comprises:
[0021] A storage unit is connected to the control unit and is used to store the waveform data of the initial digital signal.
[0022] In a second aspect, an embodiment of the present application provides a test machine, comprising a signal generating device for output compensation as described in the first aspect.
[0023] Compared with the prior art, the technical solution forms a feedback compensation loop by connecting an operational amplifier circuit to the unit under test, amplifies the initial analog signal into an initial test signal to the unit under test, and compensates the actual received signal of the unit under test obtained according to the initial analog signal before outputting a final test signal to the unit under test, thereby compensating for the voltage drop in the connecting line between the signal generating unit and the unit under test, improving the accuracy of the output final test signal, and thus improving the test accuracy of the unit under test. BRIEF DESCRIPTION OF THE DRAWINGS
[0024] Figure 1 This is a schematic diagram of the structure of a signal generating device for output compensation in one embodiment of the present application;
[0025] Figure 2 This is a schematic diagram of the overall structure of a signal generating device for output compensation in one embodiment of the present application;
[0026] Figure 3 This is a schematic diagram of a specific structure of a signal generating device for output compensation in an exemplary embodiment of the present application;
[0027] Figure 4 FIG. 4 is a circuit diagram of a filter in an exemplary embodiment of the present application.
[0028] Among them, 10, signal generating device; 20, unit under test; 100, control unit; 200, digital-to-analog conversion unit; 300, operational amplifier circuit; 400, filtering unit; 500, storage unit. DETAILED DESCRIPTION
[0029] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.
[0030] Obviously, the drawings described below are only some examples or embodiments of the present application. For ordinary technicians in this field, the present application can also be applied to other similar scenarios based on these drawings without creative work. In addition, it can also be understood that although the efforts made in this development process may be complicated and lengthy, for ordinary technicians in this field related to the content disclosed in this application, some changes in design, manufacturing or production based on the technical content disclosed in this application are just conventional technical means, and should not be understood as insufficient content disclosed in this application.
[0031] Reference to "embodiments" in this application means that the specific features, structures, or characteristics described in conjunction with the embodiments may be included in multiple embodiments of the application. The appearance of the phrase in various places in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those of ordinary skill in the art that the embodiments described in this application can be combined with other embodiments without conflict.
[0032] Unless otherwise defined, the technical terms or scientific terms involved in this application should be understood by people with ordinary skills in the technical field to which this application belongs. The words "one", "a", "a", "the" and the like involved in this application do not indicate a quantitative limitation, and may represent the singular or plural. The terms "include", "comprise", "have" and any of their variations involved in this application are intended to cover non-exclusive inclusions; for example, a process, method, system, product or device that includes a series of steps or modules (units) is not limited to the listed steps or units, but may also include steps or units that are not listed, or may also include other steps or units inherent to these processes, methods, products or devices. The words "connect", "connected", "coupled" and the like involved in this application are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. The "multiple" involved in this application refers to two or more. "And / or" describes the association relationship of associated objects, indicating that there may be three relationships, for example, "A and / or B" can represent: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the objects before and after are in an "or" relationship. The terms "first", "second", "third", etc. involved in this application are only used to distinguish similar objects and do not represent a specific ordering of the objects.
[0033] like Figure 1 As shown, an embodiment of the present application proposes a signal generating device 10 for output compensation, which includes: a control unit 100, used to generate an initial digital signal; a digital-to-analog conversion unit 200, connected to the control unit 100, and used to convert the initial digital signal into an initial analog signal; an operational amplifier circuit 300, connected to the digital-to-analog conversion unit 200, and connected to the unit under test 20 to form a feedback compensation loop, used to operationally amplify the initial analog signal into an initial test signal to the unit under test 20, and compensate the actual received signal of the unit under test 20 obtained according to the initial analog signal, and then output a final test signal to the unit under test 20.
[0034] In this embodiment, an operational amplifier circuit 300 is connected to the unit under test 20 to form a feedback compensation loop, the initial analog signal is operationally amplified to be an initial test signal to the unit under test 20, and the actual received signal of the unit under test 20 obtained is compensated according to the initial analog signal, and then a final test signal is output to the unit under test 20, thereby compensating for the voltage drop caused by the HF and LF connecting lines between the signal generating device 10 and the unit under test 20, improving the accuracy of the output final test signal, and thus improving the test accuracy of the unit under test 20.
[0035] The control unit 100 is, for example, a field programmable gate array (FPGA).
[0036] Considering that in the related art, when the control unit 100 generates a waveform, it reads the waveform data and loads it into the digital-to-analog conversion unit 200, and the digital-to-analog conversion unit 200 outputs the corresponding voltage value at a certain time interval, thereby outputting the waveform in a dotted manner, that is, the initial analog signal. This dotted manner of outputting the waveform at a certain time step will have steps. Furthermore, the filtering parameters (such as bandwidth) of the filter in the signal generating device are unique, and when facing the initial analog signals of different signal frequency ranges, its filtering effect is not good.
[0037] To solve the above technical problems, in some embodiments, Figure 2 As shown, the signal generating device 10 further includes: a filtering unit 400 connected between the digital-to-analog conversion unit 200 and the operational amplifier circuit 300, for selecting corresponding filtering parameters according to the initial analog signal and filtering the initial analog signal.
[0038] In this embodiment, the initial analog signal output by the digital-to-analog conversion unit 200 is sent to the filtering unit 400 to smooth the waveform and attenuate the harmonics and out-of-band spurs in the waveform.
[0039] Furthermore, the filtering unit 400 can select corresponding filtering parameters according to the initial analog signal, have a better filtering processing effect on the initial analog signal, and can better attenuate the harmonics and out-of-band spurious of the waveform when the initial analog signal is output, thereby improving the indicators of the final test signal.
[0040] In some specific embodiments, the filtering unit 400 includes at least two filtering circuits with different filtering parameters, and a first switch unit respectively connected to each filtering circuit; wherein the first switch unit is used to control the access of the corresponding filtering circuit.
[0041] The first switch unit is controlled to implement access control of the filter circuit corresponding to the filter parameter, thereby implementing filtering processing on the initial analog signal.
[0042] In some other specific embodiments, the filtering unit 400 further includes a through circuit and a second switch unit connected to the through circuit, and the second switch unit is used to control the access of the through circuit.
[0043] The through circuit is, for example, a through connection line or a circuit including a set resistor. When the second switch unit is closed, the through circuit does not filter the initial analog signal.
[0044] In some test scenarios, since there is no need to filter the initial analog signal, the switch unit in the through circuit can be selected to be closed.
[0045] In some embodiments, the device further includes: a storage unit 500 connected to the control unit 100 and configured to store waveform data of the initial analog signal.
[0046] The control unit 100 controls the storage unit 500 to write and read waveform data, and generates an initial digital signal from the read waveform data and loads it into the digital-to-analog conversion unit 200 .
[0047] Figure 3 FIG. 1 is a schematic diagram of a structure of a signal generating device for output compensation in an exemplary embodiment. Figure 3 The device will be described in detail.
[0048] The operational amplifier circuit 300 includes a first operational amplifier unit A1 and a second operational amplifier unit A2 which are connected to the unit under test 20 to form a feedback compensation loop; wherein the input end of the second operational amplifier unit A2 is connected to the unit under test 20 to obtain the actual received signal of the unit under test 20; the non-phase input end of the first operational amplifier unit A1 is connected to the digital-to-analog conversion unit 200, the inverting input end of the first operational amplifier unit A1 is connected to the output end of the second operational amplifier unit A2, and the output end of the first operational amplifier unit A1 is connected to the unit under test 20, for operationally amplifying the initial analog signal into an initial test signal to the unit under test 20, and outputting a final test signal to the unit under test 20 after compensating the actual received signal according to the initial analog signal.
[0049] It should be noted that the above-mentioned operational amplifier circuit 300 is only a simple schematic diagram introduced for the convenience of description. Any modification of this part of the topology but still using negative feedback to collect the actual received signal to compensate for the voltage drop is within the protection scope of this application.
[0050] The output voltage Vo1 (initial test signal) of the first operational amplifier unit A1 is connected to the unit under test 20 via the HF and LF connecting lines. Since there is a voltage drop due to the current flowing through the HF and LF connecting lines, the voltage at the input end of the unit under test 20 will be less than the voltage Vo1, resulting in a voltage error. The input end of the second operational amplifier unit A2 is connected to the input end of the unit under test 20 via the HS and LS connecting lines, and is used to detect the input end voltage of the unit under test 20 (actual received signal). Since the input impedance of the second operational amplifier unit A2 is very high, there is no current in the HS and LS connecting lines, and therefore there is no voltage drop. Therefore, the voltage between the HS and LS connecting lines is equal to the input end voltage of the unit under test 20. Since the gain of the second operational amplifier unit A2 is 1, the output voltage Vo2 of the second operational amplifier unit A2 is equal to the input end voltage of the unit under test 20. The output of the second operational amplifier unit A2 is connected to the inverting input terminal of the first operational amplifier unit A1. When the voltage Vo2 is less than the voltage at the positive input terminal of the first operational amplifier unit A1, the output voltage Vo1 of the first operational amplifier unit A1 will increase, and the input voltage of the unit under test 20 will also increase accordingly, and the output voltage Vo2 of the second operational amplifier unit A2 will also increase accordingly, until the voltage Vo2 increases to be equal to the voltage at the positive input terminal of the first operational amplifier unit A1, the output voltage Vo1 of the first operational amplifier unit A1 remains stable, and the output is the final test signal at this time, then the voltage at the input terminal of the unit under test 20 also remains stable and is equal to the voltage at the positive input terminal of the first operational amplifier unit A1, thereby compensating for the voltage error caused by the voltage drop on the HF and LF connecting lines.
[0051] The filter unit 400 includes two filter circuits with different filter parameters (bandwidth) connected in parallel, a direct-through circuit, two first switch units (K1, K2) for controlling the filter circuits respectively, and a second switch unit (K3) for controlling the direct-through circuit access. The two filter circuits are the first filter circuit and the second filter circuit.
[0052] It should be noted that the filtering unit 400 may also be provided with more than two filtering circuits according to filtering requirements.
[0053] Each filter circuit includes two filters connected in cascade. For example, two Sallen-key low-pass filters are cascaded to form a fourth-order low-pass filter circuit.
[0054] The two filters are a first filter and a second filter. The first filter includes a third operational amplifier unit U1, a resistor R1, a resistor R2, a capacitor C1 and a capacitor C2, the resistor R1 and the resistor R2 are connected in series to the non-inverting input terminal of the third operational amplifier unit U1, one end of the capacitor C2 is connected to the reference ground, and the other end is connected to the non-inverting input terminal of the third operational amplifier unit U1; the capacitor C1 is connected between the middle node of the resistor R1 and the resistor R2 and the output terminal of the third operational amplifier unit U1, and the inverting input terminal of the third operational amplifier unit U1 is connected to its output terminal.
[0055] The second filter includes a third operational amplifier unit U2, a resistor R3, a resistor R4, a capacitor C3 and a capacitor C4. The second filter is connected to the output end of the first filter. Since the circuit structure of the second filter is the same as that of the first filter, it will not be described again.
[0056] In this example embodiment, the corresponding switch unit is controlled to close according to the initial analog signal to select the corresponding filter circuit, which can better attenuate the harmonics and out-of-band spurious of the waveform when the initial digital signal is output, thereby improving the index of the final test signal.
[0057] An embodiment of the present application further provides a testing machine, comprising the output compensation signal generating device in the above embodiment.
[0058] Since the test machine includes the output compensation signal generating device in the above-mentioned embodiment, it can solve the same technical problem and achieve the same technical effect, which will not be described in detail here.
[0059] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0060] The above embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the utility model patent. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the attached claims.
Claims
1. A signal generating device for output compensation, characterized in that: The device comprises: A control unit, used for generating an initial digital signal; A digital-to-analog conversion unit, connected to the control unit, and configured to convert the initial digital signal into an initial analog signal; An operational amplifier circuit is connected to the digital-to-analog conversion unit and to the unit under test to form a feedback compensation loop, and is used to operationally amplify the initial analog signal into an initial test signal to the unit under test, and to compensate the actual received signal of the unit under test obtained according to the initial analog signal and then output a final test signal to the unit under test.
2. The output compensation signal generating device according to claim 1, characterized in that: The operational amplifier circuit includes a first operational amplifier unit and a second operational amplifier unit connected to the unit under test to form the feedback compensation loop; wherein, The input end of the second operational amplifier unit is connected to the unit under test to obtain an actual received signal of the unit under test; The non-phase input terminal of the first operational amplifier unit is connected to the digital-to-analog conversion unit, the inverting input terminal of the first operational amplifier unit is connected to the output terminal of the second operational amplifier unit, and the output terminal of the first operational amplifier unit is connected to the unit under test, so as to operationally amplify the initial analog signal into an initial test signal to the unit under test, and output a final test signal to the unit under test after compensating the actual received signal according to the initial analog signal.
3. The output compensation signal generating device according to claim 2, characterized in that: The gain of the second operational amplifier unit is 1.
4. The output compensation signal generating device according to any one of claims 1 to 3, characterized in that: The device also includes: The filtering unit is connected between the digital-to-analog conversion unit and the operational amplifier circuit, and is used to select corresponding filtering parameters according to the initial analog signal and perform filtering processing on the initial analog signal.
5. The output compensation signal generating device according to claim 4, characterized in that: The filtering unit includes at least two filtering circuits with different filtering parameters, and a first switch unit respectively connected to each of the filtering circuits; wherein, The first switch unit is used to control the access of the corresponding filter circuit.
6. The output compensation signal generating device according to claim 5, characterized in that: The filtering circuit includes two filters connected in cascade.
7. The output compensation signal generating device according to claim 6, characterized in that: The filter includes a third operational amplifier unit, a first resistor, a second resistor, a first capacitor and a second capacitor. The first resistor and the second resistor are connected in series at the non-inverting input terminal of the third operational amplifier unit. One end of the second capacitor is connected to a reference ground, and the other end is connected to the non-inverting input terminal of the third operational amplifier unit. The first capacitor is connected between the middle node of the first resistor and the second resistor and the output terminal of the third operational amplifier unit, and the inverting input terminal of the third operational amplifier unit is connected to its output terminal.
8. The output compensation signal generating device according to claim 5, characterized in that: The filtering unit further includes a through circuit and a second switch unit connected to the through circuit, wherein the second switch unit is used to control access to the through circuit.
9. The output compensation signal generating device according to claim 1, characterized in that: The device also includes: A storage unit is connected to the control unit and is used to store the waveform data of the initial digital signal.
10. A testing machine, characterized in that: A signal generating device comprising the output compensation as claimed in any one of claims 1 to 9.