Display substrate and display device

Abstract

The embodiment of the utility model provides a display substrate and a display device.The display substrate comprises a pixel definition layer and a light-emitting device layer which are stacked, the pixel definition layer is provided with a plurality of pixel openings and a plurality of partition structures, and at least part of the partition structures correspond to at least part of the pixel openings one to one; the partition structures are arranged to be closed structures surrounding the corresponding pixel openings, in the plane where the display substrate is located, the light-emitting device layer comprises a plurality of light-emitting units formed by dividing of the partition structures, at least part of the light-emitting units correspond to at least part of the pixel openings in a one-to-one mode, and at least part of the light-emitting units are located in the corresponding pixel openings. According to the technical scheme provided by the embodiment of the invention, the technical problems that the cost is high and large-size display products are difficult to apply when a fine metal mask plate is adopted to prepare the display substrate can be solved.

Description

Technical Field

[0001] The embodiments of the present disclosure relate to, but are not limited to, the field of display technology, and in particular, to a display substrate and a display device. Background Art

[0002] Organic Light Emitting Diode (OLED) is an active light-emitting display device with the advantages of self-luminescence, wide viewing angle, high contrast, low power consumption, extremely high response speed, lightness, flexibility and low cost. With the continuous development of display technology, display devices with OLED as the light-emitting device and thin film transistor (TFT) for signal control have become the mainstream products in the current display field.

[0003] In practical applications, OLED display products have technical problems such as high preparation costs and difficulty in preparing large-size products. Utility Model Content

[0004] The problem to be solved by the embodiments of the present disclosure is to provide a display substrate and a display device to solve the technical problems of high display substrate preparation cost and difficulty in preparing large-size products.

[0005] In order to solve the above technical problems, in the first aspect, an embodiment of the present disclosure provides a display substrate, including a stacked pixel definition layer and a light-emitting device layer, the pixel definition layer is provided with a plurality of pixel openings and a plurality of partition structures, at least some of the partition structures correspond one-to-one to at least some of the pixel openings, the partition structures are arranged as closed structures surrounding the corresponding pixel openings, and within the plane where the display substrate is located, the light-emitting device layer includes a plurality of light-emitting units divided by the plurality of partition structures, at least some of the light-emitting units correspond one-to-one to at least some of the pixel openings, and at least part of the light-emitting units are located in the corresponding pixel openings.

[0006] In an exemplary embodiment, in a direction perpendicular to the plane where the display substrate is located, the light-emitting device layer includes a plurality of light-emitting device sublayers, the light-emitting unit includes a plurality of light-emitting devices, and in the same light-emitting unit, different light-emitting devices are located in different light-emitting device sublayers; along the direction from the pixel definition layer to the light-emitting device layer, the light-emitting device sublayer sequentially includes a first electrode layer, a light-emitting structure layer, and a second electrode layer, and in two adjacent light-emitting device sublayers, the second electrode layer of one light-emitting device sublayer is reused as the first electrode layer of the other light-emitting device sublayer;

[0007] The partition structure includes at least a plurality of overlapping substructures. In the partition structure corresponding to the same pixel opening, the plurality of overlapping substructures correspond one-to-one to the plurality of light-emitting device sublayers, and the overlapping substructures are configured to overlap and connect with the second electrode layer in the corresponding light-emitting device sublayer.

[0008] In an exemplary embodiment, in the same partition structure, the multiple overlapping substructures are arranged as a closed structure surrounding the corresponding pixel opening; in the plane where the display substrate is located, along the direction of the pixel opening pointing to the corresponding partition structure, in the partition structure corresponding to the same pixel opening, the multiple overlapping substructures are arranged in sequence at intervals, and the heights of the multiple overlapping substructures away from the surface of the pixel definition layer side relative to the surface of the pixel definition layer close to the light-emitting device layer side increase successively, thereby dividing the multiple light-emitting device sublayers into multiple light-emitting devices corresponding to the pixel opening.

[0009] In an exemplary embodiment, in the plane where the display substrate is located, along the direction from the pixel opening to the corresponding partition structure, in the partition structure corresponding to the same pixel opening, the plurality of overlapping substructures are sequentially overlapped and connected with the plurality of second electrode layers along the direction from the pixel definition layer to the light-emitting device layer;

[0010] In a direction perpendicular to the plane where the display substrate is located, the overlapping substructure is configured to at least disconnect the film layer structure between the second electrode layer in the light-emitting device layer that is overlapped and connected thereto and the pixel definition layer.

[0011] In an exemplary embodiment, the partition structure also includes a first isolation structure, which is located on a side of the pixel definition layer close to the light-emitting device layer in a direction perpendicular to the plane of the display substrate, and in the partition structure corresponding to the same pixel opening, the first isolation structure is configured as a closed structure surrounding the corresponding pixel opening, and in the direction surrounded by the closed structure where the first isolation structure is located, the multiple overlapping substructures are spaced apart by the first isolation structure; in a direction perpendicular to the plane of the display substrate, a surface of the first isolation structure away from the pixel definition layer relative to the pixel definition layer is greater than a surface of the light-emitting device layer away from the pixel definition layer relative to the pixel definition layer.

[0012] In an exemplary embodiment, the partition structure further includes a second isolation structure, the second isolation structure is configured as a closed structure surrounding the corresponding pixel opening, dividing the light-emitting device layer into a plurality of light-emitting units, and in a direction from the pixel opening to the partition structure, in the partition structure corresponding to the same pixel opening, the plurality of overlapping substructures are located between the corresponding pixel opening and the second isolation structure;

[0013] In a direction perpendicular to the plane of the display substrate, the second isolation structure is arranged on a side of the pixel definition layer close to the light-emitting device layer. The thickness of the second isolation structure is greater than that of the light-emitting device layer and penetrates the light-emitting device layer.

[0014] In an exemplary embodiment, the second isolation structures corresponding to the plurality of pixel openings are connected to each other to form a grid-like structure.

[0015] In an exemplary embodiment, the partition structure also includes a first cutting structure, which is located on a side of the second isolation structure away from the pixel definition layer in a direction perpendicular to the plane of the display substrate; along the direction of the pixel opening pointing to the corresponding partition structure, the size of the first cutting structure is larger than the size of the corresponding second isolation structure.

[0016] In an exemplary embodiment, the plurality of light-emitting device sublayers include a first type of light-emitting device sublayer and at least one second type of light-emitting device sublayer, and in a direction perpendicular to the plane where the display substrate is located, the second type of light-emitting device sublayer is located on a side of the first type of light-emitting device sublayer away from the pixel definition layer;

[0017] The multiple overlapping substructures corresponding to the same pixel opening include a first-type overlapping substructure and at least one second-type overlapping substructure, wherein the first-type overlapping substructure is overlap-connected to the second electrode layer in the first-type light-emitting device sublayer, and the second-type overlapping substructure is overlap-connected to the second electrode in the corresponding second-type light-emitting device sublayer.

[0018] In an exemplary embodiment, in a direction perpendicular to the plane where the display substrate is located, the first type of overlapping substructure includes a first region, the first region is located on a side of the pixel definition layer close to the light-emitting device layer, and a height of a surface of the first region on a side away from the pixel definition layer relative to the pixel definition layer is greater than or equal to a distance between a surface of the first type of light-emitting device sublayer on a side away from the pixel definition layer and the pixel definition layer, and is less than a distance between a second electrode layer in a second type of light-emitting device that is most adjacent to the first type of light-emitting device sublayer and the pixel definition layer;

[0019] The first-type overlapping substructure is overlapped and connected to the second electrode layer in the first-type light-emitting device sublayer through the first region.

[0020] In an exemplary embodiment, in a direction perpendicular to the plane where the display substrate is located, the second-type overlapping substructure includes a first area and a second area, the second area is located between the first area and the pixel definition layer, and in the same second-type overlapping substructure, the height of the surface of the first area away from the pixel definition layer relative to the pixel definition layer is greater than or equal to the distance between the surface of the corresponding second-type light-emitting device sublayer away from the pixel definition layer and the pixel definition layer; the height of the surface of the second area away from the pixel definition layer relative to the pixel definition layer is greater than or equal to the distance between the surface of the first electrode layer in the corresponding second-type light-emitting device sublayer away from the pixel definition layer and the pixel definition layer, and is less than the distance between the second electrode layer in the corresponding second-type light-emitting device sublayer and the pixel definition layer;

[0021] In the second type overlapping substructure, the first region is overlapped and connected to the second electrode layer in the corresponding second type light-emitting device sublayer, and an insulating structure is provided on the surface of the second region, which is configured to electrically insulate the second region from the light-emitting device layer.

[0022] In an exemplary embodiment, in at least part of the second type overlapping substructure, the height of the surface of the first region on the side away from the pixel definition layer relative to the pixel definition layer is smaller than the distance between the second electrode layer in the first type adjacent light-emitting device sublayer and the pixel definition layer, and the first type adjacent light-emitting device sublayer is the light-emitting device sublayer closest to the corresponding second type light-emitting device sublayer and is located on the side of the corresponding second type light-emitting device sublayer away from the pixel definition layer.

[0023] In an exemplary embodiment, in the direction from the pixel definition layer to the light-emitting device layer, the plurality of light-emitting device sublayers at least sequentially include a first light-emitting device sublayer, a second light-emitting device sublayer, and a third light-emitting device sublayer, the first type of light-emitting device sublayer includes the first light-emitting device sublayer, and the second type of light-emitting device sublayer includes the second light-emitting device sublayer and the third light-emitting device sublayer; the plurality of overlapping substructures include a first overlapping substructure, a second overlapping substructure, and a third overlapping substructure, the first type of overlapping substructure includes the first overlapping substructure, and the second type of overlapping substructure includes the second overlapping substructure and the third overlapping substructure; the first overlapping substructure is overlapped and connected to the first light-emitting device sublayer, the second overlapping substructure is overlapped and connected to the second light-emitting device sublayer, and the third overlapping substructure is overlapped and connected to the third light-emitting device sublayer;

[0024] In a direction perpendicular to the plane where the display substrate is located, the relationship between the height of the surface of the third overlapping substructure away from the pixel definition layer relative to the pixel definition layer and the thickness of the film layer in the light-emitting device layer is as follows:

[0025] M1+C1+M2+C2+M3+C3 <H3;

[0026] In the direction perpendicular to the plane where the display substrate is located, M1 is the thickness of the light-emitting structure layer in the first light-emitting device sublayer, M2 is the thickness of the light-emitting structure layer in the second light-emitting device sublayer, M3 is the thickness of the light-emitting structure layer in the third light-emitting device sublayer, C1 is the thickness of the second electrode in the first light-emitting device sublayer, C2 is the thickness of the second electrode in the second light-emitting device sublayer, C3 is the thickness of the second electrode in the third light-emitting device sublayer, and H3 is the height of the surface of the third overlapping substructure away from the pixel definition layer relative to the pixel definition layer.

[0027] In an exemplary embodiment, in a direction perpendicular to the plane where the display substrate is located, the relationship between the height of the surface of the second overlapping substructure away from the pixel definition layer relative to the pixel definition layer and the thickness of the film layer in the light-emitting device layer is as follows:

[0028] M1+C1+M2+C2 <H2<M1+C1+M2+C2+(1 / 2)M3;

[0029] In a direction perpendicular to the plane where the display substrate is located, H2 is a height of a surface of the second overlapping substructure away from the pixel definition layer relative to the pixel definition layer.

[0030] In an exemplary embodiment, in a direction perpendicular to the plane where the display substrate is located, the relationship between the height of the surface of the first overlapping substructure away from the pixel definition layer relative to the pixel definition layer and the thickness of the film layer in the light-emitting device layer is as follows:

[0031] M1+C1

[0032] In a direction perpendicular to the plane where the display substrate is located, H1 is a height of a surface of the first overlapping substructure away from the pixel definition layer relative to the pixel definition layer.

[0033] In an exemplary embodiment, in a direction perpendicular to the plane where the display substrate is located, the relationship between the height of the surface of the second region in the second overlapping substructure away from the pixel definition layer relative to the pixel definition layer and the thickness of the film layer in the light-emitting device layer is as follows:

[0034] M1+C1+(1 / 2)M2 <W1<M1+C1+M2;​

[0035] In a direction perpendicular to the plane where the display substrate is located, W1 is a height of a surface of a second region of the second overlapping substructure away from the pixel definition layer relative to the pixel definition layer.

[0036] In an exemplary embodiment, in a direction perpendicular to the plane where the display substrate is located, the relationship between the height of the surface of the second region in the third overlapping substructure away from the pixel definition layer relative to the pixel definition layer and the thickness of the film layer in the light-emitting device layer is as follows:

[0037] M1+C1+M2+C2+(1 / 2)M3 <W2<M1+C1+M2+C2+M3;

[0038] In a direction perpendicular to the plane where the display substrate is located, W2 is a height of a surface of a second region of the third overlapping substructure away from the pixel definition layer relative to the pixel definition layer.

[0039] In an exemplary embodiment, the partition structure further includes a plurality of second cutting structures, and in the partition structures corresponding to the same pixel opening, the plurality of second cutting structures correspond one-to-one to the plurality of overlapping substructures, and along the direction from the pixel opening to the corresponding partition structure, the size of the second cutting structure is larger than the size of the corresponding overlapping substructure;

[0040] In a direction perpendicular to the plane where the display substrate is located, the second cutting structure is located on a side of the corresponding overlapping substructure away from the pixel definition layer.

[0041] In an exemplary embodiment, in a cross-sectional structure along a direction where the pixel opening points to a corresponding partition structure, a cross section of the second cutting structure and a corresponding overlapping substructure forms a T-shape.

[0042] In an exemplary embodiment, in a direction perpendicular to the plane of the display substrate, a height of a surface of the second cutting structure away from the pixel definition layer relative to the pixel definition layer is greater than a distance between a surface of a corresponding light-emitting device sublayer away from the pixel definition layer and the pixel definition layer, and is less than a distance between a surface of a second electrode layer of a first type of adjacent light-emitting device sublayer away from the pixel definition layer and the pixel definition layer, the first type of adjacent light-emitting device sublayer being the light-emitting device sublayer most adjacent to the corresponding light-emitting device sublayer and being located on the side of the corresponding second type of light-emitting device sublayer away from the pixel definition layer.

[0043] In an exemplary embodiment, within the plane where the display substrate is located, along the direction of the pixel opening pointing to the corresponding partition structure, on the same side of the center of the second cutting structure, the difference between the size of the second cutting structure and the size of the corresponding overlapping substructure is 0.1 micrometers to 0.6 micrometers; in the direction perpendicular to the plane where the display substrate is located, the size of the second cutting structure is 2 nanometers to 25 nanometers.

[0044] In an exemplary embodiment, within the plane where the display substrate is located, along the direction from the pixel opening to the corresponding partition structure, in the partition structure corresponding to the same pixel opening, the size of the overlapping substructure is 3 micrometers to 13 micrometers.

[0045] In an exemplary embodiment, the partition structure further includes a third cutting structure, and in the partition structures corresponding to the same pixel opening, along the direction of the pixel opening pointing to the corresponding partition structure, the size of the third cutting structure is larger than the size of the corresponding overlapping substructure;

[0046] In a direction perpendicular to the plane where the display substrate is located, the third cutting structure is located on a side of the corresponding first isolation structure away from the pixel definition layer.

[0047] In an exemplary embodiment, the display substrate further includes a backplane and an anode layer, in a direction perpendicular to the plane where the display substrate is located, the backplane is located on a side of the pixel definition layer away from the light-emitting device layer, the anode layer is located between the backplane and the pixel definition layer, the anode layer includes a plurality of anodes, at least some of the anodes correspond to at least some of the pixel openings and at least some of the light-emitting units one by one, and the orthographic projection of the pixel opening on the backplane is located within the range of the orthographic projection of the corresponding anode on the backplane;

[0048] In the anode and the light-emitting unit corresponding to the same pixel opening, the anode is reused as the first electrode of the light-emitting device in the light-emitting unit that is closest to the backplane.

[0049] In an exemplary embodiment, a plurality of electrode traces are provided in the back panel, and at least some of the electrode traces are electrically connected one-to-one with at least some of the overlapping substructures. In a direction perpendicular to the plane of the display substrate, the overlapping substructure is configured so that one end is electrically connected to the corresponding electrode trace and the other end passes through the pixel definition layer and is overlapped and connected to the corresponding second electrode layer.

[0050] In an exemplary embodiment, in a direction perpendicular to the plane of the display substrate, the light emitting structure layer has a thickness of 2000 angstroms to 4000 angstroms, the first electrode layer has a thickness of 8 nanometers to 55 nanometers, the second electrode layer has a thickness of 8 nanometers to 55 nanometers, and the pixel definition layer has a thickness of 0.5 micrometers to 3 micrometers.

[0051] In an exemplary embodiment, the first electrode layer and the second electrode layer are made of metal, and in a direction perpendicular to the plane where the display substrate is located, the thickness of the first electrode layer is 8 nanometers to 25 nanometers, and the thickness of the second electrode layer is 8 nanometers to 25 nanometers;

[0052] Alternatively, the first electrode layer and the second electrode layer are made of semiconductor oxide, and in a direction perpendicular to the plane of the display substrate, the thickness of the first electrode layer is 8 nanometers to 55 nanometers, and the thickness of the second electrode layer is 8 nanometers to 55 nanometers.

[0053] In a second aspect, an embodiment of the present disclosure provides a display device, comprising the display substrate described in any of the above embodiments.

[0054] In a third aspect, an embodiment of the present disclosure provides a method for preparing a display substrate, comprising:

[0055] A pixel definition layer is formed on one side of the back plate, wherein a plurality of pixel openings are provided on the pixel definition layer;

[0056] A plurality of partition structures are formed on a side of the pixel definition layer away from the back plate, at least some of the partition structures correspond to at least some of the pixel openings one by one, and the partition structures are configured as closed structures surrounding the corresponding pixel openings;

[0057] A light-emitting device layer is formed on a side of the partition structure away from the back panel. In a plane where the display substrate is located, the light-emitting device layer includes a plurality of light-emitting units divided by the plurality of partition structures. At least some of the light-emitting units correspond one-to-one to at least some of the pixel openings, and at least some of the light-emitting units are located in the corresponding pixel openings.

[0058] The display substrate and its preparation method and display device provided by the embodiments of the present disclosure include a stacked pixel definition layer and a light-emitting device layer. The pixel definition layer is provided with a plurality of pixel openings and a plurality of partition structures. At least part of the partition structures correspond to at least part of the pixel openings one by one. The partition structures are configured as closed structures surrounding the corresponding pixel openings. The light-emitting device layer includes a plurality of light-emitting units divided by a plurality of partition structures. In the scheme provided by the embodiments of the present disclosure, the plurality of light-emitting units in the light-emitting device layer are divided by a plurality of partition structures, which can reduce the high cost of preparing the display substrate and enable the preparation of large-size display products, and can overcome the technical problems of high cost of preparing the display substrate using a fine metal mask and difficulty in applying to large-size display products.

[0059] Other aspects will be apparent upon reading and understanding the drawings and detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0060] The accompanying drawings are used to provide a further understanding of the technical solution of the present disclosure and constitute a part of the specification. Together with the embodiments of the present disclosure, they are used to explain the technical solution of the present disclosure and do not constitute a limitation on the technical solution of the present disclosure. The shapes and sizes of the components in the accompanying drawings do not reflect the actual proportions and are only intended to illustrate the contents of the present disclosure.

[0061] Figure 1 Shown is a schematic structural diagram of a display device provided by an embodiment of the present disclosure;

[0062] Figure 2 Shown is a schematic diagram of a planar structure of a display substrate provided by an embodiment of the present disclosure;

[0063] Figure 3 Shown is a schematic diagram of a planar structure of a display substrate provided by an embodiment of the present disclosure;

[0064] Figure 4 Shown Figure 3 A schematic diagram of a cross-sectional structure at the center line A1-A1;

[0065] Figure 5 FIG. 1 is a schematic cross-sectional structure diagram of a display substrate provided by an exemplary embodiment of the present disclosure;

[0066] Figure 6 Shown is a schematic diagram of a planar structure of a display substrate provided by an embodiment of the present disclosure;

[0067] Figure 7a Shown Figure 6 A schematic diagram of a cross-sectional structure at the B1-B1 position;

[0068] Figure 7b Shown Figure 6 A schematic diagram of a cross-sectional structure at the B11-B11 position;

[0069] Figure 8 Shown Figure 6 A schematic diagram of a cross-sectional structure at position B2;

[0070] Fig. 9 FIG. 1 is a schematic diagram of a planar structure of a display substrate provided by an exemplary embodiment of the present disclosure;

[0071] Fig.10 FIG. 1 is a schematic diagram of a planar structure of a display substrate provided by an exemplary embodiment of the present disclosure;

[0072] Fig.11 Shown Fig. 9 and Fig.10 A schematic diagram of a cross-sectional structure at position B3;

[0073] Fig.12 Shown Fig. 9 A schematic diagram of a cross-sectional structure at the A2-A2 position;

[0074] Fig.13 Shown Fig.10 A schematic diagram of a cross-sectional structure at the B4-B4 position;

[0075] Fig.14 Shown Figure 5 A schematic diagram of the partially enlarged structure;

[0076] Fig.15 Shown Fig.14 A schematic diagram of the structure after removing the light-emitting device layer;

[0077] Fig.16 Shown Fig.13 A schematic diagram of the structure after removing the light-emitting device layer;

[0078] Fig.17 Shown Fig. 9 A schematic diagram of a cross-sectional structure at the A2-A2 position;

[0079] Fig.18 Shown Fig.10 A schematic diagram of a cross-sectional structure at the B4-B4 position;

[0080] Fig.19a FIG. 1 is a schematic diagram of a cross-sectional structure after forming a pixel definition layer provided by an exemplary embodiment of the present disclosure;

[0081] Fig.19b Shown is a schematic cross-sectional structure diagram of an exemplary embodiment of the present disclosure after forming a lapped via hole;

[0082] Fig.19cShown is a schematic diagram of a cross-sectional structure after forming a lapped electrode column provided by an exemplary embodiment of the present disclosure;

[0083] Fig.19d Shown is a schematic cross-sectional structure diagram of an exemplary embodiment of the present disclosure after forming an overlapping substructure;

[0084] Fig.19e FIG. 1 is a schematic diagram of a cross-sectional structure after forming a second cutting structure provided by an exemplary embodiment of the present disclosure;

[0085] Fig. 20 FIG. 1 is a schematic cross-sectional structure diagram of a display substrate provided by an exemplary embodiment of the present disclosure;

[0086] Fig.21 Shown is a schematic diagram of a display device provided by an embodiment of the present disclosure. DETAILED DESCRIPTION

[0087] The embodiments of the present disclosure will be described in detail below in conjunction with the accompanying drawings. Note that the embodiments can be implemented in a plurality of different forms. A person of ordinary skill in the art can easily understand the fact that the methods and contents can be transformed into various forms without departing from the purpose and scope of the present disclosure. Therefore, the present disclosure should not be interpreted as being limited to the contents described in the following embodiments. In the absence of conflict, the embodiments in the present disclosure and the features in the embodiments can be arbitrarily combined with each other. In order to keep the following description of the embodiments of the present disclosure clear and concise, the present disclosure omits the detailed description of some known functions and known components. The drawings of the embodiments of the present disclosure only relate to the structures involved in the embodiments of the present disclosure, and other structures can refer to the usual design.

[0088] The proportions of the drawings in this disclosure can be used as a reference in the actual process, but are not limited to this. For example: the width-to-length ratio of the channel, the thickness and spacing of each film layer, the width and spacing of each signal line can be adjusted according to actual needs. The number of pixels in the display substrate and the number of sub-pixels in each pixel are not limited to the numbers shown in the figures. The drawings described in this disclosure are only structural schematic diagrams, and one method of this disclosure is not limited to the shapes or values ​​shown in the drawings.

[0089] In the present specification, ordinal numbers such as “first”, “second” and “third” are provided to avoid confusion among constituent elements, and are not intended to limit the number.

[0090] In this specification, for the sake of convenience, the words and phrases indicating the orientation or positional relationship, such as "middle", "upper", "lower", "front", "back", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., are used to illustrate the positional relationship of the constituent elements with reference to the drawings. This is only for the convenience of describing this specification and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation, and therefore cannot be understood as a limitation of the present disclosure. The positional relationship of the constituent elements is appropriately changed according to the direction in which each constituent element is described. Therefore, it is not limited to the words and phrases described in the specification, and can be appropriately replaced according to the situation.

[0091] In this specification, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, or an electrical connection; it can be a direct connection, or an indirect connection through an intermediate, or the internal communication of two elements. For ordinary technicians in this field, the meanings of the above terms in this disclosure can be understood according to actual conditions.

[0092] In this specification, "electrical connection" includes the case where components are connected together through an element having some electrical function. There is no particular limitation on the "element having some electrical function" as long as it can transmit and receive electrical signals between the connected components. Examples of "element having some electrical function" include not only electrodes and wiring, but also switching elements such as transistors, resistors, inductors, capacitors, and other elements having various functions.

[0093] In this specification, "parallel" means a state where the angle formed by two straight lines is greater than -10° and less than 10°, and therefore, also includes a state where the angle is greater than -5° and less than 5°. In addition, "perpendicular" means a state where the angle formed by two straight lines is greater than 80° and less than 100°, and therefore, also includes a state where the angle is greater than 85° and less than 95°.

[0094] In this specification, "film" and "layer" may be interchanged. For example, "conductive layer" may be replaced by "conductive film". Similarly, "insulating film" may be replaced by "insulating layer".

[0095] The triangles, rectangles, trapezoids, pentagons or hexagons in this specification are not in the strict sense, and may be approximate triangles, rectangles, trapezoids, pentagons or hexagons, etc. There may be some small deformations caused by tolerances, and there may be chamfers, arc edges and deformations.

[0096] The term "about" in the present disclosure refers to a numerical value that is not strictly limited to allow for process and measurement errors.

[0097] Figure 1 FIG. 1 is a schematic diagram of the structure of a display device. Figure 1 As shown, the display device may include a timing controller, a data signal driver, a scan signal driver and a pixel array, and the pixel array may include a plurality of scan signal lines (S1 to Sm), a plurality of data signal lines (D1 to Dn) and a plurality of sub-pixels Pxij.

[0098] In an exemplary embodiment, the timing controller may provide a grayscale value and a control signal suitable for the specifications of the data signal driver to the data signal driver, and may provide a clock signal, a scan start signal, etc. suitable for the specifications of the scan signal driver to the scan signal driver. The data signal driver may generate a data voltage to be provided to the data signal lines D1, D2, D3, ... and Dn using the grayscale value and the control signal received from the timing controller. For example, the data signal driver may sample the grayscale value using the clock signal, and apply the data voltage corresponding to the grayscale value to the data signal lines D1 to Dn in units of sub-pixel rows, where n may be a natural number. The scan signal driver may generate a scan signal to be provided to the scan signal lines S1, S2, S3, ... and Sm by receiving a clock signal, a scan start signal, etc. from the timing controller. For example, the scan signal driver may sequentially provide a scan signal having an on-level pulse to the scan signal lines S1 to Sm. For example, the scan signal driver can be constructed in the form of a shift register, and can generate a scan signal in a manner that a scan start signal provided in the form of a conduction level pulse is sequentially transmitted to the next level circuit under the control of a clock signal, and m can be a natural number. The sub-pixel array can include a plurality of pixel sub-PXij. Each pixel sub-PXij can be connected to a corresponding data signal line and a corresponding scan signal line, and i and j can be natural numbers. The sub-pixel PXij can refer to a sub-pixel in which a transistor is connected to the i-th scan signal line and to the j-th data signal line.

[0099] Figure 2 FIG. 1 is a schematic diagram of a planar structure of a display device. Figure 2As shown, the display area of ​​the display device may include a plurality of pixel units P (which may be referred to as light-emitting units) arranged in a matrix manner, at least one of the plurality of pixel units P includes a first sub-pixel P1 emitting a first color light, a second sub-pixel P2 emitting a second color light, and a third sub-pixel P3 emitting a third color light, and the first sub-pixel P1, the second sub-pixel P2, and the third sub-pixel P3 each include a pixel driving circuit and a light-emitting device. The pixel driving circuits in the sub-pixels are respectively connected to the scanning signal lines and the data signal lines, and the pixel driving circuits are configured to receive the data voltage transmitted by the data signal lines under the control of the scanning signal lines, and output corresponding currents to the light-emitting devices. The light-emitting devices in the sub-pixels are respectively connected to the pixel driving circuits of the sub-pixels in which they are located, and the light-emitting devices are configured to emit light of corresponding brightness in response to the current output by the pixel driving circuit of the sub-pixels in which they are located.

[0100] In an exemplary embodiment, the first sub-pixel P1 may be a red sub-pixel emitting red (R) light, the second sub-pixel P2 may be a blue sub-pixel emitting blue (B) light, and the third sub-pixel P3 may be a green sub-pixel emitting green (G) light. In an exemplary embodiment, the shape of the sub-pixels may be any one or more of a triangle, a square, a rectangle, a rhombus, a trapezoid, a parallelogram, a pentagon, a hexagon, and other polygons, and may be arranged in a horizontal parallel arrangement, a vertical parallel arrangement, an X-shape, a cross, a herringbone shape, a square, a diamond shape, or a delta shape, which is not limited in the present disclosure.

[0101] In an exemplary embodiment, the number of sub-pixels included in a pixel unit is not limited to three. For example, a pixel unit may include four sub-pixels, which is not limited in the present disclosure.

[0102] like Figure 2As shown, OLED display technology usually uses a periodic arrangement of three RGB sub-pixels or four RGBW sub-pixels to achieve full-color display, that is, one pixel includes three sub-pixels or four sub-pixels arranged in a tiled manner. This arrangement has the following problems: First, the sub-pixel aperture ratio needs to be balanced according to the device efficiency and life performance of different colors. The pixel aperture ratios of different colors may be different, and there is a problem of low pixel aperture ratio of at least some sub-pixels; second, since one pixel requires three or four sub-pixels, one pixel needs to have at least three pixel driving circuits to drive the corresponding sub-pixels, resulting in an increase in signal routing in the driving backplane, making it difficult to increase pixel density and increasing costs accordingly; third, three or four sub-pixels are periodically arranged in a tiled manner. This arrangement makes it difficult to achieve ultra-high pixel density (the full name is pixels per inch, abbreviated as PPI), that is, it is difficult to increase pixel density. The three RGB sub-pixels are set as a stacked structure, and the lighting of different colors is controlled by time-sharing to achieve full-color display. The aperture ratio of such a structure can be about Figure 2 The aperture ratio of the structure shown is 3 times that of the structure shown in the figure. Under the condition that the device performance remains unchanged, the performance of the product can be greatly improved, and the pixel density is about Figure 2 The product life can be increased by about three times, and the three RGB sub-pixels are set as a stacked structure. A fine metal mask (FMM for short) is required to prepare the organic light-emitting layer and the cathode electrode layer. The fine metal mask (FMM) has high cost and is difficult to apply to large-size OLED display products.

[0103] An embodiment of the present disclosure provides a display substrate, which may include a stacked pixel definition layer and a light-emitting device layer, wherein a plurality of pixel openings and a plurality of partition structures are provided on the pixel definition layer, wherein at least some of the partition structures correspond one-to-one with at least some of the pixel openings, and the partition structures are configured as closed structures surrounding the corresponding pixel openings. Within a plane where the display substrate is located, the light-emitting device layer includes a plurality of light-emitting units divided by the plurality of partition structures, wherein at least some of the light-emitting units correspond one-to-one with at least some of the pixel openings, and at least some of the light-emitting units are located in the corresponding pixel openings.

[0104] The display substrate provided by the embodiment of the present disclosure includes a stacked pixel definition layer and a light-emitting device layer, the pixel definition layer is provided with a plurality of pixel openings and a plurality of partition structures, at least part of the partition structures correspond one-to-one to at least part of the pixel openings, the partition structures are arranged as closed structures surrounding the corresponding pixel openings, and the light-emitting device layer includes a plurality of light-emitting units formed by a plurality of partition structures; in the scheme provided by the embodiment of the present disclosure, a plurality of light-emitting units in the light-emitting device layer are formed by a plurality of partition structures, which can reduce the high cost of preparing the display substrate and enable the preparation of large-size display products, and can overcome the technical problems of high cost of preparing the display substrate using a fine metal mask and difficulty in applying to large-size display products.

[0105] like Figures 3 to 5 As shown, Figure 3 FIG. 1 is a schematic diagram of a planar structure of a display substrate. Figure 4 Shown Figure 3 A schematic diagram of a cross-sectional structure at the A1-A1 position in the figure. Figure 5 Shown Figure 4 In the schematic diagram of the partially enlarged structure, the display substrate provided by the embodiment of the present disclosure may include a stacked pixel definition layer PDL and a light-emitting device layer P0, a plurality of pixel openings K1 and a plurality of partition structures 21 are provided on the pixel definition layer PDL, at least some of the partition structures 21 correspond one-to-one with at least some of the pixel openings K1, and the partition structures 21 are configured as a closed structure surrounding the corresponding pixel openings K1, and within the plane where the display substrate is located, the light-emitting device layer P0 includes a plurality of light-emitting units P divided by a plurality of partition structures 21, at least some of the light-emitting units P correspond one-to-one with at least some of the pixel openings K1, and at least part of the light-emitting units P is located in the corresponding pixel openings K1.

[0106] In an exemplary embodiment, a plurality of light-emitting units P in the light-emitting device layer P0 are formed by dividing by a plurality of partition structures 21, and a high-cost fine metal mask (FMM) is not required, which can reduce costs and is suitable for preparing large-sized display substrates. The cost of the open mask (Open Mask) is lower than that of the fine metal mask (FMM). The use of a relatively low-cost open mask (Open Mask) in conjunction with the partition structure 21 to prepare pixel-level light-emitting units can greatly reduce the cost of preparing the display substrate. In addition, the light-emitting device layer P0 prepared by the Open Mask can be suitable for large-sized display substrates.

[0107] In an exemplary embodiment, in a direction Z perpendicular to the plane where the display substrate is located, the light-emitting device layer P0 may include a plurality of light-emitting device sublayers (for example, the plurality of light-emitting device sublayers may include P01, P02, and P03), the light-emitting unit P may include a plurality of light-emitting devices (for example, the plurality of light-emitting devices may include P11, P12, and P13), and in the same light-emitting unit P, different light-emitting devices may be located in different light-emitting device sublayers (for example, the same light-emitting unit P may include a first light-emitting device P11, a second light-emitting device P12, and a third light-emitting device P13). 3, the first light-emitting device P11 can be located in the first light-emitting device sublayer P01, the second light-emitting device P12 can be located in the second light-emitting device sublayer P02, and the third light-emitting device P13 can be located in the third light-emitting device sublayer P03); in the direction from the pixel definition layer PDL to the light-emitting device layer P0, the light-emitting device sublayers can sequentially include a first electrode layer 110, a light-emitting structure layer EL0, and a second electrode layer 120, and in two adjacent light-emitting device sublayers, the second electrode layer 120 of one light-emitting device sublayer can be reused as the first electrode layer 110 of the other light-emitting device sublayer;

[0108] The partition structure 21 may include multiple overlapping substructures (for example, the multiple overlapping substructures may include 211, 212, and 213). In the partition structure 21 corresponding to the same pixel opening K1, the multiple overlapping substructures correspond one-to-one to the multiple light-emitting device sublayers, and the overlapping substructures are configured to overlap and connect with the second electrode layer 120 in the corresponding light-emitting device sublayer.

[0109] In an exemplary embodiment, in the same partition structure 21, a plurality of overlapping substructures are arranged as a closed structure surrounding the corresponding pixel opening K1; in the plane where the display substrate is located (in the plane where the first direction X and the second direction Y are located, the first direction X intersects with the second direction Y), along the direction of the pixel opening K1 pointing to the corresponding partition structure 21, in the partition structure 21 corresponding to the same pixel opening K1, a plurality of overlapping substructures are sequentially arranged at intervals, and the height of the plurality of overlapping substructures away from the surface of the side of the pixel definition layer PDL relative to the surface of the side of the pixel definition layer PDL close to the light-emitting device layer P0 increases sequentially, and the plurality of light-emitting device sublayers are sequentially divided into a plurality of light-emitting devices corresponding to the pixel opening K1. For example, the first light-emitting device sublayer P01 can be divided into a first light-emitting device P11 by the first overlapping substructure 211, the second light-emitting device sublayer P02 can be divided into a second light-emitting device P12 by the second overlapping substructure 212, and the third light-emitting device sublayer P03 can be divided into a third light-emitting device P13 by the third overlapping substructure 213.

[0110] In an exemplary embodiment, the number of light-emitting device sublayers is not limited to three, for example, the number of light-emitting device sublayers may be more than three, or less than three. In an exemplary embodiment, in a partition structure 21 corresponding to a same pixel opening, the number of overlapping substructures is not limited to three, for example, the number of overlapping substructures may be more than three, or less than three. In an exemplary embodiment, the number of light-emitting device sublayers may be the same as the number of overlapping substructures in the same partition structure 21, and correspond one-to-one to the overlapping substructures in the partition structure 21.

[0111] In an exemplary embodiment, in the plane where the display substrate is located, along the direction of the pixel opening K1 pointing to the corresponding partition structure 21, in the partition structure 21 corresponding to the same pixel opening K1, a plurality of overlapping substructures are sequentially overlapped and connected with a plurality of second electrode layers 120 along the direction of the pixel definition layer PDL pointing to the light emitting device layer P0;

[0112] In the direction Z perpendicular to the plane where the display substrate is located, the overlapping substructure can be configured to at least disconnect the film structure between the second electrode layer 120 overlapped and connected thereto in the light-emitting device layer P0 and the pixel definition layer PDL. For example, the first overlapping substructure 121 can disconnect the light-emitting structure layer EL0 and the second electrode layer 120 in the first light-emitting device sublayer P01 to form a corresponding first light-emitting device P11; the second overlapping substructure 122 can disconnect the light-emitting structure layer EL0, the second electrode layer 120 and the second light-emitting device sublayer P02 in the first light-emitting device sublayer P01 to form a corresponding second light-emitting device P12; the third overlapping substructure 123 can disconnect the light-emitting structure layer EL0, the second electrode layer 120 and the second light-emitting device sublayer P02 and the third light-emitting device sublayer P03 in the first light-emitting device sublayer P01 to form a corresponding third light-emitting device P13.

[0113] In an exemplary embodiment, Figures 3 to 5 In the structure shown, along the direction from the pixel definition layer PDL to the light-emitting device layer P0, the light-emitting device may include a first electrode 11, a light-emitting structure EL, and a second electrode 12 stacked in sequence. In two adjacent light-emitting devices in the same light-emitting unit P, the second electrode 12 of one light-emitting device may be reused as the first electrode 11 of the other light-emitting device.

[0114] In at least part of the light-emitting devices of the same light-emitting unit P, the first electrode 11, the light-emitting structure EL, and the second electrode 12 are formed by disconnecting the first electrode layer 110, the light-emitting structure layer EL0, and the second electrode layer 120 in the corresponding light-emitting device sublayer in sequence through the corresponding overlapping substructure. For example, the first electrode 11 can be formed by disconnecting the first electrode layer 110 in the corresponding light-emitting device sublayer through the corresponding overlapping substructure, the second electrode 12 can be formed by disconnecting the second electrode layer 120 in the corresponding light-emitting device sublayer through the corresponding overlapping substructure, and the light-emitting structure EL0 can be formed by disconnecting the light-emitting structure layer EL0 in the corresponding light-emitting device sublayer through the corresponding overlapping substructure.

[0115] In an exemplary embodiment, if Figures 6 to 8 As shown, Figure 6 FIG. 1 is a schematic diagram of a planar structure of a display substrate. Figure 7a Shown Figure 6 A schematic diagram of a cross-sectional structure at the B1-B1 position in the figure. Figure 7b Shown Figure 6 A schematic diagram of a cross-sectional structure at the B11-B11 position in the figure. Figure 8 Shown Figure 6 A schematic diagram of a cross-sectional structure at position B2 in the figure, the partition structure 21 may also include a first isolation structure 31, in the direction perpendicular to the plane where the display substrate is located, the first isolation structure 31 may be located on the side of the pixel definition layer close to the light-emitting device layer, in the partition structure 21 corresponding to the same pixel opening K1, the first isolation structure 31 is set as a closed structure surrounding the corresponding pixel opening K1, in the direction surrounding the closed structure where the first isolation structure 31 is located, a plurality of overlapping substructures are arranged at intervals through the first isolation structure 31. In an exemplary embodiment, in the direction perpendicular to the plane where the display substrate is located, the height of the surface of the first isolation structure 31 on the side away from the pixel definition layer PDL relative to the pixel definition layer PDL is greater than the height of the surface of the light-emitting device layer P0 on the side away from the pixel definition layer PDL relative to the pixel definition layer PDL, which can ensure that the first isolation structure 31 divides the light-emitting device into independent light-emitting units P, avoiding crosstalk between two adjacent light-emitting units.

[0116] In an exemplary embodiment, Figures 6 to 8 In the structure shown, a plurality of overlapping substructures in the same partition structure 21 are located in the same closed annular structure, and the distance KD between two adjacent pixel openings K1 can be greatly reduced, thereby increasing the aperture ratio or the pixel density.

[0117] In an exemplary embodiment, if Figures 9 to 13 As shown, Fig. 9 and Fig.10 Shown are schematic diagrams of the planar structures of two display substrates. Fig.11 Shown Fig. 9 and Fig.10 Schematic diagram of the cross-section structure at position B3, Fig.12 for Fig. 9 The cross-sectional structure diagram at the A2-A2 position in the figure. Fig.13 for Fig.10 The schematic cross-sectional structure diagram at the position B4-B4 in the figure shows that the partition structure 21 may further include a second isolation structure 32, and the second isolation structure 32 is configured as a closed structure surrounding the corresponding pixel opening K1, dividing the light-emitting device layer P0 into a plurality of light-emitting units P, and in the direction of the pixel opening K1 pointing to the partition structure 21, in the partition structure 21 corresponding to the same pixel opening K1, a plurality of overlapping substructures are located between the corresponding pixel opening K1 and the second isolation structure 32;

[0118] In the direction Z perpendicular to the plane where the display substrate is located, the second isolation structure 32 is arranged on the side of the pixel definition layer PDL close to the light-emitting device layer P0, the thickness Z1 of the second isolation structure 32 is greater than the thickness Z2 of the light-emitting device layer P0, and penetrates the light-emitting device layer P0, dividing the second electrode layer 120 farthest from the pixel definition layer PDL, and can flexibly control the light emission of the light-emitting device sublayer farthest from the pixel definition layer PDL, thereby improving the flexibility of light emission control.

[0119] In an exemplary embodiment, if Fig. 9 and Fig.10 As shown, the second isolation structures 32 corresponding to the plurality of pixel openings K1 are connected to each other to form a grid structure.

[0120] In an exemplary embodiment, the light emitting structures of at least two light emitting devices in the same light emitting unit P are made of different materials. The display of different colors can be achieved by controlling the lighting of different light emitting devices in the light emitting unit in a time-sharing manner. Different materials in the light emitting structure can emit light of different colors when lit.

[0121] In an exemplary embodiment, the display substrate may further include a back plate BP and an anode layer AN0. In a direction perpendicular to the plane where the display substrate is located, the back plate BP may be located on a side of the pixel definition layer PDL away from the light-emitting device layer P0. The anode layer AN0 may be located between the back plate BP and the pixel definition layer PDL. The anode layer AN0 may include a plurality of anodes AN. At least part of the anodes AN correspond to at least part of the pixel openings K1 and at least part of the light-emitting units P one by one. The orthographic projection of the pixel opening K1 on the back plate BP is located within the range of the orthographic projection of the corresponding anode AN on the back plate BP.

[0122] In the anode AN and the light emitting unit P corresponding to the same pixel opening K1 , the anode AN can be reused as the first electrode 11 of the light emitting device in the light emitting unit P that is closest to the backplane BP.

[0123] In an exemplary embodiment, a plurality of electrode traces 10 may be provided in the backplane BP, and at least some of the electrode traces 10 are electrically connected one-to-one with at least some of the overlapping substructures. In a direction Z perpendicular to the plane where the display substrate is located, the overlapping substructure may be configured such that one end is electrically connected to the corresponding electrode trace 10, and the other end passes through the pixel definition layer PDL and is overlapped and connected to the corresponding second electrode layer 120 (the overlap connection may be an electrical connection achieved in an overlapping manner).

[0124] In an exemplary embodiment, the plurality of light-emitting device sublayers may include a first-type light-emitting device sublayer and at least one second-type light-emitting device sublayer, and the second-type light-emitting device sublayer may be located on a side of the first-type light-emitting device sublayer (P01) away from the pixel definition layer PDL in a direction perpendicular to the plane where the display substrate is located;

[0125] The multiple overlapping substructures corresponding to the same pixel opening K1 may include a first-type overlapping substructure and at least one second-type overlapping substructure, the first-type overlapping substructure is overlapped and connected to the second electrode layer 12 in the first-type light-emitting device sublayer, and the second-type overlapping substructure is overlapped and connected to the second electrode 120 in the corresponding second-type light-emitting device sublayer.

[0126] In an exemplary embodiment, Figures 3 to 5 In the structure shown, in the plane where the display substrate is located, along the direction from the pixel opening K1 to the corresponding partition structure 21 , the second type of overlapping substructure may be located on a side of the first type of overlapping substructure away from the corresponding pixel opening K1 .

[0127] In an exemplary embodiment, if Figures 14 to 16 As shown, Fig.14 for Figure 5 A magnified schematic diagram of the local structure. Fig.15 for Fig.14 The schematic diagram of the structure after removing the light-emitting device layer P0, Fig.16 Shown Fig.13 Schematic diagram of the structure after removing the light-emitting device layer P0, in the direction Z perpendicular to the plane where the display substrate is located, the first type of overlapping substructure may include a first region V1, the first region V1 may be located on a side of the pixel definition layer PDL close to the light-emitting device layer P0, and a height H1 of a surface of the first region V1 away from the pixel definition layer PDL relative to the pixel definition layer PDL is greater than or equal to a distance R1 between a surface of the first type of light-emitting device sublayer away from the pixel definition layer PDL and the pixel definition layer PDL, and is less than a distance L1 between a second electrode layer 120 in a second type of light-emitting device that is most adjacent to the first type of light-emitting device sublayer and the pixel definition layer PDL;

[0128] The first type overlapping substructure may be overlapped and connected to the second electrode layer 120 in the first type light emitting device sublayer through the first region V1.

[0129] In an exemplary embodiment, in a direction Z perpendicular to the plane where the display substrate is located, the second-type overlapping substructure may include a first region V1 and a second region V2, the second region V2 being located between the first region V1 and the pixel definition layer PDL, and in the same second-type overlapping substructure, a height H of a surface of the first region V1 on a side away from the pixel definition layer PDL relative to the pixel definition layer PDL is greater than or equal to a distance R between a surface of a corresponding second-type light-emitting device sublayer on a side away from the pixel definition layer PDL and the pixel definition layer PDL; a height W of a surface of the second region V2 on a side away from the pixel definition layer PDL relative to the pixel definition layer PDL is greater than or equal to a distance J between a surface of a first electrode layer 110 on a side away from the pixel definition layer PDL and the pixel definition layer PDL in the corresponding second-type light-emitting device sublayer, and is less than a distance L between a second electrode layer 120 in the corresponding second-type light-emitting device sublayer and the pixel definition layer PDL;

[0130] In the second type of overlapping substructure, the first region V1 is overlapped and connected to the second electrode layer 120 in the corresponding second type of light-emitting device sublayer, and an insulating structure 22 is provided on the surface of the second region V2. The insulating structure 22 is configured to electrically insulate the second region V2 from the light-emitting device layer P0. The insulating structure 22 can prevent the corresponding overlapping substructure from being electrically connected to electrode layers other than the overlapping second electrode layer 120.

[0131] In an exemplary embodiment, within the plane where the display substrate is located, in at least part of the second-type overlapping substructure, the surface of the first region V1 on the side away from the pixel definition layer PDL is less than the distance L between the second electrode layer 120 in the first-type adjacent light-emitting device sublayer and the pixel definition layer PDL. The first-type adjacent light-emitting device sublayer is the light-emitting device sublayer that is closest to the corresponding second-type light-emitting device sublayer and is located on the side of the corresponding second-type light-emitting device sublayer away from the pixel definition layer PDL. For example, the third light-emitting device sublayer P03 is the light-emitting device sublayer that is closest to the second light-emitting device sublayer P02.

[0132] In an exemplary embodiment, Figures 3 to 5In the structure shown, within the plane where the display substrate is located, along the direction of the pixel opening K1 pointing to the corresponding partition structure 21, among the multiple overlapping substructures corresponding to the same pixel opening K1, in the second type of overlapping substructure located in the middle position, the height H of the surface of the first region V1 on the side away from the pixel definition layer PDL relative to the pixel definition layer PDL is smaller than the distance L between the second electrode layer 120 in the first type of adjacent light-emitting device sublayer and the pixel definition layer PDL, and the first type of adjacent light-emitting device sublayer is the light-emitting device sublayer that is most adjacent to the corresponding second type of light-emitting device sublayer, and is located on the side of the corresponding second type of light-emitting device sublayer away from the pixel definition layer PDL.

[0133] In an exemplary embodiment, in the direction from the pixel definition layer PDL to the light emitting device layer P0, the plurality of light emitting device sublayers at least sequentially include a first light emitting device sublayer P01, a second light emitting device sublayer P02, and a third light emitting device sublayer P03, the first type of light emitting device sublayer may include the first light emitting device sublayer P01, and the second type of light emitting device sublayer may include the second light emitting device sublayer P02 and the third light emitting device sublayer P03. The plurality of overlapping substructures may include a first overlapping substructure 211, a second overlapping substructure 212, and a third overlapping substructure 213, the first type of overlapping substructure may include the first overlapping substructure 211, and the second type of overlapping substructure may include the second overlapping substructure 212 and the third overlapping substructure 213; the first overlapping substructure 211 may be overlapped and connected to the first light emitting device sublayer P01, the second overlapping substructure 212 may be overlapped and connected to the second light emitting device sublayer P02, and the third overlapping substructure 213 may be overlapped and connected to the third light emitting device sublayer P03.

[0134] In an exemplary embodiment, Figures 3 to 5 In the structure shown, along the direction of the pixel opening K1 pointing to the corresponding partition structure 21, in the partition structure 21 corresponding to the same pixel opening K1, multiple overlapping substructures may include a first overlapping substructure 211, a second overlapping substructure 212, and a third overlapping substructure 213 in sequence. The first type of overlapping substructure may include the first overlapping substructure 211, and the second type of overlapping substructure may include the second overlapping substructure 212 and the third overlapping substructure 213.

[0135] In an exemplary embodiment, Figures 3 to 5In the structure shown, the pixel definition layer PDL points to the direction of the light-emitting device layer P0. In the same light-emitting unit P, multiple light-emitting devices may include a first light-emitting device P11, a second light-emitting device P12, and a third light-emitting device P13 in sequence; the first light-emitting device P11 may be formed by dividing the first light-emitting device sublayer P01 by the corresponding first overlapping substructure 211, the second light-emitting device P12 may be formed by dividing the second light-emitting device sublayer P02 by the corresponding second overlapping substructure 212, and the third light-emitting device P13 may be formed by dividing the third light-emitting device sublayer P03 by the third overlapping substructure 213.

[0136] In an exemplary real-time manner, in the second overlapping substructure 212, a height H2 of a surface of the first region V1 away from the pixel definition layer PDL relative to the pixel definition layer PDL is greater than or equal to a distance R2 between a surface of the second light-emitting device sublayer P02 away from the pixel definition layer PDL and the pixel definition layer PDL; a height W1 of a surface of the second region V2 away from the pixel definition layer PDL relative to the pixel definition layer PDL is greater than or equal to a distance J1 between a surface of the first electrode layer 110 in the second light-emitting device sublayer P02 away from the pixel definition layer PDL and the pixel definition layer PDL, and is less than a distance L2 between the second electrode layer 120 in the second light-emitting device sublayer P02 and the pixel definition layer PDL.

[0137] In an exemplary real-time manner, in the third overlapping substructure 213, a height H3 of a surface of the first region V1 away from the pixel definition layer PDL relative to the pixel definition layer PDL is greater than or equal to a distance R3 between a surface of the third light-emitting device sublayer P03 away from the pixel definition layer PDL and the pixel definition layer PDL; a height W2 of a surface of the second region V2 away from the pixel definition layer PDL relative to the pixel definition layer PDL is greater than or equal to a distance J2 between a surface of the first electrode layer 110 in the third light-emitting device sublayer P03 away from the pixel definition layer PDL and the pixel definition layer PDL, and is less than a distance L3 between the second electrode layer 120 in the third light-emitting device sublayer P03 and the pixel definition layer PDL.

[0138] In an exemplary embodiment, the light emitted by the first light emitting device P11 may be red, the light emitted by the second light emitting device P12 may be green, and the light emitted by the third light emitting device P13 may be blue. Full-color display can be achieved by time-sharing control of the lighting of different light emitting devices in the light emitting unit P. The light emitting structure EL1 in the first light emitting device P11 may be a material that emits red light, the light emitting structure layer EL2 in the second light emitting device P12 may be a material that emits green light, and the light emitting structure layer EL3 in the third light emitting device P13 may be a material that emits blue light. The embodiments of the present disclosure are not limited to the first light emitting device P11 emitting red light, the second light emitting device P12 emitting green light, and the third light emitting device P13 emitting blue light, and can be set according to actual conditions. For example, the second light emitting device P12 can emit red light, and the first light emitting device P11 can emit green light.

[0139] In an exemplary embodiment, the partition structure 21 adopts a ring-shaped closed structure, and cuts off the corresponding light emitting structure layer and the electrode layer by controlling the height of the overlapping substructure relative to the pixel definition layer PDL, and overlaps and connects with the corresponding second electrode layer 120, for example, Figures 3 to 5 In the structure shown: the light emitting structure layer EL0 and the second electrode layer 120 in the first light emitting device sublayer P01 can be cut off by controlling the height H1 of the first overlapping subjunction 211 relative to the pixel definition layer PDL, and can be overlapped and connected with the second electrode layer 120 in the first light emitting device sublayer P01; the light emitting structure layer EL0 and the second electrode layer 120 in the second light emitting device sublayer P02 can be cut off by controlling the height H2 of the second overlapping subjunction 212 relative to the pixel definition layer PDL, and can be overlapped and connected with the second electrode layer 120 in the second light emitting device sublayer P02; the light emitting structure layer EL0 and the second electrode layer 120 in the third light emitting device sublayer P03 can be cut off by controlling the height H3 of the third overlapping subjunction 213 relative to the pixel definition layer PDL, and can be overlapped and connected with the third electrode layer 120 in the third light emitting device sublayer P03.

[0140] exist Figure 12 to Figure 13 In the structure, the overlapping substructure can be electrically connected to the corresponding second electrode layer 120, and the light-emitting device sublayer farthest from the pixel definition layer PDL can be divided into multiple independent light-emitting devices through the second isolation structure 32, thereby improving the flexibility of controlling the light emission of the light-emitting device sublayer; Figure 17 to Figure 18 In the structure shown, the light emitting device layer P0 can be divided into a plurality of independent light emitting units by the second isolation structure 32, thereby improving the flexibility of controlling the light emission of the light emitting device sublayers and avoiding crosstalk between the light emitting units.

[0141] In an exemplary embodiment, one end of the overlapping substructure is electrically connected to the second electrode in the corresponding light-emitting device sublayer, and the other end is electrically connected to the corresponding electrode wiring 10. The signal can be provided to the corresponding overlapping substructure through the electrode wiring 10 and transmitted to the corresponding second electrode layer 120, thereby controlling the corresponding light-emitting device sublayer to emit light.

[0142] In an exemplary embodiment, in a direction Z perpendicular to the plane of the display substrate, a height H3 of a surface of the third overlapping substructure 213 away from the pixel definition layer PDL relative to the pixel definition layer PDL and a thickness of a film in the light-emitting device layer P0 are related as follows:

[0143] M1+C1+M2+C2+M3+C3 <H3;

[0144] In the direction Z perpendicular to the plane where the display substrate is located, M1 is the thickness of the light-emitting structure layer EL0 in the first light-emitting device sublayer P01, M2 is the thickness of the light-emitting structure layer EL0 in the second light-emitting device sublayer P02, M3 is the thickness of the light-emitting structure layer EL0 in the third light-emitting device sublayer P03, C1 is the thickness of the second electrode 12 in the first light-emitting device sublayer P01, C2 is the thickness of the second electrode 12 in the second light-emitting device sublayer P02, C3 is the thickness of the second electrode 12 in the third light-emitting device sublayer P03, and H3 is the height of the surface of the third overlapping substructure 213 away from the pixel definition layer PDL relative to the pixel definition layer PDL.

[0145] In an exemplary embodiment, in a direction Z perpendicular to the plane of the display substrate, the height H2 of the surface of the second overlapping substructure 212 away from the pixel definition layer PDL relative to the pixel definition layer PDL and the thickness of the film layer in the light-emitting device layer P0 are as follows:

[0146] M1+C1+M2+C2 <H2<M1+C1+M2+C2+(1 / 2)M3;

[0147] In a direction perpendicular to the plane where the display substrate is located, H2 is a height of a surface of the second overlapping substructure 212 away from the pixel definition layer PDL relative to the pixel definition layer PDL.

[0148] In an exemplary embodiment, in a direction Z perpendicular to the plane of the display substrate, a height H1 of a surface of the first overlapping substructure 211 away from the pixel definition layer PDL relative to the pixel definition layer PDL and a thickness of a film in the light-emitting device layer P0 are related as follows:

[0149] M1+C1

[0150] ​In a direction Z perpendicular to the plane where the display substrate is located, H1 is a height of a surface of the first overlapping substructure 211 away from the pixel definition layer PDL relative to the pixel definition layer PDL.

[0151] In an exemplary embodiment, in a direction Z perpendicular to the plane of the display substrate, the relationship between the height W1 of the surface of the second region V2 in the second overlapping substructure 212 away from the pixel definition layer PDL relative to the pixel definition layer PDL and the thickness of the film layer in the light-emitting device layer P0 is as follows:

[0152] M1+C1+(1 / 2)M2 <W1<M1+C1+M2;

[0153] In a direction perpendicular to the plane where the display substrate is located, W1 is a height of a surface of the second region V2 in the second overlapping substructure 212 away from the pixel definition layer PDL relative to the pixel definition layer PDL.

[0154] In an exemplary embodiment, in a direction Z perpendicular to the plane of the display substrate, the height of the surface of the second region V2 in the third overlapping substructure 213 away from the pixel definition layer PDL relative to the pixel definition layer PDL and the thickness of the film layer in the light-emitting device layer P0 are as follows:

[0155] M1+C1+M2+C2+(1 / 2)M3 <W2<M1+C1+M2+C2+M3;

[0156] In the direction Z perpendicular to the plane where the display substrate is located, W2 is the height of the surface of the second region V2 of the third overlapping substructure 213 away from the pixel definition layer PDL relative to the pixel definition layer PDL.

[0157] In an exemplary embodiment, if Figures 11 to 13 As shown, the partition structure 21 may further include a first cutting structure 24. In the direction Z perpendicular to the plane where the display substrate is located, the first cutting structure 24 may be located on a side of the second isolation structure 32 away from the pixel definition layer PDL; along the direction in which the pixel opening points to the corresponding partition structure, the size of the first cutting structure 24 is larger than the size of the corresponding second isolation structure 32. In an exemplary embodiment, as shown in FIG. Figures 3 to 5 , Fig.12 and Fig.14 In the structure shown, the partition structure 21 may further include a plurality of second cutting structures 23. In the plane where the display substrate is located, along the direction of the pixel opening K1 pointing to the corresponding partition structure 21, in the partition structure 21 corresponding to the same pixel opening K1, the plurality of second cutting structures 23 are sequentially arranged at intervals and correspond one-to-one to the plurality of overlapping substructures, and the size of the second cutting structure 23 is greater than the size a2 of the corresponding overlapping substructure by a1.

[0158] In a direction Z perpendicular to the plane where the display substrate is located, the second cutting structure 23 is located on a side of the corresponding overlapping substructure away from the pixel definition layer PDL.

[0159] In an exemplary embodiment, the cross-sectional structure along the direction of the pixel opening K1 pointing to the corresponding partition structure 21 (for example, along Figure 3 In the cross-sectional structure at the dotted line position A1-A1 in FIG, the cross-sectional structure of the second cutting structure 23 and the corresponding overlapping substructure forms a T-shape.

[0160] In an exemplary embodiment, in a direction Z perpendicular to the plane of the display substrate, a height H0 of a surface of the second cutting structure 23 on a side away from the pixel definition layer PDL relative to the pixel definition layer PDL is greater than a distance between a surface of the corresponding light-emitting device sublayer on a side away from the pixel definition layer PDL and the pixel definition layer PDL, and is less than a distance between a surface of the second electrode layer 120 in a first type of adjacent light-emitting device sublayer on a side away from the pixel definition layer PDL and the pixel definition layer PDL, the first type of adjacent light-emitting device sublayer being a light-emitting device sublayer that is most adjacent to the corresponding light-emitting device sublayer and being located on a side of the corresponding second type of light-emitting device sublayer away from the pixel definition layer PDL. For example, the height H01 of the surface of the second cutting structure 23 corresponding to the first overlapping substructure 211 away from the pixel definition layer PDL relative to the pixel definition layer PDL is greater than the distance R1 between the surface of the first light-emitting device sublayer P01 away from the pixel definition layer PDL and the pixel definition layer PDL, and is less than the distance R2 between the surface of the second electrode layer 120 in the second light-emitting device sublayer P02 away from the pixel definition layer PDL and the pixel definition layer PDL; the height H01 of the surface of the second cutting structure 23 corresponding to the second overlapping substructure 212 away from the pixel definition layer PDL relative to the pixel definition layer PDL The height H02 of the second light-emitting device sublayer P02 is greater than the distance R2 between the surface of the second light-emitting device sublayer P02 on the side away from the pixel definition layer PDL and the pixel definition layer PDL, and is less than the distance R3 between the surface of the second electrode layer 120 in the third light-emitting device sublayer P03 on the side away from the pixel definition layer PDL and the pixel definition layer PDL; the height H03 of the surface of the second cutting structure 23 corresponding to the third overlapping substructure 213 away from the pixel definition layer PDL relative to the pixel definition layer PDL is greater than the distance R3 between the surface of the third light-emitting device sublayer P03 on the side away from the pixel definition layer PDL and the pixel definition layer PDL.

[0161] In an exemplary embodiment, the size a1 of the second cutting structure 23 is larger than the size a2 of the corresponding overlapping substructure, and the second cutting structure 23 is located between the surface of the second electrode layer 120 in the corresponding light-emitting device sublayer away from the pixel definition layer and the first electrode layer 110, and can well cut off the film layer in the light-emitting device layer P0. For example, the second cutting structure 23 corresponding to the first overlapping substructure 211 is located between the surface of the second electrode layer 120 in the first light-emitting device sublayer P01 away from the pixel definition layer and the first electrode layer 110, and can well cut off the first electrode layer 110 and the light-emitting structure layer EL0 in the first light-emitting device sublayer P01, and can effectively divide the first light-emitting device sublayer P01 into independent first light-emitting devices P11, avoiding crosstalk between the first light-emitting devices P11 in different light-emitting units P; the second cutting structure 23 corresponding to the second overlapping substructure 212 is located between the surface of the second electrode layer 120 in the second light-emitting device sublayer P02 away from the pixel definition layer and the first electrode layer 110, and can well cut off the second light-emitting device sublayer P01 from the light-emitting structure layer EL0. The first electrode layer 110 and the light-emitting structure layer EL0 in the layer P02 are cut off, which can effectively divide the second light-emitting device sublayer P02 into independent second light-emitting devices P12, thereby avoiding crosstalk between the second light-emitting devices P12 in different light-emitting units P; the second cutting structure 23 corresponding to the third overlapping substructure 213 is located between the surface of the second electrode layer 120 in the third light-emitting device sublayer P03 away from the pixel definition layer and the first electrode layer 110, and can effectively cut off the first electrode layer 110 and the light-emitting structure layer EL0 in the third light-emitting device sublayer P03, and can effectively divide the third light-emitting device sublayer P03 into independent third light-emitting devices P13, thereby avoiding crosstalk between the third light-emitting devices P13 in different light-emitting units P.

[0162] In an exemplary embodiment, if Fig.15 As shown, in the plane where the display substrate is located, along the direction of the pixel opening K1 pointing to the corresponding partition structure 21, on the same side of the center of the second cutting structure 23, the difference a21 between the size of the second cutting structure 23 and the size of the corresponding overlapping substructure can be 0.1 microns to 0.6 microns, for example, the value of a21 can be 0.1 microns to 0.5 microns; in the direction Z perpendicular to the plane where the display substrate is located, the size a3 of the second cutting structure 23 is 2 nanometers to 25 nanometers, for example, the value of a3 can be 5 nanometers to 20 nanometers.

[0163] In an exemplary embodiment, if Fig.15As shown, in the plane where the display substrate is located, along the direction of the pixel opening K1 pointing to the corresponding partition structure 21, in the partition structure 21 corresponding to the same pixel opening K1, the distance a4 between two adjacent overlapping substructures is 3 microns to 13 microns, the size a1 of the overlapping substructure is 3 microns to 13 microns, and the size a2 of the second cutting structure 23 is 2*a21+a1. For example, the value of a4 can be 5 microns to 10 microns, and the value of a1 can be 5 microns to 10 microns.

[0164] In an exemplary embodiment, if Figures 7a to 8 , Fig.13 and Fig.16 As shown, the partition structure 21 may further include a third cutting structure 25. In the partition structure corresponding to the same pixel opening, along the direction of the pixel opening pointing to the corresponding partition structure, the size of the third cutting structure 25 is larger than the size of the corresponding overlapping substructure; in the direction Z perpendicular to the plane where the display substrate is located, the third cutting structure 25 may be located on the side of the corresponding first isolation structure 31 away from the pixel definition layer PDL, and the third cutting structure 25 may better divide the light-emitting device layer P0 to form a plurality of independent light-emitting units P, thereby avoiding crosstalk between two adjacent pixel units P. In an exemplary embodiment, in the plane where the display substrate is located, along the direction of the pixel opening K1 pointing to the corresponding partition structure 21, on the same side of the center of the third cutting structure 25, the difference a65 between the size of the third cutting structure 25 and the size of the corresponding overlapping substructure may be 0.1 micrometer to 0.6 micrometer; for example, the value of a65 may be 0.1 micrometer to 0.5 micrometer; in the direction Z perpendicular to the plane where the display substrate is located, the size a7 of the third cutting structure 25 is 2 nanometers to 25 nanometers, for example, the value of a7 may be 5 nanometers to 20 nanometers. In the partition structure corresponding to the same pixel opening, along the direction of the pixel opening pointing to the corresponding partition structure, the size of the first isolation structure 31 and the size of the corresponding overlapping substructure can be consistent, and can both be a5, and the value of a5 can be 3 microns to 13 microns. The size a6 of the third cutting structure 25 is 2*a65+a5. For example, the value of a5 can be 5 microns to 10 microns.

[0165] In an exemplary embodiment, if Fig.16 As shown, in the plane where the display substrate is located, along the direction of the pixel opening K1 pointing to the corresponding partition structure 21, on the same side of the center of the first cutting structure 24, the difference b21 between the size of the first cutting structure 24 and the size of the second isolation structure 32 can be 0.1 microns to 0.6 microns, for example, the value of b21 can be 0.1 microns to 0.5 microns; in the direction Z perpendicular to the plane where the display substrate is located, the size b3 of the first cutting structure 24 is 2 nanometers to 25 nanometers, for example, the value of b3 can be 5 nanometers to 20 nanometers.

[0166] In an exemplary embodiment, in the partition structure corresponding to the same pixel opening, along the direction of the pixel opening pointing to the corresponding partition structure, the size b1 of the second isolation structure 32 is 3 microns to 13 microns, and the size b2 of the first cutting structure 24 is 2*b21+b1. For example, the value of b1 can be 5 microns to 10 microns.

[0167] In an exemplary embodiment, in the direction Z perpendicular to the plane where the display substrate is located, the thickness dimension (M1, M2, M3) of the light emitting structure layer EL0 may be 2000 angstroms to 4000 angstroms, the thickness dimension (C1, C2) of the first electrode layer 110 may be 8 nanometers to 55 nanometers, the thickness dimension (C1, C2, C3) of the second electrode layer 120 may be 8 nanometers to 55 nanometers, and the thickness dimension L0 of the pixel definition layer PDL may be 0.5 micrometers to 3 micrometers. For example, the values ​​of M1, M2, and M3 may be 2500 angstroms to 3500 angstroms, the values ​​of C1, C2, and C3 may be 10 nanometers to 50 nanometers, and the value of L0 may be 1 micrometer to 2 micrometers. The values ​​of M1, M2, and M3 are 2500 angstroms to 3500 angstroms, which can reduce the short circuit between two adjacent electrodes in the direction Z perpendicular to the plane where the display substrate is located.

[0168] In an exemplary embodiment, the material of the first electrode layer 110 and the second electrode layer 120 may be metal, and in the direction Z perpendicular to the plane where the display substrate is located, the thickness of the first electrode layer 110 may be 8 nanometers to 25 nanometers, and the thickness of the second electrode layer 120 may be 8 nanometers to 25 nanometers; in an exemplary embodiment, the material of the first electrode layer 110 and the second electrode layer 120 may be a metal with good conductivity, such as copper or aluminum, and the thickness of the first electrode layer 110 may be 10 nanometers to 20 nanometers, and the thickness of the second electrode layer 120 may be 10 nanometers to 20 nanometers. In an exemplary embodiment, the first electrode layer 110 and the second electrode layer 120 except the anode layer AN0 may be a semi-transmissive and semi-reflective metal electrode, for example, aluminum Al, magnesium Mg, silver Ag, and the thickness of the first electrode layer 110 and the second electrode layer 120 is 10 nanometers to 20 nanometers, which can avoid the large thickness of the electrode layer affecting the light transmittance. The thickness of the anode layer AN0 does not need to consider the light transmittance.

[0169] In an exemplary embodiment, the material of the first electrode layer 110 and the second electrode layer 120 may be a semiconductor oxide (for example, indium zinc oxide IZO). In the direction Z perpendicular to the plane where the display substrate is located, the thickness of the first electrode layer 110 may be 8 nanometers to 55 nanometers, and the thickness of the second electrode layer 120 may be 8 nanometers to 55 nanometers. For example, the thickness of the first electrode layer 110 may be 10 nanometers to 50 nanometers, and the thickness of the second electrode layer 120 may be 10 nanometers to 50 nanometers. The anode layer AN0 does not need too high light transmittance, and a thicker metal may be used. The thickness of the electrode layers other than the anode layer AN0 may be made of a semiconductor oxide with higher transparency to provide light transmittance.

[0170] In an exemplary embodiment, if Fig.17 As shown, Fig. 9 Another cross-sectional structure diagram of the position A2-A2 in FIG. 1 , in the case where the second isolation structure 32 and the first cutting structure 24 are provided, the second cutting structure 23 (with the same structure as the first cutting structure 24) may not be provided on the side of the overlapping substructure away from the pixel definition layer Fig.12 The difference is that the second cutting structure 23 is not provided.

[0171] In an exemplary embodiment, if Fig.18 As shown, Fig.10 Another cross-sectional structural diagram of the position B4-B4 in FIG. 1 shows that, in the case where the second isolation structure 32 and the first cutting structure 24 are provided, the third cutting structure 25 (with the same structure as the first cutting structure 24) may not be provided on the side of the overlapping substructure away from the pixel definition layer. Fig.13 The difference is that the third cutting structure 25 is not provided.

[0172] In an exemplary embodiment, the first cut-off structure 24 , the second cut-off structure 23 , the third cut-off structure 25 , the first isolation structure 31 , and the second isolation structure 32 may be made of insulating materials.

[0173] In an exemplary embodiment, Figure 5 The manufacturing process of the display substrate shown may include the following operations.

[0174] (101) A back plate is formed.

[0175] In an exemplary embodiment, a pixel driving circuit for driving the light emitting unit and an electrode wiring 10 for providing signals to corresponding electrodes in the light emitting unit P0 may be disposed on the backplane BP.

[0176] (102) An anode layer and a pixel definition layer are formed on one side of the backplane.

[0177] In an exemplary embodiment, if Fig.19aAs shown, an anode layer AN0 is formed on one side of the back plate, and a pixel definition layer is formed on the side of the anode layer AN0 away from the back plate BP. The anode layer AN0 may include a plurality of anodes AN, and a plurality of pixel openings K1 are provided on the pixel definition layer PDL. The plurality of anodes AN correspond to the plurality of pixel openings K1 one by one, and the pixel openings K1 at least partially overlap with the orthographic projection of the corresponding anode AN on the back plate BP. For example, the orthographic projection of the pixel opening K1 on the back plate BP may be within the range of the orthographic projection of the corresponding anode AN on the back plate BP.

[0178] (103) A lap via is formed on a side of the pixel definition layer away from the backplane.

[0179] In an exemplary embodiment, forming the overlapping via hole on the side of the pixel definition layer away from the back plate may include: depositing (may be coated) a first insulating layer film on the side of the pixel definition layer PDL away from the back plate BP, and patterning the first insulating layer film through a photolithography process to form a first insulating layer 40, such as Fig.19b As shown, the first insulating layer may include a plurality of overlapping vias VM, the overlapping vias passing through the first insulating layer and the pixel definition layer, the plurality of overlapping vias VM may correspond one-to-one to a plurality of electrode traces 10, and the orthographic projection of the overlapping vias VM on the backplane at least partially overlaps with the orthographic projection of the corresponding electrode trace 10 on the backplane BP.

[0180] (104) A lap joint structure is formed on a side of the first insulating layer away from the back plate.

[0181] In an exemplary embodiment, forming a bridging substructure on a side of the first insulating layer away from the back plate may include: Fig.19c As shown, the overlapping electrode column 210 is formed by a sputtering process, as shown in FIG. Fig.19d As shown, a first overlapping substructure 211, a second overlapping substructure 212, and a third overlapping substructure 213 are formed by a patterning process.

[0182] (105) A second cutting structure is formed.

[0183] In an exemplary embodiment, forming the second cut-off structure may include: Fig.19e As shown, a second insulating layer film 50 is deposited on the backplane forming the above-mentioned pattern, and the second insulating layer film is patterned through a photolithography process to form a plurality of second cutting structures 23. The plurality of second cutting structures 23 correspond one to one with a plurality of overlapping sub-structures. In a direction perpendicular to the plane where the backplane is located, the second cutting structure 23 is located on the side of the corresponding overlapping sub-structure away from the backplane.

[0184] (106) Forming a light-emitting device layer.

[0185] In an exemplary embodiment, forming the light emitting device layer P0 may include: on the backplane formed with the above pattern, sequentially depositing multiple film layers in the light emitting device layer P0 through an open mask to form a Figure 5 The structure shown.

[0186] In an exemplary embodiment, the preparation method provided in the embodiment of the present disclosure is not limited to the above steps (101) to (106). For example, a process different from the above steps (101) to (106) can be used to form the following: Fig. 20 In the structure shown, the insulating structure 22 may extend into the pixel definition layer PDL.

[0187] The present disclosure provides a display device, such as Fig.21 As shown, the display device may include the aforementioned display substrate. The display device may be: a mobile phone, a wearable device, an AR or VR display device, a vehicle-mounted display device, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, a navigator, or any other product or component with a display function, and the embodiments of the present disclosure are not limited thereto.

[0188] The present disclosure provides a method for preparing a display substrate, which may include:

[0189] A pixel definition layer is formed on one side of the back plate, wherein a plurality of pixel openings are provided on the pixel definition layer;

[0190] A plurality of partition structures are formed on a side of the pixel definition layer away from the back plate, at least some of the partition structures correspond to at least some of the pixel openings one by one, and the partition structures are configured as closed structures surrounding the corresponding pixel openings;

[0191] A light-emitting device layer is formed on a side of the partition structure away from the back panel. In a plane where the display substrate is located, the light-emitting device layer includes a plurality of light-emitting units divided by the plurality of partition structures. At least some of the light-emitting units correspond one-to-one to at least some of the pixel openings, and at least some of the light-emitting units are located in the corresponding pixel openings.

[0192] The display substrate and its preparation method and display device provided by the embodiments of the present disclosure include a stacked pixel definition layer and a light-emitting device layer. The pixel definition layer is provided with a plurality of pixel openings and a plurality of partition structures. At least part of the partition structures correspond to at least part of the pixel openings one by one. The partition structures are configured as closed structures surrounding the corresponding pixel openings. The light-emitting device layer includes a plurality of light-emitting units divided by a plurality of partition structures. In the scheme provided by the embodiments of the present disclosure, the plurality of light-emitting units in the light-emitting device layer are divided by a plurality of partition structures, which can reduce the high cost of preparing the display substrate and enable the preparation of large-size display products, and can overcome the technical problems of high cost of preparing the display substrate using a fine metal mask and difficulty in applying to large-size display products.

[0193] There are a few points to note:

[0194] The drawings of the embodiments of the present disclosure only involve the structures involved in the embodiments of the present disclosure, and other structures may refer to the general design.

[0195] In the absence of conflict, the embodiments of the present disclosure, that is, the features in the embodiments, can be combined with each other to obtain new embodiments.

[0196] Although the embodiments disclosed in the present disclosure are as above, the contents described are only embodiments adopted to facilitate understanding of the present disclosure and are not intended to limit the present disclosure. Any technician in the field to which the present disclosure belongs can make any modifications and changes in the form and details of implementation without departing from the spirit and scope disclosed in the present disclosure, but the scope of patent protection of the present disclosure shall still be subject to the scope defined in the attached claims.

Claims

1. A display substrate, characterized in that: The invention comprises a stacked pixel definition layer and a light-emitting device layer, wherein the pixel definition layer is provided with a plurality of pixel openings and a plurality of partition structures, wherein at least some of the partition structures correspond one-to-one to at least some of the pixel openings, and the partition structures are arranged as closed structures surrounding the corresponding pixel openings. Within the plane where the display substrate is located, the light-emitting device layer comprises a plurality of light-emitting units divided by the plurality of partition structures, wherein at least some of the light-emitting units correspond one-to-one to at least some of the pixel openings, and at least some of the light-emitting units are located in the corresponding pixel openings.

2. The display substrate according to claim 1, characterized in that: In a direction perpendicular to the plane where the display substrate is located, the light-emitting device layer includes a plurality of light-emitting device sublayers, the light-emitting unit includes a plurality of light-emitting devices, and in the same light-emitting unit, different light-emitting devices are located in different light-emitting device sublayers; in a direction from the pixel definition layer to the light-emitting device layer, the light-emitting device sublayer sequentially includes a first electrode layer, a light-emitting structure layer, and a second electrode layer, and in two adjacent light-emitting device sublayers, the second electrode layer of one light-emitting device sublayer is reused as the first electrode layer of the other light-emitting device sublayer; The partition structure includes at least a plurality of overlapping substructures. In the partition structure corresponding to the same pixel opening, the plurality of overlapping substructures correspond one-to-one to the plurality of light-emitting device sublayers, and the overlapping substructures are configured to overlap and connect with the second electrode layer in the corresponding light-emitting device sublayer.

3. The display substrate according to claim 2, characterized in that: In the same partition structure, the multiple overlapping substructures are arranged as closed structures surrounding the corresponding pixel openings; in the plane where the display substrate is located, along the direction of the pixel opening pointing to the corresponding partition structure, in the partition structure corresponding to the same pixel opening, the multiple overlapping substructures are arranged in sequence at intervals, and the heights of the multiple overlapping substructures away from the surface of the pixel definition layer side relative to the surface of the pixel definition layer close to the light-emitting device layer side increase in sequence, thereby dividing the multiple light-emitting device sublayers into multiple light-emitting devices corresponding to the pixel opening.

4. The display substrate according to claim 3, characterized in that: In the plane where the display substrate is located, along the direction of the pixel opening pointing to the corresponding partition structure, in the partition structure corresponding to the same pixel opening, the multiple overlapping substructures are sequentially overlapped and connected with the multiple second electrode layers along the direction of the pixel definition layer pointing to the light-emitting device layer; In a direction perpendicular to the plane where the display substrate is located, the overlapping substructure is configured to at least disconnect the film layer structure between the second electrode layer in the light-emitting device layer that is overlapped and connected thereto and the pixel definition layer.

5. The display substrate according to claim 2, characterized in that: The partition structure also includes a first isolation structure, which is located on a side of the pixel definition layer close to the light-emitting device layer in a direction perpendicular to the plane where the display substrate is located. In the partition structure corresponding to the same pixel opening, the first isolation structure is configured as a closed structure surrounding the corresponding pixel opening, and in the direction surrounded by the closed structure where the first isolation structure is located, the multiple overlapping substructures are spaced apart by the first isolation structure; in the direction perpendicular to the plane where the display substrate is located, a height of a surface of the first isolation structure away from the pixel definition layer relative to the pixel definition layer is greater than a height of a surface of the light-emitting device layer away from the pixel definition layer relative to the pixel definition layer.

6. The display substrate according to any one of claims 2 to 5, characterized in that: The partition structure further includes a second isolation structure, which is configured as a closed structure surrounding the corresponding pixel opening, dividing the light-emitting device layer into a plurality of light-emitting units, and in a direction from the pixel opening to the partition structure, in the partition structure corresponding to the same pixel opening, the plurality of overlapping substructures are located between the corresponding pixel opening and the second isolation structure; In a direction perpendicular to the plane of the display substrate, the second isolation structure is arranged on a side of the pixel definition layer close to the light-emitting device layer. The thickness of the second isolation structure is greater than that of the light-emitting device layer and penetrates the light-emitting device layer.

7. The display substrate according to claim 6, characterized in that: The second isolation structures corresponding to the plurality of pixel openings are connected to each other to form a grid-like structure.

8. The display substrate according to claim 6, characterized in that: The partition structure also includes a first cutting structure, which is located on a side of the second isolation structure away from the pixel definition layer in a direction perpendicular to the plane where the display substrate is located; along the direction of the pixel opening pointing to the corresponding partition structure, the size of the first cutting structure is larger than the size of the corresponding second isolation structure.

9. The display substrate according to any one of claims 2 to 5, characterized in that: The plurality of light-emitting device sublayers include a first type of light-emitting device sublayer and at least one second type of light-emitting device sublayer, and in a direction perpendicular to the plane where the display substrate is located, the second type of light-emitting device sublayer is located on a side of the first type of light-emitting device sublayer away from the pixel definition layer; The multiple overlapping substructures corresponding to the same pixel opening include a first-type overlapping substructure and at least one second-type overlapping substructure, wherein the first-type overlapping substructure is overlap-connected to the second electrode layer in the first-type light-emitting device sublayer, and the second-type overlapping substructure is overlap-connected to the second electrode in the corresponding second-type light-emitting device sublayer.

10. The display substrate according to claim 9, characterized in that: In a direction perpendicular to the plane where the display substrate is located, the first type of overlapping substructure includes a first region, the first region is located on a side of the pixel definition layer close to the light-emitting device layer, and the height of the surface of the first region on a side away from the pixel definition layer relative to the pixel definition layer is greater than or equal to the distance between the surface of the first type of light-emitting device sublayer on a side away from the pixel definition layer and the pixel definition layer, and is less than the distance between the second electrode layer of the second type of light-emitting device that is most adjacent to the first type of light-emitting device sublayer and the pixel definition layer; The first-type overlapping substructure is overlapped and connected to the second electrode layer in the first-type light-emitting device sublayer through the first region.

11. The display substrate according to claim 10, characterized in that: In a direction perpendicular to the plane where the display substrate is located, the second-type overlapping substructure includes a first area and a second area, the second area is located between the first area and the pixel definition layer, and in the same second-type overlapping substructure, the height of the surface of the first area away from the pixel definition layer relative to the pixel definition layer is greater than or equal to the distance between the surface of the corresponding second-type light-emitting device sublayer away from the pixel definition layer and the pixel definition layer; the height of the surface of the second area away from the pixel definition layer relative to the pixel definition layer is greater than or equal to the distance between the surface of the first electrode layer in the corresponding second-type light-emitting device sublayer away from the pixel definition layer and the pixel definition layer, and is less than the distance between the second electrode layer in the corresponding second-type light-emitting device sublayer and the pixel definition layer; In the second type overlapping substructure, the first region is overlapped and connected to the second electrode layer in the corresponding second type light-emitting device sublayer, and an insulating structure is provided on the surface of the second region, which is configured to electrically insulate the second region from the light-emitting device layer.

12. The display substrate according to claim 11, characterized in that: In at least part of the second-type overlapping substructure, the height of the surface of the first region on the side away from the pixel definition layer relative to the pixel definition layer is smaller than the distance between the second electrode layer in the first-type adjacent light-emitting device sublayer and the pixel definition layer, and the first-type adjacent light-emitting device sublayer is the light-emitting device sublayer closest to the corresponding second-type light-emitting device sublayer and is located on the side of the corresponding second-type light-emitting device sublayer away from the pixel definition layer.

13. The display substrate according to claim 11, characterized in that: In the direction from the pixel definition layer to the light-emitting device layer, the multiple light-emitting device sublayers at least sequentially include a first light-emitting device sublayer, a second light-emitting device sublayer, and a third light-emitting device sublayer, the first type of light-emitting device sublayer includes the first light-emitting device sublayer, and the second type of light-emitting device sublayer includes the second light-emitting device sublayer and the third light-emitting device sublayer; the multiple overlapping substructures include a first overlapping substructure, a second overlapping substructure, and a third overlapping substructure, the first type of overlapping substructure includes the first overlapping substructure, and the second type of overlapping substructure includes the second overlapping substructure and the third overlapping substructure; the first overlapping substructure is overlapped and connected to the first light-emitting device sublayer, the second overlapping substructure is overlapped and connected to the second light-emitting device sublayer, and the third overlapping substructure is overlapped and connected to the third light-emitting device sublayer; In a direction perpendicular to the plane where the display substrate is located, the relationship between the height of the surface of the third overlapping substructure away from the pixel definition layer relative to the pixel definition layer and the thickness of the film layer in the light-emitting device layer is as follows: M1+C1+M2+C2+M3+C3 <H3; In the direction perpendicular to the plane where the display substrate is located, M1 is the thickness of the light-emitting structure layer in the first light-emitting device sublayer, M2 is the thickness of the light-emitting structure layer in the second light-emitting device sublayer, M3 is the thickness of the light-emitting structure layer in the third light-emitting device sublayer, C1 is the thickness of the second electrode in the first light-emitting device sublayer, C2 is the thickness of the second electrode in the second light-emitting device sublayer, C3 is the thickness of the second electrode in the third light-emitting device sublayer, and H3 is the height of the surface of the third overlapping substructure away from the pixel definition layer relative to the pixel definition layer.

14. The display substrate according to claim 13, characterized in that: In a direction perpendicular to the plane where the display substrate is located, the relationship between the height of the surface of the second overlapping substructure away from the pixel definition layer relative to the pixel definition layer and the thickness of the film layer in the light-emitting device layer is as follows: M1+C1+M2+C2 <H2<M1+C1+M2+C2+(1 / 2)M3; In a direction perpendicular to the plane where the display substrate is located, H2 is a height of a surface of the second overlapping substructure away from the pixel definition layer relative to the pixel definition layer.

15. The display substrate according to claim 13, characterized in that: In a direction perpendicular to the plane where the display substrate is located, the relationship between the height of the surface of the first overlapping substructure away from the pixel definition layer relative to the pixel definition layer and the thickness of the film layer in the light-emitting device layer is as follows: M1+C1 <H1<M1+C1+(1 / 2)M2; In a direction perpendicular to the plane where the display substrate is located, H1 is a height of a surface of the first overlapping substructure away from the pixel definition layer relative to the pixel definition layer.

16. The display substrate according to claim 13, characterized in that: In a direction perpendicular to the plane where the display substrate is located, the relationship between the height of the surface of the second region in the second overlapping substructure away from the pixel definition layer relative to the pixel definition layer and the thickness of the film layer in the light-emitting device layer is as follows: M1+C1+(1 / 2)M2 <W1<M1+C1+M2; In a direction perpendicular to the plane where the display substrate is located, W1 is a height of a surface of a second region of the second overlapping substructure away from the pixel definition layer relative to the pixel definition layer.

17. The display substrate according to claim 13, characterized in that: In a direction perpendicular to the plane where the display substrate is located, the relationship between the height of the surface of the second region in the third overlapping substructure away from the pixel definition layer relative to the pixel definition layer and the thickness of the film layer in the light-emitting device layer is as follows: M1+C1+M2+C2+(1 / 2)M3 <W2<M1+C1+M2+C2+M3; In a direction perpendicular to the plane where the display substrate is located, W2 is a height of a surface of a second region of the third overlapping substructure away from the pixel definition layer relative to the pixel definition layer.

18. The display substrate according to any one of claims 2 to 4, characterized in that: The partition structure further includes a plurality of second cutting structures. In the partition structures corresponding to the same pixel opening, the plurality of second cutting structures correspond to the plurality of overlapping substructures one by one. In the direction from the pixel opening to the corresponding partition structure, the size of the second cutting structure is larger than the size of the corresponding overlapping substructure. In a direction perpendicular to the plane where the display substrate is located, the second cutting structure is located on a side of the corresponding overlapping substructure away from the pixel definition layer.

19. The display substrate according to claim 18, characterized in that: In the cross-sectional structure along the direction of the pixel opening pointing to the corresponding partition structure, the cross-section of the second cutting structure and the corresponding overlapping substructure forms a T-shape.

20. The display substrate according to claim 18, characterized in that In a direction perpendicular to the plane of the display substrate, a height of a surface of the second cutting structure away from the pixel definition layer relative to the pixel definition layer is greater than a distance between a surface of a corresponding light-emitting device sublayer away from the pixel definition layer and the pixel definition layer, and is less than a distance between a surface of a second electrode layer of a first type of adjacent light-emitting device sublayer away from the pixel definition layer and the pixel definition layer, wherein the first type of adjacent light-emitting device sublayer is a light-emitting device sublayer that is most adjacent to the corresponding light-emitting device sublayer and is located on a side of the corresponding second type of light-emitting device sublayer away from the pixel definition layer.

21. The display substrate according to claim 18, characterized in that: In the plane where the display substrate is located, along the direction of the pixel opening pointing to the corresponding partition structure, on the same side of the center of the second cutting structure, the difference between the size of the second cutting structure and the size of the corresponding overlapping substructure is 0.1 micron to 0.6 micron; in the direction perpendicular to the plane where the display substrate is located, the size of the second cutting structure is 2 nanometers to 25 nanometers.

22. The display substrate according to claim 18, characterized in that: In the plane where the display substrate is located, along the direction of the pixel opening pointing to the corresponding partition structure, in the partition structure corresponding to the same pixel opening, the size of the overlapping substructure is 3 microns to 13 microns.

23. The display substrate according to claim 5, characterized in that: The partition structure further includes a third cutting structure, and in the partition structures corresponding to the same pixel opening, along the direction from the pixel opening to the corresponding partition structure, the size of the third cutting structure is larger than the size of the corresponding overlapping substructure; In a direction perpendicular to the plane where the display substrate is located, the third cutting structure is located on a side of the corresponding first isolation structure away from the pixel definition layer.

24. The display substrate according to any one of claims 2 to 5, characterized in that: The display substrate further comprises a backplane and an anode layer. In a direction perpendicular to the plane where the display substrate is located, the backplane is located on a side of the pixel definition layer away from the light-emitting device layer. The anode layer is located between the backplane and the pixel definition layer. The anode layer comprises a plurality of anodes. At least some of the anodes correspond to at least some of the pixel openings and at least some of the light-emitting units one by one. The orthographic projection of the pixel opening on the backplane is located within the range of the orthographic projection of the corresponding anode on the backplane. In the anode and the light-emitting unit corresponding to the same pixel opening, the anode is reused as the first electrode of the light-emitting device in the light-emitting unit that is closest to the backplane.

25. The display substrate according to claim 24, characterized in that: The back panel is provided with a plurality of electrode traces, at least some of the electrode traces are electrically connected to at least some of the overlapping substructures in a one-to-one correspondence, and in a direction perpendicular to the plane where the display substrate is located, the overlapping substructure is configured so that one end is electrically connected to the corresponding electrode trace, and the other end passes through the pixel definition layer and is overlapped and connected to the corresponding second electrode layer.

26. The display substrate according to any one of claims 2 to 5, characterized in that: In a direction perpendicular to the plane of the display substrate, the thickness of the light-emitting structure layer is 2000 angstroms to 4000 angstroms, the thickness of the first electrode layer is 8 nanometers to 55 nanometers, the thickness of the second electrode layer is 8 nanometers to 55 nanometers, and the thickness of the pixel definition layer is 0.5 micrometers to 3 micrometers.

27. The display substrate according to claim 26, characterized in that: The first electrode layer and the second electrode layer are made of metal. In a direction perpendicular to the plane where the display substrate is located, the thickness of the first electrode layer is 8 nanometers to 25 nanometers, and the thickness of the second electrode layer is 8 nanometers to 25 nanometers; Alternatively, the first electrode layer and the second electrode layer are made of semiconductor oxide, and in a direction perpendicular to the plane of the display substrate, the thickness of the first electrode layer is 8 nanometers to 55 nanometers, and the thickness of the second electrode layer is 8 nanometers to 55 nanometers.

28. A display device, characterized in that: Comprising the display substrate as claimed in any one of claims 1 to 27.

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