Compatible with VPP mode and UBM mode control circuit, backplane and server

Abstract

The utility model discloses a control circuit, a backplane and a server compatible with VPP mode and UBM mode. The control circuit is applied to the backplane, and includes a decoding module, a logic control module, a switch module, an IO extension module and a UBM module. When the VPP mode is adopted, the decoding module controls the logic control module according to the data sent by the BMC module on the mainboard to transmit the in-place signal sent by the hard disk to the IO extension module, and receives the first mode status signal generated by the IO extension module to control the corresponding status light on the backplane; when the UBM mode is adopted, the decoding module controls the switch module according to the data sent by the BMC module to connect the CPU processor with the UBM module to transmit the in-place signal sent by the hard disk, and controls the logic control module to receive the second mode status signal generated by the UBM module to control the corresponding status light on the backplane. The utility model can support VPP and UBM modes at the same time, and can shorten the backplane development cycle.

Description

Technical Field

[0001] The utility model relates to the technical field of power electronics, and in particular to a control circuit, a backplane and a server that are compatible with a VPP mode and a UBM mode. Background Art

[0002] The hard disk backplane is a circuit board that connects the server hard disk and the server motherboard, and is used to connect the signal on the motherboard to the hard disk interface, so that the hard disk can be connected to realize data transmission and storage. At present, when designing a backplane, corresponding adaptive backplanes are designed for different server platforms, so that one backplane cannot be used on multiple server platforms at the same time. For example, AMD's latest server platform (i.e., Genoa platform) can directly use the UBM (Universal Backplane Management) mode. However, before the Genoa platform, AMD's server platform mainly supports the VPP (Virtual Pin Point) mode. Therefore, the corresponding backplane designed for the platform before the Genoa platform cannot adapt to the UBM mode of the Genoa platform, and the corresponding backplane designed for the Genoa platform cannot be compatible with the VPP mode used before the Genoa platform. In addition, when designing servers for multiple server platforms, it is necessary to design multiple matching backplanes, resulting in a long development cycle. Utility Model Content

[0003] In order to solve the above technical problems, the utility model provides a control circuit, a backplane and a server compatible with VPP mode and UBM mode, which can support VPP mode and UBM mode at the same time, shorten the development cycle of the backplane, and reduce costs.

[0004] The utility model provides a control circuit compatible with VPP mode and UBM mode, which is applied to a backplane, and comprises: a decoding module, a logic control module, a switch module, an IO expansion module and a UBM module; the decoding module is connected with the switch module and the logic control module, and the logic control module is connected with the IO expansion module and the UBM module; the switch module is connected with the IO expansion module and the UBM module; the decoding module is used for decoding data sent by a BMC module on a mainboard to obtain a working mode, and generating a corresponding selection signal and a control signal according to the working mode; wherein the working mode is a VPP mode or a UBM mode; when the working mode is the VPP mode: the switch module is used for connecting a CPU processor on the connected mainboard with the IO expansion module according to the selection signal; the logic control module is used for connecting a CPU processor on the connected mainboard with the IO expansion module according to the control signal The in-place signal sent by the hard disk connected to the backplane is transmitted to the IO expansion module; the IO expansion module is used to transmit the received in-place signal to the CPU processor, and generate a first mode status signal according to the hard disk status sent by the CPU processor; the logic control module is also used to control the corresponding status light on the backplane according to the first mode status signal; when the working mode is the UBM mode: the switch module is used to connect the CPU processor with the UBM module according to the selection signal; the UBM module is used to transmit the in-place signal sent by the hard disk connected to the backplane to the CPU processor, and generate a second mode status signal according to the hard disk status sent by the CPU processor; the logic control module is used to receive the second mode status signal according to the control signal, and control the corresponding status light on the backplane according to the second mode status signal.

[0005] Further, the IO expansion module includes at least one IO expansion chip, and the first pin, the second pin, the fifth pin, the sixth pin and the seventh pin of the IO port on each IO expansion chip are connected to the logic conversion submodule; wherein, the VPP mode includes a first VPP mode and a second VPP mode; when the working mode is the first VPP mode in the VPP mode, the logic control module is used to transmit the in-place signal sent by the connected hard disk to the fifth pin of the IO port on the corresponding IO expansion chip, and receive the first mode status signal sent by the first pin and the second pin of the IO port on the corresponding IO expansion chip; when the working mode is the second VPP mode in the VPP mode, the logic control module is used to transmit the in-place signal sent by the connected hard disk to the first pin of the IO port on the corresponding IO expansion chip, and receive the first mode status signal sent by the sixth pin and the seventh pin of the IO port on the corresponding IO expansion chip.

[0006] Furthermore, the logic control module includes a logic conversion submodule and an IBPI logic control submodule; the logic conversion submodule is connected to the decoding module, the IO expansion module, the UBM module and the IBPI logic control submodule; the logic conversion submodule is used to transmit the in-place signal sent by the connected hard disk to the IO expansion module and receive the first mode status signal according to the control signal when the working mode is the VPP mode, and receive the second mode status signal according to the control signal when the working mode is the UBM mode; the logic conversion submodule is also used to generate an IBIP logic control signal according to the first mode status signal or the second mode status signal; the IBPI logic control submodule is used to control the corresponding status light on the backplane according to the IBIP logic control signal.

[0007] Furthermore, the UBM module includes a UBM FRU component and a UBM controller, the UBM FRU component and the UBM controller are connected to the switch module, and the UBM controller is also connected to the logic control module and the connected hard disk; wherein, when the working mode is the UBM mode, the switch module connects the UBM FRU component and the UBM controller to the CPU processor, so that the CPU processor can communicate with the UBM controller through the UBM FRU component.

[0008] Furthermore, the control circuit compatible with the VPP mode and the UBM mode further includes a first I2C bus; and the switch module is connected to the CPU processor via the first I2C bus.

[0009] Furthermore, the control circuit compatible with the VPP mode and the UBM mode further includes a second I2C bus; and the decoding module is connected to the BMC module via the second I2C bus.

[0010] In the second aspect, the utility model also provides a backplane, including a control circuit and a status light module compatible with VPP mode and UBM mode as described in the first aspect, wherein a status light is provided in the status light module; the logic control module in the control circuit compatible with VPP mode and UBM mode is connected to the status light module.

[0011] Furthermore, the backplane also includes a hard disk connector, which is connected to the UBM module and the logic control module, and is used to access a hard disk.

[0012] Furthermore, the backplane also includes a PCB board, and the control circuit compatible with the VPP mode and the UBM mode, the status light module and the hard disk connector are arranged on the PCB board.

[0013] In a third aspect, the utility model further provides a server, comprising a mainboard and a backplane as described in the second aspect, the mainboard comprising a BMC module and a CPU processor, the BMC module being connected to a decoding module on a control circuit in the backplane that is compatible with VPP mode and UBM mode, and the CPU processor being connected to a switch module on a control circuit that is compatible with VPP mode and UBM mode.

[0014] Compared with the prior art, the control circuit, backplane and server compatible with VPP mode and UBM mode provided by the utility model, the control circuit is applied to the backplane, including a decoding module, a logic control module, a switch module, an IO extension module and a UBM module; when the VPP mode is adopted, the decoding module controls the logic control module according to the data sent by the BMC module on the mainboard to transmit the in-place signal sent by the hard disk to the IO extension module, and receives the first mode status signal generated by the IO extension module to control the corresponding status light on the backplane; when the UBM mode is adopted, the decoding module controls the switch module according to the data sent by the BMC module to connect the CPU processor with the UBM module to transmit the in-place signal sent by the hard disk, and controls the logic control module to receive the second mode status signal generated by the UBM module to control the corresponding status light on the backplane. The utility model can support both VPP and UBM modes, shorten the backplane development cycle and reduce costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the technical solutions of the embodiments of the utility model, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are some embodiments of the utility model. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0016] Figure 1 A schematic diagram of a control circuit compatible with VPP mode and UBM mode provided in one embodiment of the utility model;

[0017] Figure 2 A schematic diagram of a control circuit compatible with VPP mode and UBM mode provided by another embodiment of the utility model;

[0018] Figure 3 A schematic structural diagram of a backplane provided in one embodiment of the utility model.

[0019] Among them, the reference numerals in the figures are as follows:

[0020] 100. Backplane; 1. Control circuit compatible with VPP mode and UBM mode; 10. Decoding module; 11. Logic control module; 110. Logic conversion submodule; 111. IBPI logic control submodule; 12. Switch module; 13. IO expansion module; 130. IO expansion chip; 14. UBM module; 140. UBM FRU component; 141. UBM controller; 2. Status light module; 3. Hard disk connector; 4. First I2C bus; 5. Second I2C bus; 200. Mainboard; 20. BMC module; 21. CPU processor. DETAILED DESCRIPTION

[0021] The following will be combined with the drawings in the embodiments of the utility model to clearly and completely describe the technical solutions in the embodiments of the utility model. Obviously, the described embodiments are part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments of the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0022] It should be understood that when used in this specification and the appended claims, the terms "include" and "comprises" indicate the presence of described features, integers, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or combinations thereof.

[0023] It should also be understood that the terms used in the utility model specification are only for the purpose of describing specific embodiments and are not intended to limit the utility model. As used in the utility model specification and the appended claims, unless the context clearly indicates otherwise, the singular forms "a", "an" and "the" are intended to include plural forms.

[0024] It should be further understood that the term “and / or” used in the present specification and the appended claims refers to any combination and all possible combinations of one or more of the associated listed items, and includes these combinations.

[0025] See also Figure 1 , Figure 1An embodiment of a control circuit compatible with VPP mode and UBM mode provided by the utility model is shown, and the connection relationship between the control circuit compatible with VPP mode and UBM mode and the mainboard of the server is shown. The utility model provides a control circuit 1 compatible with VPP mode and UBM mode, which is applied to a backplane 100, including: a decoding module 10, a logic control module 11, a switch module 12, an IO expansion module 13 and a UBM module 14; the decoding module 10 is connected to the switch module 12 and the logic control module 11, and the logic control module 11 is connected to the status light module 2, the IO expansion module 13 and the UBM module 14; the switch module 12 is connected to the IO expansion module 13 and the UBM module 14.

[0026] The decoding module 10 is used to decode the data sent by the BMC module 20 on the mainboard 200 to obtain the working mode, and generate corresponding selection signals and control signals according to the working mode; wherein the working mode is the VPP mode or the UBM mode.

[0027] When the working mode is the VPP mode: the switch module 12 is used to connect the CPU processor 21 on the connected mainboard 200 with the IO expansion module 13 according to the selection signal; the logic control module 11 is used to transmit the in-place signal sent by the hard disk connected to the backplane 100 to the IO expansion module 13 according to the control signal; the IO expansion module 13 is used to transmit the received in-place signal to the CPU processor 21, and generate a first mode status signal according to the hard disk status sent by the CPU processor 21; the logic control module 11 is also used to control the corresponding status light on the backplane 100 according to the first mode status signal.

[0028] When the working mode is the UBM mode: the switch module 12 is used to connect the CPU processor 21 with the UBM module 14 according to the selection signal; the UBM module 14 is used to transmit the in-place signal sent by the hard disk connected to the backplane 100 to the CPU processor 21, and generate a second mode status signal according to the hard disk status sent by the CPU processor 21; the logic control module 11 is used to receive the second mode status signal according to the control signal, and control the corresponding status light on the backplane 100 according to the second mode status signal.

[0029] In this embodiment, the control circuit 1 compatible with VPP mode and UBM mode provided by the utility model includes a decoding module 10, a logic control module 11, a switch module 12, an IO expansion module 13 and a UBM module 14. Preferably, each module in the control circuit 1 can be a circuit implemented by the internal code of the CPLD unit 1 (i.e., Complex Programmable Logic Device). In the specific application process, the switch module 12 is used to connect the CPU processor 21 on the mainboard 200 of the server, the decoding module 10 is used to connect the BMC module 20 on the mainboard 200, the backplane 100 is a hard disk backplane applied to the server, and the hard disk (such as NVMe SSD hard disk) connected to the backplane 100 is connected to the logic control module 11 and the UBM module 14 to transmit the hard disk in place signal, and the user can set the working mode corresponding to the hard disk connected to the backplane 200 through the BMC module 20 on the mainboard 200. First, the decoding module 10 obtains the required working mode by decoding the data sent by the BMC module 20 on the mainboard 200, and the decoding module 10 generates corresponding selection signals and control signals according to the decoded working mode, and transmits the selection signals and control signals to the switch module 12 and the logic control module 11 respectively.

[0030] Then, when the working mode adopts the VPP mode, the switch module 12 connects the CPU processor 21 with the IO expansion module 13 according to the received selection signal, and the logic control module 11 transmits the in-place signal sent by the connected hard disk to the IO expansion module 13 according to the received control signal, and then transmits the in-place signal of the hard disk to the CPU processor 21 through the IO expansion module 13. After receiving the in-place signal of the hard disk transmitted by the IO expansion module 13, the CPU processor 21 will send the hard disk status of the hard disk to the IO expansion module 13. The IO expansion module 13 decodes the hard disk status sent by the CPU processor 21 to generate a first mode status signal, and the logic control module 11 controls the corresponding status light on the backplane 100 according to the first mode status signal sent by the IO expansion module 13. In addition, when the working mode adopts the UBM mode, the switch module 12 connects the CPU processor 21 and the UBM module 14 according to the received selection signal, and the logic control module 11 will ignore the presence signal sent by the connected hard disk according to the received control signal. At this time, the UBM module 14 transmits the presence signal sent by the connected hard disk to the CPU processor 21. After receiving the presence signal of the hard disk transmitted by the UBM module 14, the CPU processor 21 will send the hard disk status of the hard disk to the UBM module 14. The UBM module 14 generates a second mode status signal according to the hard disk status sent by the CPU processor 21, and the logic control module 11 waits for receiving the second mode status signal according to the control signal and controls the corresponding status light on the backplane 100 according to the second mode status signal. Among them, the logic control module 11 controls the corresponding status light on the backplane 100 according to the first mode status signal or the second mode status signal. The backplane 100 is provided with a corresponding status light so as to indicate the hard disk status of the corresponding hard disk through the working status of the corresponding status light. For example, the hard disk status includes four states: OK, Locate, Fault and Rebuild. These four hard disk states can be indicated by the status light working in off, 4Hz flashing, always on and 1Hz flashing states respectively.

[0031] The control circuit 1 compatible with the VPP mode and the UBM mode provided by the utility model integrates the VPP mode and the UBM mode, and can set the working mode through the BMC module 20 on the mainboard 200, which is more convenient to use, can shorten the development cycle of the backplane, and is conducive to reducing costs.

[0032] In a more specific embodiment, see Figure 1 and Figure 2, the IO expansion module 13 includes at least one IO expansion chip 130, and the first pin, the second pin, the fifth pin, the sixth pin and the seventh pin of the IO port on each IO expansion chip 130 are connected to the logic conversion submodule; wherein, the VPP mode includes a first VPP mode and a second VPP mode; when the working mode is the first VPP mode in the VPP mode, the logic control module 11 is used to transmit the in-place signal sent by the connected hard disk to the fifth pin of the IO port on the corresponding IO expansion chip 130, and receive the first mode state signal sent by the first pin and the second pin of the IO port on the corresponding IO expansion chip 130; when the working mode is the second VPP mode in the VPP mode, the logic control module 11 is used to transmit the in-place signal sent by the connected hard disk to the first pin of the IO port on the corresponding IO expansion chip 130, and receive the first mode state signal sent by the sixth pin and the seventh pin of the IO port on the corresponding IO expansion chip 130.

[0033] In this embodiment, the IO expansion module 13 includes at least one IO expansion chip 130, each IO expansion chip 130 includes two IO ports, wherein the IO expansion chip 130 can use a PCA9535 device. Each IO port on the IO expansion chip 130 includes eight pins, namely the first pin to the eighth pin, and the information of each IO port corresponds to the status information of a hard disk. The number of IO expansion chips 130 can be set according to the number of hard disks to be connected. Specifically, the first pin, the second pin, the fifth pin, the sixth pin and the seventh pin of the IO port on the IO expansion chip 130 are all connected to the logic conversion submodule, and the user can set the working mode through the BMC module 20 on the motherboard 200. When the working mode is the first VPP mode in the VPP mode, the fifth pin of the IO port on the IO expansion chip 130 is used to receive the in-place signal sent by the hard disk transmitted by the logic control module 11 and feed it back to the CPU processor 21, and the first pin and the second pin of the IO port are used to send the first mode status signal to the logic control module 11, and the remaining pins of the IO port are not used. When the working mode is the second VPP mode in the VPP mode, the first pin of the IO port on the IO expansion chip 130 is used to receive the in-place signal sent by the hard disk transmitted by the logic control module 11 and feed it back to the CPU processor 21, and the sixth pin and the seventh pin of the IO port are used to send the first mode status signal to the logic control module 11, and the remaining pins of the IO port are not used.

[0034] In a more specific embodiment, see Figure 1 and Figure 2, the logic control module 11 includes a logic conversion submodule 110 and an IBPI logic control submodule 111; the logic conversion submodule 110 is connected to the decoding module 10, the IO expansion module 13, the UBM module 14 and the IBPI logic control submodule 111; the logic conversion submodule 110 is used to transmit the in-place signal sent by the connected hard disk to the IO expansion module 13 and receive the first mode status signal according to the control signal when the working mode is the VPP mode, and receive the second mode status signal according to the control signal when the working mode is the UBM mode; the logic conversion submodule 110 is also used to generate an IBIP logic control signal according to the first mode status signal or the second mode status signal; the IBPI logic control submodule 111 is used to control the corresponding status light on the backplane 100 according to the IBIP logic control signal.

[0035] In this embodiment, the logic control module 11 is composed of a logic conversion submodule 110 and an IBPI logic control submodule 111. The logic conversion submodule 110 is connected to the decoding module 10, the IO expansion module 13, the UBM module 14 and the IBPI logic control submodule 111. The IBPI logic control submodule 111 is connected to the corresponding status light on the backplane 100. In a specific application process, the logic conversion submodule 110 is also connected to the hard disk connected to the backplane 100. When the working mode is the VPP mode, the logic conversion submodule 110 first transmits the in-place signal sent by the connected hard disk to the IO expansion module 13 according to the control signal transmitted by the decoding module 10, and then receives the first mode status signal generated by the IO expansion module 13 based on the hard disk status sent by the CPU processor 21, and finally generates an IBIP logic control signal according to the first mode status signal and transmits it to the IBPI logic control submodule 111. When the working mode is UBM mode, the logic conversion submodule 110 will ignore the in-place signal sent by the connected hard disk according to the control signal transmitted by the decoding module 10, and when receiving the second mode status signal sent by the UBM module 14, it will generate an IBIP logic control signal according to the second mode status signal and transmit it to the IBPI logic control submodule 111. The IBPI logic control submodule 111 controls the corresponding status light on the backplane 100 according to the IBIP logic control signal, so as to realize the hard disk status indication by the IBIP mode, wherein the IBIP (International Blinking Pattern Interpretation) defines the SGPIO rules of the hard disk status and describes how to indicate the hard disk status through the display of the status light.

[0036] In a more specific embodiment, see Figure 1 and Figure 2The UBM module 14 includes a UBM FRU component 140 and a UBM controller 141, the UBM FRU component 140 and the UBM controller 141 are connected to the switch module 12, and the UBM controller 141 is also connected to the logic control module 11 and the connected hard disk; wherein, when the working mode is the UBM mode, the switch module 12 connects the UBM FRU component 140 and the UBM controller 141 to the CPU processor 21, so that the CPU processor 21 can communicate with the UBM controller 141 through the UBM FRU component 140.

[0037] In this embodiment, the UBM module 14 is composed of a UBM FRU component 140 and a UBM controller 141. The UBM FRU component 140 is used to provide the address required for the CPU processor 21 on the mainboard 200 to communicate with the UBM controller 141, and the UBM controller 141 is used to manage the in-place signal sent by the connected hard disk and the hard disk status sent by the CPU processor 21. When the working mode adopts the UBM mode, the switch module 12 connects the CPU processor 21 with the UBM FRU component 140 and the UBM controller 141 according to the selection signal, and the CPU processor 21 accesses the UBM FRU component 140 to obtain the communication address of the UBM controller 141, and then accesses the UBM controller 141 through the communication address. The UBM controller 141 includes the DFC Status and Control Descriptor, i.e., the DFC (Drive Facing Connector) status and control information. The CPU processor 21 obtains the hard disk presence information by reading the value of Byte0 of the DFC Status and Control Descriptor, thereby identifying whether the hard disk is in place, and transmits the hard disk status by writing the values ​​of Byte1 to Byte4 of the DFC Status and Control Descriptor.

[0038] In a more specific embodiment, see Figure 1 and Figure 2 The control circuit 1 compatible with the VPP mode and the UBM mode further includes a first I2C bus 4 ; the switch module 12 is connected to the CPU processor 21 via the first I2C bus 4 .

[0039] In this embodiment, the switch module 12 is connected to the CPU processor 21 via the first I2C bus 4. The connection is simple and convenient, so that data transmission is achieved between the CPU processor 21 and the switch module 12 through the I2C communication mode.

[0040] In a more specific embodiment, see Figure 1 and Figure 2 The control circuit 1 compatible with the VPP mode and the UBM mode further includes a second I2C bus 5 ; the decoding module 10 is connected to the BMC module 20 via the second I2C bus 5 .

[0041] In this embodiment, a second I2C bus 5 is provided on the control circuit 1 compatible with the VPP mode and the UBM mode. In a specific application process, the decoding module 10 and the BMC module 20 can be more conveniently connected through the second I2C bus 5, so that data can be transmitted between the BMC module 20 and the decoding module 10 through the I2C communication mode, and the BMC module 20 serves as the master device of the I2C communication, and the decoding module 10 serves as the slave device of the I2C communication.

[0042] For ease of understanding, in a specific embodiment, Figure 2 As shown, the working process of the control circuit 1 compatible with the VPP mode and the UBM mode is described as follows:

[0043] When the user sets the working mode to the first VPP mode in the VPP mode through the BMC module 20 on the motherboard 200, first, the decoding module 10 decodes the data sent by the BMC module 20 and generates a selection signal and a control signal corresponding to the first VPP mode. Then, the switch module 12 connects the CPU processor 21 with the IO expansion chip 130 in the IO expansion module 13 according to the selection signal, and the logic conversion submodule 110 in the logic control module 11 transmits the in-place signal sent by the connected hard disk to the fifth pin of the IO port of the IO expansion chip 130 in the IO expansion module 13 according to the control signal, so as to transmit the in-place signal to the CPU processor 21 through the IO expansion chip 130. Then, the CPU processor 21 sends the hard disk status of the hard disk to the IO expansion chip 130 based on the in-place signal, and the IO expansion chip 130 decodes the hard disk status to generate a first mode status signal, and the IO expansion chip 130 sends the first mode status signal to the logic conversion submodule 110 in the logic control module 11 through the first pin and the second pin of the IO port. Finally, the logic conversion submodule 110 generates an IBIP logic control signal according to the first mode status signal and transmits it to the IBPI logic control submodule 111 , and then the IBPI logic control submodule 111 controls the working state of the corresponding status light on the backplane 100 .

[0044] When the user sets the working mode to the second VPP mode in the VPP mode through the BMC module 20 on the motherboard 200, first, the decoding module 10 decodes the data sent by the BMC module 20 and generates a selection signal and a control signal corresponding to the second VPP mode. Then, the switch module 12 connects the CPU processor 21 with the IO expansion chip 130 in the IO expansion module 13 according to the selection signal, and the logic conversion submodule 110 in the logic control module 11 transmits the in-place signal sent by the connected hard disk to the first pin of the IO port of the IO expansion chip 130 in the IO expansion module 13 according to the control signal, so as to transmit the in-place signal to the CPU processor 21 through the IO expansion chip 130. Then, the CPU processor 21 sends the hard disk status of the hard disk to the IO expansion chip 130 based on the in-place signal, and the IO expansion chip 130 decodes the hard disk status to generate a first mode status signal, and the IO expansion chip 130 sends the first mode status signal to the logic conversion submodule 110 in the logic control module 11 through the sixth pin and the seventh pin of the IO port. Finally, the logic conversion submodule 110 generates an IBIP logic control signal according to the first mode status signal and transmits it to the IBPI logic control submodule 111 , and then the IBPI logic control submodule 111 controls the working state of the corresponding status light on the backplane 100 .

[0045] Among them, when the working mode is set to the first VPP mode or the second VPP mode in the VPP mode, the first mode status signal generated by the IO expansion chip 130 according to the hard disk status includes ATNLED and PWRLED signals. The relationship between the ATNLED and PWRLED signals and the hard disk status and the working status of the status light (i.e., the LED light status) is shown in Table 1 below. For example, when the hard disk status is OK, the ATNLED and PWRLED signals generated by the IO expansion chip 130 are 0 and 0 signals respectively, and finally the status light is controlled to be off to indicate the hard disk status.

[0046] Table 1

[0047]

[0048]

[0049] When the user sets the working mode to the UBM mode through the BMC module 20 on the mainboard 200, first, the decoding module 10 decodes the data sent by the BMC module 20 and generates a selection signal and a control signal corresponding to the UBM mode. Then, the switch module 12 connects the CPU processor 21 with the UBM FRU component 140 and the UBM controller 141 in the UBM module 14 according to the selection signal. Then, the CPU processor 21 obtains the communication address of the UBM controller 141 by accessing the UBM FRU component 140, and then obtains the in-place signal sent by the connected hard disk through the UBM controller 141, and sends the hard disk status of the hard disk to the UBM controller 141 based on the in-place signal. The UBM controller 141 generates a second mode status signal according to the hard disk status sent by the CPU processor 21. Finally, the logic conversion submodule 110 in the logic control module 11 receives the second mode status signal according to the control signal and generates an IBIP logic control signal according to the second mode status signal, and the IBPI logic control submodule 111 controls the working state of the corresponding status light on the backplane 100 according to the IBIP logic control signal. Among them, the second mode status signal generated by the UBM controller 141 according to the hard disk status includes FAILED, IDDET and REBUILD signals. The relationship between the FAILED, IDDET and REBUILD signals and the hard disk status and the working status of the status light (i.e., the LED light status) is shown in Table 2 below. For example, when the hard disk status is the Locate state, the FAILED, IDENT and REBUILD signals generated by the UBM controller 141 are 0, 1, and 0 signals respectively. Finally, the status light is controlled to flash at 4Hz to indicate the hard disk status.

[0050] Table 2

[0051] FAILED IDENT REBUILD Hard disk status LED status 0 0 0 OK Off 0 1 0 Locate 4Hz flashing 1 0 0 Fault Always on 0 0 1 Rebuild 1Hz flashing

[0052] The utility model also provides a backplane 100, which includes a control circuit 1 and a status light module 2 compatible with VPP mode and UBM mode as described in any of the aforementioned embodiments, wherein a status light (not shown) is provided in the status light module 2; the logic control module 11 in the control circuit 1 compatible with VPP mode and UBM mode is connected to the status light module 2.

[0053] In this embodiment, see Figure 3 The utility model also provides a backplane 100, which is a hard disk backplane applied to a server, and is used to connect the hard disk to the mainboard 200 of the server. It can support both VPP mode and UBM mode, and can realize the use of one backplane on multiple server platforms, which can shorten the development cycle of the backplane and reduce costs.

[0054] In a more specific embodiment, the status light module 2 includes at least one indicator light component, and each indicator light component includes a status light and a hard disk activity indicator light.

[0055] In this embodiment, see Figure 1 and Figure 2 , at least one indicator light component is provided in the status light module 2, each indicator light component includes a status light and a hard disk activity indicator light, and both the status light and the hard disk activity indicator light can be LED lights. Among them, one indicator light component corresponds to the status of a hard disk, and the number of indicator light components can be set according to the number of hard disks to be connected as needed. The status light (i.e., FAULT light) is used to indicate the status of the hard disk. In a specific application process, the status light can be set to work in the states of off, flashing at 4Hz, always on, and flashing at 1Hz to indicate that the hard disk is in the OK, Locate, Fault, and Rebuild states, respectively. The hard disk activity indicator light (i.e., ACTIVERTY light), the hard disk activity indicator light is controlled by the hard disk's own signal. In one embodiment, the hard disk activity indicator light is specifically connected to the hard disk via the IBPI logic control submodule 111 in the logic control module 11.

[0056] In a more specific embodiment, see Figure 1 and Figure 2 The backplane 100 further includes a hard disk connector 3, which is connected to the UBM module 14 and the logic control module 11, and is used to connect to a hard disk.

[0057] In this embodiment, in order to quickly and conveniently connect the hard disk to the backplane 100, a hard disk connector 3 may be provided in the backplane 100 to connect the hard disk through the hard disk connector 3. The hard disk connector 3 is connected to the UBM module 14 and the logic control module 11, so that the hard disk sends the in-position signal to the UBM module 14 and the logic control module 11 through the hard disk connector 3. In addition, the number of the hard disk connectors 3 may be one or more, and the number of the hard disk connectors 3 is not specifically limited here, and can be set according to the specific application scenario.

[0058] In a more specific embodiment, see Figure 1 and Figure 2 The backplane 100 further includes a PCB board (not shown), and the control circuit 1 compatible with the VPP mode and the UBM mode, the status light module 2 and the hard disk connector 3 are arranged on the PCB board.

[0059] In this embodiment, the control circuit 1 compatible with the VPP mode and the UBM mode, the status light module 2 and the hard disk connector 3 are arranged on the PCB board to facilitate specific use.

[0060] The utility model also provides a server, which includes a mainboard 200 and a backplane 100 as described in any of the aforementioned embodiments, the mainboard 200 includes a BMC module 20 and a CPU processor 21, the BMC module 20 is connected to a decoding module 10 on the control circuit 1 compatible with the VPP mode and the UBM mode, and the CPU processor 21 is connected to a switch module 12 on the control circuit 1 compatible with the VPP mode and the UBM mode.

[0061] In this embodiment, see Figure 1 The server provided by the utility model is connected to the hard disk through the backplane 100, and the working mode can be set through the BMC module 20 on the mainboard 200, and then the VPP mode or UBM mode is realized through the control circuit 1 compatible with the VPP mode and the UBM mode on the backplane 100.

[0062] The above is only a specific implementation of the utility model, but the protection scope of the utility model is not limited thereto. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed by the utility model, and these modifications or replacements should be included in the protection scope of the utility model. Therefore, the protection scope of the utility model should be based on the protection scope of the claims.

Claims

1. A control circuit compatible with VPP mode and UBM mode, characterized in that: Applied to the backplane, the control circuit includes a decoding module, a logic control module, a switch module, an IO expansion module and a UBM module; The decoding module is connected to the switch module and the logic control module, the logic control module is connected to the IO expansion module and the UBM module; the switch module is connected to the IO expansion module and the UBM module; The decoding module is used to decode the data sent by the BMC module on the mainboard to obtain the working mode, and generate corresponding selection signals and control signals according to the working mode; wherein the working mode is the VPP mode or the UBM mode; When the working mode is the VPP mode: the switch module is used to connect the CPU processor on the connected mainboard with the IO expansion module according to the selection signal; the logic control module is used to transmit the in-place signal sent by the hard disk connected to the backplane to the IO expansion module according to the control signal; the IO expansion module is used to transmit the received in-place signal to the CPU processor, and generate a first mode status signal according to the hard disk status sent by the CPU processor; the logic control module is also used to control the corresponding status light on the backplane according to the first mode status signal; When the working mode is the UBM mode: the switch module is used to connect the CPU processor with the UBM module according to the selection signal; the UBM module is used to transmit the in-place signal sent by the hard disk connected to the backplane to the CPU processor, and generate a second mode status signal according to the hard disk status sent by the CPU processor; the logic control module is used to receive the second mode status signal according to the control signal, and control the corresponding status light on the backplane according to the second mode status signal.

2. The control circuit compatible with VPP mode and UBM mode according to claim 1, characterized in that: The IO expansion module includes at least one IO expansion chip, and the first pin, the second pin, the fifth pin, the sixth pin and the seventh pin of the IO port on each IO expansion chip are connected to the logic control module; Wherein, the VPP mode includes a first VPP mode and a second VPP mode; when the working mode is the first VPP mode in the VPP mode, the logic control module is used to transmit the in-place signal sent by the connected hard disk to the fifth pin of the IO port on the corresponding IO expansion chip, and receive the first pin and the second pin of the IO port on the corresponding IO expansion chip to send the first mode state signal; When the working mode is the second VPP mode in the VPP mode, the logic control module is used to transmit the in-place signal sent by the connected hard disk to the first pin of the IO port on the corresponding IO expansion chip, and receive the first mode status signal sent by the sixth pin and the seventh pin of the IO port on the corresponding IO expansion chip.

3. The control circuit compatible with VPP mode and UBM mode according to claim 1, characterized in that: The logic control module includes a logic conversion submodule and an IBPI logic control submodule; The logic conversion submodule is connected to the decoding module, the IO expansion module, the UBM module and the IBPI logic control submodule; The logic conversion submodule is used to transmit the in-place signal sent by the connected hard disk to the IO expansion module and receive the first mode status signal according to the control signal when the working mode is the VPP mode, and receive the second mode status signal according to the control signal when the working mode is the UBM mode; the logic conversion submodule is also used to generate an IBIP logic control signal according to the first mode status signal or the second mode status signal; The IBPI logic control submodule is used to control the corresponding status light on the backplane according to the IBIP logic control signal.

4. The control circuit compatible with VPP mode and UBM mode according to claim 1, characterized in that: The UBM module includes a UBM FRU component and a UBM controller, the UBM FRU component and the UBM controller are connected to the switch module, and the UBM controller is also connected to the logic control module and the connected hard disk; wherein, when the working mode is the UBM mode, the switch module connects the UBM FRU component and the UBM controller to the CPU processor, so that the CPU processor can communicate with the UBM controller through the UBM FRU component.

5. The control circuit compatible with VPP mode and UBM mode according to claim 1, characterized in that: It also includes a first I2C bus; the switch module is connected to the CPU processor via the first I2C bus.

6. The control circuit compatible with VPP mode and UBM mode according to claim 1, characterized in that: It also includes a second I2C bus; the decoding module is connected to the BMC module via the second I2C bus.

7. A back plate, characterized in that: It comprises a control circuit and a status light module compatible with VPP mode and UBM mode as described in any one of claims 1-6, wherein a status light is arranged in the status light module; and the logic control module in the control circuit compatible with VPP mode and UBM mode is connected to the status light module.

8. The back plate according to claim 7, characterized in that: It also includes a hard disk connector, which is connected to the UBM module and the logic control module, and is used to access a hard disk.

9. The back plate according to claim 8, characterized in that: It also includes a PCB board, on which the control circuit compatible with the VPP mode and the UBM mode, the status light module and the hard disk connector are arranged.

10. A server, characterized in that: It comprises a mainboard and a backplane as described in any one of claims 7 to 9, wherein the mainboard comprises a BMC module and a CPU processor, the BMC module is connected to a decoding module on a control circuit compatible with VPP mode and UBM mode in the backplane, and the CPU processor is connected to a switch module on the control circuit compatible with VPP mode and UBM mode.

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