Power supply circuit of radar signal acquisition chipset

Abstract

The utility model relates to a power supply circuit of a radar signal acquisition chipset, belongs to the technical field of radars, and solves the problem of complex structure of a power supply circuit in the prior art. The system comprises a DC / DC converter, a first power supply circuit, a second power supply circuit, a third power supply circuit and a fourth power supply circuit, a first output end of the DC / DC converter is connected with voltage input ends of the first power supply circuit and the second power supply circuit, and a second output end is connected with voltage input ends of the third power supply circuit and the fourth power supply circuit; the voltage output end of the first power supply circuit is connected with a 1.0 V analog power supply input pin of the radar signal acquisition chip; the voltage output end of the second power supply circuit is connected with a 1.0 V digital power supply input pin of the radar signal acquisition chip; the voltage output end of the third power supply circuit is connected with a 1.8 V analog voltage input pin of the radar signal acquisition chip; and the voltage output end of the fourth power supply circuit is connected with a 2.2 V analog voltage input pin of the radar signal acquisition chip. Stable power supply for the radar signal acquisition chip set is realized.

Description

Technical Field

[0001] The utility model relates to the technical field of radar chipsets, in particular to a power supply circuit of a radar signal acquisition chipset. Background Art

[0002] Today's radars have evolved from single-mode to multi-mode. The functions of new composite radars are becoming increasingly complex, and the requirements for radar signal acquisition chips are becoming higher and higher.

[0003] The radar signal acquisition chip of the high-speed radar signal processing system requires a variety of power supplies, and the power quality requirements are very high. In order to meet the demand for power types, the existing design usually uses a large number of power chips, which occupies a large radar space and has a complex structure. Utility Model Content

[0004] In view of the above analysis, the utility model aims to provide a power supply circuit for a radar signal acquisition chipset to solve the problem of complex structure of the existing power supply circuit.

[0005] The purpose of this utility model is mainly achieved through the following technical solutions:

[0006] A power supply circuit for a radar signal acquisition chipset, comprising: a DC / DC converter, a first power supply circuit, a second power supply circuit, a third power supply circuit and a fourth power supply circuit;

[0007] The DC / DC converter includes two output terminals; the voltage input terminal of the DC / DC converter is connected to the power supply device, the first output terminal is connected to the voltage input terminals of the first power circuit and the second power circuit, and the second output terminal is connected to the voltage input terminals of the third power circuit and the fourth power circuit;

[0008] The voltage output end of the first power supply circuit is connected to the 1.0V analog power input pin of the radar signal acquisition chip;

[0009] The voltage output end of the second power supply circuit is connected to the 1.0V digital power input pin of the radar signal acquisition chip;

[0010] The voltage output end of the third power supply circuit is connected to the 1.8V analog voltage input pin of the radar signal acquisition chip;

[0011] The voltage output end of the fourth power supply circuit is connected to the 2.2V analog voltage input pin of the radar signal acquisition chip;

[0012] The first output end of the DC / DC converter is also connected to the 1.8V digital power input pin of the radar signal acquisition chip.

[0013] Based on the further improvement of the above solution, the first power supply circuit includes a first LDO power supply chip and a first filter;

[0014] The input end of the first LDO power chip is connected to the first voltage output end of the DC / DC converter; the output end of the first LDO power chip is connected to the input end of the first filter;

[0015] The output end of the first filter is connected to the 1.0V analog power input pin of the radar signal acquisition chip;

[0016] The output end of the first filter is also grounded through a first parallel capacitor group; the first parallel capacitor group includes 8 parallel capacitors.

[0017] Based on the further improvement of the above solution, the second power supply circuit includes a second LDO power supply chip and a second parallel capacitor group;

[0018] The input end of the second LDO power chip is connected to the first voltage output end of the DC / DC converter, and the output end of the second LDO power chip is connected to the 1.0V digital power input pin of the radar signal acquisition chip;

[0019] The output end of the second LDO power chip is also grounded through the second parallel capacitor group;

[0020] The second parallel capacitor group includes 8 parallel capacitors.

[0021] Based on the further improvement of the above solution, the third power supply circuit includes a third LDO power supply chip, a third filter and a third parallel capacitor group;

[0022] The input end of the third LDO power chip is connected to the second voltage output end of the DC / DC converter, and the output end of the third LDO power chip is connected to the input end of the third filter;

[0023] The output end of the third filter is connected to the 1.8V analog power input pin of the radar signal acquisition chip;

[0024] The output end of the third filter is also grounded through the third parallel capacitor group;

[0025] The third parallel capacitor group includes 12 parallel capacitors.

[0026] Based on the further improvement of the above solution, the fourth power supply circuit includes a fourth LDO power supply chip, a fourth filter and a fourth parallel capacitor group;

[0027] The input end of the fourth LDO power chip is connected to the second voltage output end of the DC / DC converter, and the output end of the fourth LDO power chip is connected to the input end of the fourth filter;

[0028] The output end of the fourth filter is connected to the 2.2V analog power input pin of the radar signal acquisition chip;

[0029] The output end of the fourth filter is also grounded through the fourth parallel capacitor group;

[0030] The fourth parallel capacitor group includes 6 parallel capacitors.

[0031] Based on the further improvement of the above solution, the power supply circuit further includes a fifth circuit, and the fifth circuit includes a fifth filter and a fifth parallel capacitor group;

[0032] The input end of the fifth filter is connected to the output end of the second LDO power chip, and the output end of the fifth filter is connected to the 1.0V clock amplifier power input pin of the radar signal acquisition chip;

[0033] The output end of the fifth filter is also grounded via a fifth parallel capacitor group.

[0034] Based on the further improvement of the above solution, the power supply circuit further includes a sixth circuit, and the sixth circuit includes a sixth filter and a sixth parallel capacitor group;

[0035] The input end of the sixth filter is connected to the output end of the second LDO power chip, and the output end of the sixth filter is connected to the 1.0V high-speed serial port power input pin of the radar signal acquisition chip;

[0036] The output end of the sixth filter is also grounded through a sixth parallel capacitor group.

[0037] Based on the further improvement of the above solution, the power supply circuit further includes a seventh circuit, and the seventh circuit includes a seventh filter and a seventh parallel capacitor group;

[0038] The input end of the seventh filter is connected to the output end of the second LDO power chip, and the output end of the seventh filter is connected to the 1.0V synchronous signal amplifier power input pin of the radar signal acquisition chip;

[0039] The output end of the seventh filter is also grounded through a seventh parallel capacitor group.

[0040] Based on the further improvement of the above solution, the power supply circuit further includes an eighth circuit, and the eighth circuit includes an eighth filter and an eighth parallel capacitor group;

[0041] The input end of the eighth filter is connected to the output end of the third LDO power chip, and the output end of the eighth filter is connected to the 1.8V high-speed serial port analog power input pin of the radar signal acquisition chip;

[0042] The output end of the eighth filter is also grounded through an eighth parallel capacitor group.

[0043] Based on the further improvement of the above solution, the DC / DC converter includes a plurality of second output pins, the plurality of second output pins are grounded through a second output circuit; the plurality of second output pins output a 3.3V digital voltage as a second output terminal through three parallel resistors;

[0044] The second output circuit includes five capacitors and one resistor, the five capacitors and one resistor are connected in parallel, two of which are polar capacitors, the positive electrodes of the polar capacitors are connected to the plurality of second output pins of the DC / DC converter, and the negative electrodes are grounded;

[0045] The plurality of second output pins of the DC / DC converter are also connected to the second error amplifier input pin of the DC / DC converter through the first capacitor; the second error amplifier input pin is grounded through two series resistors.

[0046] Compared with the prior art, the power supply circuit of the radar signal acquisition chip provided by the utility model provides two voltage outputs through a DC / DC converter, which are respectively connected to a first power supply circuit and a second power supply circuit, a third power supply circuit and a fourth power supply circuit. The voltage is converted into different voltages required by the radar signal acquisition chip through the DC / DC converter, the first power supply circuit, the second power supply circuit, the third power supply circuit and the fourth power supply circuit. A four-way power supply circuit can be used to provide a group of four radar signal acquisition chips with a variety of low-noise and stable power supplies. The circuit design is simple, and the power supply current used by the radar signal acquisition chip is less than 80% of the maximum output current of the power supply chip. The current margin in the circuit is large and the design is reliable.

[0047] In the present invention, the above-mentioned technical solutions can also be combined with each other to achieve more preferred combination solutions. Other features and advantages of the present invention will be described in the following content, and some advantages can be obvious from the description or understood by implementing the present invention. The purpose and other advantages of the present invention can be achieved and obtained through the contents specifically pointed out in the text and the drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0048] The accompanying drawings are only used for the purpose of illustrating specific embodiments and are not to be considered as limiting the present invention. In the entire drawings, the same reference symbols represent the same components.

[0049] Figure 1This is a structural block diagram of the power supply circuit of the radar signal acquisition chipset according to an embodiment of the present utility model;

[0050] Figure 2 A partial circuit diagram of a power supply circuit according to an embodiment of the utility model;

[0051] Figure 3 A partial circuit diagram of a power supply circuit according to an embodiment of the utility model;

[0052] Figure 4 A partial circuit diagram of a power supply circuit according to an embodiment of the utility model;

[0053] Figure 5 It is a partial circuit diagram of a DC / DC converter according to an embodiment of the present utility model. DETAILED DESCRIPTION

[0054] The preferred embodiments of the present invention are described in detail below in conjunction with the accompanying drawings, wherein the accompanying drawings constitute a part of the present application and are used together with the embodiments of the present invention to illustrate the principles of the present invention, but are not used to limit the scope of the present invention.

[0055] A specific embodiment of the utility model discloses a power supply circuit of a radar signal acquisition chipset, such as Figure 1 As shown, it includes: a DC / DC converter, a first power supply circuit, a second power supply circuit, a third power supply circuit, and a fourth power supply circuit;

[0056] The DC / DC converter includes two output terminals; the voltage input terminal of the DC / DC converter is connected to the power supply device, the first output terminal is connected to the voltage input terminals of the first power circuit and the second power circuit, and the second output terminal is connected to the voltage input terminals of the third power circuit and the fourth power circuit;

[0057] The voltage output end of the first power supply circuit is connected to the 1.0V analog power input pin of the radar signal acquisition chip;

[0058] The voltage output end of the second power supply circuit is connected to the 1.0V digital power input pin of the radar signal acquisition chip;

[0059] The voltage output end of the third power supply circuit is connected to the 1.8V analog voltage input pin of the radar signal acquisition chip;

[0060] The voltage output end of the fourth power supply circuit is connected to the 2.2V analog voltage input pin of the radar signal acquisition chip;

[0061] The first output end of the DC / DC converter is also connected to the 1.8V digital power input pin of the radar signal acquisition chip.

[0062] During implementation, the DC / DC converter uses SM4630AMPV, which is a two-channel DC / DC step-down regulator that can provide 18A current per output and can provide 36A current output capability by parallel connection.

[0063] During implementation, the power input end of the DC / DC converter is connected to the power supply device to input a 12V voltage, and the DC / DC converter can output two voltages, the first output is connected to the first power circuit and the second power circuit, and the second output is connected to the third power circuit and the fourth power circuit. During implementation, the first output end of the DC / DC converter outputs a 1.8V voltage, and the second output end outputs a 3.3V voltage.

[0064] The radar signal acquisition chipset includes multiple ADC converters, for example, 4 ADC converters. During implementation, the radar signal acquisition chip is a high-speed ADC converter, and the high-speed ADC converter can use the YA12D2G6A chip. The YA12D2G6A is a 12-bit, 2600MSPS, dual-channel high-performance analog-to-digital converter. The chip power consumption is only 1.4W at a conversion rate of 2600MSPS. Multiple ADC converters share a power supply circuit. The YA12D2G6A requires 10 power supplies for normal operation. In order to simplify the design, some of the power supplies are merged to simplify the power supply circuit.

[0065] In order to meet the high current demand of the radar signal acquisition chipset, the existing technology uses a switching power supply to directly power the radar signal acquisition chipset. The power chip has large switching noise and power ripple, which directly causes the problem of low effective bits of the radar signal acquisition chipset.

[0066] Compared with the prior art, the power supply circuit of the radar signal acquisition chip provided by the utility model provides two voltage outputs through a DC / DC converter, which are respectively connected to a first power supply circuit and a second power supply circuit, a third power supply circuit and a fourth power supply circuit. The voltage is converted into different voltages required by the radar signal acquisition chip through the DC / DC converter, the first power supply circuit, the second power supply circuit, the third power supply circuit and the fourth power supply circuit. A four-way power supply circuit can be used to provide a group of four radar signal acquisition chips with a variety of low-noise and stable power supplies. The circuit design is simple, and the power supply current used by the radar signal acquisition chip is less than 80% of the maximum output current of the power supply chip. The current margin in the circuit is large and the design is reliable.

[0067] During implementation, the two voltage outputs of the DC / DC converter are also connected to the voltage input pins of the FPGA, simplifying the power supply design of the entire acquisition system.

[0068] During implementation, the radar signal acquisition chip requires a 1.0V analog voltage, and the first power supply circuit is used to provide a 1.0V analog voltage. Figure 2As shown, the first power supply circuit includes a first LDO power supply chip and a first filter L19;

[0069] The input end of the first LDO power chip is connected to the first voltage output end of the DC / DC converter; the output end of the first LDO power chip is connected to the input end of the first filter L19;

[0070] The output end of the first filter is connected to the 1.0V analog power input pin of the radar signal acquisition chip;

[0071] The output end of the first filter is also grounded through a first parallel capacitor group; the first parallel capacitor group includes 8 parallel capacitors (C635-C545).

[0072] The capacitance value of one of the capacitors in the first parallel capacitor group is 4.7 μF, the capacitance value of one of the capacitors is 10 μF, and the capacitance values ​​of the remaining capacitors are 0.1 μF.

[0073] The first LDO power chip provides 1.0V analog power for multiple ADC converters at the same time. The 1.0V analog power input of each ADC converter uses a first filter. This design can separate the 1.0V analog power of multiple ADC converters to prevent the noise generated when the ADC is working from being transmitted through the power copper sheet, causing interference between multiple ADCs. The first parallel capacitor group selects capacitors with different capacitance values ​​to cover a wider range of frequency noise, thereby achieving better filtering and ensuring the clean power supply of the ADC. The 10uF large capacitor is placed near the ADC to play an energy storage role and ensure the voltage stability of the circuit when the ADC converter is running at high speed.

[0074] When implemented, the filter can use GTL1608X-223T102.

[0075] During implementation, the radar signal acquisition chip requires a 1.0V digital voltage, and the second power supply circuit is used to provide a 1.0V digital voltage. Figure 3 , the second power supply circuit includes a second LDO power supply chip and a second parallel capacitor group;

[0076] The input end of the second LDO power chip is connected to the first voltage output end of the DC / DC converter, and the output end of the second LDO power chip is connected to the 1.0V digital power input pin of the radar signal acquisition chip;

[0077] The output end of the second LDO power chip is also grounded through the second parallel capacitor group;

[0078] The second parallel capacitor group includes 8 parallel capacitors (C773-C641).

[0079] The capacitance value of one of the capacitors in the second parallel capacitor group is 4.7 μF, the capacitance value of one of the two capacitors is 10 μF, and the capacitance value of the remaining capacitors is 0.1 μF.

[0080] The second parallel capacitor group of the second circuit selects capacitors of various capacitance values ​​to cover a wider range of frequency noise, thereby achieving better filtering and ensuring a clean ADC power supply. The 10uF large capacitor is placed near the ADC to store energy and ensure voltage stability in the circuit when the ADC converter is running at high speed.

[0081] During implementation, the radar signal acquisition chip requires a 1.8V analog voltage, and the third power supply circuit is used to provide a 1.8V analog voltage. Figure 4 , the third power supply circuit includes a third LDO power supply chip, a third filter L26 and a third parallel capacitor group;

[0082] The input end of the third LDO power chip is connected to the second voltage output end of the DC / DC converter, and the output end of the third LDO power chip is connected to the input end of the third filter L26;

[0083] The output end of the third filter L26 is connected to the 1.8V analog power input pin of the radar signal acquisition chip;

[0084] The output end of the third filter L26 is also grounded through the third parallel capacitor group;

[0085] The third parallel capacitor group includes 12 parallel capacitors (C468-C696).

[0086] The capacitance value of one of the capacitors in the third parallel capacitor group is 4.7 μF, the capacitance value of one of the capacitors is 10 μF, and the capacitance values ​​of the remaining capacitors are 0.1 μF.

[0087] The third circuit separates the 1.8V analog power supplies of multiple ADC converters through the third filter to prevent the noise generated when the ADC is working from being transmitted through the copper foil of the power supply, causing interference between multiple ADCs. The third parallel capacitor group selects capacitors of various capacitance values ​​to cover noise in a wider range of frequencies, thereby achieving better filtering and ensuring that the ADC power supply is clean. The 10uF large capacitor is placed near the ADC to play an energy storage role, ensuring that the voltage on the circuit is stable when the ADC converter is running at high speed.

[0088] During implementation, the radar signal acquisition chip requires a 2.2V analog voltage, and the fourth power supply circuit is used to provide a 2.2V analog voltage. Figure 4, the fourth power supply circuit includes a fourth LDO power supply chip, a fourth filter L69 and a fourth parallel capacitor group;

[0089] The input end of the fourth LDO power chip is connected to the second voltage output end of the DC / DC converter, and the output end of the fourth LDO power chip is connected to the input end of the fourth filter L69;

[0090] The output end of the fourth filter L69 is connected to the 2.2V analog power input pin of the radar signal acquisition chip;

[0091] The output end of the fourth filter L69 is also grounded through the fourth parallel capacitor group;

[0092] The fourth parallel capacitor group includes 6 parallel capacitors (C582-C690).

[0093] The capacitance value of one capacitor of the fourth parallel capacitor group is 2.2 μF, the capacitance value of one capacitor is 10 μF, and the capacitance values ​​of the remaining capacitors are 0.1 μF.

[0094] The fourth circuit separates the 2.2V analog power supplies of multiple ADC converters through the fourth filter to prevent the noise generated when the ADC is working from being transmitted through the power copper foil, causing interference between multiple ADCs. The fourth parallel capacitor group selects capacitors of various capacitance values ​​to cover noise in a wider range of frequencies, thereby achieving better filtering and ensuring that the ADC power supply is clean. The 10uF large capacitor is placed near the ADC to play an energy storage role, ensuring that the voltage on the circuit is stable when the ADC converter is running at high speed.

[0095] During implementation, the ADC chip also needs to be provided with a 1.0V clock amplifier power supply, so the power supply circuit further includes a fifth circuit, and the fifth circuit includes a fifth filter L9 and a fifth parallel capacitor group;

[0096] The input end of the fifth filter L9 is connected to the output end of the second LDO power chip, and the output end of the fifth filter L9 is connected to the 1.0V clock amplifier power input pin of the radar signal acquisition chip;

[0097] The output end of the fifth filter L9 is also grounded via a fifth parallel capacitor group.

[0098] The fifth parallel capacitor group includes 6 parallel capacitors, one of which has a capacitance value of 4.7 μF, one of which has a capacitance value of 10 μF, and the remaining capacitors have a capacitance value of 0.1 μF.

[0099] The fifth circuit separates the 1.0V clock amplifier power supplies of multiple ADC converters through the fifth filter to prevent the noise generated when the ADC is working from being transmitted through the power copper foil, causing interference between multiple ADCs. The fifth parallel capacitor group selects capacitors of various capacitance values ​​to cover noise in a wider range of frequencies, thereby achieving better filtering and ensuring that the ADC power supply is clean. The 10uF large capacitor is placed near the ADC to play an energy storage role, ensuring that the voltage on the circuit is stable when the ADC converter is running at high speed.

[0100] During implementation, the ADC chip also needs to be provided with a 1.0V high-speed serial port power supply, so the power supply circuit further includes a sixth circuit, and the sixth circuit includes a sixth filter L31 and a sixth parallel capacitor group;

[0101] The input end of the sixth filter L31 is connected to the output end of the second LDO power chip, and the output end of the sixth filter L31 is connected to the 1.0V high-speed serial port power input pin of the radar signal acquisition chip;

[0102] The output end of the sixth filter L31 is also grounded via a sixth parallel capacitor group.

[0103] The sixth parallel capacitor group includes 7 parallel capacitors, wherein the capacitance value of one capacitor is 4.7 μF, the capacitance value of one capacitor is 10 μF, and the capacitance values ​​of the remaining capacitors are 0.1 μF.

[0104] The sixth circuit separates the 1.0V high-speed serial port power supplies of multiple ADC converters through the sixth filter to prevent the noise generated when the ADC is working from being transmitted through the power copper sheet, causing interference between multiple ADCs. The sixth parallel capacitor group selects capacitors of various capacitance values ​​to cover noise in a wider range of frequencies, thereby achieving better filtering and ensuring that the ADC power supply is clean. The 10uF large capacitor is placed near the ADC to play an energy storage role, ensuring that the voltage on the circuit is stable when the ADC converter is running at high speed.

[0105] During implementation, the ADC chip also needs to be provided with a synchronous signal amplifier power supply, therefore, the power supply circuit further includes a seventh circuit, and the seventh circuit includes a seventh filter L30 and a seventh parallel capacitor group;

[0106] The input end of the seventh filter L30 is connected to the output end of the second LDO power chip, and the output end of the seventh filter L30 is connected to the 1.0V synchronous signal amplifier power input pin of the radar signal acquisition chip;

[0107] The output end of the seventh filter L30 is also grounded through a seventh parallel capacitor group. In implementation, the seventh parallel capacitor group includes three parallel capacitors, one of which has a capacitance value of 10 μF, and the other capacitors have capacitance values ​​of 0.1 μF.

[0108] The seventh circuit separates the power supplies of the synchronous signal amplifiers of multiple ADC converters through the seventh filter to prevent the noise generated when the ADC is working from being transmitted through the copper foil of the power supply, causing interference between multiple ADCs. The seventh parallel capacitor group selects capacitors of various capacitance values ​​to cover noise in a wider range of frequencies, thereby achieving better filtering and ensuring that the power supply of the ADC is clean. The large 10uF capacitor is placed near the ADC to play an energy storage role and ensure the voltage stability of the circuit when the ADC converter is running at high speed.

[0109] During implementation, the ADC chip also needs to be provided with a high-speed serial port analog power supply, therefore, the power supply circuit further includes an eighth circuit, and the eighth circuit includes an eighth filter L32 and an eighth parallel capacitor group;

[0110] The input end of the eighth filter L32 is connected to the output end of the third LDO power chip, and the output end of the eighth filter L32 is connected to the 1.8V high-speed serial port analog power input pin of the radar signal acquisition chip;

[0111] The output end of the eighth filter L32 is also grounded through an eighth parallel capacitor group.

[0112] The eighth parallel capacitor group includes two parallel capacitors, wherein the capacitance value of one capacitor is 10 μF, and the capacitance value of the other capacitor is 0.1 μF.

[0113] During implementation, the ADC chip also needs to be provided with a 1.8V SPI interface power supply, so the first output end of the DC / DC converter is also connected to the 1.8V SPI interface power supply input pin of the ADC chip;

[0114] The 1.8V SPI interface power input pin is also grounded through a ninth parallel capacitor group.

[0115] The ninth parallel capacitor group includes two parallel capacitors, and the capacitance value of each capacitor is 0.1 μF.

[0116] During implementation, the model of the LDO power chip is SM74401.

[0117] During implementation, the power supply circuit includes 4 LDO power chips, each of which provides power with different voltages, that is, each chip provides one power supply. LDO-type power chips have small ripple and good output power quality, which can help improve the performance of ADC, but LDO itself consumes a lot of power, so the input and output voltage difference should be as small as possible. The sampling rate of the radar signal acquisition chipset is high and the current consumption is large. Special attention should be paid to the PCB layout and wiring. Consider leaving enough power layout space for AD during PCB layout, and lay a large enough copper sheet during wiring to ensure the overcurrent capacity.

[0118] Specifically, the input end of the DC / DC converter is connected to the power supply device through the tenth parallel resistor, and the tenth parallel capacitor group includes 4 parallel capacitors. The capacitance values ​​of the 4 capacitors in the tenth parallel capacitor group are the same, all of which are 22 μF.

[0119] The DC / DC converter includes a plurality of second output pins, the plurality of second output pins are grounded through a second output circuit; the plurality of second output pins output a 3.3V digital voltage as a second output terminal through three parallel resistors;

[0120] The second output circuit includes five capacitors and one resistor, the five capacitors and one resistor are connected in parallel, two of which are polar capacitors, the positive electrodes of the polar capacitors are connected to the plurality of second output pins of the DC / DC converter, and the negative electrodes are grounded;

[0121] The plurality of second output pins of the DC / DC converter are also connected to the second error amplifier input pin of the DC / DC converter via a second capacitor C89; the second error amplifier input pin is grounded via two series resistors.

[0122] During implementation, the capacitance value of the two polar capacitors is 470 μF, and the capacitance value of the other capacitors is 100 uF.

[0123] like Figure 5 As shown, the second output pin outputs a 3.3V digital voltage as the second output terminal through three parallel resistors (X29-X31), thereby achieving isolation between the DC / DC converter and the ADC.

[0124] The DC / DC converter includes a plurality of first output pins, the plurality of first output pins are grounded through a first output circuit; the first output circuit has the same structure as the second output circuit; the plurality of first output pins output a 1.8V digital voltage as a first output terminal through three parallel resistors;

[0125] The multiple first output pins of the DC / DC converter are also connected to the first error amplifier input pin of the DC / DC converter through the first capacitor C90; the first error amplifier input pin is grounded through two series resistors.

[0126] The utility model only needs to connect the devices with corresponding functions through the connection relationship given in the embodiment of the utility model, which does not involve any improvement in program software. As for the connection mode between the hardware devices with corresponding functions, those skilled in the art can use the existing technology to achieve, and no detailed description is given here.

[0127] The above description is only a preferred specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by any technician familiar with the technical field within the technical scope disclosed in the present invention should be included in the protection scope of the present invention.

Claims

1. A power supply circuit for a radar signal acquisition chipset, characterized in that: include: A DC / DC converter, a first power supply circuit, a second power supply circuit, a third power supply circuit and a fourth power supply circuit; The DC / DC converter includes two output terminals; the voltage input terminal of the DC / DC converter is connected to the power supply device, the first output terminal is connected to the voltage input terminals of the first power circuit and the second power circuit, and the second output terminal is connected to the voltage input terminals of the third power circuit and the fourth power circuit; The voltage output end of the first power supply circuit is connected to the 1.0V analog power input pin of the radar signal acquisition chip; The voltage output end of the second power supply circuit is connected to the 1.0V digital power input pin of the radar signal acquisition chip; The voltage output end of the third power supply circuit is connected to the 1.8V analog voltage input pin of the radar signal acquisition chip; The voltage output end of the fourth power supply circuit is connected to the 2.2V analog voltage input pin of the radar signal acquisition chip; The first output end of the DC / DC converter is also connected to the 1.8V digital power input pin of the radar signal acquisition chip.

2. The power supply circuit of the radar signal acquisition chipset according to claim 1, characterized in that: The first power supply circuit includes a first LDO power supply chip and a first filter; The input end of the first LDO power chip is connected to the first voltage output end of the DC / DC converter; the output end of the first LDO power chip is connected to the input end of the first filter; The output end of the first filter is connected to the 1.0V analog power input pin of the radar signal acquisition chip; The output end of the first filter is also grounded through a first parallel capacitor group; the first parallel capacitor group includes 8 parallel capacitors.

3. The power supply circuit of the radar signal acquisition chipset according to claim 1, characterized in that: The second power supply circuit includes a second LDO power supply chip and a second parallel capacitor group; The input end of the second LDO power chip is connected to the first voltage output end of the DC / DC converter, and the output end of the second LDO power chip is connected to the 1.0V digital power input pin of the radar signal acquisition chip; The output end of the second LDO power chip is also grounded through the second parallel capacitor group; The second parallel capacitor group includes 8 parallel capacitors.

4. The power supply circuit of the radar signal acquisition chipset according to claim 1, characterized in that: The third power supply circuit includes a third LDO power supply chip, a third filter and a third parallel capacitor group; The input end of the third LDO power chip is connected to the second voltage output end of the DC / DC converter, and the output end of the third LDO power chip is connected to the input end of the third filter; The output end of the third filter is connected to the 1.8V analog power input pin of the radar signal acquisition chip; The output end of the third filter is also grounded through the third parallel capacitor group; The third parallel capacitor group includes 12 parallel capacitors.

5. The power supply circuit of the radar signal acquisition chipset according to claim 1, characterized in that: The fourth power supply circuit includes a fourth LDO power supply chip, a fourth filter and a fourth parallel capacitor group; The input end of the fourth LDO power chip is connected to the second voltage output end of the DC / DC converter, and the output end of the fourth LDO power chip is connected to the input end of the fourth filter; The output end of the fourth filter is connected to the 2.2V analog power input pin of the radar signal acquisition chip; The output end of the fourth filter is also grounded through the fourth parallel capacitor group; The fourth parallel capacitor group includes 6 parallel capacitors.

6. The power supply circuit of the radar signal acquisition chipset according to claim 3, characterized in that: The power supply circuit further includes a fifth circuit, wherein the fifth circuit includes a fifth filter and a fifth parallel capacitor group; The input end of the fifth filter is connected to the output end of the second LDO power chip, and the output end of the fifth filter is connected to the 1.0V clock amplifier power input pin of the radar signal acquisition chip; The output end of the fifth filter is also grounded via a fifth parallel capacitor group.

7. The power supply circuit of the radar signal acquisition chipset according to claim 3, characterized in that: The power supply circuit further includes a sixth circuit, wherein the sixth circuit includes a sixth filter and a sixth parallel capacitor group; The input end of the sixth filter is connected to the output end of the second LDO power chip, and the output end of the sixth filter is connected to the 1.0V high-speed serial port power input pin of the radar signal acquisition chip; The output end of the sixth filter is also grounded through a sixth parallel capacitor group.

8. The power supply circuit of the radar signal acquisition chipset according to claim 3, characterized in that: The power supply circuit further includes a seventh circuit, wherein the seventh circuit includes a seventh filter and a seventh parallel capacitor group; The input end of the seventh filter is connected to the output end of the second LDO power chip, and the output end of the seventh filter is connected to the 1.0V synchronous signal amplifier power input pin of the radar signal acquisition chip; The output end of the seventh filter is also grounded through a seventh parallel capacitor group.

9. The power supply circuit of the radar signal acquisition chipset according to claim 4, characterized in that: The power supply circuit further includes an eighth circuit, wherein the eighth circuit includes an eighth filter and an eighth parallel capacitor group; The input end of the eighth filter is connected to the output end of the third LDO power chip, and the output end of the eighth filter is connected to the 1.8V high-speed serial port analog power input pin of the radar signal acquisition chip; The output end of the eighth filter is also grounded through an eighth parallel capacitor group.

10. The power supply circuit of the radar signal acquisition chipset according to claim 1, characterized in that: The DC / DC converter includes a plurality of second output pins, the plurality of second output pins are grounded through a second output circuit; the plurality of second output pins output a 3.3V digital voltage as a second output terminal through three parallel resistors; The second output circuit includes five capacitors and one resistor, the five capacitors and one resistor are connected in parallel, two of which are polar capacitors, the positive electrodes of the polar capacitors are connected to the plurality of second output pins of the DC / DC converter, and the negative electrodes are grounded; The plurality of second output pins of the DC / DC converter are also connected to the second error amplifier input pin of the DC / DC converter through the first capacitor; the second error amplifier input pin is grounded through two series resistors.

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