Endoscope image processing circuit

Abstract

The utility model discloses an endoscope image processing circuit, belongs to the technical field of endoscopes, and solves the problems that an endoscope image possibly becomes blurred due to uneven illumination, insufficient lens quality or improper image processing, and the definition of the image is particularly critical when minimal lesions are diagnosed, so that the endoscope image is difficult to process. Therefore, the problem that the endoscope image needs to be processed to ensure the definition of the endoscope image is solved. Comprising an image sensor used for acquiring an image picture, converting the image picture into an electric signal and transmitting the electric signal; the input end of the signal processing unit is coupled with the output end of the image sensor, and the signal processing unit performs analog-digital conversion and image processing after responding to the electric signal of the image sensor; and the clock circuit generates a stable clock signal to provide a reference for the sampling of the image sensor and the synchronization of the signal processing unit. When the utility model works, the image sensor receives a stable power supply and captures an image, the image is converted into a digital signal through the ADC, the digital signal is processed and stored by the microcontroller, and a clear picture is synchronously displayed through the clock circuit.

Description

Technical Field

[0001] The utility model relates to the technical field of endoscopes, in particular to an endoscope image processing circuit. Background Art

[0002] An endoscope is a precision medical or industrial inspection tool that enters the human body or equipment through a tube or small incision and uses a built-in light source and camera to capture internal images. Despite continuous technological advances, the clarity of endoscopic images may still be affected by a variety of factors. Although the number of pixels is a direct indicator of resolution, in actual applications, endoscopic images may become blurred due to uneven lighting, insufficient lens quality, or improper image processing. In particular, when diagnosing tiny lesions, image clarity is particularly critical, so endoscopic images need to be processed to ensure their clarity.

[0003] Therefore, an endoscope image processing circuit is proposed to solve or alleviate the above problems. Utility Model Content

[0004] The utility model aims to solve the shortcomings in the prior art and proposes an endoscope image processing circuit.

[0005] In order to achieve the above purpose, the utility model adopts the following technical solutions:

[0006] An endoscope image processing circuit, comprising:

[0007] Image sensor, which is used to capture images and convert them into electrical signals for external transmission;

[0008] A signal processing unit, whose input terminal is coupled to the output terminal of the image sensor, performs analog-to-digital conversion and image processing in response to the electrical signal of the image sensor;

[0009] A clock circuit generates a stable clock signal to provide a reference for the synchronization of the sampling and signal processing units of the image sensor.

[0010] Preferably, it further comprises a memory, an input end of the memory is coupled to an output end of the signal processing unit, and the memory stores the image data processed by the signal processing unit.

[0011] Preferably, a microcontroller is also included, the input end of the microcontroller is coupled to the output end of the clock circuit and the output end of the signal processing unit, and the microcontroller receives the digital signal of the signal processing unit and outputs it after synchronous processing according to the clock signal.

[0012] Preferably, it also includes a display, the input end of the display is coupled to the output end of the microcontroller, and the display is used to display the image processed by the microcontroller.

[0013] Preferably, it also includes a power management unit, which provides power for the image sensor, the clock circuit, the signal processing unit, the microcontroller, and the memory.

[0014] Preferably, the clock circuit comprises

[0015] A low voltage dropout linear regulator, one end of which is connected to electricity, and the low voltage dropout linear regulator receives electric energy and provides a stable voltage;

[0016] A constant temperature crystal oscillator, whose input end is coupled to the output end of the low voltage drop linear regulator, and the constant temperature crystal oscillator provides a stable clock signal;

[0017] A Schmitt trigger, whose input end is coupled to the output end of the oven-controlled crystal oscillator, the Schmitt trigger being used for waveform shaping and reducing jitter and noise;

[0018] A decoupling capacitor, wherein the number of the decoupling capacitors is two, the two decoupling capacitors are connected in parallel, and one end of one of the decoupling capacitors is coupled to the power supply and the output end of the low-dropout linear regulator respectively, and one end of the other decoupling capacitor is coupled between the constant temperature crystal oscillator and the Schmitt trigger;

[0019] A clock buffer / driver is coupled to the other end of the decoupling capacitor and is used to enhance the clock signal.

[0020] Preferably, the clock circuit further comprises a clock monitoring circuit, which is coupled to the clock buffer / driver and is used to monitor the stability and accuracy of the clock signal.

[0021] Preferably, the power management unit is a TPS65400 integrated power management unit, the image sensor is a CMOS linear array image sensor, the memory is an SRAM static random access memory, the signal processing unit includes a digital-to-analog converter and an FPGA field programmable gate array, and the microcontroller is an STM32 single-chip microcomputer.

[0022] Preferably, the clock buffer / driver is a 74HC4050D buffer and line driver logic chip, and the clock monitoring circuit is a frequency counter.

[0023] The utility model has the following beneficial effects:

[0024] When the utility model is working, the image sensor receives a stable power supply and captures an image, which is converted into a digital signal by an ADC and then processed by a microcontroller, stored and synchronously displayed with a clock circuit for a clear picture. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to more clearly illustrate the technical solutions of the embodiments of the utility model, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the utility model and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without paying creative work.

[0026] Figure 1 It is a structural block diagram of the utility model;

[0027] Figure 2 It is a structural block diagram of the clock circuit in the utility model;

[0028] Figure 3 This is the wiring diagram of the low voltage difference linear regulator in the utility model;

[0029] Figure 4 This is the wiring diagram of the constant temperature crystal oscillator in the utility model;

[0030] Figure 5 It is the wiring diagram of the Schmitt trigger in the utility model.

[0031] 1. Image sensor; 2. Signal processing unit; 3. Memory; 4. Clock circuit; 401. Low voltage dropout linear regulator; 402. Constant temperature crystal oscillator; 403. Schmitt trigger; 404. Decoupling capacitor; 405. Clock buffer / driver; 406. Clock monitoring circuit; 5. Microcontroller; 6. Display. DETAILED DESCRIPTION

[0032] In order to make the purpose, technical scheme and advantages of the embodiments of the utility model clearer, the technical scheme in the embodiments of the utility model will be clearly and completely described below in conjunction with the drawings in the embodiments of the utility model. Obviously, the described embodiments are part of the embodiments of the utility model, not all of the embodiments. Generally, the components of the embodiments of the utility model described and shown in the drawings here can be arranged and designed in various different configurations.

[0033] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the present invention to be protected, but merely represents selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0034] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, further definition and explanation thereof is not required in subsequent drawings.

[0035] In the description of the present utility model, it should be understood that the terms "center", "up", "down", "left", "right", "vertical", "horizontal", "inside", "outside", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, or are the orientations or positional relationships in which the utility model product is conventionally placed when in use, or are the orientations or positional relationships conventionally understood by those skilled in the art. They are only for the convenience of describing the present utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present utility model.

[0036] Furthermore, the terms “first”, “second”, “third”, etc. are merely used for distinguishing descriptions and are not to be understood as indicating or implying relative importance.

[0037] In the description of the present invention, it is also necessary to explain that, unless otherwise clearly specified and limited, the terms "set", "install", "connect", and "connect" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0038] An endoscope image processing circuit, such as Figure 1 As shown, it includes an image sensor 1, a signal processing unit 2, a clock circuit 4, a memory 3, a microcontroller 5, a display 6, and a power management unit.

[0039] The power management unit is a TPS65400 integrated power management unit, the image sensor 1 is a CMOS linear array image sensor, the memory 3 is an SRAM static random access memory, the signal processing unit 2 includes a digital-to-analog converter and an FPGA field programmable gate array, and the microcontroller 5 is an STM32 single-chip microcomputer.

[0040] The image sensor 1 is used to acquire an image and convert it into an electrical signal for external transmission. The input end of the signal processing unit 2 is coupled to the output end of the image sensor 1. After responding to the electrical signal of the image sensor 1, the signal processing unit 2 performs analog-to-digital conversion and image processing. The clock circuit 4 generates a stable clock signal to provide a reference for the sampling of the image sensor 1 and the synchronization of the signal processing unit 2. The input end of the memory 3 is coupled to the output end of the signal processing unit 2. The memory 3 stores the image data processed by the signal processing unit 2. The input end of the microcontroller 5 is coupled to the output end of the clock circuit 4 and the output end of the signal processing unit 2. The microcontroller 5 receives the digital signal of the signal processing unit 2 and outputs it after synchronization processing according to the clock signal. The input end of the display 6 is coupled to the output end of the microcontroller 5. The display 6 is used to display the image processed by the microcontroller 5. The power management unit supplies power to the image sensor 1, the clock circuit 4, the signal processing unit 2, the microcontroller 5, and the memory 3.

[0041] like Figure 2 As shown, the clock circuit 4 includes a low voltage dropout linear regulator 401, a constant temperature crystal oscillator 402, a Schmitt trigger 403, a decoupling capacitor 404, a clock buffer / driver 405, and a clock monitoring circuit 406. Figure 3 As shown, one end of the low voltage dropout linear regulator 401 is connected to electricity, and the low voltage dropout linear regulator 401 receives electrical energy and provides a stable voltage, such as Figure 4 As shown, the input end of the oven-controlled crystal oscillator 402 is coupled to the output end of the low voltage drop linear regulator 401, and the oven-controlled crystal oscillator 402 provides a stable clock signal, such as Figure 5 As shown, the input end of the Schmitt trigger 403 is coupled to the output end of the constant temperature crystal oscillator 402, and the Schmitt trigger 403 is used for waveform shaping and reducing jitter and noise. There are two decoupling capacitors 404, and the two decoupling capacitors 404 are connected in parallel, and one end of one decoupling capacitor 404 is coupled to the power supply and the output end of the low voltage difference linear regulator 401 respectively, and one end of the other decoupling capacitor 404 is coupled between the constant temperature crystal oscillator 402 and the Schmitt trigger 403. The clock buffer / driver 405 is coupled to the other end of the decoupling capacitor 404, which is used to enhance the clock signal. The clock monitoring circuit 406 is coupled to the clock buffer / driver 405, which is used to monitor the stability and accuracy of the clock signal.

[0042] The clock buffer / driver 405 is a 74HC4050D buffer and line driver logic chip, and the clock monitoring circuit 406 is a frequency counter.

[0043] When the utility model is actually working, the image sensor 1 receives a stable power supply from the power management unit, and starts to capture images under the control of the microcontroller 5, converts the scene into an analog signal, and the analog image signal is transmitted to the signal processing unit 2, which includes an analog-to-digital converter (ADC) to convert the analog signal into a digital signal, and the digital signal is transmitted to the microcontroller 5 or processor, which executes image processing algorithms such as denoising, sharpening, automatic exposure adjustment, white balance, etc. The processed image data is stored in the memory 3, and the clock circuit 4 provides a synchronization signal for the entire system to ensure that the sampling of the image sensor 1, the conversion of the ADC, the processing of the microcontroller 5 and other operations are performed synchronously, and finally displayed through the display 6. In this process, it can be ensured that the endoscope acquisition picture and the display picture of the display 6 are displayed in real time, and the processed picture becomes clearer.

[0044] The above description is only the preferred embodiment of the utility model, and is not intended to limit the utility model. For those skilled in the art, the utility model can have various modifications and changes. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the utility model shall be included in the protection scope of the utility model.

Claims

1. An endoscope image processing circuit, characterized in that: include An image sensor (1) is used to capture an image and convert it into an electrical signal for external transmission; A signal processing unit (2), whose input end is coupled to the output end of the image sensor (1), and which performs analog-to-digital conversion and image processing in response to the electrical signal of the image sensor (1); A clock circuit (4) generates a stable clock signal to provide a reference for the sampling of the image sensor (1) and the synchronization of the signal processing unit (2).

2. An endoscope image processing circuit according to claim 1, characterized in that: It also comprises a memory (3), the input end of the memory (3) is coupled to the output end of the signal processing unit (2), and the memory (3) stores the image data processed by the signal processing unit (2).

3. An endoscope image processing circuit according to claim 2, characterized in that: It also includes a microcontroller (5), the input end of the microcontroller (5) being coupled to the output end of the clock circuit (4) and the output end of the signal processing unit (2), and the microcontroller (5) receiving the digital signal of the signal processing unit (2) and performing synchronous processing according to the clock signal and then outputting the signal to the outside.

4. The endoscope image processing circuit according to claim 1, characterized in that: It also comprises a display (6), the input end of the display (6) is coupled to the output end of the microcontroller (5), and the display (6) is used to display the image processed by the microcontroller (5).

5. The endoscope image processing circuit according to claim 3, characterized in that: It also includes a power management unit, which supplies power to the image sensor (1), the clock circuit (4), the signal processing unit (2), the microcontroller (5), and the memory (3).

6. The endoscope image processing circuit according to claim 1, characterized in that: The clock circuit (4) comprises A low voltage difference linear regulator (401), one end of which is connected to electricity, and the low voltage difference linear regulator (401) receives electric energy and provides a stable voltage; A constant temperature crystal oscillator (402), an input end of which is coupled to the output end of the low voltage difference linear regulator (401), and the constant temperature crystal oscillator (402) provides a stable clock signal; A Schmitt trigger (403), whose input end is coupled to the output end of the oven-controlled crystal oscillator (402), and the Schmitt trigger (403) is used for waveform shaping and reducing jitter and noise; A decoupling capacitor (404), wherein the number of the decoupling capacitors (404) is two, the two decoupling capacitors (404) are connected in parallel, and one end of one of the decoupling capacitors (404) is respectively coupled to a power supply and an output end of a low voltage difference linear regulator (401), and one end of the other decoupling capacitor (404) is coupled between a constant temperature crystal oscillator (402) and a Schmitt trigger (403); A clock buffer / driver (405) is coupled to the other end of the decoupling capacitor (404) and is used to enhance the clock signal.

7. An endoscope image processing circuit according to claim 6, characterized in that: The clock circuit (4) further comprises a clock monitoring circuit (406), which is coupled to the clock buffer / driver (405) and is used to monitor the stability and accuracy of the clock signal.

8. The endoscope image processing circuit according to claim 5, characterized in that: The power management unit is a TPS65400 integrated power management unit, the image sensor (1) is a CMOS linear array image sensor, the memory (3) is an SRAM static random access memory, the signal processing unit (2) comprises a digital-to-analog converter and an FPGA field programmable gate array, and the microcontroller (5) is an STM32 single-chip microcomputer.

9. The endoscope image processing circuit according to claim 7, characterized in that: The clock buffer / driver (405) is a 74HC4050D buffer and line driver logic chip, and the clock monitoring circuit (406) is a frequency counter.

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