Electronic paper pixel structure, electronic paper and display device

Abstract

The utility model discloses an electronic paper pixel structure, electronic paper and a display device. Each pixel unit A comprises a unit A thin film transistor, a unit A gate line terminal, a unit A source line terminal, a unit A drain line terminal, a unit A pixel electrode and a unit Acom electrode; the unit A grid electrode wire terminal, the unit A source electrode wire terminal and the unit A drain electrode wire terminal are respectively in electric signal connection with the grid electrode, the source electrode and the drain electrode of the unit A thin film transistor; the unit A pixel electrode is in electric signal connection with the drain electrode of the unit A thin film transistor; the unit A pixel electrode and the unit Acom electrode form a capacitor; each unit Acom electrode comprises three external connection wire ends, namely an external connection wire end AA, an external connection wire end AB and an external connection wire end AC, and the three external connection wire ends are communicated with a power source ground electric signal. By optimizing the routing mode of the com line, the com line resistance value is reduced, it is ensured that the com voltage on the pixel farthest from the signal input end is stable, and the stability of the display effect is improved.

Description

Technical Field

[0001] The present application belongs to the field of display technology, and specifically relates to an electronic paper pixel structure and electronic paper. Background Art

[0002] E-paper ink screen is a display screen made by electrophoretic display technology. It achieves the effect of displaying images by driving the electronic paper particles by continuously applying the electric field of the driving waveform to each pixel point through the driver IC chip. E-paper ink screen display has the characteristics of ultra-low power consumption, low-frequency display and power saving, and has a wide application market in price tags, advertising signs and bus stops.

[0003] Each pixel on the TFT electronic paper display is driven by a thin film transistor (Thin Film Transistor) integrated behind the pixel, so the TFT display is also a type of active matrix display device. The TFT display includes an array substrate (TFT Glass), on which a pixel electrode layer (PixelITO) corresponding to the electrode layer is arranged. The TFT electronic paper display achieves the effect of displaying images by driving the electronic paper particles by continuously applying a driving waveform voltage to each pixel through the driver IC chip.

[0004] The external electric field of electronic paper products is composed of the TFT capacitor charging and the electronic paper ITO. The driving time of the electric field is driven by a set of waveform voltages to achieve the display effect. The display of current electronic paper products relies on the driving IC chip of the electronic paper module to drive the waveform voltage to drive the particles in the electronic paper to achieve different display effects.

[0005] The driving signal of the thin film transistor (TFT) on the electronic paper panel is input by the FPC (Flexible Printed Circuit) on the lower side of the panel, so the voltage on the upper side of the panel far away from the excitation source will have a certain degree of voltage drop. If the resistance of the transmission line is too large, resulting in too large a voltage drop, it will cause abnormal phenomena such as uneven display. Especially when the com electrode connection line of the large-screen multi-pixel electronic paper panel is long, the larger the screen, the greater the probability of the above problem, and the more serious the situation.

[0006] Glossary: ​​EPD is the abbreviation of "electronic paper display" in English, which means electronic paper display in Chinese.

[0007] TFT is the abbreviation of "Thin Film Transistor" in English, which means thin film field effect transistor in Chinese. Each pixel on the TFT display is driven by the thin film transistor integrated behind it.

[0008] ITO is the abbreviation of "Indium Tin Oxide" in English, and its Chinese meaning is indium tin oxide. In this application, electronic paper ITO refers to the conductive film layer material of the transparent conductive film shielding glass mainly being ITO (indium tin oxide semiconductor) film. Summary of the invention

[0009] The technical problem to be solved by this application is to solve the problem that the voltage of the thin film transistor on the upper side of the display panel far away from the excitation source on the multi-pixel electronic paper panel will drop to a certain extent due to the increase in line resistance of the com electrode connection line that is too long. Excessive voltage drop will cause abnormal phenomena such as uneven display. The pixel structure designed in this application optimizes the routing method of the com line and reduces the resistance of the com line, thereby ensuring the stability of the com voltage on the pixel farthest from the signal input terminal and improving the stability of the display effect.

[0010] The technical solution of the present application for solving the above-mentioned technical problems is an electronic paper pixel structure, including pixel unit A; pixel unit A includes unit A thin film transistor, unit A gate line terminal, unit A source line terminal, unit A drain line terminal, unit A pixel electrode, unit Acom electrode; unit A gate line terminal is connected to the gate electrical signal of unit A thin film transistor; unit A source line terminal is connected to the source electrical signal of unit A thin film transistor; unit A drain line terminal is connected to the drain electrical signal of unit A thin film transistor; unit A pixel electrode is connected to the drain electrical signal of unit A thin film transistor; unit A pixel electrode forms a capacitor with unit Acom electrode; unit Acom electrode includes 3 external connection terminals, which are external connection terminal AA, external connection terminal AB, and external connection terminal AC, and the 3 external connection terminals are connected to the power ground electrical signal.

[0011] The electronic paper pixel structure comprises: two or more pixel units A; external connection terminals AA and AB of two or more pixel units A connected in series end to end; and external connection terminals AC of two or more pixel units A connected in parallel.

[0012] A plurality of pixel units A form an array of M rows and N columns, the external connection terminals AA and AB are connected in series end to end to form M rows; and N external connection terminals AC are connected across rows to form N columns.

[0013] The electronic paper pixel structure also includes two or more pixel units B, the pixel unit B includes a unit Bcom electrode; the unit Bcom electrode includes two external connection terminals, the two external connection terminals are external connection terminal BA and external connection terminal BB, the two external connection terminals are connected to the power supply ground electrical signal; the external connection terminal BA and the external connection terminal BB are connected in series end to end.

[0014] A plurality of pixel units form an array of M2 rows and N2 columns. The pixel units A in one row are located at the same column number, and the pixel units A in different rows are electrically connected across rows through an external connection terminal AC.

[0015] The electronic paper pixel structure includes a common ground line, external connection terminal AA and external connection terminal AB are directly electrically connected to the com electrode, and external connection terminal AC is electrically connected to the common ground line through a via hole, and the common ground line and the com electrode are not on the same plane.

[0016] The pixel electrode of unit A is a transparent conductive oxide ITO coating.

[0017] The unit Acom electrode is a transparent conductive oxide ITO coating.

[0018] The technical solution of the present application to solve the above technical problem may also be an electronic paper, including: the above electronic paper pixel structure.

[0019] The technical solution of the present application to solve the above technical problem may also be a display device, including the above electronic paper.

[0020] One of the beneficial effects of the technical solution in the present application is that the three external connection terminals are external connection terminal AA, external connection terminal AB, and external connection terminal AC, and the three external connection terminals are connected to the power ground electrical signal of external connection terminal AC, and the three external connection terminals are all connected to the power ground electrical signal, thereby reducing the line resistance of the com electrode connecting line.

[0021] The second beneficial effect of the technical solution in the present application is that the external connection terminals AA and AB of the two pixel units A are connected in series end to end, and the external connection terminal AC is connected in parallel, which further reduces the line resistance of the com electrode connection line.

[0022] The third beneficial effect of the technical solution in the present application is that a plurality of pixel units A form an array of M rows and N columns, and the external connection terminals AA and AB are connected in series end to end to form M rows; N external connection terminals AC are connected across rows to form N columns, which can realize a com electrode connection method with low line resistance when the pixel structure is dense.

[0023] One of the beneficial effects of the technical solution in the present application is that the pixel unit B can coexist with the pixel unit A and can also achieve a relatively balanced display balance effect. It is not necessary to set three external connection terminals for each pixel to be connected to the power supply ground electrical signal, which can reduce the implementation cost and improve the display effect.

[0024] One of the beneficial effects of the technical solution in the present application is that the pixel units A in a row are located at the same column number, and the pixel units A in different rows are electrically connected across rows through the external connection terminal AC, so that the external connection terminals AA and AB of the pixel units A in different rows are connected in series end to end, and the external connection terminal AC is connected in parallel, thereby reducing the line resistance of the com electrode connecting line by electrically connecting across rows.

[0025] The sixth beneficial effect of the technical solution in the present application is that it includes a common ground line, the external connection terminal AA and the external connection terminal AB are directly electrically connected to the com electrode, the external connection terminal AC is electrically connected to the common ground line through a via, and the common ground line and the com electrode are not on the same plane, which is convenient for the external connection terminal AC to be connected to the outside, and the external connection terminal AC can be set on a relatively free layer. Of course, if space permits, the external connection terminal AC can also be on the same layer as the com electrode. Or the external connection terminal AC can also be on the same layer as the common ground line. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 It is a schematic diagram of the structure and principle of the pixel unit A of the electronic paper;

[0027] Figure 2 is a connection diagram of a pixel unit A of an electronic paper;

[0028] Figure 3 is a connection diagram of a pixel unit A and a pixel unit B of an electronic paper;

[0029] Figure 4 is a schematic diagram of the structure of a pixel unit B of an electronic paper;

[0030] Figure 5 It is a connection diagram of a pixel unit B of electronic paper in the prior art. DETAILED DESCRIPTION

[0031] The implementation methods of the present application are further described in detail below in conjunction with the accompanying drawings.

[0032] It should be noted that the following is a description of the preferred embodiments of the present application, which does not constitute any limitation to the present application. The description of the preferred embodiments of the present application is only an explanation of the general principles of the present application. The embodiments described in this application are only a part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0033] In the description of the present application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application. In addition, the terms "first", "second", and technical features numbered with Arabic numerals 1, 2, 3, etc., and numbers such as "A" and "B", are only used for descriptive purposes and are only for the convenience of explanation, and do not represent a sequential relationship in time or space; they cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first", "second", and numbered with Arabic numerals 1, 2, 3, etc. may explicitly or implicitly include one or more of the features. In the description of the present application, “several” means two or more than two, unless otherwise clearly and specifically defined.

[0034] like Figure 1 As shown, in an embodiment of an electronic paper pixel structure, it includes a pixel unit A; the pixel unit A includes a unit A thin film transistor 8, a unit A gate line terminal 1, a unit A source line terminal 5, a unit A drain line terminal 7, a unit A pixel electrode 9, and a unit Acom electrode 4; the unit A gate line terminal 1 is connected to the gate electrical signal of the unit A thin film transistor 8; the unit A source line terminal 5 is connected to the source electrical signal of the unit A thin film transistor 8; the unit A drain line terminal 7 is connected to the drain electrical signal of the unit A thin film transistor 8; the unit A pixel electrode 9 is connected to the drain electrical signal of the unit A thin film transistor 8; the unit A pixel electrode 9 forms a capacitor with the unit Acom electrode 4; the unit Acom electrode 4 includes 3 external connection terminals, the 3 external connection terminals are external connection terminal AA41, external connection terminal AB42, and external connection terminal AC43, and the 3 external connection terminals are connected to the power ground electrical signal. That is, the external connection terminal AA41, the external connection terminal AB42, and the external connection terminal AC43 are connected to the power ground electrical signal.

[0035] like Figure 1 As shown, in an embodiment of an electronic paper pixel structure, three external connection terminals are external connection terminal AA, external connection terminal AB, and external connection terminal AC. The three external connection terminals are connected to the power ground electrical signal, and the three external connection terminals are all connected to the power ground electrical signal, thereby reducing the line resistance of the com electrode connecting line.

[0036] Figure 1The pixel structure that can reduce the resistance of the com line is demonstrated. The process of realizing thin film transistors (TFT) and pixel electrodes (ITO) on glass using 5mask technology on the electronic paper product panel includes 5 layers, namely M1, ASI, M2, PV, and ITO; there can be no OC (organic) layer or an OC layer. The M1 layer is metal1, and the M1 layer is used as GATE; ASI (Amorphous Silicon in English) is used as a semiconductor layer; M2 is metal2, and the M2 layer is used as a source and drain; PV (Passivation in English) is used as an insulating layer; ITO (Indium Tin Oxide in English) is used as a pixel electrode layer.

[0037] Figure 1 In the figure, number 1 is the gate line, number 2 is the gate line of the adjacent pixel, number 3 is the com electrode using the M2 layer routing, that is, the common ground line 3, number 4 is the com electrode using the M1 layer routing, number 5 is the source line, number 6 is the source line of the adjacent pixel, number 7 is the drain, number 8 is the semiconductor ASI pattern, that is, the thin film transistor, number 9 is the pixel electrode ITO pattern, number 10 is the PASS hole pattern, and number 11 is the GI hole pattern. The com electrode can be set in the M2 or M1 layer, and there can be other settings. Figure 1 The left side of the figure is a top view of the electronic paper pixel structure. Figure 1 On the middle right is a schematic diagram of the electrical connection principle of a thin film transistor.

[0038] like Figure 1 As shown, in an embodiment of an electronic paper pixel structure, a common ground line 3 is also included, the external connection line terminal AA41 and the external connection line terminal AB42 of the pixel unit A are directly electrically connected to the com electrode 31, and the external connection line terminal AC43 of the pixel unit A is electrically connected to the common ground line 3 through the via 11, and the common ground line 3 and the com electrode 31 are not on the same plane.

[0039] like Figure 1 As shown, the external connection terminal AA41 of the pixel unit A is directly electrically connected to the com electrode 31, the external connection terminal AB42 of the pixel unit A is directly electrically connected to the com electrode 31, and the external connection terminal AC43 of the pixel unit A is electrically connected to the common ground line 3 through the via hole 11. The common ground line 3 is electrically connected to the com electrode 31. For the convenience of processing, the via hole 11 can have one or more via holes, and the external connection terminal AC43 can be electrically connected to the common ground line 3 through any via hole 11.

[0040] like Figure 1 As shown, in an embodiment of an electronic paper pixel structure, the pixel electrode of unit A is a transparent conductive oxide ITO coating.

[0041] like Figure 1 As shown, in an embodiment of an electronic paper pixel structure, the unit Acom electrode is a transparent conductive oxide ITO coating.

[0042] Including a common ground line, the external connection terminal AA, the external connection terminal AB are directly electrically connected to the com electrode, the external connection terminal AC is electrically connected to the common ground line through a via, the common ground line and the com electrode are not on the same plane, which is convenient for the external connection terminal AC to be connected to the outside, and the external connection terminal AC can be set on a relatively free layer. Of course, if space permits, the external connection terminal AC can also be on the same layer as the com electrode. Or the external connection terminal AC can also be on the same layer as the common ground line.

[0043] like Figure 2 As shown, in an embodiment of an electronic paper pixel structure, it includes: two or more pixel units A; the external connection terminals AA and AB of two adjacent pixel units A are connected in series end to end; the external connection terminals AC of two adjacent pixel units A are connected in parallel. The connection mode of connecting the external connection terminals AA and AB of two pixel units A in series end to end and the external connection terminals AC in parallel further reduces the line resistance of the com electrode connection line.

[0044] like Figure 2 As shown, in an embodiment of an electronic paper pixel structure, one row includes a first pixel unit A2101, a second pixel unit A2102, a third pixel unit A2103, a fourth pixel unit A2104, a fifth pixel unit A2105 and a sixth pixel unit A2106. Multiple pixel units A form an array of M rows and N columns, and the external connection terminals AA and AB are connected in series end to end to form M rows; N external connection terminals AC are connected across rows to form N columns, which can realize a com electrode connection method with low line resistance in the case of dense pixel structure.

[0045] like Figure 2As shown, in an embodiment of an electronic paper pixel structure, the external connection terminal AB of the first pixel unit A2101 is connected in series with the external connection terminal AA of the second pixel unit A2102. The external connection terminal AB of the second pixel unit A2102 is connected in series with the external connection terminal AA of the third pixel unit A2103. The external connection terminal AB of the third pixel unit A2103 is connected in series with the external connection terminal AA of the fourth pixel unit A2104. The external connection terminal AB of the fourth pixel unit A2104 is connected in series with the external connection terminal AA of the fifth pixel unit A2105. The external connection terminal AB of the fifth pixel unit A2105 is connected in series with the external connection terminal AA of the sixth pixel unit A2106. At the same time, the external connection terminals AC of the first pixel unit A2101, the second pixel unit A2102, the third pixel unit A2103, the fourth pixel unit A2104, the fifth pixel unit A2105 and the sixth pixel unit A2106 are connected in parallel.

[0046] like Figure 2 As shown in the figure, in an embodiment of an electronic paper pixel structure, a plurality of pixel units A form an array of M rows and N columns, the external connection terminals AA and AB are connected in series end to end to form M rows; N external connection terminals AC are connected across rows to form N columns. Only 2 rows and 6 columns are shown in the figure, and the rows and columns can be flexibly set according to display needs in actual applications.

[0047] like Figure 3 As shown, in an embodiment of an electronic paper pixel structure, it includes not only a plurality of pixel units A, but also two or more pixel units B. The pixel unit B can coexist with the pixel unit A, and a relatively balanced display balance effect can be achieved. It is not necessary to set three external connection terminals for each pixel to be connected to the power supply ground electrical signal, which can reduce the implementation cost and improve the display effect. Figure 3 One of the rows includes a first pixel unit A3201, a first pixel unit B3202, a second pixel unit A3203, a second pixel unit B3204, a third pixel unit A3205 and a third pixel unit B3206. The pixel units A and the pixel units B are interlaced and arranged at intervals.

[0048] like Figure 4As shown, in an embodiment of an electronic paper pixel structure in the prior art, the pixel unit B includes a unit Bcom electrode; the unit Bcom electrode B4 includes two external connection terminals, the two external connection terminals are external connection terminal BA and external connection terminal BB, and the two external connection terminals are connected to the power ground electrical signal; the external connection terminal BA and the external connection terminal BB are connected in series end to end. The label of the external connection terminal BA is B41, and the label of the external connection terminal BB is B42. The pixel units A in a row are located at the same column number, and the pixel units A in different rows are electrically connected across rows through the external connection terminal AC, so that the external connection terminals AA and AB of the pixel units A in different rows are connected in series end to end, and the external connection terminals AC are connected in parallel. The line resistance of the com electrode connection line is reduced by the cross-row electrical connection. Figure 4 Other numbers in the Figure 1 .

[0049] like Figure 5 As shown, in an embodiment of an electronic paper pixel structure in the prior art, the routing mode of the com line is that the external connection terminal BA and the external connection terminal BB of each pixel unit B are connected in series end to end, so that the com line resistance of the pixel unit B farthest from the signal input terminal will increase, so the voltage on the upper side of the panel far from the excitation source will have a certain degree of voltage drop. If the transmission line resistance is too large, resulting in too large a voltage drop, it will cause abnormal phenomena such as uneven display. The larger the screen, the greater the probability of the above problem, and the more serious the situation.

[0050] In such Figures 1 to 3 In the embodiment of the electronic paper pixel structure shown, the external connection terminal AC43 of the pixel unit A is electrically connected to the common ground line 3 through the via 11, thereby reducing the resistance of the com line, ensuring that the increase in the resistance of the transmission line is controlled within a certain range, and avoiding abnormal phenomena such as uneven display caused by excessive voltage drop due to excessive resistance increase. The larger the screen and the more pixels, the more obvious the technical improvement effect of the above solution.

[0051] like Figure 3 As shown, in an embodiment of an electronic paper pixel structure, a plurality of pixel units form an array of M2 rows and N2 columns, the pixel units A in a row are located at the same column number, and the pixel units A in different rows are electrically connected across rows through external connection terminals AC. The pixel units include a plurality of pixel units A and a plurality of pixel units B. The pixel units A and the pixel units B can be arranged interspersed and spaced.

[0052] In an embodiment of an electronic paper not shown in some drawings, it includes: the electronic paper pixel structure mentioned above.

[0053] In an embodiment of a display device not shown in some drawings, the electronic paper mentioned above is included.

[0054] This application proposes a new pixel structure design, which optimizes the routing of the COM line and reduces the resistance of the COM line, thereby ensuring the stability of the COM voltage on the pixel farthest from the signal input terminal and improving the stability of the display effect.

[0055] This application connects a vertical com line in parallel in the pixel. Compared with the conventional design, the com line resistance from the Vcom input end to the pixel is reduced, and the com signal of the pixel in the display area is more stable. Taking a panel with a pixel size of 135×135um and a resolution of 200×200 as an example, the new design structure can reduce the com line resistance of the farthest pixel of the panel by about 10.3%, and the optimization effect will increase with the increase of pixel size and resolution.

[0056] Among transparent conductive oxide films, ITO has high visible light transmittance (90%), low resistivity (10-4~10-3Ω·cm), good wear resistance, and stable chemical properties. Therefore, ITO has the highest proportion in TCO films.

[0057] like Figures 1 to 5 As shown, the above description is only an embodiment of the present application, and does not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the application specification and drawings, or directly or indirectly used in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. An electronic paper pixel structure, characterized in that: comprising a pixel unit A; The pixel unit A includes a unit A thin film transistor, a unit A gate line terminal, a unit A source line terminal, a unit A drain line terminal, a unit A pixel electrode, and a unit A com electrode; The unit A gate line terminal is electrically connected to the gate of the unit A thin film transistor; The unit A source line terminal is connected to the source electrical signal of the unit A thin film transistor; The unit A drain line terminal is connected to the drain electrical signal of the unit A thin film transistor; The pixel electrode of unit A is electrically connected to the drain electrode of the thin film transistor of unit A; The unit A pixel electrode and the unit Acom electrode form a capacitor; The unit Acom electrode includes three external connection terminals, which are external connection terminal AA, external connection terminal AB, and external connection terminal AC. The three external connection terminals are connected to the power ground electrical signal.

2. The electronic paper pixel structure according to claim 1, characterized in that: include: Two or more pixel units A; Two or more pixel units A's external connection terminals AA and external connection terminals AB are connected end to end in series; The external connection terminals AC of two or more pixel units A are connected in parallel.

3. The electronic paper pixel structure according to claim 2, characterized in that: A plurality of pixel units A form an array of M rows and N columns, the external connection terminals AA and AB are connected in series end to end to form M rows; and N external connection terminals AC are connected across rows to form N columns.

4. The electronic paper pixel structure according to claim 1, characterized in that: Also includes two or more pixel units B, the pixel unit B includes a unit Bcom electrode; The unit Bcom electrode includes two external connection terminals, the two external connection terminals are external connection terminal BA and external connection terminal BB, and the two external connection terminals are connected to the power ground electrical signal; The external connection terminal BA and the external connection terminal BB are connected in series.

5. The electronic paper pixel structure according to claim 4, characterized in that: A plurality of pixel units form an array of M2 rows and N2 columns. The pixel units A in one row are located at the same column number, and the pixel units A in different rows are electrically connected across rows through external connection terminals AC.

6. The electronic paper pixel structure according to claim 1, characterized in that: Including a common ground line, the external connection line terminal AA, the external connection line terminal AB are directly electrically connected to the com electrode, the external connection line terminal AC is electrically connected to the common ground line through a via hole, and the common ground line and the com electrode are not on the same plane.

7. The electronic paper pixel structure according to claim 1, characterized in that: The pixel electrode of unit A is a transparent conductive oxide ITO coating.

8. The electronic paper pixel structure according to claim 1, characterized in that: The unit Acom electrode is a transparent conductive oxide ITO coating.

9. An electronic paper, characterized in that: include: The electronic paper pixel structure according to any one of claims 1 to 8.

10. A display device, characterized in that: Comprising the electronic paper as claimed in claim 9.

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