Three-phase high-frequency UPS bus voltage-sharing balance control device

By designing a three-phase high-frequency UPS bus voltage equalization and balance control device, the voltage equalization control circuit and power adjustment circuit are used to solve the problems of voltage deviation and inflexible power distribution in UPS power supply, voltage stability and power balance are achieved, and the overall efficiency of UPS power supply is improved.

CN222785770UActive Publication Date: 2025-04-22SHENZHEN YOULI CHUANGKE NEW ENERGY CO LTD
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Patent Information

Application Number
CN202420868043.0
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-04-25
Publication Date
2025-04-22
Estimated Expiration
2034-04-25

AI Technical Summary

Technical Problem

Currently, UPS power supplies are difficult to achieve accurate voltage control, resulting in large voltage deviations between buses and the inability to flexibly adjust the power output of each phase according to the real-time load, resulting in wasted efficiency.

Method used

A three-phase high-frequency UPS bus voltage equalization and balance control device is designed, including a voltage equalization control circuit and a power regulation circuit. By monitoring and calculating voltage deviations in real time, a control signal is generated to adjust voltage balance, and the power output of each phase is dynamically adjusted according to the real-time load and bus voltage state.

Benefits of technology

Accurate control of the bus voltage is achieved, voltage stability is ensured, and power is flexibly distributed according to the load conditions, balanced three-phase loads, and improved the overall efficiency of the UPS power supply.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model relates to the technical field of UPS (Uninterrupted Power Supply), and discloses a three-phase high-frequency UPS bus voltage-sharing balance control device. Comprising a power supply circuit for providing stable working voltage, a voltage detection circuit for monitoring three-phase bus voltage in real time, a voltage-sharing control circuit for calculating voltage deviation and generating a control signal, a power regulation circuit for regulating output power of each phase in the three-phase high-frequency UPS, and a communication circuit for data exchange, according to the utility model, through the design of the voltage-sharing control circuit, the voltage balance of the three-phase bus can be calculated and adjusted in real time, the voltage deviation can be accurately controlled, and the stability of the bus voltage can be ensured; according to the real-time load condition and the bus voltage state, the power output of each phase can be dynamically adjusted, the flexible distribution of power is realized, the three-phase load is balanced, and the overall efficiency of the UPS power supply is improved.
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Description

Technical Field

[0001] The utility model relates to the technical field of UPS power supply, in particular to a three-phase high-frequency UPS busbar voltage balancing control device. Background Art

[0002] UPS (uninterruptible power supply) is a system device that connects a battery (mostly lead-acid maintenance-free battery) to a host computer and converts direct current into mains power through module circuits such as the host inverter. UPS can ensure that the computer system continues to work for a period of time after a power outage so that users can save data urgently to avoid data loss. According to its working mode, it can be divided into offline, online, and online interactive types. It is mainly used to provide a stable and uninterrupted power supply to a single computer, a computer network system, or a solenoid valve, a pressure transmitter, etc.

[0003] The current UPS power supply is not convenient for achieving precise voltage control, resulting in large voltage deviation between busbars, and cannot flexibly adjust the power output of each phase according to the real-time load, resulting in power waste. Therefore, we need to propose a three-phase high-frequency UPS busbar voltage balancing control device. Utility Model Content

[0004] The purpose of the utility model is to provide a three-phase high-frequency UPS bus voltage balancing control device. Through the design of the voltage balancing control circuit, the voltage balance of the three-phase bus can be calculated and adjusted in real time, the voltage deviation can be accurately controlled, and the stability of the bus voltage can be ensured. Through the design of the power regulation circuit, the power output of each phase can be dynamically adjusted according to the real-time load condition and the bus voltage state, so as to realize flexible power distribution, balance the three-phase load, and improve the overall efficiency of the UPS power supply, so as to solve the problems raised in the above-mentioned background technology.

[0005] To achieve the above-mentioned purpose, the utility model provides the following technical solutions: a three-phase high-frequency UPS bus voltage balancing control device, including a power supply circuit that provides a stable working voltage, a voltage detection circuit that monitors the three-phase bus voltage in real time, a voltage balancing control circuit that calculates the voltage deviation and generates a control signal, a power regulation circuit that adjusts the output power of each phase in the three-phase high-frequency UPS, a communication circuit that exchanges data, and an overvoltage protection circuit that automatically trips when a voltage exceeds a threshold value. The voltage detection circuit, voltage balancing control circuit, power regulation circuit, communication circuit, and overvoltage protection circuit are all electrically connected to the power supply circuit, and the voltage detection circuit, voltage balancing control circuit, and power regulation circuit are electrically connected in sequence.

[0006] Preferably, the voltage detection circuit includes an operational amplifier U9A, pin 1 and pin 2 of the operational amplifier U9A are connected, and pin 3 of the operational amplifier U9A is respectively connected to resistor R7 and resistor R9, and capacitors C26 and C28 are arranged in parallel at both ends of the resistors R7 and R9, and one of the terminals of the capacitors C26 and C28 is connected to the negative pole of the UPS.

[0007] Preferably, the voltage equalizing control circuit includes an adjustable parallel regulator U9, a transistor Q6 and a transistor Q8, the collector of the transistor Q6 is connected to a resistor R60 and a resistor R61 arranged in parallel, a capacitor C41 is connected between the connection terminals of the resistor R60 and the resistor R61 and the emitter of the transistor Q6, a resistor R70 is connected to the base of the transistor Q6, and one end of the resistor R70 is respectively connected to a resistor R66 and a resistor R75.

[0008] Preferably, a resistor R68 and a resistor R74 are respectively connected to the base of the transistor Q8, one end of the resistor R68 is connected to pin 1 of the adjustable parallel regulator U9, one end of the resistor R74 is connected to pin 3 of the adjustable parallel regulator U9, a capacitor C35 is connected between pin 1 and pin 2 of the adjustable parallel regulator U9, a resistor R72 is connected between pin 2 and pin 3 of the adjustable parallel regulator U9, a resistor R59 is connected between pin 2 of the adjustable parallel regulator U9 and the emitter of the transistor Q8, a resistor R58 is connected between pin 1 of the adjustable parallel regulator U9 and the emitter of the transistor Q8, one end of the resistor R66 is connected to pin 2 of the adjustable parallel regulator U9, and one end of the resistor R75 is connected to pin 3 of the adjustable parallel regulator U9.

[0009] Preferably, the power regulation circuit includes a chip N12 and a transformer T1, a varistor VAR2 is connected to pin 1 of the chip N12, a resistor R36 is connected between pins 6 and 12 of the chip N12, a capacitor C30 is connected between pins 5 and 12 of the chip N12, a capacitor C37 is connected between pins 8 and 12 of the chip N12, a resistor R65 is connected between pins 5 and 7 of the chip N12, one end of the transformer T1 is respectively connected to a MOS tube Q10 and a MOS tube Q20, and the MOS tube The gate of Q10 is respectively connected to a resistor R77 and a grounded resistor R29, the gate of the MOS tube Q20 is respectively connected to a resistor R71 and a grounded resistor R32, the resistor R77 is connected to pin 11 of the chip N12, the resistor R71 is connected to pin 12 of the chip N12, the other end of the transformer T1 is connected to a diode VD5, the diode VD5 is connected to a capacitor C31, an inductor L2 and a capacitor C34 arranged in parallel, and the connection terminals of the inductor L2 and the capacitor C34 are connected to the varistor VAR2.

[0010] Preferably, the communication circuit includes a chip N6, an optocoupler E5 and an optocoupler E6, pin 2 of the optocoupler E6 is connected to pin 1 of the chip N6, pin 3 of the optocoupler E5 is connected to the wiring terminals of pins 2 and 3 of the chip N6, a resistor R69 is connected between pins 5 and 7 of the chip N6, a resistor R78 is connected between pins 6 and 8 of the chip N6, and a capacitor C32 is connected to pin 8 of the chip N6, a transient suppression diode TVS2 is connected between pins 6 and 7 of the chip N6, and one end of the transient suppression diode TVS2 is connected to a resistor RT2;

[0011] Pin 3 of the optocoupler E5 is connected to a resistor R62, pin 1 of the optocoupler E5 is connected to a resistor R67 connected to a power supply, pin 1 of the optocoupler E6 is respectively connected to resistors R670 and R720, and pin 1 of the optocoupler E6 is connected to a resistor R710.

[0012] Preferably, the overvoltage protection circuit includes a chip U1, a chip U4, a terminal P2 and a common-mode inductor L3, pin 7 of the chip U1 is connected to pin 1 of the chip U4, pin 6 of the chip U1 is connected to pin 4 of the chip U4, the wiring terminals of pins 2 and 3 of the chip U4 are connected to a grounded resistor R4, pin 8 of the chip U4 is connected to a capacitor C24, a resistor R6 is connected between pins 6 and 7 of the chip U4, and both ends of the resistor R6 are respectively connected to pins 1 and 4 of the common-mode inductor L3, a diode D6, a series-connected fuse F4 and a fuse F5 are connected between pins 2 and 3 of the common-mode inductor L3, the fuse F4 is connected to pin 1 of the terminal P2, and the fuse F5 is connected to pin 2 of the terminal P2.

[0013] Compared with the prior art, the beneficial effects of the utility model are:

[0014] The utility model can calculate and adjust the voltage balance of the three-phase bus in real time through the design of the voltage equalization control circuit, can accurately control the voltage deviation, and ensure the stability of the bus voltage. Through the design of the power regulation circuit, the power output of each phase can be dynamically adjusted according to the real-time load condition and the bus voltage state, thereby realizing flexible power distribution, balancing the three-phase load, and improving the overall efficiency of the UPS power supply. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 This is a schematic diagram of the circuit diagram of the utility model;

[0016] Figure 2 It is a circuit diagram of the voltage detection circuit of the utility model;

[0017] Figure 3 The circuit diagram of the voltage-equalizing control circuit of the utility model;

[0018] Figure 4 It is a circuit diagram of the power regulation circuit of the utility model;

[0019] Figure 5 A circuit diagram of the communication circuit of the utility model;

[0020] Figure 6 The utility model is a circuit diagram of an overvoltage protection circuit. DETAILED DESCRIPTION

[0021] The following will be combined with the drawings in the embodiments of the utility model to clearly and completely describe the technical solutions in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0022] See also Figure 1-6 The utility model provides a technical solution: a three-phase high-frequency UPS bus voltage balancing control device, including a power supply circuit for providing a stable working voltage, a voltage detection circuit for real-time monitoring of the three-phase bus voltage, a voltage balancing control circuit for calculating the voltage deviation and generating a control signal, a power regulation circuit for regulating the output power of each phase in the three-phase high-frequency UPS, a communication circuit for data exchange, and an overvoltage protection circuit for automatically tripping when a voltage exceeding a threshold is detected, wherein the voltage detection circuit, the voltage balancing control circuit, the power regulation circuit, the communication circuit, and the overvoltage protection circuit are all electrically connected to the power supply circuit, and the voltage detection circuit, the voltage balancing control circuit, and the power regulation circuit are electrically connected in sequence.

[0023] The voltage detection circuit includes an operational amplifier U9A, wherein pin 1 and pin 2 of the operational amplifier U9A are connected, and pin 3 of the operational amplifier U9A is respectively connected to resistors R7 and R9, and capacitors C26 and C28 are arranged in parallel at both ends of the resistors R7 and R9, and one of the terminals of the capacitors C26 and C28 is connected to the negative pole of the UPS.

[0024] The voltage equalizing control circuit includes an adjustable parallel regulator U9, a transistor Q6 and a transistor Q8. The collector of the transistor Q6 is connected to a resistor R60 and a resistor R61 arranged in parallel. A capacitor C41 is connected between the connection terminals of the resistor R60 and the resistor R61 and the emitter of the transistor Q6. The base of the transistor Q6 is connected to a resistor R70, and one end of the resistor R70 is respectively connected to a resistor R66 and a resistor R75.

[0025] Resistors R68 and R74 are connected to the base of the transistor Q8 respectively, one end of the resistor R68 is connected to pin 1 of the adjustable parallel regulator U9, one end of the resistor R74 is connected to pin 3 of the adjustable parallel regulator U9, a capacitor C35 is connected between pin 1 and pin 2 of the adjustable parallel regulator U9, a resistor R72 is connected between pin 2 and pin 3 of the adjustable parallel regulator U9, a resistor R59 is connected between pin 2 of the adjustable parallel regulator U9 and the emitter of the transistor Q8, a resistor R58 is connected between pin 1 of the adjustable parallel regulator U9 and the emitter of the transistor Q8, one end of the resistor R66 is connected to pin 2 of the adjustable parallel regulator U9, and one end of the resistor R75 is connected to pin 3 of the adjustable parallel regulator U9.

[0026] The power regulation circuit includes a chip N12 and a transformer T1. A varistor VAR2 is connected to pin 1 of the chip N12. A resistor R36 is connected between pins 6 and 12 of the chip N12. A capacitor C30 is connected between pins 5 and 12 of the chip N12. A capacitor C37 is connected between pins 8 and 12 of the chip N12. A resistor R65 is connected between pins 5 and 7 of the chip N12. One end of the transformer T1 is respectively connected to a MOS tube Q10 and a MOS tube Q20. The MOS tube Q1 The gates of the MOS tube Q0 are respectively connected to resistors R77 and grounded resistors R29, the gates of the MOS tube Q20 are respectively connected to resistors R71 and grounded resistors R32, the resistor R77 is connected to pin 11 of the chip N12, the resistor R71 is connected to pin 12 of the chip N12, the other end of the transformer T1 is connected to a diode VD5, the diode VD5 is connected to a capacitor C31, an inductor L2 and a capacitor C34 which are arranged in parallel, and the connection terminals of the inductor L2 and the capacitor C34 are connected to the varistor VAR2.

[0027] The power regulation circuit also includes a chip U5, the connection terminals of pins 2 and 16 of chip N12 are connected to pin 2 of chip U5, the connection terminals of pins 13 and 15 of chip N12 are connected to pin 1 of chip U5, and pin 9 of chip N12 is connected to a resistor R620 and a capacitor C23 arranged in parallel.

[0028] The communication circuit includes a chip N6, an optocoupler E5 and an optocoupler E6, wherein the pin 2 of the optocoupler E6 is connected to the pin 1 of the chip N6, the pin 3 of the optocoupler E5 is connected to the connection terminals of the pins 2 and 3 of the chip N6, a resistor R69 is connected between the pins 5 and 7 of the chip N6, a resistor R78 is connected between the pins 6 and 8 of the chip N6, and a capacitor C32 is connected to the pin 8 of the chip N6, a transient suppression diode TVS2 is connected between the pins 6 and 7 of the chip N6, and one end of the transient suppression diode TVS2 is connected to a resistor RT2;

[0029] Pin 3 of the optocoupler E5 is connected to a resistor R62, pin 1 of the optocoupler E5 is connected to a resistor R67 connected to a power supply, pin 1 of the optocoupler E6 is respectively connected to resistors R670 and R720, and pin 1 of the optocoupler E6 is connected to a resistor R710.

[0030] The overvoltage protection circuit includes a chip U1, a chip U4, a terminal P2 and a common-mode inductor L3. Pin 7 of the chip U1 is connected to pin 1 of the chip U4, pin 6 of the chip U1 is connected to pin 4 of the chip U4, a grounded resistor R4 is connected to the wiring terminals of pins 2 and 3 of the chip U4, a capacitor C24 is connected to pin 8 of the chip U4, a resistor R6 is connected between pins 6 and 7 of the chip U4, two ends of the resistor R6 are connected to resistors R5 and R700 respectively, and two ends of the resistor R6 are respectively connected to pins 1 and 4 of the common-mode inductor L3, a diode D6, a series-connected fuse F4 and a fuse F5 are connected between pins 2 and 3 of the common-mode inductor L3, the fuse F4 is connected to pin 1 of the terminal P2, and the fuse F5 is connected to pin 2 of the terminal P2.

[0031] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A three-phase high-frequency UPS busbar voltage balancing control device, characterized in that: The invention comprises a power supply circuit for providing a stable working voltage, a voltage detection circuit for real-time monitoring of the three-phase bus voltage, a voltage-equalizing control circuit for calculating the voltage deviation and generating a control signal, a power regulating circuit for regulating the output power of each phase in a three-phase high-frequency UPS, a communication circuit for data exchange, and an overvoltage protection circuit for automatically tripping when detecting that the voltage exceeds a threshold value. The voltage detection circuit, the voltage-equalizing control circuit, the power regulating circuit, the communication circuit, and the overvoltage protection circuit are all electrically connected to the power supply circuit, and the voltage detection circuit, the voltage-equalizing control circuit, and the power regulating circuit are electrically connected in sequence.

2. A three-phase high-frequency UPS busbar voltage balancing control device according to claim 1, characterized in that: The voltage detection circuit includes an operational amplifier U9A, wherein pin 1 and pin 2 of the operational amplifier U9A are connected, and pin 3 of the operational amplifier U9A is respectively connected to resistors R7 and R9, and capacitors C26 and C28 are arranged in parallel at both ends of the resistors R7 and R9, and one of the terminals of the capacitors C26 and C28 is connected to the negative pole of the UPS.

3. A three-phase high-frequency UPS busbar voltage balancing control device according to claim 1, characterized in that: The voltage equalizing control circuit includes an adjustable parallel regulator U9, a transistor Q6 and a transistor Q8. The collector of the transistor Q6 is connected to a resistor R60 and a resistor R61 arranged in parallel. A capacitor C41 is connected between the connection terminals of the resistor R60 and the resistor R61 and the emitter of the transistor Q6. The base of the transistor Q6 is connected to a resistor R70, and one end of the resistor R70 is respectively connected to a resistor R66 and a resistor R75.

4. A three-phase high-frequency UPS busbar voltage balancing control device according to claim 3, characterized in that: Resistors R68 and R74 are connected to the base of the transistor Q8 respectively, one end of the resistor R68 is connected to pin 1 of the adjustable parallel regulator U9, one end of the resistor R74 is connected to pin 3 of the adjustable parallel regulator U9, a capacitor C35 is connected between pin 1 and pin 2 of the adjustable parallel regulator U9, a resistor R72 is connected between pin 2 and pin 3 of the adjustable parallel regulator U9, a resistor R59 is connected between pin 2 of the adjustable parallel regulator U9 and the emitter of the transistor Q8, a resistor R58 is connected between pin 1 of the adjustable parallel regulator U9 and the emitter of the transistor Q8, one end of the resistor R66 is connected to pin 2 of the adjustable parallel regulator U9, and one end of the resistor R75 is connected to pin 3 of the adjustable parallel regulator U9.

5. A three-phase high-frequency UPS busbar voltage balancing control device according to claim 1, characterized in that: The power regulation circuit includes a chip N12 and a transformer T1, one end of the transformer T1 is respectively connected to a MOS tube Q10 and a MOS tube Q20, the gate of the MOS tube Q10 is respectively connected to a resistor R77 and a grounded resistor R29, the gate of the MOS tube Q20 is respectively connected to a resistor R71 and a grounded resistor R32, the resistor R77 is connected to pin 11 of the chip N12, and the resistor R71 is connected to pin 12 of the chip N12.

6. A three-phase high-frequency UPS busbar voltage balancing control device according to claim 1, characterized in that: The communication circuit includes chip N6, optocoupler E5 and optocoupler E6, pin 2 of the optocoupler E6 is connected to pin 1 of chip N6, pin 3 of the optocoupler E5 is connected to the wiring terminals of pins 2 and 3 of chip N6, a resistor R69 is connected between pins 5 and 7 of the chip N6, a resistor R78 is connected between pins 6 and 8 of the chip N6, and a transient suppression diode TVS2 is connected between pins 6 and 7 of the chip N6.

7. A three-phase high-frequency UPS busbar voltage balancing control device according to claim 1, characterized in that: The overvoltage protection circuit includes a chip U1, a chip U4, a terminal P2 and a common-mode inductor L3. Pin 7 of the chip U1 is connected to pin 1 of the chip U4, and pin 6 of the chip U1 is connected to pin 4 of the chip U4. A resistor R6 is connected between pins 6 and 7 of the chip U4, and both ends of the resistor R6 are respectively connected to pins 1 and 4 of the common-mode inductor L3. A diode D6, a series-connected fuse F4 and a fuse F5 are connected between pins 2 and 3 of the common-mode inductor L3. The fuse F4 is connected to pin 1 of the terminal P2, and the fuse F5 is connected to pin 2 of the terminal P2.