Circuit board and electronic equipment

Abstract

The utility model discloses a circuit board and electronic equipment, the circuit board comprises N metal layers which are stacked in sequence, and an insulating layer is arranged between the adjacent metal layers; in the stacking direction of the metal layers, the N metal layers are the first metal layer to the Nth metal layer in sequence, and N is a positive integer larger than 2; the first signal line is formed on the basis of the a-th metal layer, the second signal line is formed on the basis of the b-th metal layer, a and b are positive integers not larger than N, and b-a is larger than 1; the hole structure penetrates through the a metal layer to the b metal layer; the conductive part is positioned in the hole structure and is connected with the first signal line and the second signal line; wherein at least one other metal layer between the a-th metal layer and the b-th metal layer has an overlapping part with the conductive piece in the stacking direction.

Description

Technical Field

[0001] The present application relates to the technical field of printed circuit boards, and in particular to a circuit board and an electronic device comprising the circuit board. Background Art

[0002] Circuit boards are an indispensable basic component in the field of electronic technology. They not only provide physical support for electronic components, but also realize the electrical connection between electronic components. In order to realize the electrical connection between different metal layers in the circuit board, conductive holes need to be set in the circuit board.

[0003] At present, vertical conductive vias are mainly used in circuit boards to connect signal lines on different layers. At the location of the conductive vias, the metal layer of the circuit board that serves as the reference surface needs to be hollowed out to form an anti-pad to avoid short circuits between the conductive vias and the reference surface. However, this will bring new problems. The lack of a reference surface will affect the continuity of the signal impedance, causing signal attenuation and generating more electromagnetic interference. Utility Model Content

[0004] In view of this, the present application provides a circuit board and an electronic device, and the scheme is as follows:

[0005] A first aspect of the present application provides a circuit board, comprising:

[0006] N metal layers are stacked in sequence, with an insulating layer between adjacent metal layers; in the stacking direction of the metal layers, the N metal layers are sequentially from the first metal layer to the Nth metal layer, and N is a positive integer greater than 2;

[0007] A first signal line formed based on the a-th metal layer and a second signal line formed based on the b-th metal layer, where a and b are both positive integers not greater than N, and ba>1;

[0008] A hole structure, the hole structure runs through the a-th metal layer to the b-th metal layer;

[0009] A conductive member is located in the hole structure, and the conductive member connects the first signal line and the second signal line; wherein at least one other metal layer located between the a-th metal layer and the b-th metal layer has an overlapping portion with the conductive member in the stacking direction.

[0010] Optionally, in the above circuit board, other metal layers between the a-th metal layer and the b-th metal layer all have overlapping portions with the conductive element in a stacking direction.

[0011] Optionally, in the above circuit board, a=1, b=N;

[0012] Or, 1<a, b<N;

[0013] Or, 1=a, b<N;

[0014] Or, 1<a, b=N.

[0015] Optionally, in the above circuit board, the conductive member is a cylindrical metal layer covering the side wall of the hole structure;

[0016] On the cross section parallel to the stacking direction,

[0017] From the a-th metal layer to the b-th metal layer, the pore size of the pore structure gradually decreases;

[0018] Or, from the a-th metal layer to the b-th metal layer, the pore size of the pore structure gradually increases;

[0019] Or, from the a-th metal layer to the c-th metal layer, the pore size of the pore structure gradually decreases, and from the c-th metal layer to the b-th metal layer, the pore size of the pore structure gradually increases, and c is a positive integer greater than a and less than b;

[0020] Alternatively, the pore structure is an inclined pore with a constant pore diameter.

[0021] Optionally, in the above circuit board, the hole structure includes an inclined surface extending from the plane where the a-th metal layer is located to the plane where the b-th metal layer is located; the conductive member is a wire covering the inclined surface;

[0022] On different cross sections perpendicular to the stacking direction, the intersection lines between the inclined plane and each cross section are all line segments.

[0023] Optionally, in the above circuit board, the inclined surface is a spiral surface extending from the plane where the a-th metal layer is located to the plane where the b-th metal layer is located, and the wire is exposed on the side wall of the slope forming the spiral surface.

[0024] Optionally, in the above circuit board, the spiral surface is smoothly connected to the plane where the a-th metal layer is located and the plane where the b-th metal layer is located respectively;

[0025] The wire is in direct contact with the first signal line and the second signal line respectively;

[0026] Alternatively, the width of the conductive line, the first signal line, and the second signal line satisfy the same condition.

[0027] Optionally, in the above circuit board, the inclined surface is a spiral surface that spirally extends from the plane where the a-th metal layer is located to the plane where the b-th metal layer is located; one side of the spiral surface faces the plane where the a-th metal layer is located, and the other side faces the plane where the b-th metal layer is located;

[0028] Alternatively, the inclined surface is a planar inclined surface extending from the plane where the a-th metal layer is located to the plane where the b-th metal layer is located.

[0029] Optionally, in the above circuit board, in the stacking direction, along the extension path of the spiral surface, different areas of the spiral surface have no overlapping parts.

[0030] A second aspect of the present application provides an electronic device, including:

[0031] A circuit board, comprising: N metal layers stacked in sequence, with an insulating layer between adjacent metal layers; in the stacking direction of the metal layers, the N metal layers are sequentially from the first metal layer to the Nth metal layer, N being a positive integer greater than 2; a first signal line formed based on the ath metal layer and a second signal line formed based on the bth metal layer, a and b being positive integers not greater than N, and ba>1; a hole structure, the hole structure passing through the ath metal layer to the bth metal layer; a conductive member located in the hole structure, the conductive member connecting the first signal line and the second signal line; wherein at least one other metal layer located between the ath metal layer and the bth metal layer has an overlapping portion with the conductive member in the stacking direction;

[0032] The electronic component is arranged on the circuit board, and the electronic component is arranged on the side of the circuit board close to the a-th metal layer and connected to the first signal line; or is arranged on the side of the circuit board close to the b-th metal layer and connected to the second signal line. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the related technologies, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying any creative work.

[0034] The structures, proportions, sizes, etc. illustrated in the drawings of this specification are only used to match the contents disclosed in the specification so as to facilitate understanding and reading by persons familiar with this technology. They are not used to limit the conditions under which this application can be implemented, and therefore have no substantive technical significance. Any structural modification, change in proportion or adjustment of size, without affecting the effects and purposes that can be achieved by this application, should still fall within the scope of the technical contents disclosed in this application.

[0035] Figure 1 is a cross-sectional view of a conventional circuit board in a direction parallel to the stacking direction of the metal layers;

[0036] Figure 2 It is a schematic diagram of the design principle of the reference plane in the circuit board;

[0037] Figure 3 A top view of a circuit board provided in an embodiment of the present application;

[0038] Figure 4 for Figure 3 A cross-sectional view of the circuit board shown in the AA direction;

[0039] Figure 5A cross-sectional view of a circuit board provided in an embodiment of the present application in a direction parallel to the stacking direction of the metal layer;

[0040] Figure 6 A cross-sectional view of another circuit board provided in an embodiment of the present application in a direction parallel to the stacking direction of the metal layers;

[0041] Figure 7 A cross-sectional view of another circuit board provided in an embodiment of the present application in a direction parallel to the stacking direction of the metal layers;

[0042] Figure 8 A cross-sectional view of another circuit board provided in an embodiment of the present application in a direction parallel to the stacking direction of the metal layers;

[0043] Fig. 9 A cross-sectional view of another circuit board provided in an embodiment of the present application in a direction parallel to the stacking direction of the metal layers;

[0044] Fig.10 A cross-sectional view of another circuit board provided in an embodiment of the present application in a direction parallel to the stacking direction of the metal layers;

[0045] Fig.11 A three-dimensional view of a circuit board facing a first signal line provided in an embodiment of the present application;

[0046] Fig.12 A schematic diagram of the structure of a conductive member in a circuit board provided in an embodiment of the present application;

[0047] Fig.13 A three-dimensional view of a circuit board having a spiral hole structure with a spiral surface provided in an embodiment of the present application;

[0048] Fig.14 for Fig.13 A top view of a conductive member covering a spiral surface in the circuit board shown;

[0049] Fig.15 A process flow chart of a circuit board manufacturing method provided in an embodiment of the present application;

[0050] Fig.16 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application.

[0051] Reference numerals:

[0052] 11-metal layer; 111-signal line; 12-insulating layer; 13-conductive hole; 131-conductive through hole; 132-conductive blind hole; 133-conductive buried hole; 14-reference surface; 15-hollow area; 16-hole structure; 17-conductive part; 18-sloped side wall; 19-circuit board; 20-electronic component; 21-first signal line; 22-second signal line. DETAILED DESCRIPTION

[0053] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the embodiments in the present application. Obviously, the described embodiments are only embodiments of one area of ​​the present application, not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0054] refer to Figure 1 , Figure 1 This is a cross-sectional view of a conventional circuit board in the direction parallel to the stacking direction of the metal layer. Figure 1 The corresponding cross section is parallel to the thickness direction of the circuit board. The circuit board includes multiple metal layers 11 stacked in sequence, and an insulating layer 12 is provided between adjacent metal layers 11. Signal lines 111 in different metal layers 11 are connected through conductive vias 13. Based on the interlayer positions of the two ends of the conductive vias 13 in the circuit board, the conductive vias 13 can be divided into the following three types.

[0055] The first type is a conductive through hole 131, which runs through the circuit board and is used to connect the signal line 111 on the upper surface of the circuit board and the signal line 111 on the lower surface. The second type is a conductive blind via 132, one end of which is located inside the circuit board and connected to the signal line 111 inside the circuit board, and the other end is located on the upper surface or the lower surface of the circuit board and connected to the signal line 111 on the upper surface or the lower surface. The third type is a conductive buried via 133, both ends of which are located inside the circuit board, and the two ends of which are respectively connected to the signal lines 111 in two different metal layers 11 inside the circuit board.

[0056] Based on the above description, it can be known that no matter which type of conductive via 13 is used, it is used to connect the signal lines 111 in two different metal layers 11 in the circuit board.

[0057] refer to Figure 2 , Figure 2 The schematic diagram of the design principle of the reference plane in the circuit board shows that at least one metal layer 11 can be provided between the two signal lines 111 connected to the two ends of the conductive hole 13 as the reference plane 14. The reference plane can improve the integrity of the transmission signal, reduce electromagnetic interference, improve the power supply stability, and can also be used to optimize the performance of differential signals.

[0058] exist Figure 2 In the illustrated embodiment, four metal layers 11 are shown. The top and bottom two metal layers are used to prepare signal lines 111, respectively, and the middle two metal layers 11 are used as reference surfaces 14. The conductive hole 13 can pass through one or more metal layers 11 used as reference surfaces 14. In the embodiment of the present application, the number of metal layers 11 used as reference surfaces 14 between the two ends of the conductive hole 13 is not limited.

[0059] At present, the conductive vias 13 in the circuit board are all vertical holes. When the conductive via passes through the metal layer 11 as the reference plane 14, in order to avoid the conductive via 13 and the reference plane 14 from short-circuiting, it is necessary to set a hollow area 15 as an anti-pad in the area of ​​the reference plane 14 corresponding to the conductive via 13. The conductive via 13 passes through the hollow area 15 and does not contact the metal layer 11 around the hollow area 15, so as to achieve electrical isolation between the conductive via 13 and the reference plane 14.

[0060] For a circuit board using a vertical hole as the conductive hole 13, there is a problem of missing reference plane 14 in the conductive hole 13 and its vicinity. This is because the signal line 111 needs to pass through the electrical isolation distance between the conductive hole 13 and the reference plane 14, and a section of the signal line 111 and the conductive hole 13 passing through the electrical isolation distance lack a vertically opposite reference plane 14, which will affect the integrity of the transmitted signal, signal impedance continuity, anti-electromagnetic interference performance and power supply stability, and will also cause signal attenuation problems.

[0061] In order to solve the above-mentioned problems caused by the lack of the reference plane 14 in the conductive hole 13 and its vicinity in the circuit board, an embodiment of the present application provides a circuit board, including:

[0062] N metal layers are stacked in sequence, with an insulating layer between adjacent metal layers; in the stacking direction of the metal layers, the N metal layers are sequentially from the first metal layer to the Nth metal layer, and N is a positive integer greater than 2;

[0063] A first signal line formed based on the a-th metal layer and a second signal line formed based on the b-th metal layer, where a and b are both positive integers not greater than N, and ba>1;

[0064] A hole structure, the hole structure runs through the a-th metal layer to the b-th metal layer;

[0065] A conductive member is located in the hole structure, and the conductive member connects the first signal line and the second signal line; wherein at least one other metal layer located between the a-th metal layer and the b-th metal layer has an overlapping portion with the conductive member in the stacking direction.

[0066] Among them, the hole structure and the conductive member inside it form a conductive hole connecting the first signal line and the second signal line. For the conductive member located in the hole structure, since it has an overlapping part with at least one other metal layer between the a-th metal layer and the b-th metal layer in the stacking direction, when the other metal layer between the a-th metal layer and the b-th metal layer is used as the reference plane, the metal layer used as the reference plane can extend to the bottom of the conductive member based on the overlapping part with the conductive member, and the reference plane formed by the conductive member can be compensated by the area corresponding to the overlapping part of the other metal layer. Compared with the conventional circuit board using a vertical hole structure, the circuit board provided by the technical solution of the present application solves the problem of missing reference plane caused by the conductive member covering the side wall of the vertical hole in the conventional circuit board not having an overlapping part with the reference plane in the vertical direction, and can improve the integrity of the transmitted signal, signal impedance continuity, anti-electromagnetic interference performance and power supply stability, and can also prevent the signal attenuation problem caused by the missing reference plane.

[0067] The above is the main inventive concept of the technical solution of the embodiment of the present application. In order to make the above-mentioned objects, features and advantages of the present application more obvious and easy to understand, the present application is further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0068] refer to Figure 3 and Figure 4 , Figure 3 A top view of a circuit board provided in an embodiment of the present application, Figure 4 for Figure 3 The cross-sectional view of the circuit board shown in the AA direction, Figure 4 The corresponding cross section is parallel to the thickness direction of the circuit board. The circuit board shown includes:

[0069] N metal layers 11 are stacked in sequence, and an insulating layer 12 is provided between adjacent metal layers 11; in the stacking direction of the metal layers 11 ( Figure 4 In the vertical direction), the N metal layers 11 are sequentially the first metal layer L1 to the Nth metal layer L N , N is a positive integer greater than 2;

[0070] Based on the a-th metal layer L a The first signal line 21 formed based on the b-th metal layer L b The second signal line 22 is formed, a and b are both positive integers not greater than N, and ba>1;

[0071] The hole structure 16 penetrates the a-th metal layer L a To the bth metal layer L b ;

[0072] The conductive member 17 is located in the hole structure 16, and the conductive member 17 connects the first signal line 21 and the second signal line 22; wherein, the conductive member 17 is located in the a-th metal layer L aWith the bth metal layer L b At least one other metal layer 11 and the conductive member 17 have an overlapping portion in the stacking direction.

[0073] exist Figure 4 In the method shown, a=1, b=N is used as an example for illustration. Figure 4 As shown by the two vertical dotted lines, in the area between the two dotted lines, the second metal layer L2 and the N-1 metal layer L N-1 The conductive member 17 has an overlapping portion in the stacking direction.

[0074] Since ba>1, the ath metal layer L a With the bth metal layer L b There is at least one other metal layer 11 therebetween which can be used as a reference plane. In the embodiment of the present application, the reference plane can be a ground reference plane or a power reference plane.

[0075] Based on the above description, it can be seen that the a+1th metal layer L a+1 To the b-1th metal layer L b-1 At least one metal layer 11 can be used as a reference plane. In the stacking direction of the metal layer 11, the overlapping part of the reference plane and the conductive member 17 can form a reference plane compensation for the conductive member 17, thereby improving the integrity of the transmission signal, signal impedance continuity, anti-electromagnetic interference performance and power supply stability, and preventing signal attenuation problems caused by the lack of a reference plane.

[0076] exist Figure 4 In the illustrated method, N=6 is used as an example for illustration. In the embodiment of the present application, the value of N can be set based on demand, and N can be set to any positive integer greater than 2, and is not limited to the implementation method where N is equal to 6.

[0077] In order to achieve a better reference surface compensation effect, in the embodiment of the present application, a metal layer L a With the bth metal layer L b The other metal layers 11 therebetween all have overlapping portions with the conductive member 17 in the stacking direction.

[0078] exist Figure 4 In the illustrated method, a=1, b=N is used as an example for illustration. At this time, the conductive member 17 and the hole structure 16 can be constructed as a conductive through hole. The first metal layer L1 can include a first signal line 21, and the Nth metal layer L N A second signal line 22 may be included.

[0079] refer to Figure 5 , Figure 5A cross-sectional view of a circuit board provided in an embodiment of the present application in a direction parallel to the stacking direction of the metal layers, in which 1<a, b<N. In this case, the conductive member 17 and the hole structure 16 can be constructed as a conductive buried hole. The ath metal layer L a and the b-th metal layer L b They may be metal layers 11 located inside the circuit board.

[0080] refer to Figure 6 , Figure 6 Another cross-sectional view of a circuit board in a direction parallel to the stacking direction of the metal layers provided in an embodiment of the present application, in which 1=a, b<N; in this case, the conductive member 17 and the hole structure 16 can be constructed as a conductive blind hole. The first metal layer L1 on the upper surface of the circuit board can be the ath metal layer L a , the bth metal layer L b It may be the metal layer 11 located inside the circuit board.

[0081] In other embodiments, 1<a, b=N can also be set. In this case, the conductive member 17 and the hole structure 16 can also be constructed as a conductive blind hole, and the cross-sectional structure is the same as Figure 6 Similarly, no further illustration is given. In this method, the Nth metal layer L on the lower surface of the circuit board N It can be the b-th metal layer L b , the a-th metal layer L a It may be the metal layer 11 located inside the circuit board.

[0082] In conventional circuit boards, vertical through holes are used, and the side walls of the vertical through holes are perpendicular to the planes where the metal layers in the circuit board are located, which leads to a reference plane missing problem in the vertical through holes and their vicinity.

[0083] In the embodiment of the present application, a hole structure 16 with a special-shaped sidewall can be used, and the conductive member 17 can cover the sidewall of the hole structure 16. The hole structure 16 with a special-shaped sidewall can make the conductive member 17 and the a-th metal layer L in the stacking direction. a and the bth metal layer L b At least one of the metal layers 11 has an overlapping portion so as to compensate the reference surface based on the overlapping portion with other metal layers 11 .

[0084] In some embodiments, the hole structure 16 may have a profiled sidewall, and the conductive member 17 may be a cylindrical metal layer covering the sidewall of the hole structure 16. The cylindrical metal layer may be based on the profiled sidewall of the hole structure 16 and may be aligned with the a-th metal layer L in the stacking direction. a and the bth metal layer L b At least one of the metal layers 11 has an overlapping portion so as to compensate the reference surface based on the overlapping portion with other metal layers 11 .

[0085] In some embodiments, the conductive member 17 may be a cylindrical metal layer, and in a cross-sectional view parallel to the stacking direction, the conductive member 17 may be as follows: Figure 4-Figure 5 In either way, from the a metal layer L a To the cth metal layer L c The aperture of the hole structure 16 can be gradually reduced, starting from the cth metal layer L c To the bth metal layer L b , the pore size of the pore structure 16 can be gradually increased, and c is a positive integer greater than a and less than b.

[0086] In some embodiments, the conductive member 17 may be a cylindrical metal layer, and the cross-sectional view parallel to the stacking direction may also be as follows: Figure 7 shown.

[0087] refer to Figure 7 As shown, Figure 7 Another cross-sectional view of a circuit board in a direction parallel to the stacking direction of the metal layers provided in an embodiment of the present application, in this manner, in a cross section parallel to the stacking direction, the aperture of the hole structure 16 can be gradually reduced from the a-th metal layer to the b-th metal layer.

[0088] Figure 7 Taking a=1, b=N, the conductive member 17 and the hole structure 16 can form a conductive through hole as an example for illustration, it is obvious that for the conductive blind hole and the conductive buried hole solution, on the cross section parallel to the stacking direction, a metal layer L can also be set from the ath metal layer L a To the bth metal layer L b , the pore size of the pore structure 16 gradually decreases.

[0089] Figure 7 As shown, in the cross-sectional view, the sidewall of the hole structure 16 is a straight line extending from the a-th metal layer to the b-th metal layer.

[0090] refer to Figure 8 As shown, Figure 8 Another cross-sectional view of a circuit board in a stacking direction parallel to the metal layers is provided in an embodiment of the present application. In this embodiment, in the cross-section parallel to the stacking direction, the aperture of the hole structure 16 can also gradually decrease from the a-th metal layer to the b-th metal layer, and in the cross-sectional view, the side wall of the hole structure 16 is an arc extending from the a-th metal layer to the b-th metal layer.

[0091] In some embodiments, the conductive member 17 may be a cylindrical metal layer, and the cross-sectional view parallel to the stacking direction may also be as follows: Fig. 9 shown.

[0092] refer to Fig. 9 As shown, Fig. 9Another cross-sectional view of a circuit board in a stacking direction parallel to the metal layers provided in an embodiment of the present application, in which the aperture of the hole structure can gradually increase from the a-th metal layer to the b-th metal layer in the cross-section parallel to the stacking direction.

[0093] Fig. 9 Taking a=1, b=N, the conductive member 17 and the hole structure 16 can form a conductive through hole as an example for illustration. Obviously, for the conductive blind hole and the conductive buried hole scheme, on the cross section parallel to the stacking direction, it can also be set from the a-th metal layer to the b-th metal layer, and the aperture of the hole structure 16 can be gradually increased.

[0094] In some embodiments, the conductive member 17 may be a cylindrical metal layer, and the cross-sectional view parallel to the stacking direction may also be as follows: Fig.10 shown.

[0095] refer to Fig.10 As shown, Fig.10 Another cross-sectional view of a circuit board in a direction parallel to the stacking direction of the metal layer provided in an embodiment of the present application, in this embodiment, in the cross section parallel to the stacking direction, the hole structure 16 can be an inclined hole with a constant aperture.

[0096] Fig.10 Taking a=1, b=N, the conductive member 17 and the hole structure 16 can form a conductive through hole as an example for illustration. Obviously, for the conductive blind hole and the conductive buried hole scheme, the hole structure 16 can also be set as an inclined hole with a constant aperture on the cross section parallel to the stacking direction.

[0097] Although the conductive member 17 is a cylindrical metal layer covering the side wall of the hole structure 16 and can achieve reference surface compensation in the hole structure 16 and its adjacent area, it is not easy to match the line width of the first signal line 21 and the second signal line 22. In order to solve this problem, in the embodiment of the present application, the structure of the circuit board can also be set as Fig.11 and Fig.12 shown.

[0098] refer to Fig.11 and Fig.12 , Fig.11 A three-dimensional view of a circuit board facing a first signal line provided in an embodiment of the present application, Fig.12 A schematic diagram of the structure of a conductive component in a circuit board provided in an embodiment of the present application. Fig.12 Shows Fig.11 The schematic diagram of the layout principle of the conductive member 17 and the connected first signal line 21 and second signal line 22 in the circuit board is shown.

[0099] exist Fig.11 and Fig.12 In the illustrated embodiment, the hole structure 16 may include a metal layer La The plane is toward the bth metal layer L b The conductive element 17 may be a conductive wire covering the inclined surface; on different cross sections perpendicular to the stacking direction, the intersections of the inclined surface and each cross section may be line segments, so that the width of the inclined surface may be fixed or approximately fixed. In this way, the conductive element 17 covering the inclined surface may be a conductive wire related to the width of the inclined surface. By setting the width of the inclined surface, the width of the conductive wire may be accurately set, so that the conductive wire width may be matched with the width of the first signal line 21 and the second signal line 22.

[0100] Fig.11 In the figure, three horizontal dotted lines are used to indicate the cross sections at different heights of the circuit board, and the three cross sections are all perpendicular to the stacking direction, that is, perpendicular to the thickness direction of the circuit board. On the cross sections perpendicular to the stacking direction, the intersection lines of the above-mentioned inclined plane and each cross section can all be line segments.

[0101] In some embodiments, the hole structure 16 may include a a The plane is toward the bth metal layer L b The inclined surface extending from the plane in which it is located can be as follows in one embodiment: Fig.11 and Fig.12 As shown, the slope can be set to be from the a-th metal layer L a The plane is toward the bth metal layer L b The spiral surface extending from the plane where the conductor 17 is located can expose the side wall 18 of the slope forming the slope. The side wall 18 of the slope is the side wall of the through hole remaining after the hole structure 16 forms the spiral surface. In this way, the width of the conductor as the conductive member 17 can be consistent with the width of the spiral surface. By controlling the width of the spiral surface, the width of the conductor can be accurately controlled, so that the conductor is easy to match the line width of the first signal line 21 and the second signal line 22.

[0102] In some embodiments, the hole structure 16 may have a spiral surface. When preparing the hole structure, a spiral surface may be formed through the a-th metal layer L. a To the bth metal layer L b The vertical hole is then formed near the a-th metal layer L a The circuit board adjacent to the side wall of the vertical hole is spirally processed on one side to form the desired spiral surface. After the spiral surface is formed, a metal layer can be formed on the surface of the hole structure 16 by depositing a metal layer, and the metal layer on the slope side wall is removed by drilling, leaving only the metal layer on the spiral surface for use as the conductive member 17. At this time, the conductive member 17 is a wire covering the spiral surface and exposing the slope side wall 18.

[0103] like Fig.11 and Fig.12As shown, the spiral surface and the a-th metal layer L can be set a The plane and the bth metal layer L b The planes where they are located are smoothly connected; the wire as the conductive member 17 is directly in contact with the first signal line 21 and the second signal line 22 respectively. This method does not require a pad, and a metal layer can be deposited in the hole structure 16 to form a wire as the conductive member 17. a The plane and the bth metal layer L b The planes where the wires are located are smoothly connected, and the metal layer is smoothly overlapped and covered on the surface of the first signal line 21 and the second signal line 22, so that the wires can be smoothly connected to the first signal line 21 and the second signal line 22, avoiding poor contact or wire breakage caused by a large height difference at the connection position.

[0104] Optionally, the width of the wire and the first signal line 21 and the second signal line 22 can be set to meet the same condition. As described above, by controlling the width of the spiral surface, the width of the wire covered by its surface can be accurately controlled, so that the width of the wire and the first signal line 21 and the second signal line 22 meet the same condition, that is, the width of the wire and the first signal line 21 and the second signal line 22 can be made the same or approximately the same, thereby avoiding the signal quality being affected by the line width change on the signal transmission path.

[0105] refer to Fig.13 , Fig.13 A three-dimensional view of a circuit board with a spiral hole structure having a spiral surface provided in an embodiment of the present application. For the sake of clarity, Fig.13 FIG. 4 mainly shows a part of the circuit board, which can be used to form the slope of the spiral surface in the hole structure 16 .

[0106] like Fig.13 As shown, the inclined surface in the hole structure 16 can be from the a-th metal layer L a The plane is toward the bth metal layer L b The spiral surface of the plane spirally extends; one side of the spiral surface can be toward the a-th metal layer L a The other side can be toward the b metal layer L shown in FIG. b The plane where it is located.

[0107] For the conductive hole 16 with the spiral surface as the above-mentioned inclined surface, as mentioned above, on different cross sections perpendicular to the stacking direction, the intersection lines of the above-mentioned inclined surface and each cross section can all be line segments. Fig.13 As shown, at different heights of the circuit board, the same side of the spiral surface can always face the ath metal layer L a The plane where the spiral surface is located can always face the bth metal layer L bThe plane where it is located can make the a-1 metal layer L located below the spiral surface a-1 To the b-1th metal layer L b-1 They may have overlapping parts with the conductive member 17 covering the spiral surface, so as to form a compensation effect of the reference surface for the conductive member 17 in the hole structure 16 .

[0108] refer to Fig.14 , Fig.14 for Fig.13 The top view of the conductive member covering the spiral surface in the circuit board is shown. In the stacking direction of the metal layer 11 in the circuit board, along the extension path of the spiral surface, different areas of the spiral surface may have no overlapping parts.

[0109] Along the extension path of the helicoid, since different areas of the helicoid may not overlap, Fig.14 In the top view, the angle of the spiral may not exceed 360°. In the process of preparing the circuit board, when the a metal layer L is formed, a To the bth metal layer L b After the vertical hole, the a-th metal layer L a The plane where the vertical hole is located is spirally drilled along the edge of the circuit board area to form a spiral surface, which is convenient for process preparation. After the spiral surface is formed, a copper layer can be deposited on the spiral surface and the sloped side wall 18 by surface copper plating, and then the copper layer on the sloped side wall 18 is removed by drilling, leaving only the copper layer covering the spiral surface as the conductive member 17. At this time, the conductive member 17 can be a wire with the same width as the spiral surface. By controlling the width of the spiral surface, the line width of the wire can be accurately controlled, so as to match the line width with the first signal line 21 and the second signal line 22.

[0110] In the circuit board provided in the embodiment of the present application, the inclined surface for arranging the conductive member 17 in the hole structure 16 may be a plurality of holes extending from the a-th metal layer L to the bottom of the hole structure 16. a The plane is toward the bth metal layer L b In this case, the hole structure 16 can be Fig.10 The inclined hole is shown, and the cross-section of the inclined hole at right angles to the stacking direction can be a rectangle. A conductive member 17 can be formed on only one side of the rectangle, so that the conductive member 17 is a wire whose width is consistent with the width of the side. By controlling the width of the side, the line width of the wire can be accurately controlled to facilitate the matching of the line width with the first signal line 21 and the second signal line 22.

[0111] In some embodiments, the circuit board can use the wire on the spiral surface as the conductive member 17, and the manufacturing process of the circuit board can be as follows: Fig.15 shown.

[0112] refer to Fig.15 , Fig.15A process flow chart of a circuit board manufacturing method provided in an embodiment of the present application, the manufacturing method comprising:

[0113] First, CNC (Computer Numerical Control) modeling can be used to build a computer model based on the circuit board layout design that needs to be prepared.

[0114] Then, based on the established model, the drill bit is controlled to move vertically and laterally to form a hole structure with a desired helical surface 16. Based on the established computer model, the drill bit working parameters can be controlled to first drill vertically to form a vertical hole, and then based on the vertical hole, the drill bit is controlled to move laterally to form a helical surface.

[0115] Furthermore, after the helical surface is formed, electroplating may be performed on the entire hole structure 16 to form an electroplating layer covering the helical surface and the sloped side wall 18 in the hole structure 16 .

[0116] Finally, the redundant electroplating layer on the sloped sidewall 18 and outside the hole structure 16 can be removed by a drill to form the desired conductive member 17 .

[0117] From the above description, it can be seen that the circuit board provided in the embodiment of the present application can compensate the reference surface of the conductive part 17 by means of the metal layer 11 having an overlapping portion with the conductive part 17 in the thickness direction of the circuit board, and can provide a more stable and continuous signal impedance, thereby ensuring the quality of signal transmission.

[0118] Furthermore, a hole structure 16 can be provided to set the inclined surface of the conductive member 17 to be respectively aligned with the a-th metal layer L a The plane and the bth metal layer L b The planes are smoothly connected. When the conductive layer is deposited to form the conductive member 17, the conductive member 17 can be directly overlapped on the first signal line 21 and the second signal line 22. This can not only prevent a sudden change in the width of the signal line in the hole structure 16 area, but also better maintain the consistency of the width of the signal line at different positions, making the signal impedance more stable.

[0119] When the conductive member 17 is arranged in a spiral surface, the conductive member 17 may be a wire extending from the spiral surface. When the electric signal is transmitted based on the wire, the electric field lines rotate around the spiral wire, thereby forming a compact electric field distribution. This electric field distribution can make the electric field more evenly distributed in the hole structure 16 and its vicinity. When the electric signal switches between different metal layers 11, it can smoothly transition along the spiral path, which can reduce signal reflection and interference.

[0120] Based on the above embodiment, another embodiment of the present application further provides an electronic device, referring to Fig.16 , Fig.16A schematic diagram of the structure of an electronic device provided in an embodiment of the present application, the electronic device includes:

[0121] The circuit board 19 provided in any of the above embodiments may refer to the structure of the drawings provided in the above embodiments, including: N metal layers 11 stacked in sequence, with an insulating layer 12 between adjacent metal layers 11; in the stacking direction of the metal layers, the N metal layers are sequentially a first metal layer L1 to an Nth metal layer L2. N , N is a positive integer greater than 2; based on the a-th metal layer L a The first signal line 21 formed based on the b-th metal layer L b The second signal line 22 is formed, a and b are both positive integers not greater than N, and ba>1; the hole structure 16, the hole structure 16 penetrates the a-th metal layer L a To the bth metal layer L b A conductive member 17 located in the hole structure 16, the conductive member 17 connecting the first signal line 21 and the second signal line 22; wherein the conductive member 17 is located in the a-th metal layer L a With the bth metal layer L b At least one other metal layer 11 and the conductive member 17 have an overlapping portion in the stacking direction;

[0122] The electronic component 20 is arranged on the circuit board 19, and the electronic component 20 is arranged on the circuit board 19 near the a-th metal layer L a or disposed on the circuit board 19 near the b metal layer L b One side of the transistor is connected to the second signal line 22.

[0123] The electronic device provided in the embodiment of the present application may be various electronic devices with circuit boards, such as mobile phones, tablet computers, and wearable devices. The embodiment of the present application does not limit the implementation method of the electronic device.

[0124] The electronic device adopts the circuit board 19 provided in the above embodiment, which can compensate the reference plane of the conductive member 17 in the hole structure 16, thereby improving the integrity of the transmission signal, signal impedance continuity, anti-electromagnetic interference performance and power supply stability, and preventing signal attenuation problems caused by the lack of a reference plane.

[0125] In this specification, each embodiment is described in a progressive, parallel, or progressive and parallel manner. Each embodiment focuses on the differences from other embodiments, and the same or similar areas between the embodiments can be referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method area description.

[0126] It should be noted that in the description of the present application, it should be understood that the terms "upper", "lower", "top", "bottom", "inside", "outside" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the drawings, which are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application. When a component is considered to be "connected" to another component, it may be directly connected to the other component or there may be a centrally arranged component at the same time.

[0127] It should also be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprises", "comprising" or any other variants thereof are intended to cover non-exclusive inclusion, so that an article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such article or device. In the absence of further restrictions, the elements defined by the sentence "comprising a ..." do not exclude the existence of other identical elements in the article or device including the above elements.

[0128] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present application. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to the embodiments shown herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A circuit board, characterized in that: include: N metal layers stacked in sequence, with an insulating layer between adjacent metal layers; In the stacking direction of the metal layers, the N metal layers are sequentially from the first metal layer to the Nth metal layer, where N is a positive integer greater than 2; A first signal line formed based on the a-th metal layer and a second signal line formed based on the b-th metal layer, where a and b are both positive integers not greater than N, and ba>1; A hole structure, wherein the hole structure penetrates the a-th metal layer to the b-th metal layer; A conductive member located in the hole structure, the conductive member connecting the first signal line and the second signal line; wherein at least one other metal layer located between the a-th metal layer and the b-th metal layer has an overlapping portion with the conductive member in the stacking direction.

2. The circuit board according to claim 1, characterized in that: Other metal layers located between the a-th metal layer and the b-th metal layer all have overlapping portions with the conductive element in the stacking direction.

3. The circuit board according to claim 1, characterized in that: a=1, b=N; Or, 1<a, b<N; Or, 1=a, b<N; Or, 1<a, b=N.

4. The circuit board according to any one of claims 1 to 3, characterized in that: The conductive member is a cylindrical metal layer covering the side wall of the hole structure; On a cross section parallel to the stacking direction, From the a-th metal layer to the b-th metal layer, the pore size of the pore structure gradually decreases; Or, the pore size of the pore structure gradually increases from the a-th metal layer to the b-th metal layer; Or, the aperture of the pore structure gradually decreases from the a-th metal layer to the c-th metal layer, and the aperture of the pore structure gradually increases from the c-th metal layer to the b-th metal layer, and c is a positive integer greater than a and less than b; Alternatively, the pore structure is an inclined pore with a constant pore diameter.

5. The circuit board according to any one of claims 1 to 3, characterized in that: The hole structure includes an inclined surface extending from the plane where the a-th metal layer is located to the plane where the b-th metal layer is located; the conductive member is a wire covering the inclined surface; On different cross sections perpendicular to the stacking direction, intersection lines between the inclined surface and each of the cross sections are line segments.

6. The circuit board according to claim 5, characterized in that: The inclined surface is a spiral surface extending from the plane where the a-th metal layer is located to the plane where the b-th metal layer is located, and the conductive wire exposes the side wall of the slope forming the spiral surface.

7. The circuit board according to claim 6, characterized in that: The spiral surface is smoothly connected to the plane where the a-th metal layer is located and the plane where the b-th metal layer is located respectively; The conductive wire is in direct contact with the first signal line and the second signal line respectively; Alternatively, the width of the conductive line, the first signal line, and the second signal line meet the same condition.

8. The circuit board according to claim 5, characterized in that: The inclined surface is a spiral surface that spirally extends from the plane where the a-th metal layer is located to the plane where the b-th metal layer is located; one side of the spiral surface faces the plane where the a-th metal layer is located, and the other side faces the plane where the b-th metal layer is located; Alternatively, the inclined surface is a planar inclined surface extending from a plane where the a-th metal layer is located to a plane where the b-th metal layer is located.

9. The circuit board according to claim 8, characterized in that: In the stacking direction, along the extension path of the helical surface, different regions of the helical surface have no overlapping parts.

10. An electronic device, characterized in that: include: A circuit board, comprising: N metal layers stacked in sequence, with an insulating layer between adjacent metal layers; in the stacking direction of the metal layers, the N metal layers are sequentially from the first metal layer to the Nth metal layer, N being a positive integer greater than 2; a first signal line formed based on the ath metal layer and a second signal line formed based on the bth metal layer, a and b being positive integers not greater than N, and ba>1; a hole structure, the hole structure passing through the ath metal layer to the bth metal layer; a conductive member located in the hole structure, the conductive member connecting the first signal line and the second signal line; wherein at least one other metal layer located between the ath metal layer and the bth metal layer has an overlapping portion with the conductive member in the stacking direction; An electronic component is arranged on the circuit board, and the electronic component is arranged on a side of the circuit board close to the a-th metal layer and connected to the first signal line; or is arranged on a side of the circuit board close to the b-th metal layer and connected to the second signal line.

Images