Sealing carrier for high and low temperature test of chip
By designing a sealing vehicle for chip high and low temperature testing, it uses transparent heat-insulated glass and a sealed heat-insulated base made of stainless steel, combined with flexible connectors, temperature-impact probes, body, humidity controller and air valve, the existing vehicle has solved the problems of poor sealing performance, insufficient thermal insulation performance and limited humidity control capabilities, and achieved efficient and low-cost chip high and low temperature testing.
Patent Information
- Application Number
- CN202420713785.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-04-08
- Publication Date
- 2025-04-25
- Estimated Expiration
- 2034-04-08
AI Technical Summary
The existing chip test vehicles have problems such as poor sealing performance, insufficient thermal insulation performance, limited humidity control capabilities, unreasonable material selection and high cost and low efficiency, which affect the accuracy and efficiency of the test.
A sealing vehicle for chip high and low temperature testing was designed, and a sealed and thermal insulation base made of transparent heat-insulated glass and stainless steel material is used. Combined with flexible connectors, temperature-impact probes, body, humidity controller and air valve, it achieves good sealing, humidity control and thermal insulation performance.
It effectively improves sealing performance and insulation performance, ensures stable humidity control, reduces testing costs, and improves testing efficiency and reliability of results.
Smart Images
Figure CN222800786U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of chip testing, in particular to a sealing carrier used for high and low temperature testing of chips. Background Art
[0002] In the fields of scientific research, medicine, electronics, etc., the demand for testing the test evaluation board of the object to be tested, that is, the chip, in extreme temperature environments is increasing. Therefore, it is necessary to design efficient test sealing carriers to provide stable low-temperature and high-temperature test environments. At present, there are some low-temperature and high-temperature test carriers on the market, such as low-temperature test carriers and high-temperature ovens, but there are still some technical problems:
[0003] 1. The sealing performance of some sealed carriers is not ideal, which makes it difficult to isolate the external air, easily causing temperature fluctuations or uneven temperature gradients, affecting the test accuracy;
[0004] 2. The thermal insulation performance of some vehicles is not good enough, resulting in the inability to stably control the temperature inside the vehicle, affecting the reliability of the test results. At the same time, insufficient thermal insulation performance will cause the time to heat up or cool down to the expected temperature to be too long, affecting the test efficiency;
[0005] 3. Some vehicles have limited control over humidity and cannot effectively control the humidity in the box, which can easily lead to unstable humidity in the test environment and cause frosting problems during low-temperature testing;
[0006] 4. Some carriers have problems in material selection, such as insufficient tolerance of sealing strip materials to high or low temperatures, poor insulation material performance, etc., which can easily lead to a decrease in sealing performance during use and affect the stability of the test environment;
[0007] 5. Most of the vehicles on the market cannot balance cost and efficiency. Some vehicles are low-cost and highly versatile, but have many drawbacks during the test process, which will lead to low test efficiency and damage to the DUT in serious cases. Some vehicles, although they provide thoughtful protection for the DUT and have high test efficiency, are too personalized, not very versatile, and expensive;
[0008] Therefore, designing a sealing carrier with good sealing, humidity control, thermal insulation performance and suitable material selection and reasonable design is of great significance to solving the current technical problems in the field of low-temperature and high-temperature testing. Therefore, we propose a sealing carrier for high and low-temperature testing of chips. Utility Model Content
[0009] The purpose of the utility model is to solve the shortcomings existing in the prior art, such as poor sealing performance of some carriers, insufficient thermal insulation performance, limited humidity control ability, poor material selection, and high cost.
[0010] In order to achieve the above purpose, the utility model adopts the following technical solutions:
[0011] A sealed carrier for high and low temperature testing of chips, comprising a square sealed box body, the sealed box body comprising a transparent heat-insulating sealing glass installed on the upper half of the sealed box body, and a sealed heat-insulating base made of stainless steel on the lower half of the sealed box body, a connection port is provided on the top of the transparent heat-insulating sealing glass, a flexible connector is installed around the connection port, a temperature shock probe body is installed on the top of the flexible connector, a humidity controller connected to the inside of the sealed heat-insulating base is installed on the front of the sealed heat-insulating base, an air valve is installed on the left side of the sealed heat-insulating base, and a heat-insulating sealing rubber belt is installed on the top of the sealed heat-insulating base and at the bottom of the transparent heat-insulating sealing glass, and soft rubber pads are installed in the recesses around the top of the sealed heat-insulating base and at the notch of the heat-insulating sealing rubber belt.
[0012] As a preferred solution of the utility model, a buckle is installed on the front side of the sealed insulation base and located on the front side of the transparent insulation sealing glass, and a hinge is installed on the back side of the sealed insulation base and located on the back side of the transparent insulation sealing glass.
[0013] As a preferred solution of the utility model, handles fixed to the sealed heat-insulating base are symmetrically mounted on both side surfaces of the sealed heat-insulating base.
[0014] As a preferred solution of the utility model, a placement platform for placing chips is installed inside the sealed and heat-insulated base, and supporting feet composed of hexagonal stainless steel nut columns are installed around the bottom of the placement platform.
[0015] As a preferred solution of the utility model, the heat-insulating sealing rubber belt is bonded to the sealing heat-insulating base, and the soft rubber pad is bonded to the sealing heat-insulating base.
[0016] As a preferred solution of the utility model, the gas valve is a one-way valve used to discharge the high-temperature and low-temperature gases in the sealing box body.
[0017] As a preferred solution of the utility model, the humidity controller monitors the humidity inside the sealed box body by connecting to a humidity sensor inside the sealed and heat-insulated base.
[0018] The technical effect of adopting the above further solution is that the humidity in the sealed box body can be effectively detected and controlled, and the damage to the chip caused by frosting during low-temperature testing can be effectively prevented.
[0019] As a preferred solution of the utility model, an elastically retractable probe is installed at the bottom of the connecting port.
[0020] Compared with the prior art, the beneficial effects of the utility model are:
[0021] In the utility model, 1. the temperature probe body can be effectively connected through the flexible connector and the connection port, so that the exhaust mode is closer to the chip placed on the platform, and the humidity is controlled at a low level through the humidity controller, so as to greatly reduce the amount of frost. The utility model can increase or decrease the temperature of the test environment faster and more accurately, and improve the unit time test efficiency when the chip is tested at high and low temperatures. After the same chip is tested at low temperature, it needs to be dried at high temperature with the temperature probe body before other tests can be carried out. The lower amount of frost can save a lot of time for drying the chip in high and low temperature tests, and greatly improve the test efficiency.
[0022] 2. The utility model can effectively control the humidity level in the main body of the sealed box to prevent the occurrence of problems such as frost. In some humidity-sensitive chip tests, it is very important to maintain an appropriate humidity level for the object to be tested. It can effectively protect the object to be tested and ensure the accuracy and reliability of the test results;
[0023] 3. Compared with the sealed carrier used in traditional chip high and low temperature testing, the utility model simplifies the components and connection relationships, and does not need to install additional sensor components into the carrier, making the installation and use process simpler and faster, which can save installation time and labor costs and improve production efficiency;
[0024] 4. The utility model is a universal carrier for high and low temperature testing of chips, that is, the high and low temperature testing of any chip can be used with this carrier. Compared with the existing carriers on the market, the cost of the present invention is only half or even more of the original one under the condition of achieving the same test efficiency and protection of the object to be tested;
[0025] 5. By using the temperature-shock probe body to transmit high-temperature or low-temperature gas at a closer distance, the stability and accuracy of the system are improved, which is beneficial to the accuracy of the experimental data;
[0026] In summary, the utility model can not only improve the test efficiency, but also effectively protect the object to be tested and prevent the occurrence of problems such as frost, thereby reducing the cost of high and low temperature testing of chips, making the test simpler, and at the same time, the results of high and low temperature testing of chips are more reliable and efficient. BRIEF DESCRIPTION OF THE DRAWINGS
[0027] Figure 1 It is a schematic diagram of the overall structure of the utility model;
[0028] Figure 2 This is a schematic diagram of the structure of the sealing and heat-insulating base of the utility model;
[0029] Figure 3 This is a schematic diagram of the structure of the gas valve of the utility model;
[0030] Figure 4 This is a schematic diagram of the planar structure of the flexible connector structure of the utility model.
[0031] Figure 5 This is a schematic diagram of the structure of the temperature shock probe body.
[0032] Legend: 1. Sealed box body; 2. Transparent heat-insulating sealing glass; 3. Sealed heat-insulating base; 4. Connection port; 41. Probe; 5. Flexible connector; 51. Temperature shock probe body; 6. Humidity controller; 7. Air valve; 8. Heat-insulating sealing rubber belt; 9. Soft rubber pad; 10. Buckle; 101. Hinge; 11. Handle; 12. Placement platform. DETAILED DESCRIPTION
[0033] The technical solutions in the embodiments of the utility model will be clearly and completely described below in conjunction with the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, rather than all of the embodiments. Based on the embodiments of the utility model, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the utility model.
[0034] In order to facilitate the understanding of the present invention, the present invention will be described more comprehensively below with reference to the relevant literature, and several embodiments of the present invention are given. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present invention more thorough and comprehensive.
[0035] It should be noted that when an element is referred to as being "fixed on" another element, it may be directly on the other element or there may also be a central element. When an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be a central element at the same time. The terms "vertical", "horizontal", "left", "right" and similar expressions used in this article are for illustrative purposes only.
[0036] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by technicians in the technical field of the present invention. The terms used in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and / or" used in this article includes any and all combinations of one or more related listed items.
[0037] Example 1
[0038] like Figure 1-5As shown, the utility model provides a technical solution: a sealed carrier for high and low temperature testing of chips, including a square sealed box body 1, the sealed box body 1 includes a transparent heat-insulating sealing glass 2 installed on the upper half of the sealed box body 1, and the lower half of the sealed box body 1 is a sealed heat-insulating base 3 made of stainless steel, a connecting port 4 is opened on the top of the transparent heat-insulating sealing glass 2, and a flexible connector 5 is installed around the connecting port 4, and a temperature shock probe body 51 is installed on the top of the flexible connector 5, a humidity controller 6 connected to the inside of the sealed heat-insulating base 3 is installed on the front of the sealed heat-insulating base 3, and an air valve 7 is installed on the left side of the sealed heat-insulating base 3, and a heat-insulating sealing rubber belt 8 is installed on the top of the sealed heat-insulating base 3 and at the bottom of the transparent heat-insulating sealing glass 2, and soft rubber pads 9 are installed in the recesses around the top of the sealed heat-insulating base 3 and at the notch of the heat-insulating sealing rubber belt 8.
[0039] Example 2
[0040] like Figure 1-5 As shown, a buckle 10 is installed on the front side of the sealed insulation base 3 and on the front side of the transparent insulation sealing glass 2, and a hinge 101 is installed on the back side of the sealed insulation base 3 and on the back side of the transparent insulation sealing glass 2, which can facilitate the opening and closing of the transparent insulation sealing glass 2 and the sealed insulation base 3.
[0041] Handles 11 fixed to the sealing and heat-insulating base 3 are symmetrically mounted on both side surfaces of the sealing and heat-insulating base 3 , and the handles 11 are used to facilitate moving the device.
[0042] A placement platform 12 for placing chips is installed inside the sealed and heat-insulated base 3, and legs composed of hexagonal stainless steel nut columns are installed around the bottom of the placement platform 12, so that the height of the placement platform 12 can be adjusted by matching different stainless steel nut columns.
[0043] The heat-insulating sealing rubber belt 8 is bonded to the sealing heat-insulating base 3, and the soft rubber pad 9 is bonded to the sealing heat-insulating base 3, which can effectively ensure the sealing heat-insulating performance.
[0044] The gas valve 7 is a one-way valve, which is used to discharge high-temperature and low-temperature gases in the sealed box body 1, and can effectively ensure the temperature stability in the sealed box body 1.
[0045] The humidity controller 6 monitors the humidity in the sealed box body 1 by connecting to the humidity sensor inside the sealed heat-insulating base 3 , and can effectively control the humidity change in the sealed box body 1 .
[0046] An elastically retractable probe 41 is installed at the bottom of the connecting port 4 .
[0047] The working process of the utility model is as follows: when using a sealed carrier for high and low temperature testing of chips to test the chip, first, the chip is placed on the placement platform 12. After completion, the transparent heat-insulating sealing glass 2 is folded up by the hinge 101, and then the buckle 10 is buckled. After completion, the temperature shock probe body 51 is connected with the flexible connector 5, and the length of the probe 41 and the height of the placement platform 12 are adjusted to make the distance between the air outlet and the chip closer. The temperature shock probe body 51 is used to quickly and accurately heat and cool the chip to test the chip. During the test, the humidity controller 6 is used to monitor the humidity change in the sealing box body 1 and adjust it, and the high and low temperature gas is discharged through the air valve 7 to maintain the temperature and humidity environment inside the sealing box body 1 to efficiently test the chip. Through design, the utility model can effectively improve the sealing performance and thermal insulation performance of the carrier, effectively improve the humidity control ability, and effectively reduce costs.
[0048] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.
Claims
1. A sealed carrier for high and low temperature testing of chips, comprising a square sealed box body (1), characterized in that: The sealed box body (1) comprises a transparent heat-insulating sealing glass (2) installed on the upper half of the sealed box body (1), and a sealed heat-insulating base (3) made of stainless steel is installed on the lower half of the sealed box body (1). A connection port (4) is provided on the top of the transparent heat-insulating sealing glass (2), and a flexible connector (5) is installed around the connection port (4). A temperature shock probe body (51) is installed on the top of the flexible connector (5). A humidity controller (6) connected to the inside of the sealed heat-insulating base (3) is installed on the front of the sealed heat-insulating base (3), and an air valve (7) is installed on the left side of the sealed heat-insulating base (3). A heat-insulating sealing rubber belt (8) is installed on the top of the sealed heat-insulating base (3) and at the bottom of the transparent heat-insulating sealing glass (2). Furthermore, a soft rubber pad (9) is installed in the concave parts around the top of the sealed heat-insulating base (3) and at the notch of the heat-insulating sealing rubber belt (8).
2. A sealed carrier for high and low temperature testing of chips according to claim 1, characterized in that: A buckle (10) is installed on the front side of the sealed heat-insulating base (3) and located on the front side of the transparent heat-insulating sealed glass (2), while a hinge (101) is installed on the back side of the sealed heat-insulating base (3) and located on the back side of the transparent heat-insulating sealed glass (2).
3. A sealed carrier for high and low temperature testing of chips according to claim 1, characterized in that: Handles (11) fixed to the sealing and heat-insulating base (3) are symmetrically mounted on the two side surfaces of the sealing and heat-insulating base (3).
4. A sealed carrier for high and low temperature testing of chips according to claim 1, characterized in that: A placement platform (12) for placing chips is installed inside the sealed heat-insulating base (3), and supporting feet composed of hexagonal stainless steel nut columns are installed around the bottom of the placement platform (12).
5. The sealing carrier for high and low temperature testing of chips according to claim 1, characterized in that: The heat-insulating sealing rubber belt (8) is bonded to the sealing heat-insulating base (3), and the soft rubber pad (9) is bonded to the sealing heat-insulating base (3).
6. A sealed carrier for high and low temperature testing of chips according to claim 1, characterized in that: The gas valve (7) is a one-way valve used to discharge high-temperature and low-temperature gases in the sealed box body (1).
7. A sealed carrier for high and low temperature testing of chips according to claim 1, characterized in that: The humidity controller (6) monitors the humidity inside the sealed box body (1) by connecting to a humidity sensor inside the sealed heat-insulating base (3).
8. The sealed carrier for high and low temperature testing of chips according to claim 1, characterized in that: An elastically retractable probe (41) is installed at the bottom of the connecting port (4).