Interface chip for simulating video signal and vehicle

Abstract

The utility model provides an analog video signal interface chip and a vehicle, and the interface chip internally comprises a first voltage follower, a second voltage follower, a subtracter and a bias voltage generator. The input end of the first voltage follower is connected with an interference signal, and the output end is connected with the inverted input end of the subtractor; the input end of the second voltage follower is connected with an analog video signal, and the output end is connected with the in-phase input end of the subtractor; the bias voltage generator comprises a third voltage follower, a voltage reference source and a reference resistor. The inverting input end of the third voltage follower is in short circuit with the output end, and the non-inverting input end is connected with the voltage reference source; the output end of the third voltage follower is connected with the in-phase input end of the subtracter; and the output end of the subtractor outputs a video signal. According to the scheme, the influence of ground offset on the analog video signal in the single-end transmission process can be reduced, the direct current offset of the output video signal can be set, and the quality of the video signal is improved.

Description

Technical Field

[0001] The utility model relates to the technical field related to signal transmission circuits, in particular to an interface chip for analog video signals. Background Art

[0002] In the field of signal transmission, in many cases, signals are transmitted in the form of analog signals. The analog signal itself has weak anti-interference ability, so the signal is easily interfered during the transmission process. Especially in certain electromagnetic environments (such as the electromagnetic environment of the whole vehicle during vehicle video transmission), the signal is more likely to be distorted due to interference. In addition, when the analog video signal is transmitted between two modules, there is a potential difference (ground offset) of no more than ±1V between the two modules. Affected by the ground offset, the module receiving the analog video signal has a low quality of the received analog video signal, so the video screen displayed by the module is prone to interference such as three-color noise and rolling stripes.

[0003] At present, in order to overcome the interference of ground offset, the following are generally used Figure 1 The signal transmission circuit shown receives analog video signals and uses an operational amplifier and corresponding resistors to form a subtractor, so that a signal containing interference can be subtracted from an interference signal to obtain a pure signal without interference.

[0004] Although the signal transmission circuit can reduce the impact of interference on analog video signals, the two inputs of the subtractor in the circuit are VIN and VGND, and their input impedances are different, which will result in the interference not being completely offset in the subtraction operation. In addition, the VIN input branch has been grounded internally, so it is not convenient to set the output bias level of the operational amplifier, which may cause the output signal of the operational amplifier to be limited.

[0005] Therefore, the existing signal transmission circuit still has signal interference and the output may be limited. Utility Model Content

[0006] The utility model aims to solve the problem that the signal transmission circuit in the prior art still has signal interference and the output may be limited.

[0007] To solve the above problems, the embodiment of the utility model discloses an interface chip for analog video signals, including a first voltage follower, a second voltage follower, a subtractor, and a bias voltage generator. Among them, the input end of the first voltage follower is connected to the interference signal, and the output end is connected to the inverting input end of the subtractor; the input end of the second voltage follower is connected to the analog video signal, and the output end is connected to the non-inverting input end of the subtractor; the bias voltage generator includes a third voltage follower, a voltage reference source, and a reference resistor, one end of the reference resistor is connected to the system power supply, the other end is connected to one end of the voltage reference source, the other end of the voltage reference source is grounded, the other end of the reference resistor and one end of the voltage reference source are both connected to the non-inverting input end of the third voltage follower, and the inverting input end of the third voltage follower is short-circuited with the output end; the output end of the third voltage follower is connected to the non-inverting input end of the subtractor; the output end of the subtractor outputs a video signal, and the video signal is an analog video signal with the interference signal removed.

[0008] By adopting the above scheme, by setting the first voltage follower and the second voltage follower, since both of them have a high input impedance, the signal input to the subtractor is basically not affected by interference, reducing the signal interference of the interface chip of the analog video signal. In addition, by setting the bias voltage generator, the bias voltage of the pure analog video signal output by the subtractor can be adjusted, avoiding the problem of the signal output by the interface chip being limited.

[0009] According to another specific embodiment of the present invention, in the interface chip of the analog video signal disclosed in the embodiment of the present invention, the first voltage follower includes a first operational amplifier; the in-phase input terminal of the first operational amplifier is connected to the interference signal; the inverting input terminal of the first operational amplifier is suspended or connected to one end of the gain adjustment resistor.

[0010] By adopting the above scheme, when the gain of the interface chip needs to be adjusted, the ratio of the input signal voltage to the output signal voltage of the interface chip can be changed by connecting the gain adjustment resistor, thereby improving the output accuracy of the analog video signal output by the interface chip.

[0011] According to another specific embodiment of the utility model, the interface chip of the analog video signal disclosed in the embodiment of the utility model, the second voltage follower includes a second operational amplifier; the non-inverting input terminal of the second operational amplifier is connected to the analog video signal; the inverting input terminal of the second operational amplifier is suspended or connected to the other end of the gain adjustment resistor.

[0012] By adopting the above scheme, when the gain of the interface chip needs to be adjusted, the ratio of the input signal voltage to the output signal voltage of the interface chip can be changed by connecting the gain adjustment resistor, thereby improving the output accuracy of the analog video signal output by the interface chip.

[0013] According to another specific embodiment of the utility model, in the interface chip of the analog video signal disclosed in the embodiment of the utility model, the first voltage follower also includes a first feedback resistor, and the two ends of the first feedback resistor are respectively connected to the inverting input terminal and the output terminal of the first operational amplifier; the second voltage follower also includes a second feedback resistor, and the two ends of the second feedback resistor are respectively connected to the inverting input terminal and the output terminal of the second operational amplifier.

[0014] By adopting the above scheme, only an operational amplifier and a feedback resistor are used to form a voltage follower, and fewer devices are used, which effectively reduces the cost, volume and layout difficulty of the interface chip.

[0015] According to another specific embodiment of the utility model, the interface chip of the analog video signal disclosed in the embodiment of the utility model, the subtractor includes a third operational amplifier, a third feedback resistor, a balancing resistor, a first input resistor and a second input resistor. Among them, the two ends of the third feedback resistor are respectively connected to the inverting input terminal and the output terminal of the third operational amplifier; the two ends of the balancing resistor are respectively connected to the non-inverting input terminal of the third operational amplifier and the output terminal of the third voltage follower; the two ends of the first input resistor are respectively connected to the output terminal of the first operational amplifier and the inverting input terminal of the third operational amplifier; the two ends of the second input resistor are respectively connected to the output terminal of the second operational amplifier and the non-inverting input terminal of the third operational amplifier.

[0016] By adopting the above scheme, by setting the third feedback resistor and the balancing resistor, the structure of the subtractor is made more symmetrical, the leakage current at the input end of the subtractor is offset, and the reliability of the state of the output end of the subtractor is improved. By setting the first input resistor and the second input resistor, the input signal of the subtractor is matched with the impedance of the third operational amplifier, thereby ensuring the stability of the input signal.

[0017] According to another specific embodiment of the utility model, in the interface chip of the analog video signal disclosed in the embodiment of the utility model, the third voltage follower is the fourth op amp; the first op amp, the second op amp, the third op amp, and the fourth op amp are all connected to the system power supply and the ground terminal. In addition, the operating frequencies of the first op amp, the second op amp, the third op amp, and the fourth op amp are all higher than the bandwidth of the analog video signal.

[0018] By adopting the above solution and limiting the operating frequency of the operational amplifier, the normal operation of the operational amplifier can be ensured, so that the signal can be normally transmitted between the operational amplifiers.

[0019] According to another specific embodiment of the utility model, the voltage reference source of the analog video signal interface chip disclosed in the embodiment of the utility model is a voltage zener diode. In addition, the positive electrode of the voltage zener diode is grounded, and the negative electrode is connected to the non-inverting input terminal of the third voltage follower; the voltage of the voltage zener diode is half of the system power supply voltage.

[0020] By adopting the above solution and setting the voltage reference source as a voltage stabilizing diode, a stable and accurate voltage value can be provided to the third voltage follower, thereby improving the quality of the output video signal.

[0021] According to another specific embodiment of the utility model, the interface chip of the analog video signal disclosed in the embodiment of the utility model has a reference resistor with a resistance range of 0.8KΩ to 1.2KΩ; the first feedback resistor, the second feedback resistor, the third feedback resistor, the balance resistor, the first input resistor and the second input resistor all have a resistance range of 8KΩ to 12KΩ. Moreover, the resistance values ​​of the first input resistor, the second input resistor, the third feedback resistor and the balance resistor are all equal. The resistance values ​​of the first feedback resistor and the second feedback resistor are equal. Moreover, the gain corresponding to the output video signal of the output end of the subtractor is calculated according to the following formula:

[0022]

[0023] Among them, V OUT is the gain, R 3 is the resistance of the third feedback resistor or balancing resistor, R 2 is the resistance value of the first input resistor or the second input resistor, R 1 is the resistance value of the first feedback resistor or the second feedback resistor, R is the resistance value of the gain adjustment resistor, V in+ is the voltage value corresponding to the analog video signal, V in- is the voltage value corresponding to the interference signal.

[0024] According to another specific embodiment of the utility model, in the interface chip of the analog video signal disclosed in the embodiment of the utility model, the interference signal is the ground offset introduced during the transmission of the signal output by the vehicle imaging system; the input end of the first voltage follower is connected to the ground end of the vehicle imaging system; the analog video signal is the analog video signal output by the vehicle imaging system; and the input end of the second voltage follower is connected to the output end of the vehicle imaging system.

[0025] By adopting the above scheme, by connecting the ground terminal and the signal output terminal of the vehicle imaging system to the first voltage follower and the second voltage follower respectively, the analog video signal transmitted by the vehicle imaging system does not contain interference signals, and the signal transmission is not susceptible to electromagnetic interference. In addition, the output bias of the output signal can be adjusted, further improving the quality of the output signal.

[0026] The embodiment of the utility model discloses a vehicle, comprising an interface chip for simulating video signals as described in the above embodiment.

[0027] The beneficial effects of the utility model are:

[0028] The interface chip for analog video signals provided by the present solution can avoid interference caused by different inputs during signal transmission through the high input impedance provided by the first voltage follower and the second voltage follower. In addition, the reference voltage of the output bias can be adjusted through the bias voltage generator to avoid the output signal being limited. As a result, the analog video signal output by the interface chip is not easily distorted by interference, and the quality of the video signal will not be reduced by being limited, thereby improving the transmission and display quality of the analog video signal.

[0029] The vehicle provided by this solution has the above-mentioned interface chip, so that the vehicle-mounted analog video signal is not easily interfered by the electromagnetic environment of the entire vehicle, and the quality of the output analog video signal is higher. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 It is a structural schematic diagram of a signal transmission circuit in the prior art;

[0031] Figure 2 is a schematic diagram of the structure of the interface chip for analog video signals provided in this embodiment;

[0032] Figure 3 Schematic diagram of the structure of the interface chip of the vehicle-mounted imaging system provided in this embodiment.

[0033] Description of reference numerals:

[0034] 1. First voltage follower; 11. First operational amplifier; 12. First feedback resistor; 2. Second voltage follower; 21. Second operational amplifier; 22. Second feedback resistor; 3. Subtractor; 31. Third operational amplifier; 32. Third feedback resistor; 33. Balancing resistor; 34. First input resistor; 35. Second input resistor; 4. Bias voltage generator; 41. Third voltage follower; 42. Voltage reference source; 43. Reference resistor; Vin-, interference signal; Vin+, analog video signal; VCC, system power supply; GND, ground; Rg1, first gain adjustment resistor foot; Rg2, second gain adjustment resistor foot. DETAILED DESCRIPTION

[0035] Embodiment 1:

[0036] In order to solve the problem that signal transmission circuits in the prior art still have signal interference and the output may be limited, this embodiment provides an interface chip for analog video signals. Specifically, refer to Figure 2The interface chip of the analog video signal includes a first voltage follower 1, a second voltage follower 2, a subtractor 3, and a bias voltage generator 4. The first voltage follower 1 and the second voltage follower 2 can both realize output voltage following input voltage changes, and both have high input impedance. The subtractor 3 can subtract the input signal to obtain a pure signal without interference. The bias voltage generator 4 is used to adjust the voltage reference of the output bias output by the subtractor 3.

[0037] Further, the input terminal of the first voltage follower 1 is connected to the interference signal Vin-, and the output terminal is connected to the inverting input terminal of the subtractor 3. The first voltage follower 1 can output the input interference signal Vin- to the inverting input terminal of the subtractor 3. The input terminal of the second voltage follower 2 is connected to the analog video signal Vin+, and the output terminal is connected to the non-inverting input terminal of the subtractor 3. The second voltage follower 2 can output the input analog video signal Vin+ to the non-inverting input terminal of the subtractor 3.

[0038] The output end of the subtractor 3 outputs a video signal, which is an analog video signal Vin+ from which the interference signal Vin- is removed. Since the subtractor 3 can subtract the two input signals, after the input analog video signal Vin+ containing interference is offset by the interference signal Vin-, the subtractor 3 can output a pure analog video signal Vin+.

[0039] Furthermore, since both the first voltage follower 1 and the second voltage follower 2 have relatively high input impedance, the attenuation caused by the two different inputs Vin- and Vin+ corresponding thereto is basically negligible, so that the signal input to the subtractor 3 is also basically not affected by interference, thereby reducing the signal interference of the interface chip of the analog video signal. In addition, since the output impedance of the first voltage follower 1 and the second voltage follower 2 is very small, the load capacity of the output ends of the first voltage follower 1 and the second voltage follower 2 is improved.

[0040] Furthermore, the bias voltage generator 4 includes a third voltage follower 41, a voltage reference source 42, and a reference resistor 43. The voltage reference source 42 is used to provide a known absolute voltage, which can be compared with the output of the subtractor 3 to obtain feedback for adjusting the voltage value of the output signal of the subtractor 3. The reference resistor 43 is used for voltage division to provide an operating current and a bias voltage to the third voltage follower 41. The third voltage follower 41 can output the input voltage signal directly to the subtractor 3 to achieve more precise control of the output bias of the subtractor 3.

[0041] Specifically, one end of the reference resistor 43 is connected to the system power supply VCC, and the other end is connected to one end of the voltage reference source 42, and the other end of the voltage reference source 42 is grounded GND. The other end of the reference resistor 43 and one end of the voltage reference source 42 are both connected to the non-inverting input end of the third voltage follower 41, and the inverting input end and the output end of the third voltage follower 41 are short-circuited. The output end of the third voltage follower 41 is connected to the non-inverting input end of the subtractor 3.

[0042] Since the bias voltage generator 4 is provided in the interface chip of the analog video signal, the bias voltage of the pure analog video signal Vin+ output by the subtractor 3 can be adjusted, thereby avoiding the problem of the signal output by the interface chip being limited.

[0043] In this embodiment, the high input impedance provided by the first voltage follower 1 and the second voltage follower 2 can avoid interference caused by different inputs during signal transmission; and the reference voltage of the output bias can be adjusted by the bias voltage generator 4 to avoid the output signal being limited. As a result, the analog video signal Vin+ output by the interface chip is not easily distorted by interference, and the quality of the video signal will not be reduced by being limited, thereby improving the transmission and display quality of the analog video signal Vin+.

[0044] Further, refer to Figure 2 In the interface chip of the analog video signal according to the utility model, the first voltage follower 1 includes a first operational amplifier 11. The in-phase input terminal of the first operational amplifier 11 is connected to the interference signal Vin-; the inverting input terminal of the first operational amplifier 11 is suspended or connected to one end of the gain adjustment resistor. In this embodiment, the reverse input terminal of the first operational amplifier 11 is connected to the first gain adjustment resistor pin Rg1. When it is necessary to adjust the gain of the analog video signal Vin+ output by the subtractor 3, the first gain adjustment resistor pin Rg1 can be connected to the gain adjustment resistor (not shown in the figure). When the gain does not need to be adjusted, the first gain adjustment resistor pin Rg1 can be suspended. In this embodiment, by setting the first gain adjustment resistor pin Rg1, when the gain of the interface chip needs to be adjusted, the gain adjustment resistor can be connected through the first gain adjustment resistor pin Rg1, the ratio of the input signal voltage to the output signal voltage of the interface chip can be changed, and the output accuracy of the analog video signal Vin+ output by the interface chip is improved.

[0045] Furthermore, in the interface chip of the analog video signal according to the utility model, reference Figure 2 The first voltage follower 1 further includes a first feedback resistor 12, and two ends of the first feedback resistor 12 are respectively connected to the inverting input terminal and the output terminal of the first operational amplifier 11. The first feedback resistor 12 is used to reduce the output offset voltage of the first operational amplifier 11 and improve the voltage transmission accuracy of the first operational amplifier 11.

[0046] In this embodiment, only the first operational amplifier 11 and the first feedback resistor 12 are used to form the first voltage follower 1, and fewer devices are used, which effectively reduces the cost, volume and layout difficulty of the interface chip. It should be noted that this embodiment only schematically lists one implementation method of the first voltage follower 1, that is, Figure 2 In fact, the first voltage follower 1 can also connect an input resistor between the in-phase input terminal and the interference signal, connect an input resistor between the inverting input terminal and the first gain adjustment resistor pin Rg1, and connect a grounding resistor between the in-phase input terminal and the ground terminal. Of course, the first voltage follower 1 can also have other resistor connection methods, which are not limited in this embodiment.

[0047] Further, in the interface chip of the analog video signal according to the utility model, reference Figure 2 , the second voltage follower 2 includes a second operational amplifier 21. The in-phase input terminal of the second operational amplifier 21 is connected to the analog video signal Vin+; the inverting input terminal of the second operational amplifier 21 is left floating or connected to the other end of the gain adjustment resistor. In this embodiment, the reverse input terminal of the second operational amplifier 21 is connected to the second gain adjustment resistor pin Rg2. When it is necessary to adjust the gain of the analog video signal Vin+ output by the subtractor 3, the second gain adjustment resistor pin Rg2 can be connected to the gain adjustment resistor (not shown in the figure). When the gain does not need to be adjusted, the second gain adjustment resistor pin Rg2 can be left floating. In this embodiment, by setting the second gain adjustment resistor pin Rg2, when the gain of the interface chip needs to be adjusted, the gain adjustment resistor can be connected through the second gain adjustment resistor pin Rg2, so that the ratio of the input signal voltage to the output signal voltage of the interface chip can be changed, thereby improving the output accuracy of the analog video signal Vin+ output by the interface chip.

[0048] It should be noted that, in the present embodiment, two gain adjustment resistor pins Rg1 and Rg2 are provided, and one gain adjustment resistor is provided. The two ends of the gain adjustment resistor are respectively connected to the two gain adjustment resistor pins. The gain adjustment resistor is connected to the internal circuit of the chip through the two gain adjustment resistor pins to uniformly control the amplification factor of the chip to achieve gain adjustment.

[0049] Furthermore, in the interface chip of the analog video signal according to the utility model, reference Figure 2 The second voltage follower 2 further includes a second feedback resistor 22, and the two ends of the second feedback resistor 22 are respectively connected to the inverting input terminal and the output terminal of the second operational amplifier 21. The second feedback resistor 22 is used to reduce the output offset voltage of the second operational amplifier 21 and improve the voltage transmission accuracy of the second operational amplifier 21.

[0050] In this embodiment, only the second operational amplifier 21 and the second feedback resistor 22 are used to form the second voltage follower 2, and fewer devices are used, which effectively reduces the cost, volume and layout difficulty of the interface chip. It should be noted that this embodiment only schematically lists one implementation method of the second voltage follower 2, that is, Figure 2 In fact, the second voltage follower 2 can also connect an input resistor between the in-phase input terminal and the analog video signal, connect an input resistor between the inverting input terminal and the second gain adjustment resistor pin Rg2, and connect a grounding resistor between the in-phase input terminal and the ground terminal. Of course, the second voltage follower 2 can also have other resistor connection methods, which are not limited in this embodiment.

[0051] Further, in the interface chip of the analog video signal according to the utility model, reference Figure 2 The subtractor 3 includes a third operational amplifier 31, a third feedback resistor 32, a balancing resistor 33, a first input resistor 34, and a second input resistor 35. The third feedback resistor 32 and the balancing resistor 33 make the structure of the subtractor 3 more symmetrical, which is used to offset the leakage current at the input end of the subtractor 3 and improve the reliability of the state of the output end of the subtractor 3. The first input resistor 34 and the second input resistor 35 are used to achieve impedance matching between the input signal of the subtractor 3 and the third operational amplifier 31, so as to ensure the stability of the input signal.

[0052] Furthermore, two ends of the third feedback resistor 32 are respectively connected to the inverting input terminal and the output terminal of the third operational amplifier 31. Two ends of the balancing resistor 33 are respectively connected to the non-inverting input terminal of the third operational amplifier 31 and the output terminal of the third voltage follower 41.

[0053] The two ends of the first input resistor 34 are respectively connected to the output of the first operational amplifier 11 and the inverting input of the third operational amplifier 31. The two ends of the second input resistor 35 are respectively connected to the output of the second operational amplifier 21 and the non-inverting input of the third operational amplifier 31.

[0054] It should be noted that this embodiment only schematically lists one implementation method of the subtractor 3, namely Figure 2The third operational amplifier 31, the third feedback resistor 32, the balancing resistor 33, the first input resistor 34 and the second input resistor 35 are formed. In fact, the subtractor 3 can also have other implementation methods, for example, two operational amplifiers can be set, and the reverse input terminal of the first operational amplifier is connected to the feedback resistor of the output terminal, the in-phase input terminal is connected to the resistor and the output of the second voltage follower 2, and the reverse input terminal is also connected to the bias voltage generator 4 via the balancing resistor. The inverting input terminal of the second operational amplifier is connected to the feedback resistor of the output terminal, the in-phase input terminal is connected to the resistor and the output of the first voltage follower 1, and the reverse input terminal is also connected to the feedback resistor of the first operational amplifier via the connecting resistor. Of course, the subtractor 3 can also have other settings, and this embodiment does not limit this.

[0055] Further, in the interface chip for analog video signals according to the present invention, the third voltage follower 41 is a fourth operational amplifier.

[0056] Further, in the analog video signal interface chip according to the utility model, the first operational amplifier 11, the second operational amplifier 21, the third operational amplifier 31, and the fourth operational amplifier are all connected to the system power supply VCC and the ground terminal GND to ensure the normal operation of the operational amplifiers.

[0057] Furthermore, in the interface chip for analog video signals according to the utility model, the operating frequencies of the first operational amplifier 11, the second operational amplifier 21, the third operational amplifier 31, and the fourth operational amplifier are all higher than the bandwidth of the analog video signal, thereby ensuring the normal operation of the first operational amplifier 11, the second operational amplifier 21, the third operational amplifier 31, and the fourth operational amplifier, so that the signal can be normally transmitted between the operational amplifiers.

[0058] Further, in the interface chip of the analog video signal according to the utility model, reference Figure 2 The voltage reference source 42 is a voltage zener diode. In addition, the positive electrode of the voltage zener diode is grounded GND, and the negative electrode is connected to the in-phase input terminal of the third voltage follower 41. The voltage zener diode has a voltage clamping function and can provide a stable and accurate voltage value to the third voltage follower 41.

[0059] Furthermore, in the interface chip for analog video signals according to the utility model, the voltage of the voltage zener diode is half of the voltage of the system power supply VCC. For example, when the voltage of the system power supply VCC is 5V, the voltage of the voltage zener diode is set to 2.5V. If the voltage of the system power supply VCC is 3.3V, the voltage of the voltage zener diode is set to 1.65V. By setting different voltages for the voltage zener diode, different system power supplies VCC can be matched, thereby improving the adaptability of the interface chip.

[0060] Furthermore, in the analog video signal interface chip according to the present invention, the resistance of the reference resistor 43 ranges from 0.8KΩ to 1.2KΩ, for example, 0.8KΩ, 1KΩ, or 1.2KΩ.

[0061] The resistance range of the first feedback resistor 12, the second feedback resistor 22, the third feedback resistor 32, the balancing resistor 33, the first input resistor 34 and the second input resistor 35 is 8KΩ to 12KΩ, for example, 8KΩ, 10KΩ or 12KΩ.

[0062] It should be noted that, in this embodiment, the resistance values ​​of the first input resistor 34, the second input resistor 35, the third feedback resistor 32 and the balancing resistor 33 are all equal. In addition, the resistance values ​​of the first feedback resistor 12 and the second feedback resistor 22 are equal.

[0063] Further, in the interface chip of the analog video signal according to the utility model, the gain corresponding to the output video signal of the output end of the subtractor 3 is calculated according to the following formula:

[0064]

[0065] Among them, V OUT is the gain, R 3 is the resistance value of the third feedback resistor 32 or the balancing resistor 33, R 2 is the resistance value of the first input resistor 34 or the second input resistor 35, R 1 is the resistance value of the first feedback resistor 12 or the second feedback resistor 22, R is the resistance value of the gain adjustment resistor, V in+ is the voltage value corresponding to the analog video signal, V in- is the voltage value corresponding to the interference signal.

[0066] Next, combine Figure 2 Describe the working process of the interface chip:

[0067] The interference signal Vin− is input via the non-inverting input terminal of the first voltage follower 1 , and the analog video signal Vin+ mixed with interference is input via the non-inverting input terminal of the second voltage follower 2 .

[0068] The interference signal Vin- is transmitted to the inverting input terminal of the subtractor 3 via the first voltage follower 1 and the first input resistor 34. The analog video signal Vin+ mixed with interference is transmitted to the non-inverting input terminal of the subtractor 3 via the second voltage follower 2 and the second input resistor 35.

[0069] The subtractor 3 subtracts the analog video signal Vin+ mixed with interference input from its non-inverting input terminal from the signal Vin- input from its inverting input terminal to obtain a pure video signal without interference.

[0070] The voltage reference source 42 provides a positive voltage and transmits it to the non-inverting input terminal of the third voltage follower 41. The third voltage follower 41 outputs a bias voltage and transmits the bias voltage to the third operational amplifier 31 of the subtractor 3 via the balancing resistor 33. The output terminal of the subtractor 3 outputs a voltage value after adjusting the output bias, which is the voltage value of the analog video signal without interference.

[0071] It should be noted that in this embodiment, all operational amplifiers perform input or output in the form of voltage.

[0072] Embodiment 2:

[0073] Based on the analog video signal interface chip described in Example 1, this embodiment provides a specific analog video signal interface chip, which is an interface chip for a vehicle-mounted imaging system. Figure 3 The interference signal Vin- corresponding to the interface chip is the ground offset introduced by the signal output by the vehicle imaging system during the transmission process; the input end of the first voltage follower 1 is connected to the ground end GND of the vehicle imaging system. The analog video signal Vin+ is the analog video signal output by the vehicle imaging system; the input end of the second voltage follower 2 is connected to the output end of the vehicle imaging system.

[0074] Specifically, when the input end of the first voltage follower 1 is connected to the ground end of the vehicle-mounted imaging system, an interference signal is input. When the input end of the second voltage follower 2 is connected to the output end of the vehicle-mounted imaging system, an analog video signal containing an interference signal is input. The first voltage follower 1 and the second voltage follower 2 output signals to the input end of the subtractor 3, and the subtractor 3 can subtract the analog video signal containing the interference signal from the interference signal to obtain a pure output signal. In addition, the setting of the bias voltage generator 4 can adjust the output bias of the output signal to obtain an output signal with higher quality and less distortion. In addition, the interface chip provided in this embodiment can be produced in a standardized manner, and can also be directly connected to a video system with differential output, which has higher applicability.

[0075] Based on the above-mentioned interface chip for analog video signals, this embodiment further provides a vehicle, comprising the above-mentioned interface chip for analog video signals.

[0076] The vehicle provided in this embodiment has the above-mentioned interface chip, so that the vehicle-mounted analog video signal is not easily interfered by the electromagnetic environment of the entire vehicle, and the quality of the output analog video signal is higher.

[0077] Although the present invention has been illustrated and described with reference to certain preferred embodiments of the present invention, it should be understood by those skilled in the art that the above contents are further detailed descriptions of the present invention in combination with specific embodiments, and it cannot be determined that the specific implementation of the present invention is limited to these descriptions. Those skilled in the art may make various changes in form and details, including making several simple deductions or substitutions, without departing from the spirit and scope of the present invention.

Claims

1. An interface chip for analog video signals, characterized in that: The invention comprises a first voltage follower, a second voltage follower, a subtractor, and a bias voltage generator; wherein The input terminal of the first voltage follower is connected to the interference signal, and the output terminal is connected to the inverting input terminal of the subtractor; The input terminal of the second voltage follower is connected to the analog video signal, and the output terminal is connected to the in-phase input terminal of the subtractor; The bias voltage generator comprises a third voltage follower, a voltage reference source, and a reference resistor, one end of the reference resistor is connected to a system power supply, the other end is connected to one end of the voltage reference source, the other end of the voltage reference source is grounded, the other end of the reference resistor and the one end of the voltage reference source are both connected to the non-inverting input end of the third voltage follower, the inverting input end and the output end of the third voltage follower are short-circuited; the output end of the third voltage follower is connected to the non-inverting input end of the subtractor; The output end of the subtractor outputs a video signal, and the video signal is the analog video signal with the interference signal removed.

2. The analog video signal interface chip as claimed in claim 1, characterized in that: The first voltage follower comprises a first operational amplifier; The in-phase input terminal of the first operational amplifier is connected to the interference signal; The inverting input terminal of the first operational amplifier is suspended or connected to one end of a gain adjustment resistor.

3. The interface chip for analog video signals as claimed in claim 2, characterized in that: The second voltage follower comprises a second operational amplifier; The in-phase input terminal of the second operational amplifier is connected to the analog video signal; The inverting input terminal of the second operational amplifier is suspended or connected to the other end of the gain adjustment resistor.

4. The interface chip for analog video signals as claimed in claim 3, characterized in that: The first voltage follower further includes a first feedback resistor, and two ends of the first feedback resistor are respectively connected to the inverting input terminal and the output terminal of the first operational amplifier; The second voltage follower further includes a second feedback resistor, and two ends of the second feedback resistor are respectively connected to the inverting input terminal and the output terminal of the second operational amplifier.

5. The interface chip for analog video signals as claimed in claim 4, characterized in that: The subtractor includes a third operational amplifier, a third feedback resistor, a balancing resistor, a first input resistor and a second input resistor; in Two ends of the third feedback resistor are respectively connected to the inverting input terminal and the output terminal of the third operational amplifier; Two ends of the balancing resistor are respectively connected to the non-inverting input terminal of the third operational amplifier and the output terminal of the third voltage follower; Two ends of the first input resistor are respectively connected to the output end of the first operational amplifier and the inverting input end of the third operational amplifier; Two ends of the second input resistor are connected to the output terminal of the second operational amplifier and the non-inverting input terminal of the third operational amplifier respectively.

6. The interface chip for analog video signals as claimed in claim 5, characterized in that: The third voltage follower is a fourth operational amplifier; The first operational amplifier, the second operational amplifier, the third operational amplifier, and the fourth operational amplifier are all connected to the system power supply and the ground terminal; and The operating frequencies of the first operational amplifier, the second operational amplifier, the third operational amplifier, and the fourth operational amplifier are all higher than the bandwidth of the analog video signal.

7. The analog video signal interface chip as claimed in claim 6, characterized in that: The voltage reference source is a voltage zener diode; and The positive electrode of the voltage stabilizing diode is grounded, and the negative electrode is connected to the non-inverting input terminal of the third voltage follower; The voltage of the voltage zener diode is half of the system power supply voltage.

8. The analog video signal interface chip as claimed in claim 7, characterized in that: The resistance values ​​of the first input resistor, the second input resistor, the third feedback resistor and the balancing resistor are all equal; The first feedback resistor and the second feedback resistor have the same resistance value.

9. The interface chip for analog video signals according to any one of claims 1 to 8, characterized in that: The interference signal is a ground offset introduced during the transmission of a signal output by the vehicle imaging system; the input end of the first voltage follower is connected to the ground end of the vehicle imaging system; The analog video signal is an analog video signal output by the vehicle-mounted imaging system; the input end of the second voltage follower is connected to the output end of the vehicle-mounted imaging system.

10. A vehicle, characterized in that: An interface chip for analog video signals comprising the interface chip as claimed in claim 9.

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