Multi-channel time synchronization terminal based on Beidou satellite signal

Abstract

The utility model discloses a multipath time synchronization terminal based on Beidou satellite signals. The multipath time synchronization terminal comprises a satellite receiver, a PPS receiving circuit, a time synchronization controller and a multipath output module. Wherein the satellite receiver is used for receiving a B1C signal of a Beidou satellite, the PPS receiving circuit is used for generating a PPS signal by using the received satellite signal, and the time synchronization controller is used for comparing time information of the B1C signal with time information of the PPS signal to obtain a receiver clock difference and adjusting a local clock according to the receiver clock difference. A time synchronization signal is output; and the multi-path output module is used for outputting multi-path PPS signals. According to the utility model, not only is the capability of multipath PPS output and satellite time code output provided, but also the problem of inconsistency of local clocks caused by environmental differences is effectively solved through clock correction.

Description

Technical Field

[0001] The utility model belongs to the field of time synchronization terminal hardware design, in particular to a multi-channel time synchronization terminal based on Beidou satellite signals. Background Art

[0002] High-precision time synchronization technology has become the cornerstone of many high-end application fields. With the increasingly stringent requirements for time synchronization accuracy in systems such as communication, navigation, monitoring, and automated control, it is critical to ensure that various devices and sensors work under a unified time reference. These systems are often composed of multiple decentralized modules, each of which maintains its own local clock, but due to differences in their respective environmental conditions and clock rates, time inconsistencies may reappear over time even after initial calibration.

[0003] The BeiDou satellite navigation system, with its global coverage, all-weather service, low cost and high stability, provides an ideal solution for high-precision time synchronization. In particular, the PPS (Pulse Per Second) signal and precise time code information play a key role in achieving time synchronization between devices.

[0004] Currently, many sensors and devices have adopted satellite-based timing to achieve time synchronization. However, existing time synchronization devices often have problems such as insufficient synchronization accuracy, high cost or poor stability. Summary of the invention

[0005] In order to overcome the shortcomings of the above-mentioned prior art, the utility model provides a multi-channel time synchronization terminal based on Beidou satellite signals, which not only provides the ability of multi-channel PPS output and satellite time code output, but also effectively solves the problem of local clock inconsistency caused by environmental differences through clock correction.

[0006] The utility model is realized according to the following technical solutions:

[0007] A multi-channel time synchronization terminal based on Beidou satellite signals comprises a satellite receiver, a PPS receiving circuit, a time synchronization controller and a multi-channel output module; wherein the satellite receiver is used to receive the B1C signal of the Beidou satellite, the PPS receiving circuit is used to generate the PPS signal by using the received satellite signal, the time synchronization controller is used to compare the time information of the B1C signal with the time information of the PPS signal to obtain the receiver clock difference, and adjust the local clock according to the receiver clock difference to output the time synchronization signal; the multi-channel output module is used to output the multi-channel PPS signal.

[0008] As a further technical solution, the PPS receiving circuit includes a constant temperature crystal oscillator and a frequency divider, wherein the constant temperature crystal oscillator is used to provide a local clock and generate a PPS signal, and the frequency divider is used to divide the frequency of the generated PPS signal.

[0009] As a further technical solution, the time synchronization controller is designed based on an FPGA chip.

[0010] As a further technical solution, the FPGA chip integrates a synchronous counter, a comparator, an MCU, a filtering unit and a time difference correction unit. The synchronous counter is used to count and synchronize the PPS second pulses. The comparator is used to compare the time difference between the B1C signal and the PPS signal to obtain the receiver clock difference. The MCU is used to modulate the PPS signal. The filtering unit is used to adjust the frequency phase difference between the local clock and the PPS second pulse. The time difference correction unit is used to adjust the local clock using the receiver clock difference.

[0011] As a further technical solution, a distribution and amplification unit is also included, which is used to distribute and amplify the synchronization signal and then send it to the user interface unit after the multi-channel time synchronization terminal completes the time synchronization.

[0012] As a further technical solution, the multi-channel output module includes a distributor and an amplifier, the distributor is used to convert one-channel PPS signal into multiple-channel PPS signals, and the amplifier is used to amplify the PPS signal.

[0013] As a further technical solution, the user interface unit includes a UART interface, a SPI interface or an Ethernet interface.

[0014] As a further technical solution, a power supply module is also included to provide 3.3V, 5.0V and 12.0V DC voltages to the multi-channel time synchronization terminals.

[0015] As a further technical solution, the Beidou receiver includes an antenna, a radio frequency front end, a demodulator and an ARM controller.

[0016] Compared with the prior art, the beneficial effects of the utility model are:

[0017] The utility model utilizes a satellite receiver to receive B1C signals and PPS signals, obtains a receiver clock error by comparing the two, and uses the receiver clock error to adjust a local clock to achieve PPS time delay correction, thereby achieving time synchronization.

[0018] The utility model provides a multi-channel PPS output function, and provides synchronization signals for each module in the distributed system, so that even a spatially dispersed system can achieve time unification and precise synchronization. This has great application value and research significance for complex systems that require strict time control. Through the application of the utility model, the overall performance and reliability of the system can be significantly improved, while reducing the investment of time and cost, and has broad market prospects and application potential. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the embodiments of the utility model or the technical solutions in the prior art, a brief introduction will be given below to the drawings used in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the utility model. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0020] Figure 1 A schematic diagram of the principle of a multi-channel time synchronization terminal based on Beidou satellite signals provided in an embodiment of the utility model.

[0021] Figure 2 A schematic diagram of the structure of a multi-channel time synchronization terminal based on Beidou satellite signals provided in an embodiment of the utility model. DETAILED DESCRIPTION

[0022] The utility model aims at the problem of inconsistent local clocks caused by environmental differences and provides a multi-channel time synchronization terminal, which uses a satellite receiver to receive B1C signals and PPS signals to obtain the receiver clock, and then uses the receiver clock to calibrate the local clock to achieve time synchronization, and through the multi-channel PPS output function, provides synchronization signals for various modules of the distributed system, thereby achieving time unification and precise synchronization of the distributed system.

[0023] The terms "including" and "having" and any variations thereof in the specification and claims of the present invention and the above-mentioned drawings are intended to cover non-exclusive inclusions. For example, a process, method, system, product or apparatus comprising a series of steps or units is not necessarily limited to the steps or units clearly listed, but may include other steps or units that are not clearly listed or are inherent to these processes, methods, products or apparatuses.

[0024] In order to make the purpose, technical scheme and advantages of the embodiment of the utility model clearer, the technical scheme in the embodiment of the utility model will be clearly and completely described below in conjunction with the drawings in the embodiment of the utility model. Obviously, the described embodiment is a part of the embodiment of the utility model, not all of the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model. In addition, the technical features in the various embodiments or single embodiments provided by the utility model are arbitrarily combined with each other to form a new technical solution. This combination is not subject to the constraints of the sequence of steps and / or the structural composition mode, but must be based on the ability of ordinary technicians in this field to achieve. When the combination of technical solutions is contradictory or cannot be achieved, it should be considered that this combination of technical solutions does not exist and is not within the scope of protection required by the utility model.

[0025] The utility model embodiment provides a multi-channel time synchronization terminal based on Beidou satellite signals, such as Figure 1 As shown, it includes a satellite receiver, a PPS receiving circuit, a time synchronization controller and a multi-channel output module. The satellite receiver is used to receive the B1C signal of the Beidou satellite, the PPS receiving circuit is used to generate the PPS signal using the received satellite signal, the time synchronization controller is used to compare the time information of the B1C signal with the time information of the PPS signal to obtain the receiver clock difference, and adjust the local clock according to the receiver clock difference to output the time synchronization signal; the multi-channel output module is used to output multiple PPS signals.

[0026] The terminal provided in the embodiment of the utility model realizes time synchronization of multiple devices and sensors by receiving Beidou B1C signal and PPS second pulse signal, ensuring that data is synchronized under a unified time reference.

[0027] like Figure 2 As shown, the satellite receiver is used to receive the signal of Beidou satellite and parse out the B1C signal and PPS signal. The satellite receiver can adopt existing commercially available equipment, generally including antenna, RF front end, demodulator and ARM controller. The ARM controller also has built-in ephemeris data for positioning satellites.

[0028] The satellite receiver processes the received satellite signals, demodulates and extracts navigation data and time information. The navigation data includes the satellite's position, speed, clock deviation, etc., while the time information includes the exact time when the satellite sends the signal.

[0029] After the timing signal transmitted by the Beidou navigation satellite is received by the Beidou satellite receiver, the received signal is processed by mixing technology to obtain an intermediate frequency signal with a lower frequency than the received signal. Finally, the Beidou satellite data and synchronization signal can be obtained by operating the intermediate frequency signal after processing, and the high-precision time information and PPS second pulse signal are output. The embodiment of the utility model uses a satellite receiver to receive satellite signals. The specific analysis process of the satellite signal can be implemented using existing mature technologies. It is not the focus of the embodiment of the utility model and will not be described in detail here.

[0030] The PPS receiving circuit includes a constant temperature crystal oscillator and a frequency divider. The constant temperature crystal oscillator is used to provide a local clock and generate a PPS signal, and the frequency divider is used to divide the generated PPS signal. The constant temperature crystal oscillator has high precision and stability, and can ensure that the clock signal meets the high standard requirements of time synchronization. In practical applications, a crystal oscillator or a temperature compensated crystal oscillator (TXCO) can also be used to generate the clock signal of the device. For high-precision applications, the internal clock uses a temperature compensated crystal oscillator. If the temperature changes, the voltage control is adjusted according to the temperature curve to ensure that the crystal oscillator can work stably at different temperatures.

[0031] The PPS signal represents the reproduced satellite time, which has a certain delay with the actual satellite time. The satellite receiver transmits the B1C signal and the PPS signal to the IO port of the FPGA through the serial port, and the measurement unit of the FPGA compares the transmitted B1C signal and the PPS second pulse signal to obtain the receiver clock error. The embodiment of the utility model adjusts the local clock according to the receiver clock error so that the clock error is kept at 0, thereby achieving synchronization between the local clock and the satellite clock.

[0032] In the embodiment of the utility model, the time synchronization control method is to obtain the receiver clock difference by comparing the B1C signal and the PPS second pulse signal, and the receiver clock difference is transmitted to the MCU. The MCU uses the Kalman filter algorithm to adjust the constant temperature crystal oscillator, and then uses the receiver clock difference to adjust the local clock to achieve synchronization between the local clock and the satellite clock.

[0033] The embodiment of the utility model adopts a high-precision PPS receiving circuit to accurately detect and count the edges of the pulse signal per second. Preferably, a synchronous counter is used to count and synchronize the second pulse of the Beidou satellite receiver, a comparator is used to determine the difference between the local clock and the second pulse of the timing service, and a 16-bit DAC is used to adjust the voltage-controlled constant temperature crystal oscillator through multi-order filtering.

[0034] Preferably, the frequency of the constant temperature crystal oscillator is 10 Hz. The embodiment of the utility model uses a voltage-controlled constant temperature crystal oscillator with a daily aging rate of 0.3 ppb, model TM1211, and the timing accuracy can reach 25.92 us 24 hours after the timing signal is lost.

[0035] The time synchronization controller of the embodiment of the utility model is designed based on FPGA chip. Specifically, based on FPGA, parallel processing and pipeline design ideas are adopted to realize PPS timing delay correction and multi-channel PPS signal output.

[0036] Furthermore, the embodiment of the utility model adopts Intel Cyclone IV series FPGA to design the time synchronization controller. Preferably, Cyclone IV E series FPGA model EP4CE22I7 can be selected as the main control chip of the time synchronization controller.

[0037] Generally speaking, FPGA is divided into several banks, which is mainly done to improve flexibility. In the embodiment of the utility model, bank1-bank4 of FPGA is mainly used for hardware design.

[0038] BANK1 is mainly used to connect the FLASH chip and store data in the FLASH chip. BANK2 is used to receive the B1C signal and PPS signal transmitted to the FPGA by the external module, and at the same time receive the clock output by the external local clock (provided by the constant temperature crystal oscillator) to the FPGA for use. BANK3 and BANK4 provide interfaces for the SPI protocol and the UART protocol. The SPI protocol is used to connect other devices with SPI transmission function, and transmit some data parameters through the SPI protocol. The satellite signal UART serial port is used to send and receive the Beidou time code signal transmitted from ARM.

[0039] Specifically, the B1C signal and PPS signal of the Beidou satellite are input into the FPGA chip through the IO port, and the synchronization signal after time synchronization is output to the multi-channel output module through the IO port. The SPI sending and receiving module is implemented using the IO port. As the part of the chip connecting the external circuit, the quality of each signal can be optimized by setting the electrical rules.

[0040] It is well known that the frequency output by the constant temperature crystal oscillator has the characteristics of short-term instability, the output frequency of the crystal oscillator will be disturbed by noise, and the Beidou time code receiver will also produce irregular jitter when receiving the PPS second pulse signal output by the Beidou navigation satellite. These phenomena will make the calculated frequency phase difference data have a high uncertainty. The Kalman filter can minimize the error by adjusting the relevant parameters of the overall system model, so that the error between the data actually tested by the system and the data predicted by the system is reduced to an acceptable range for the system. Kalman filtering of the phase difference is completed in the STM32F103RCT6 chip. The embodiment of the utility model is implemented using the existing mature Kalman filter algorithm. The specific algorithm will not be repeated here. What this embodiment does is to load the existing mature Kalman filter algorithm into the chip for calling.

[0041] Furthermore, a 16-bit DAC is used to adjust the voltage-controlled constant temperature crystal oscillator through filtering to adjust the local clock, complete the time difference correction, and obtain the time synchronization signal.

[0042] Preferably, the FPGA chip is integrated with a synchronous counter, a comparator, an MCU, a filtering unit and a time difference correction unit, wherein the synchronous counter is used to count and synchronize the PPS second pulses, the comparator is used to compare the time difference between the B1C signal and the PPS signal to obtain the receiver clock difference; the MCU is used to modulate the PPS signal; the filtering unit is used to adjust the frequency phase difference between the local clock and the PPS second pulse; and the time difference correction unit is used to adjust the local clock using the receiver clock difference.

[0043] The time synchronization controller compares and calibrates the time information in the received B1C signal with the time information in the PPS signal to adjust the clock signal of the device and achieve synchronization with external events.

[0044] In the design process of the time synchronization controller, a modulation program is set in the MCU to modulate the PPS signal. The modulation program can be implemented using an existing program. What this embodiment does is to load the existing mature modulation program into the chip for calling.

[0045] As a preferred embodiment of the utility model, the time synchronization terminal provided by the embodiment of the utility model also includes a multi-channel output module, which can also be called a distribution and amplification unit, which is used to distribute and amplify the synchronization signal and send it to the user interface unit after the multi-channel time synchronization terminal completes time synchronization.

[0046] It should be noted that the external signal output includes the corrected time code output and multi-channel PPS output, which are used for synchronization with other mainstream devices. The SPI sending and receiving module plays a key role in this process, which is used for the input of Beidou signals and the output of time code and multi-channel PPS.

[0047] The multi-channel output module includes a distributor and an amplifier. The distributor is used to convert one-channel PPS signal into multiple-channel PPS signals, and the amplifier is used to amplify the PPS signal.

[0048] The user interface unit includes a UART interface, an SPI interface or an Ethernet interface. The user interface unit provides interfaces for communicating and exchanging data with other devices or systems, and these interfaces are used to transmit synchronized time information and data.

[0049] As a preferred embodiment of the present invention, the time synchronization terminal provided in the embodiment of the present invention also includes a power supply module, which is used to provide 3.3V, 5.0V, and 12.0V DC voltages to the multi-channel time synchronization terminals. An effective power management system ensures stable operation and low power consumption of the module, adapts to different power input conditions, and ensures reliability when transmitting synchronized time and data.

[0050] In summary, the embodiment of the utility model discloses a multi-channel time synchronization terminal hardware design based on Beidou satellite signals, aiming to solve the problem of inconsistent time references between devices in high-precision applications. The embodiment of the utility model has the following advantages:

[0051] The embodiment of the utility model realizes a high-precision, multi-channel output time synchronization terminal, which has low cost and stable signals and is suitable for distributed application scenarios requiring strict time synchronization.

[0052] The embodiment of the utility model utilizes the B1C signal and the PPS second pulse signal of the Beidou satellite to achieve time synchronization through FPGA, thereby ensuring the consistency of time among multiple devices.

[0053] The embodiment of the utility model adopts a constant temperature crystal oscillator as a clock source to improve the stability and accuracy of the clock signal.

[0054] The embodiment of the utility model realizes the input of Beidou signal and the output of time code and multi-channel PPS signal through SPI sending and receiving modules, thus meeting the high-precision requirements of modern equipment for time synchronization.

[0055] Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the utility model, rather than to limit it. Although the utility model has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solution recorded in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solution from the technical solution of the embodiments of the utility model.

Claims

1. A multi-channel time synchronization terminal based on Beidou satellite signals, characterized in that: It includes a satellite receiver, a PPS receiving circuit, a time synchronization controller and a multi-channel output module; wherein the satellite receiver is used to receive the B1C signal of the Beidou satellite, the PPS receiving circuit is used to generate the PPS signal using the received satellite signal, the time synchronization controller is used to compare the time information of the B1C signal with the time information of the PPS signal to obtain the receiver clock difference, and adjust the local clock according to the receiver clock difference to output the time synchronization signal; the multi-channel output module is used to output multiple PPS signals.

2. According to claim 1, a multi-channel time synchronization terminal based on Beidou satellite signals is characterized in that: The PPS receiving circuit includes a constant temperature crystal oscillator and a frequency divider. The constant temperature crystal oscillator is used to provide a local clock and generate a PPS signal, and the frequency divider is used to divide the frequency of the generated PPS signal.

3. According to claim 2, a multi-channel time synchronization terminal based on Beidou satellite signals is characterized in that: The time synchronization controller is designed based on FPGA chip.

4. According to claim 3, a multi-channel time synchronization terminal based on Beidou satellite signals is characterized in that: The FPGA chip integrates a synchronous counter, a comparator, an MCU, a filtering unit and a time difference correction unit. The synchronous counter is used to count and synchronize the PPS second pulses. The comparator is used to compare the time difference between the B1C signal and the PPS signal to obtain the receiver clock difference. The MCU is used to modulate the PPS signal. The filtering unit is used to adjust the frequency phase difference between the local clock and the PPS second pulse. The time difference correction unit is used to adjust the local clock using the receiver clock difference.

5. The multi-channel time synchronization terminal based on Beidou satellite signals according to claim 1, characterized in that: It also includes a distribution and amplification unit, which is used to distribute and amplify the synchronization signal and then send it to the user interface unit after the multi-channel time synchronization terminal completes the time synchronization.

6. The multi-channel time synchronization terminal based on Beidou satellite signals according to claim 5, characterized in that: The multi-channel output module includes a distributor and an amplifier. The distributor is used to convert one-channel PPS signal into multiple-channel PPS signals, and the amplifier is used to amplify the PPS signal.

7. The multi-channel time synchronization terminal based on Beidou satellite signals according to claim 5, characterized in that: The user interface unit includes a UART interface, a SPI interface or an Ethernet interface.

8. The multi-channel time synchronization terminal based on Beidou satellite signals according to claim 1, characterized in that: It also includes a power supply module for providing 3.3V, 5.0V, and 12.0V DC voltages to the multi-channel time synchronization terminals.

9. The multi-channel time synchronization terminal based on Beidou satellite signals according to claim 1, characterized in that: The satellite receiver includes an antenna, a radio frequency front end, a demodulator and an ARM controller.

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