Semiconductor laser and packaging structure

By designing the barrier structure and accommodation slot in the semiconductor laser, the problems of solder overflow and leakage channels are solved, and the reliability and life of the semiconductor laser are improved.

CN222839232UActive Publication Date: 2025-05-06SUZHOU GANBRIGHT OPTOELECTRONIC TECHNOLOGY CO LTD
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Patent Information

Application Number
CN202421278055.4
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-06-05
Publication Date
2025-05-06
Estimated Expiration
2034-06-05

AI Technical Summary

Technical Problem

The semiconductor laser has non-radiative recombination loss and free carrier absorption in the active region, resulting in heat accumulation, material band gap width becomes smaller, laser wavelength redshift, efficiency and power decrease, threshold current increases, affecting its life and reliability.

Method used

A semiconductor laser is designed, including a semiconductor substrate layer, a main structure and a barrier structure. The barrier structure is located on both sides of the main structure along the slow axis direction and has a receiving groove to prevent solder overflow, reduce the risk of solder contacting the semiconductor substrate layer, and reduce the formation of leakage channels.

Benefits of technology

Through the design of the barrier structure, the amount of solder spillage is reduced, the solder contacts the sidewall surface of the semiconductor substrate layer is avoided, the risk of leakage channels is reduced, and the reliability and life of the semiconductor laser is improved.

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Abstract

The utility model provides a semiconductor laser and a packaging structure, and the semiconductor laser comprises a semiconductor substrate layer; the main structure and the blocking structure are located on the same side of the semiconductor substrate layer in the fast axis direction; wherein the main structure comprises a first limiting layer, a first waveguide layer, an active layer, a second waveguide layer and a second limiting layer which are stacked; wherein the blocking structures are located on the two sides of the main structure in the slow axis direction, containing grooves are formed between the blocking structures and the main structure, and the electric leakage risk of the semiconductor laser is reduced.
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Description

Technical Field

[0001] The utility model relates to the technical field of semiconductors, in particular to a semiconductor laser and a packaging structure. Background Art

[0002] Gallium nitride (GaN) semiconductor lasers have the characteristics of monochromaticity, high efficiency, high power density, good directionality, low cost, small size, and a spectral range covering the entire near-infrared, visible light and ultraviolet bands. They are an indispensable new type of semiconductor high-efficiency light source for strategic emerging industries such as laser display, laser lighting, laser direct writing, laser processing, and visible light communications.

[0003] Although semiconductor lasers have high electro-optical conversion efficiency, there are non-radiative recombination losses and free carrier absorption in the active region of semiconductor lasers, which will generate a large amount of heat during operation. At the same time, the resistance of each layer of material will also generate Joule heat, which causes a large part of the electrical energy to be converted into thermal energy. In addition, the thermal conductivity of the semiconductor laser material is low, and the heat is difficult to conduct away quickly, resulting in an increase in the temperature of the active region, a decrease in the bandgap width of the active region material, and a series of problems such as red shift of the lasing wavelength, reduced efficiency, reduced power, and increased threshold current, which seriously affect the life and reliability of the semiconductor laser.

[0004] In order to bring the active area of ​​the semiconductor laser closer to the heat sink, reduce the heat transfer path, and facilitate faster heat transfer, a flip-chip packaging structure with the chip P side facing down is generally used, and the semiconductor laser is attached to the heat sink using solder such as gold tin. Utility Model Content

[0005] The present application provides a semiconductor laser and a manufacturing method thereof, a packaging structure and a manufacturing method thereof, which reduce the risk of leakage.

[0006] In order to solve the above technical problems, the utility model provides a semiconductor laser, comprising: a semiconductor substrate layer; a main structure and a blocking structure, which are located on the same side of the semiconductor substrate layer along the fast axis direction; wherein the main structure comprises a stacked first limiting layer, a first waveguide layer, an active layer, a second waveguide layer and a second limiting layer; wherein the blocking structure is located on both sides of the main structure along the slow axis direction, and an accommodating groove is provided between the blocking structure and the main structure.

[0007] Optionally, the barrier structure is a single-layer structure.

[0008] Optionally, the barrier structure is a multi-layer structure.

[0009] Optionally, the active layer is located on a side of the first limiting layer away from the semiconductor substrate layer; the first waveguide layer is located between the active layer and the first limiting layer; wherein the blocking structure comprises: a first blocking layer and a second blocking layer, the second blocking layer is located on a side of the first blocking layer away from the semiconductor substrate layer; the material of the first blocking layer is the same as that of the first limiting layer; the material of the second blocking layer is the same as that of the first waveguide layer.

[0010] Optionally, the main structure also includes: a first groove and a second groove arranged along the slow axis direction in the second confinement layer, and the main structure between the first groove and the second groove constitutes a ridge region; the semiconductor laser also includes: a passivation layer, located on the inner wall of the accommodating groove, the surface of the blocking structure, the side wall surface of the main structure, the inner wall of the first groove and the second groove, and the surface of the semiconductor substrate layer on the side of the blocking structure facing away from the main structure.

[0011] Optionally, the thickness of the passivation layer is 0.002 to 0.4 times the distance from the blocking structure to the main structure along the slow axis direction.

[0012] Optionally, the passivation layer is a single-layer structure or a multi-layer structure.

[0013] Optionally, the spacing distance between the blocking structure and the main structure along the slow axis direction is 5 microns to 50 microns.

[0014] Optionally, the dimension of the surface of the blocking structure on one side facing away from the semiconductor substrate layer along the slow axis direction is smaller than the dimension of the surface of the blocking structure on one side facing the semiconductor substrate layer along the slow axis direction; or, the dimension of the surface of the blocking structure on one side facing away from the semiconductor substrate layer along the slow axis direction is greater than or equal to the dimension of the surface of the blocking structure on one side facing the semiconductor substrate layer along the slow axis direction.

[0015] Optionally, a size of the blocking structure along the fast axis direction is 500 nm to 10 micrometers, and a size of the blocking structure along the slow axis direction is 5 micrometers to 30 micrometers.

[0016] Optionally, the blocking structure includes a first region, a second region and a third region connected in sequence in the cavity length direction of the semiconductor laser; wherein the first region and the third region both extend along a straight line parallel to the cavity length direction, and the second region extends along a curve from the first region to the third region.

[0017] Optionally, the orthographic projection of the second region on the surface of the semiconductor substrate layer is in a broken line shape or a wavy shape.

[0018] Optionally, the orthographic projection of the second region on the surface of the semiconductor substrate layer is in the shape of a broken line, the second region includes a plurality of connected second sub-regions, and the acute angle between the second sub-regions and the cavity length direction is 30 degrees to 60 degrees.

[0019] Optionally, the depth of the receiving groove is 2 microns to 10 microns.

[0020] The utility model also provides a packaging structure, comprising: a heat sink; a semiconductor laser of the utility model, wherein the semiconductor laser is located on the heat sink; and the second limiting layer is located between the second waveguide layer and the heat sink.

[0021] Optionally, the semiconductor laser further includes: a first electrode layer located on a side of the second limiting layer away from the second waveguide layer; and the packaging structure further includes: a welding layer located between the first electrode layer and the heat sink.

[0022] The technical solution of this invention has the following technical effects:

[0023] The semiconductor laser and packaging structure provided by the technical solution of the utility model, the blocking structure is used to block the solder during the flip-chip welding of the semiconductor laser and the heat sink, and the overflowing solder will first fill the receiving groove, thereby reducing the amount of solder overflow and avoiding contact with the side wall surfaces on both sides of the semiconductor substrate layer in the slow axis direction, reducing the risk of forming a leakage channel and reducing the risk of short circuit of the semiconductor laser. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the specific implementation methods of the utility model or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the utility model. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0025] Figure 1 A cross-sectional schematic diagram of a semiconductor laser provided by an embodiment of the utility model;

[0026] Figure 2 A top view of a semiconductor laser provided by an embodiment of the utility model;

[0027] Figure 3 A cross-sectional schematic diagram of a packaging structure provided in one embodiment of the utility model. DETAILED DESCRIPTION

[0028] Research has found that the process of soldering a semiconductor laser inverted on a heat sink includes: setting solder on the heat sink, heating the solder until it melts, and then inverting the semiconductor laser on the solder. The front electrode layer of the semiconductor laser contacts the solder and a certain pressure is applied. Since the melted solder has good fluidity, the solder will overflow and gather on both sides of the semiconductor laser along the slow axis after being squeezed. There is no passivation layer on the side wall surfaces of the semiconductor laser along the slow axis. Once the solder contacts the side walls of the semiconductor laser along the slow axis or even the semiconductor substrate layer, a leakage channel will be formed between the front electrode layer and the semiconductor substrate layer, causing the semiconductor laser to short-circuit, seriously affecting the quality.

[0029] In order to solve the above problems, the technical solution of the utility model provides a semiconductor laser and a preparation method thereof, a packaging structure and a preparation method thereof, so as to reduce the risk of leakage.

[0030] The technical solution of the utility model will be described clearly and completely below in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments of the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0031] In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first", "second", and "third" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance.

[0032] In the description of the present utility model, it should be noted that, unless otherwise clearly specified and limited, the terms "installation", "connection" and "connection" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, it can also be the internal connection of two components, it can be a wireless connection, or it can be a wired connection. For ordinary technicians in this field, the specific meanings of the above terms in the present utility model can be understood according to specific circumstances.

[0033] In addition, the technical features involved in the different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0034] The present invention provides a semiconductor laser according to an embodiment of the present invention. Figure 1 and Figure 2 ,include:

[0035] Semiconductor substrate layer 100;

[0036] A main structure located on one side of a portion of the semiconductor substrate layer 100, the main structure comprising a stacked first confinement layer 110, a first waveguide layer 120, an active layer 130, a second waveguide layer 140 and a second confinement layer 150;

[0037] The blocking structure 180 is located on both sides of the main structure along the slow axis direction, and the blocking structure 180 and the main structure are located on the same side of the semiconductor substrate layer 100 , with an accommodating groove C between the blocking structure 180 and the main structure.

[0038] In the semiconductor laser of this embodiment, the blocking structure 180 is used to block the solder during flip-chip welding of the semiconductor laser and the heat sink. The overflowing solder will first fill the receiving groove C, thereby reducing the amount of solder overflow and avoiding contact with the side wall surfaces on both sides of the semiconductor substrate layer 100 in the slow axis direction X, thereby reducing the risk of forming a leakage channel and reducing the risk of short circuit of the semiconductor laser.

[0039] The semiconductor laser of this embodiment is an edge-emitting semiconductor laser. The active layer 130 is located on the side of the first confinement layer 110 away from the semiconductor substrate layer 100, the first waveguide layer 120 is located between the active layer 130 and the first confinement layer 110, and the second waveguide layer 140 is located between the second confinement layer 150 and the active layer 130. The main structure also includes: a first groove and a second groove arranged along the slow axis direction in the second confinement layer 150, and the main structure between the first groove and the second groove constitutes a ridge region.

[0040] The first confinement layer 110 and the first waveguide layer 120 are of the first conductivity type. The second waveguide layer 140 and the second confinement layer 150 are of the second conductivity type. The first conductivity type and the second conductivity type are opposite. For example, in one embodiment, the first conductivity type is N-type and the second conductivity type is P-type.

[0041] In one embodiment, the material of the semiconductor substrate layer 100 includes GaN, the material of the first confinement layer 110 includes N-type GaN, and the material of the second waveguide layer 140 includes N-type GaN, the material of the second confinement layer 150 includes P-type GaN, and the material of the second waveguide layer 140 includes N-type GaN.

[0042] In one embodiment, the active layer 130 is a plurality of pairs of quantum barriers and quantum wells. In one embodiment, the material of the quantum wells includes InGaN, and the material of the quantum barriers includes GaN.

[0043] In one embodiment, the first groove and the second groove extend into the second confinement layer 150 and do not extend into the second waveguide layer 140 , and the second confinement layer 150 between the first groove and the second groove constitutes a ridge region.

[0044] In another embodiment, the first groove and the second groove extend into the second confinement layer 150 and the second waveguide layer 140 , and the second confinement layer 150 and the second waveguide layer 140 between the first groove and the second groove constitute a ridge region.

[0045] In one embodiment, reference Figure 1 , the blocking structure 180 is a multi-layer structure.

[0046] In one embodiment, the blocking structure 180 includes: a first blocking layer 181 and a second blocking layer 182, wherein the second blocking layer 182 is located on a side of the first blocking layer 181 away from the semiconductor substrate layer 100; the material of the first blocking layer 181 is the same as the material of the first limiting layer 110; and the material of the second blocking layer 182 is the same as the material of the first waveguide layer 120. In this way, the blocking structure 180 can be formed in the process of forming the main structure, which simplifies the preparation process.

[0047] In another embodiment, the barrier structure 180 is a single-layer structure.

[0048] In one embodiment, the semiconductor laser further includes: a passivation layer 170, which is located on the inner wall of the receiving groove C, the surface of the blocking structure 180, the side wall surface of the main structure, the inner walls of the first groove and the second groove, and the surface of the semiconductor substrate layer 100 on the side of the blocking structure 180 facing away from the main structure.

[0049] In one embodiment, the passivation layer 170 is a single-layer structure or a multi-layer structure.

[0050] In one embodiment, the passivation layer 170 is a single-layer structure, and the material of the passivation layer 170 includes one of silicon oxide, silicon nitride, aluminum nitride, aluminum oxide, and zirconium oxide.

[0051] In another embodiment, the passivation layer 170 includes a stacked first sub-passivation layer and a second sub-passivation layer, the materials of the second sub-passivation layer and the first sub-passivation layer are different, the material of the first sub-passivation layer includes one of silicon oxide, silicon nitride, aluminum nitride, aluminum oxide and zirconium oxide, and the material of the second sub-passivation layer includes one of silicon oxide, silicon nitride, aluminum nitride, aluminum oxide and zirconium oxide.

[0052] In one embodiment, the spacing distance between the blocking structure 180 and the main structure along the slow axis direction X is 5 microns to 50 microns, such as 5 microns, 10 microns, 15 microns, 20 microns, 25 microns, 30 microns, 35 microns, 40 microns, 45 microns or 50 microns. The advantage is that the spacing distance between the blocking structure 180 and the main structure along the slow axis direction X provides a more sufficient space to accommodate the solder, better slows down the flow of the solder, the accommodating groove better accommodates part of the solder, better inhibits the solder from overflowing and contacting the sidewall surfaces on both sides of the semiconductor substrate layer 100 in the slow axis direction, and better inhibits leakage.

[0053] In one embodiment, the thickness of the passivation layer 170 is 0.002 to 0.4 times the distance from the blocking structure 180 to the main structure along the slow axis. The advantage is that the space occupied by the passivation layer 170 in the receiving groove C is not too large, so that the receiving groove C can be used to accommodate more solder.

[0054] In one embodiment, the thickness of the passivation layer 170 is 50 nm to 2000 nm, for example, 50 nm, 100 nm, 150 nm, 200 nm, 500 nm, 1000 nm, 1500 nm or 2000 nm.

[0055] In one embodiment, the dimension of the surface of the blocking structure 180 facing away from the semiconductor substrate layer 100 along the slow axis direction is equal to the dimension of the surface of the blocking structure 180 facing the semiconductor substrate layer 100 along the slow axis direction.

[0056] In another embodiment, the size of the blocking structure 180 along the slow axis direction on the side surface facing away from the semiconductor substrate layer 100 is smaller than the size of the blocking structure 180 along the slow axis direction on the side surface facing the semiconductor substrate layer 100. When the solder overflows into the receiving groove C, it can enter the receiving groove C better.

[0057] In another embodiment, a dimension of a surface of the blocking structure 180 facing away from the semiconductor substrate layer 100 along the slow axis direction is greater than a dimension of a surface of the blocking structure 180 facing the semiconductor substrate layer 100 along the slow axis direction.

[0058] In one embodiment, the size of the blocking structure 180 along the fast axis direction Z is 500 nm to 10 microns, such as 10 microns, 8 microns, 5 microns, 3 microns, 2 microns or 500 nm.

[0059] In one embodiment, the size of the blocking structure 180 along the slow axis direction X is 5 micrometers to 30 micrometers, such as 5 micrometers, 10 micrometers, 15 micrometers or 30 micrometers.

[0060] In one embodiment, reference Figure 2The blocking structure 180 includes a first area 180a, a second area 180b and a third area 180c connected in sequence in the cavity length direction Y of the semiconductor laser; wherein the first area 180a and the third area 180c both extend along a straight line parallel to the cavity length direction Y, and the second area 180b extends along a curve from the first area 180a to the third area 180c. The first area 180a and the third area 180c both extend along a straight line parallel to the cavity length direction Y, making it convenient to align when splitting a single die to form a semiconductor laser. The second area 180b extends along a curve from the first area 180a to the third area 180c, making the space between the second area 180b and the main structure more sufficient, and being able to accommodate more solder, further inhibiting the solder from overflowing and contacting the side wall surfaces on both sides of the semiconductor substrate layer 100 in the slow axis direction.

[0061] It should be noted that the cavity length direction Y is perpendicular to the slow axis direction X and perpendicular to the fast axis direction Z. The fast axis direction Z is perpendicular to the slow axis direction X. The main structure has a front cavity surface and a rear cavity surface that are relatively arranged, and the cavity length direction Y is the arrangement direction from the front cavity surface to the rear cavity surface. The light emitted by the semiconductor laser is emitted from the front cavity surface.

[0062] In one embodiment, reference Figure 2 , the orthographic projection of the second region 180b on the surface of the semiconductor substrate layer 100 is in the shape of a broken line. In other embodiments, the orthographic projection of the second region 180b on the surface of the semiconductor substrate layer 100 is in the shape of a wave.

[0063] In one embodiment, the size of the second area 180b along the cavity length direction Y is 5 to 119 times the size of the first area 180a along the cavity length direction, and the size of the second area 180b along the cavity length direction is 5 to 119 times the size of the third area 180c along the cavity length direction. This makes the space between the second area 180b and the main structure more sufficient to accommodate more solder.

[0064] In one embodiment, the sizes of the first region 180 a and the third region 180 c along the cavity length direction Y are both 20 micrometers to 100 micrometers.

[0065] In one embodiment, reference Figure 2 The orthographic projection of the second area 180b on the surface of the semiconductor substrate layer 100 is in the shape of a broken line, and the second area 180b includes a plurality of connected second sub-areas 1801, and the acute angle between the second sub-areas 1801 and the cavity length direction Y is 30 degrees to 60 degrees. This makes the space between the second area 180b and the main structure more sufficient and can accommodate more solder.

[0066] In other embodiments, the blocking structure extends along a straight line parallel to the length direction Y of the cavity.

[0067] In one embodiment, the depth of the receiving groove C is 2 micrometers to 10 micrometers, for example, 2 micrometers, 5 micrometers, 8 micrometers or 10 micrometers.

[0068] In one embodiment, the semiconductor laser further includes: a first electrode layer 160 located on a side of the second confinement layer 150 away from the second waveguide layer 140; and a second electrode layer (not shown) located on a side of the semiconductor substrate layer 100 away from the active layer 130. The first electrode layer 160 covers the surface of the ridge region.

[0069] In one embodiment, the first electrode layer 160 is a metal electrode layer, such as Ti, Pt, Au, Ni, Co, Pb, Ag or Cu. In one embodiment, the first electrode layer 160 is a transparent oxide conductive layer, such as indium tin oxide (ITO), fluorine-doped tin oxide (FTO), AZO (aluminum-doped zinc oxide), SnO2:Sb, Cd In2O4, Cd2SnO4, ZnSnO3, Zn2SnO4, Mg In2O4, Zn2In2O5, Ga InO3 or In4Sn3O 12 .

[0070] In one embodiment, the semiconductor laser further includes: a contact layer located between the first electrode layer 160 and the second confinement layer 150 , wherein the contact layer is used to reduce the contact resistance between the first electrode layer 160 and the second confinement layer 150 .

[0071] The semiconductor laser also includes: an anti-reflection film located on the front cavity surface; and a reflective film located on the back cavity surface.

[0072] Another embodiment of the present invention further provides a packaging structure, referring to Figure 3 , comprising: a heat sink 200 ; the semiconductor laser of the above embodiment, the semiconductor laser is located on the heat sink 200 ; the second confinement layer 150 is located between the second waveguide layer 140 and the heat sink 200 .

[0073] In one embodiment, the packaging structure further includes: a welding layer 210 located between the first electrode layer 160 and the heat sink 200 .

[0074] The soldering layer 210 includes a gold-tin soldering layer.

[0075] Obviously, the above embodiments are merely examples for the purpose of clear explanation, and are not intended to limit the implementation methods. For those skilled in the art, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to list all the implementation methods here. The obvious changes or modifications derived therefrom are still within the scope of protection of the invention of the utility model.

Claims

1. A semiconductor laser, characterized in that: include: Semiconductor substrate layer; The main structure and the barrier structure are located on the same side of the semiconductor substrate layer along the fast axis direction; Wherein, the main structure comprises a stacked first limiting layer, a first waveguide layer, an active layer, a second waveguide layer, and a second limiting layer; The blocking structure is located on both sides of the main structure along the slow axis direction, and an accommodating groove is provided between the blocking structure and the main structure.

2. The semiconductor laser according to claim 1, characterized in that The barrier structure is a single-layer structure or a multi-layer structure.

3. The semiconductor laser according to claim 1, characterized in that The active layer is located on a side of the first confinement layer away from the semiconductor substrate layer; the first waveguide layer is located between the active layer and the first confinement layer; The blocking structure includes: a first blocking layer and a second blocking layer, wherein the second blocking layer is located on a side of the first blocking layer away from the semiconductor substrate layer; the material of the first blocking layer is the same as that of the first limiting layer; and the material of the second blocking layer is the same as that of the first waveguide layer.

4. The semiconductor laser according to any one of claims 1 to 3, characterized in that: The main structure further comprises: a first groove and a second groove arranged along the slow axis direction in the second confinement layer, and the main structure between the first groove and the second groove constitutes a ridge region; The semiconductor laser further comprises: a passivation layer located on the inner wall of the receiving groove, the surface of the blocking structure, the side wall surface of the main structure, the inner walls of the first groove and the second groove, and the surface of the semiconductor substrate layer on the side of the blocking structure away from the main structure.

5. The semiconductor laser according to claim 4, characterized in that The thickness of the passivation layer is 0.002 to 0.4 times the distance from the blocking structure to the main structure along the slow axis direction.

6. The semiconductor laser according to claim 4, characterized in that The passivation layer is a single-layer structure or a multi-layer structure.

7. The semiconductor laser according to claim 1, characterized in that The spacing distance between the blocking structure and the main structure along the slow axis direction is 5 micrometers to 50 micrometers.

8. The semiconductor laser according to claim 1, characterized in that The dimension of the surface of the blocking structure on one side facing away from the semiconductor substrate layer along the slow axis direction is smaller than the dimension of the surface of the blocking structure on one side facing the semiconductor substrate layer along the slow axis direction; Alternatively, a dimension of a surface of the blocking structure on one side facing away from the semiconductor substrate layer along the slow axis direction is greater than or equal to a dimension of a surface of the blocking structure on one side facing the semiconductor substrate layer along the slow axis direction.

9. The semiconductor laser according to claim 1, characterized in that The size of the blocking structure along the fast axis direction is 500 nm to 10 micrometers, and the size of the blocking structure along the slow axis direction is 5 micrometers to 30 micrometers.

10. The semiconductor laser according to claim 1, characterized in that The blocking structure includes a first region, a second region and a third region connected in sequence in the cavity length direction of the semiconductor laser; wherein the first region and the third region both extend along a straight line parallel to the cavity length direction, and the second region extends along a curve from the first region to the third region.

11. The semiconductor laser according to claim 10, characterized in that The orthographic projection of the second region on the surface of the semiconductor substrate layer is in a zigzag or wavy shape.

12. The semiconductor laser according to claim 11, characterized in that The orthographic projection of the second region on the surface of the semiconductor substrate layer is in the shape of a broken line. The second region includes a plurality of connected second sub-regions. The acute angle between the second sub-region and the cavity length direction is 30 degrees to 60 degrees.

13. The semiconductor laser according to claim 1, characterized in that The depth of the receiving groove is 2 microns to 10 microns.

14. A packaging structure, characterized in that: include: Heat sink; The semiconductor laser according to any one of claims 1 to 13, wherein the semiconductor laser is located on the heat sink; The second confinement layer is located between the second waveguide layer and the heat sink.

15. The packaging structure according to claim 14, characterized in that: The semiconductor laser further comprises: a first electrode layer, located on a side of the second confinement layer away from the second waveguide layer; The packaging structure further includes: a welding layer located between the first electrode layer and the heat sink.