Synchronous pulse electrocardio data acquisition system based on STM32

Abstract

The utility model discloses an STM32-based pulse electrocardio data synchronous acquisition system, which comprises a main control module, an electrocardio signal acquisition module, a pulse signal acquisition module and a power supply management module, and is characterized in that the main control module comprises a controller, a crystal oscillator circuit, a reset circuit, an ST-LINK downloading circuit and a BOOT circuit; the electrocardiosignal acquisition module comprises a dry electrode, a fingertip electrocardio filter circuit and an electrocardio processing chip which are connected in sequence, and the signal output end of the electrocardio processing chip is connected with the signal input end of the controller; the pulse signal acquisition module comprises a green light-emitting diode, a light receiver, a filter circuit and an amplification circuit which are connected in sequence, and the power management module supplies power to the main control module, the electrocardiosignal acquisition module and the pulse signal acquisition module. The electrocardiosignal and pulse signal synchronous acquisition device can realize synchronous acquisition of electrocardiosignals and pulse signals, so that the acquisition process is simpler and quicker.

Description

Technical Field

[0001] The utility model belongs to the technical field of physiological signal processing and relates to a pulse electrocardiogram data synchronous acquisition system based on STM32. Background Art

[0002] At present, biometric identification technology based on physiological characteristics such as fingerprints and faces has been widely used in many fields. However, with the continuous development of intelligent Internet of Things and artificial intelligence technology, while promoting the maturity of these biometric identification technologies, it also indirectly provides the possibility for the realization of fake fingerprints and fake faces, increasing the risk of personal information being stolen, causing great damage and aggression to information security systems, and posing great security risks.

[0003] Pulse and ECG signals have unique waveform characteristics that vary from person to person, and are therefore more anti-counterfeit than other biometric modalities. After years of research by domestic and foreign scholars and teams, the feasibility of using these two signals in the research of biometric identity recognition technology has been demonstrated in many ways, which has led to the need for hardware to collect data from these two signals.

[0004] The multimodal data set combining pulse and ECG contains two kinds of biometric information at the same time. Compared with single-modal data, it is expected to realize the recognition of individual identity with higher robustness, smaller errors, stronger anti-interference ability, and more accurate recognition effect. Therefore, identity recognition technology under multimodal data fusion has also become one of the current research breakthroughs in biometric technology. Therefore, how to efficiently and conveniently obtain multimodal data of pulse and ECG synchronously at the signal acquisition end, so as to provide data support for the subsequent research on multimodal identity recognition technology, has become the focus of current research.

[0005] However, the pulse and ECG acquisition modules in the prior art are all single-mode signal acquisition. If you want to obtain pulse and ECG signals, you need to collect them separately on their respective signal acquisition modules, and the function of synchronous acquisition of pulse and ECG signals cannot be realized. For example, Chinese patent CN202110201121.2 discloses a multi-channel pulse acquisition system, including a signal acquisition unit, a signal processing unit, and a signal integration unit. Although it can avoid the measurement error caused by collecting pulse wave signals through a single acquisition channel, it can only realize pulse acquisition, and cannot realize synchronous acquisition of ECG signals.

[0006] The STM32 series MCU not only has powerful processing capabilities, but also has rich peripheral interfaces and low power consumption. Its high-performance processor and precise clock system can effectively capture and process the waveform characteristics of pulse ECG signals. Therefore, the STM32 series MCU is very suitable as a hardware platform for pulse ECG signal acquisition and processing. Utility Model Content

[0007] The utility model aims to provide a pulse electrocardiogram data synchronous acquisition system based on STM32 to address the deficiencies of the prior art, so as to achieve synchronous acquisition of pulse and electrocardiogram data.

[0008] A pulse ECG data synchronous acquisition system based on STM32, including a main control module, an ECG signal acquisition module, a pulse signal acquisition module, and a power management module;

[0009] The main control module includes a controller, a crystal oscillator circuit, a reset circuit, an ST-LINK download circuit and a BOOT circuit; the controller adopts an STM32 single-chip microcomputer; the crystal oscillator circuit, the reset circuit, the ST-LINK download circuit and the BOOT circuit are respectively connected to the controller;

[0010] The ECG signal acquisition module comprises a dry electrode, a fingertip ECG filter circuit and an ECG processing chip connected in sequence, and the signal output end of the ECG processing chip is connected to the signal input end of the controller;

[0011] The pulse signal acquisition module comprises a green light emitting diode, a light receiver, a filtering circuit, and an amplifying circuit connected in sequence, wherein the signal output end of the amplifying circuit is connected to the signal input end of the controller;

[0012] The power management module supplies power to the main control module, the electrocardiogram signal acquisition module, and the pulse signal acquisition module.

[0013] Furthermore, the power management module includes a built-in power supply, a voltage stabilization circuit and a charging management circuit.

[0014] Furthermore, in the main control module, the controller is the core of the system and is responsible for processing the pulse ECG signal. The crystal oscillator circuit is responsible for generating a stable clock signal and providing the required timing reference for the controller and the entire system. To ensure the stability and accuracy of the system clock, an 8MHz high-speed external crystal oscillator and a 32.768kHz low-speed crystal oscillator are selected. The reset circuit is responsible for restoring the system to its initial state when an abnormality occurs in the system or a restart is required. The software program of the entire system is burned into the controller through the ST-LINK download circuit. The BOOT circuit is mainly used to start and execute the boot loader, ensuring that the loader can be correctly booted when the system is powered on, and providing the necessary foundation and environment for the execution of the main program.

[0015] Furthermore, in the ECG signal acquisition module, the number of dry electrodes is two, including the left dry electrode ECG_P and the right dry electrode ECG_N; the fingertip ECG filter circuit includes two high-pass filters, which are responsible for filtering out the baseline drift and low-frequency components in the signal. The filtered signal is sent to the ECG processing chip, and after internal processing of the chip, it is output in the form of a serial port data stream, which contains ECG data information. The left dry electrode ECG_P and the right dry electrode ECG_N are respectively connected to one end of the capacitor C201 and the capacitor C202. The other ends of the capacitor C201 and the capacitor C202 are respectively connected to one end of the resistor R201 and the resistor R202. The other ends of the resistor R201 and the resistor R202 are both grounded. The other ends of the resistors C201 and C202 are connected to the SEP pin and the SEN pin of the ECG processing chip as the output ends of the ECG simulation signal. The TX pin of the ECG processing chip is used as the serial data stream output terminal to send the processed ECG data to the controller through the USART serial port.

[0016] Furthermore, the pulse signal acquisition module is arranged inside the right dry electrode.

[0017] Furthermore, in the pulse signal acquisition module, the green light emitting diode is responsible for providing a green light beam for subsequent detection of transmittance. When the green light beam passes through the peripheral blood vessels of the human body, the transmittance of this light beam changes due to the change in the volume of arterial pulsation and congestion. The optical receiver receives the light reflected by the human tissue and converts it into an electrical signal. After the electrical signal is low-pass filtered by the low-pass filter and amplified by the signal of the amplifier circuit, the required relatively clean pulse signal is obtained. In the amplifier circuit, the VOUT pin of the operational amplifier is the final output end of the pulse signal acquisition module, which outputs an analog signal and sends it to the ADC analog-to-digital converter of the controller for subsequent processing.

[0018] Furthermore, in the power management module, the voltage stabilizing circuit is responsible for supplying power to the ECG signal acquisition module, the pulse signal acquisition module and the main control module. The charging management circuit provides charging management for the built-in power supply.

[0019] Furthermore, the voltage stabilizing circuit includes a two-wire connector and a voltage stabilizing chip. The VIN pin of the voltage stabilizing chip is connected to capacitor C401, capacitor C402 and the first terminal of the two-wire connector. The VOUT pin of the voltage stabilizing chip is connected to capacitor C403, capacitor C404 and one end of resistor R401. The second terminal of the two-wire connector, capacitor C401, capacitor C402, capacitor C403 and the other end of capacitor C404 are all grounded. The other end of resistor R401 is connected to the positive terminal of the green light-emitting diode PWR-G. The negative terminal of the green light-emitting diode PWR-G is grounded. The two-wire connector is connected to a built-in power supply 3.7V lithium battery. The VOUT pin of the voltage stabilizing chip is the 3.3V voltage output terminal of the voltage stabilizing circuit.

[0020] Further, the charging management circuit includes a USB plug-in and a charging management chip. The VCC and CE pins of the charging management chip are connected to resistor R501, resistor R502, resistor R503, capacitor C501 and one end of capacitor C502. The first wiring terminal of the USB plug-in is connected to the other end of resistor R501. The fifth wiring terminal of the USB plug-in is grounded, and the remaining wiring terminals are suspended. The STDBY and CHRG pins of the charging management chip are respectively connected to the negative ends of the green light-emitting diode STDBY-G and the red light-emitting diode CHRG-R. The other ends of resistors R502 and R503 are respectively connected to the positive ends of the red light-emitting diode CHRG-R and the green light-emitting diode STDBY-G. The TEMP and GND pins of the charging management chip are both grounded. The PROG pin of the charging management chip is connected to one end of resistor R504. The other end of resistor R504 is grounded. The BAT pin of the charging management chip is connected to one end of capacitor C503 and capacitor C504. The other ends of capacitors C503 and capacitor C504 are both grounded. The BAT pin of the charging management chip is the output end of the charging circuit and is connected to the first terminal of the two-wire connector in the voltage stabilizing circuit.

[0021] Furthermore, the controller is STM32F103C8T6 of STMicroelectronics. The ECG processing chip is BMD101. The optical receiver is APDS-9008. The operational amplifier in the amplifier circuit is MCP6001.

[0022] Furthermore, the model of the voltage stabilizing chip is RT9183. The model of the charging management chip is TP4056. The built-in power supply is a 3.7V, 4AH lithium-ion rechargeable battery.

[0023] The beneficial effects of the utility model are:

[0024] The utility model provides a pulse ECG data synchronous acquisition system based on STM32, which includes an ECG signal acquisition module and a pulse signal acquisition module, wherein the pulse signal acquisition module is arranged inside the right dry electrode in the ECG signal acquisition module; when acquiring signals, the left and right hands of the subject are placed on the left and right dry electrodes respectively, and the ECG signal can be obtained. At the same time, the pulse signal acquisition module in the right dry electrode receives the light source reflected by the right hand, thereby obtaining the pulse signal, thereby realizing the synchronous acquisition of ECG and pulse modal data, and the acquisition process is simple and efficient. The utility model is powered by a battery and has a charging function, which can be used mobile without plugging in a line, and is quick and convenient. The multimodal signal data received by the controller can provide data support for subsequent multimodal identity recognition. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 This is a schematic diagram of the pulse and ECG signal synchronous acquisition terminal of the utility model;

[0026] Figure 2 This is a system structure diagram of the utility model;

[0027] Figure 3 This is the circuit schematic diagram of the main control module in the utility model;

[0028] Figure 4 This is the circuit schematic diagram of the central electrical signal acquisition module of the utility model;

[0029] Figure 5 This is a circuit schematic diagram of the pulse signal acquisition module in the utility model;

[0030] Figure 6 This is a circuit schematic diagram of a voltage stabilizing circuit in a power management module in the utility model;

[0031] Figure 7 This is a circuit schematic diagram of the charging management circuit in the power management module of the utility model.

[0032] Markings in the figure: 1, left dry electrode; 2, right dry electrode; 3, through hole; 4, green light-emitting diode; 5, light receiver. DETAILED DESCRIPTION

[0033] The utility model is further described below in conjunction with the accompanying drawings.

[0034] like Figure 1 As shown, it is a schematic diagram of synchronous acquisition realized by the utility model. The acquisition end of the utility model includes a left dry electrode 1, a right dry electrode 2, a green light emitting diode 4 and a light receiver 5. A through hole 3 is opened on the right dry electrode 2, and the green light emitting diode 4 is fixedly arranged at the bottom of the right dry electrode 2. The light receiver 5 is arranged on the surface of the right dry electrode 2 and is located directly below the through hole 3. During acquisition, the left and right index finger pulps of the subject are placed on the left dry electrode 1 and the right dry electrode 2 respectively, and the right index finger pulp completely covers the through hole 3 so that the green light beam will not overflow. At this time, the left dry electrode 1 and the right dry electrode 2 acquire the ECG signal. At the same time, the light receiver 5 embedded in the right dry electrode 2 can receive the light source reflected by the right hand, thereby obtaining the pulse signal, and realizing the synchronous acquisition of the two modal data of ECG and pulse.

[0035] like Figure 2As shown in the figure, it is a system structure block diagram. The crystal oscillator circuit, reset circuit, ST-LINK circuit, BOOT circuit and STM32 microcontroller together constitute the main control module. The ECG signal acquisition module is connected to the controller STM32 through the USART serial port communication method. The ECG signal enters the fingertip ECG filter circuit from the dry electrode ECG_P and the dry electrode ECG_N for filtering, and then is sent to the BMD101 ECG processing chip for processing. The ECG information is sent to the controller STM32 in the form of a serial port data stream, and the serial port baud rate is set to 57600bps. After the finger presses the green LED, the optical receiver receives the reflected light and converts it into a pulse electrical signal. After low-pass filtering and operational amplification, the pulse electrical signal is sent to the controller STM32 in the form of an analog signal. The built-in ADC digital-to-analog converter of the controller STM32 converts the analog signal into a digital signal. The power management module includes a voltage stabilization circuit, a charging management circuit and a built-in power supply. The voltage regulator circuit steps down and stabilizes the 3.7V of the built-in power supply to reach a 3.3V output, thereby providing power to the entire system. The charging management circuit uses the built-in charging management chip to achieve intelligent management of the charging of the built-in power supply.

[0036] like Figure 3As shown in the figure, it is the circuit schematic diagram of the main control module. The model of the crystal oscillator circuit to the controller U1 is STM32F103C8T6, which is used to provide a high-precision system clock. The ST-LINK circuit enables the program to be burned into the controller through this circuit. The reset circuit is responsible for restoring the system to its initial state when an abnormality occurs in the system or a restart is required. The BOOT circuit is mainly used to boot the startup and execution of the program loaded on the controller. The built-in ADC of the controller STM32F103C8T6 is a 12-bit successive approximation analog-to-digital converter. The range of the converted digital variables is 0 to 4095, which can well capture the characteristics of the pulse signal. The USART1_RX pin of the controller is responsible for receiving the serial port data stream sent by the ECG signal acquisition module and performing related processing. Specifically, the main control module includes a crystal oscillator circuit to the controller U1, capacitors C101-C105, resistors R101-R103, 3X2 6-pin pin header H1, 4-pin pin header H2, crystal oscillators Y101-Y102, and a switch SW101; the fifth pin of the crystal oscillator circuit to the controller U1 is respectively connected to one end of the capacitor C101 and one end of the crystal oscillator Y101, and the other end of the capacitor C101 is grounded; the sixth pin of the crystal oscillator circuit to the controller U1 is respectively connected to one end of the capacitor C102 and the other end of the crystal oscillator Y101, and the other end of the capacitor C102 is grounded; the twentieth pin of the crystal oscillator circuit to the controller U1 is connected to one end of the resistor R102, and the other end of the resistor R102 is connected to the 3rd pin of the 6-pin pin header H1 of 3X2, and the 1st and 2nd pins of the 6-pin pin header H1 of 3X2 are connected. Grounded, pins 5 and 6 are connected to a 3.3V voltage, pin 4 is connected to one end of a resistor R101, and the other end of the resistor R101 is connected to the 44th pin of the crystal oscillator circuit to the controller U1; the seventh pin of the crystal oscillator circuit to the controller U1 is respectively connected to one end of a capacitor C105, one end of a switch SW101, and one end of a resistor R103, the other end of the capacitor C105 and the other end of the switch SW101 are grounded, and the other end of the resistor R103 is connected to a 3.3V voltage; the 34th pin of the crystal oscillator circuit to the controller U1 is connected to pin 3 of a 4-pin pin header H2, the 37th pin of the crystal oscillator circuit to the controller U1 is connected to pin 2 of a 4-pin pin header H2, pin 1 of the 4-pin pin header H2 is grounded, and pin 4 is connected to a 3.3V voltage; the 48th pin of the crystal oscillator circuit to the controller U1 is connected to a 3.3V voltage.

[0037] like Figure 4As shown in the figure, it is the circuit schematic diagram of the ECG signal acquisition module. The ECG processing chip U2 uses BMD101. BMD101 is small in size, low in power consumption, has extremely low system noise and controllable gain, and can effectively detect biological signals. When the dry electrode ECG_P and the dry electrode ECG_N are in contact with the skin, a tiny contact resistance is formed, causing the current to flow from the skin to the dry electrode, thereby generating an ECG signal. The signal enters the fingertip ECG filter circuit, and after filtering, enters BMD101. After BMD101 processes the signal, it outputs a data stream containing ECG data and sends it to the serial port receiving end USART1_RX of the controller STM32. Specifically, the ECG signal acquisition module includes an ECG processing chip U2, capacitors C201-C203, and resistors R201-R202. The second pin of the ECG processing chip U2 is respectively connected to one end of the capacitor C201 and one end of the resistor R201, the other end of the capacitor C201 is connected to the dry electrode ECG_P, and the other end of the resistor R201 is grounded; the third pin of the ECG processing chip U2 is respectively connected to one end of the capacitor C202 and one end of the resistor R202, the other end of the capacitor C202 is connected to the dry electrode ECG_N, and the other end of the resistor R202 is grounded; the eighth pin of the ECG processing chip U2 is connected to one end of the capacitor C203 after being connected to a 3.3V voltage, and the other end of the capacitor C203 is grounded; the seventh pin of the ECG processing chip U2 is grounded; the fourth pin of the ECG processing chip U2 is used to receive data, and the seventh pin is used to output data.

[0038] like Figure 5As shown in the figure, it is the circuit schematic diagram of the pulse signal acquisition module. The green light-emitting diode LED-G emits green light with a peak wavelength of 515nm. The optical receiver U3 uses an ambient light sensor model APDS-9008 to receive the reflected light, and the peak wavelength is 565nm, which is close to the peak wavelength of green light, so it has a high sensitivity. After the optical receiver U3 converts the reflected light into an electrical signal, the signal passes through a low-pass filter and an amplifier U4 composed of an op amp MCP6001 to amplify the original millivolt-level signal by 330 times to obtain the final pulse analog signal. The output terminal VOUT of the amplifier U4 is the pulse analog signal output terminal, which is connected to the ADC digital-to-analog conversion pin of the controller STM32. The STM32 samples the analog signal sent and converts it into a digital signal. Specifically, the pulse signal acquisition module includes an optical receiver U3, an amplifier U4, a green light-emitting diode LED-G, capacitors C301-C305, and resistors R301-R306; the first pin of the optical receiver U3 is respectively connected to a 3.3V voltage and the fifth pin of the amplifier U4; the positive electrode of the green light-emitting diode LED-G inputs a 3.3V voltage, the negative electrode is connected to one end of the resistor R301, the other end of the resistor R301 is connected to one end of the capacitor C301 and then grounded, and the other end of the capacitor C301 is connected to the 3.3V voltage; the third pin of the optical receiver U3 is grounded; the fourth pin of the optical receiver U3 is respectively connected to one end of the resistor R302 and one end of the capacitor C302, the other end of the resistor R302 is grounded, and the capacitor C3 The other end of 02 is respectively connected to one end of capacitor C305 and one end of capacitor C303, the other end of capacitor C305 is grounded, the other end of capacitor C303 is respectively connected to one end of resistor R305 and one end of capacitor C304, the other end of resistor R305 is respectively connected to one end of resistor R306 and the fourth pin of amplifier U4, the other end of resistor R306 is connected to the first pin of amplifier U4 and then to the eleventh pin of controller U1 through the crystal oscillator circuit; the other end of capacitor C304 is respectively connected to one end of resistor R304, one end of resistor R303 and the third pin of amplifier U4, the other end of resistor R304 is connected to 3.3V voltage, the other end of resistor R303 is grounded; the second pin of amplifier U4 is grounded.

[0039] like Figure 6As shown in the figure, it is the circuit schematic diagram of the voltage regulator circuit in the power management module, which is to convert the 3.7V input voltage of the built-in power supply into a 3.3V regulated voltage to meet the power supply requirements of each module of this system. The built-in power supply is connected to the circuit through the power port P1. The voltage regulator chip U5 uses RT9183, which has the characteristics of ultra-low voltage difference, high output current and low static current. It can be used in the input voltage range of 2.3V to 5.5V, and has a current output capacity of up to 1.5A, which is suitable for low-voltage and high-current digital circuits. After the bypass capacitor filters the power supply noise, the 3.7V voltage is sent to the input end of RT9183, and the 3.3V regulated voltage is output at the output end of RT9183. The output end also passes through the bypass capacitor to filter the power supply noise operation to obtain a relatively clean power signal. Specifically, the voltage stabilizing circuit includes a voltage stabilizing chip U5, a power port P1, capacitors C401-C404, a resistor R401, and a diode PWR-G; the first pin of the voltage stabilizing chip U5 is grounded; the second pin of the voltage stabilizing chip U5 inputs a 3.3V voltage and is respectively connected to one end of the capacitor C403, one end of the capacitor C404, and one end of the resistor R401, the other end of the capacitor C403 and the other end of the capacitor C404 are both grounded, the other end of the resistor R401 is connected to the positive electrode of the diode PWR-G, and the negative electrode of the diode PWR-G is grounded; the third pin of the voltage stabilizing chip U5 is respectively connected to one end of the capacitor C401, one end of the capacitor C402, and pin 1 of the power port P1, the other end of the capacitor C401 and the other end of the capacitor C402 are both grounded, and pin 2 of the power port P1 is grounded.

[0040] like Figure 7As shown in the figure, it is the circuit schematic diagram of the charging management circuit in the power management module. The charging management circuit includes a USB plug-in and a charging management chip. The charging management chip U6 adopts TP4056. TP4056 mainly controls the battery charging process in two stages: constant current and constant voltage. No external isolation diode is required, which has a low cost. When the input voltage is greater than the detection threshold and the chip enable pin CE is connected to a high level, TP4056 starts to charge the battery, and the red light-emitting diode CHRG-R emits red light. If the battery voltage is lower than 2.9V, a small current is used to pre-charge the battery. When the battery voltage exceeds 2.9V, the constant current mode is used to charge the battery, and the charging current is determined by the resistor R504 between the PROG terminal and the GND terminal. When the battery voltage approaches 4.2V, the charging current gradually decreases, and TP4056 enters the constant voltage charging mode. When the charging current decreases to the charging end threshold, the charging cycle ends, and the green light-emitting diode STDBY-G emits green light. Specifically, the charging management circuit includes a charging management chip U6, a USB plug-in, resistors R501-R504, capacitors C501-C504, a red light-emitting diode CHRG-R, and a green light-emitting diode STDBY-G; the first pin and the third pin of the charging management chip U6 are grounded, the second pin is connected to one end of the resistor R504, and the other end of the resistor R504 is grounded; the fifth pin of the charging management chip U6 is respectively connected to one end of the capacitor C503, one end of the capacitor C504, and pin 1 of the port P1, and the other end of the capacitor C503 and the other end of the capacitor C504 are both grounded; the sixth pin of the charging management chip U6 is connected to the negative electrode of the green light-emitting diode STDBY-G, and the green The positive electrode of the light-emitting diode STDBY-G is connected to one end of the resistor R503, and the other end of the resistor R503 is respectively connected to one end of the resistor R501 and one end of the resistor R502, the other end of the resistor R501 is connected to pin 1 of the USB plug-in, the other end of the resistor R502 is connected to the positive electrode of the red light-emitting diode CHRG-R, and the negative electrode of the red light-emitting diode CHRG-R is connected to the seventh pin of the charging management chip U6; the fourth pin and the eighth pin of the charging management chip U6 are connected to one end of the capacitor C501, one end of the capacitor C502, and one end of the resistor R501, respectively, and the other end of the capacitor C501 and the other end of the capacitor C502 are grounded; the 5th pin of the USB plug-in is grounded.

[0041] The above embodiments are not limitations of the present invention, and the present invention is not limited to the above embodiments. As long as the requirements of the present invention are met, they belong to the protection scope of the present invention.

Claims

1. A pulse ECG data synchronous acquisition system based on STM32, comprising a main control module, an ECG signal acquisition module, a pulse signal acquisition module, and a power management module; characterized in that: The main control module includes a controller, a crystal oscillator circuit, a reset circuit, an ST-LINK download circuit and a BOOT circuit; the controller adopts an STM32 single-chip microcomputer; the crystal oscillator circuit, the reset circuit, the ST-LINK download circuit and the BOOT circuit are respectively connected to the controller; The ECG signal acquisition module comprises a dry electrode, a fingertip ECG filter circuit and an ECG processing chip connected in sequence, and the signal output end of the ECG processing chip is connected to the signal input end of the controller; The pulse signal acquisition module comprises a green light emitting diode, a light receiver, a filtering circuit, and an amplifying circuit connected in sequence, wherein the signal output end of the amplifying circuit is connected to the signal input end of the controller; The power management module supplies power to the main control module, the electrocardiogram signal acquisition module, and the pulse signal acquisition module.

2. The pulse electrocardiogram data synchronous acquisition system based on STM32 according to claim 1, characterized in that: In the ECG signal acquisition module, there are two dry electrodes, including a left dry electrode and a right dry electrode, which are respectively connected to the fingertip ECG filter circuit.

3. The pulse electrocardiogram data synchronous acquisition system based on STM32 according to claim 2 is characterized in that: The pulse signal acquisition module is arranged inside the right dry electrode.

4. The pulse electrocardiogram data synchronous acquisition system based on STM32 according to claim 1 is characterized in that: The fingertip electrocardiogram filter circuit includes two high-pass filters.

5. The pulse electrocardiogram data synchronous acquisition system based on STM32 according to claim 1 is characterized in that: The power management module includes a built-in power supply, a voltage stabilization circuit and a charging management circuit.

6. The pulse electrocardiogram data synchronous acquisition system based on STM32 according to claim 5 is characterized in that: The voltage stabilizing circuit is responsible for supplying power to the ECG signal acquisition module, the pulse signal acquisition module, and the main control module; the charging management circuit provides charging management for the built-in power supply.

7. The pulse electrocardiogram data synchronous acquisition system based on STM32 according to claim 5 or 6, characterized in that: The voltage stabilizing circuit includes a two-wire connector and a voltage stabilizing chip, and the charging management circuit includes a USB plug-in and a charging management chip.

8. The pulse electrocardiogram data synchronous acquisition system based on STM32 according to claim 7 is characterized in that: The model of the voltage stabilizing chip is RT9183, the model of the charging management chip is TP4056, and the built-in power supply is a 3.7V, 4AH lithium-ion rechargeable battery.

9. The pulse electrocardiogram data synchronous acquisition system based on STM32 according to claim 1, characterized in that: The controller in the main control module adopts STM32F103C8T6 produced by STMicroelectronics; the model of the electrocardiogram processing chip is BMD101; the model of the optical receiver is APDS-9008; and the model of the amplifier in the amplification circuit is MCP6001.

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