Adjusting circuit, device and system for PCH and SATA interfaces

Abstract

The utility model relates to an adjusting circuit, device and system for PCH and SATA interfaces, the adjusting circuit for the PCH and SATA interfaces comprises the SATA interface, a PCH sampling unit, a control unit, a reset unit, a hard disk indicator light unit, an NVME unit, an RC circuit, a field effect transistor and a triode, one end of the RC circuit is connected with the PCH sampling unit and the reset unit, and the other end of the RC circuit is connected with the NVME unit. The other end of the RC circuit is connected with the field effect transistor, the field effect transistor is respectively connected with the hard disk indicating lamp unit and the base electrode of the triode, the emitting electrode of the triode is connected with the SATA interface and the NVME unit, and the collecting electrode of the triode is connected with the control unit. And the RC circuit is used for stabilizing the voltage of the PCH sampling unit during rising edge sampling.

Description

Technical Field

[0001] The present application relates to the field of server testing technology, and in particular, to a regulating circuit, device and system for a PCH and SATA interface. Background Art

[0002] SATA (Serial Advanced Technology Attachment) hard disk is the most widely used hard disk type in the server field, and its hard disk interface is based on the SATA protocol.

[0003] The existing SATA3.0 is facing a bottleneck. The bandwidth of 6Gb / s can no longer meet the needs of SSDs, which has become a bottleneck restricting the development of SSDs. On the one hand, the multi-function multiplexing GPP_B14 / SPKR / TIME_SYNC1 / SATA_LED# / ISH_GP6 pin, multiple control signals control the status and buzzer. When sampling the rising edge of PCH_PWROK, the strappin will appear in an unstable voltage state of 940mv, which is neither 0 (low) nor 1 (high). Utility Model Content

[0004] The purpose of the present application is to provide a regulation circuit, device and system for PCH and SATA interfaces to solve the problem of voltage instability during the existing PCH_PWROK rising edge sampling.

[0005] In order to solve the above problems, the present application adopts the following technical solutions:

[0006] The first aspect of the present application provides a regulation circuit for a PCH and a SATA interface, and the regulation circuit for the PCH and the SATA interface comprises: the SATA interface, a PCH sampling unit, a control unit, a reset unit, a hard disk indicator light unit, an NVME unit, an RC circuit, a field effect transistor and a transistor, one end of the RC circuit is respectively connected to the PCH sampling unit and the reset unit, the other end of the RC circuit is connected to the field effect transistor, the field effect is respectively connected to the hard disk indicator light unit and the base of the transistor, the emitter of the transistor is connected to the SATA interface and the NVME unit, and the collector of the transistor is connected to the control unit, wherein the RC circuit is used to stabilize the voltage of the PCH sampling unit during rising edge sampling.

[0007] By setting an RC circuit in the adjustment circuit, the voltage of the PCH sampling unit during rising edge sampling can be effectively stabilized to avoid signal errors caused by voltage instability, thereby improving the stability and reliability of data transmission, optimizing the voltage stability of the SATA interface, and enabling the SATA interface to better adapt to the requirements of high-speed data transmission, especially in the face of increasing bandwidth requirements, and better exert the performance of SATA hard drives.

[0008] Further, the RC circuit includes a first capacitor, a first resistor and a second resistor, the first resistor and the second resistor are connected in parallel with one end of the first capacitor, one end of the first capacitor is connected to the field effect transistor, the other end of the first capacitor is grounded, the first resistor is connected to the reset unit, and the second resistor is connected to the PCH sampling unit.

[0009] Through the combination of the first capacitor, the first resistor and the second resistor, the voltage of the PCH sampling unit during rising edge sampling can be effectively stabilized to avoid the occurrence of voltage instability, thereby improving the voltage stability of the overall circuit.

[0010] Furthermore, the transistor is of PNP type.

[0011] Furthermore, the SATA interface includes an impedance circuit and an LED light, the emitter of the transistor, the LED light and one end of the impedance circuit are connected in sequence, and the other end of the impedance circuit is connected to a power input.

[0012] By integrating impedance circuits and LED lights into the SATA interface, the compatibility of the interface with other devices is improved, ensuring that the system can correctly identify and use SATA devices. The design of the impedance circuit helps to match the impedance of signal transmission, reduce signal reflection and loss, thereby enhancing signal integrity and improving data transmission reliability.

[0013] Furthermore, the SATA interface includes a plurality of the LED lights, and the plurality of the LED lights are arranged in parallel.

[0014] Multiple LED lights are set in parallel in the SATA interface. The parallel setting of multiple LED lights can provide more status information, which is helpful for quickly diagnosing and locating faults in the system and improving the efficiency of troubleshooting.

[0015] Furthermore, the regulating circuit for the PCH and SATA interface includes a GPIO unit, and the GPIO unit is connected to the impedance circuit.

[0016] A GPIO unit is provided in the regulating circuit and connected to the impedance circuit, so as to provide more input and output options, help improve the compatibility of the system with other devices, and ensure that the system can be seamlessly connected with various devices. The GPIO unit controls the impedance circuit, which can optimize the transmission and processing of signals and improve the reliability and stability of data transmission.

[0017] Furthermore, the regulating circuit for the PCH and SATA interface includes a diode, and the diode is located between the NVME unit and the SATA interface.

[0018] Since a diode is set in the regulation circuit and located between the NVME unit and the SATA interface, overvoltage or current is prevented from damaging the NVME unit and the SATA interface. The presence of the diode can play a voltage clamping role, ensuring that the signal is transmitted within a reasonable voltage range, thereby optimizing the quality and stability of signal transmission.

[0019] Furthermore, the NVME unit and the diode are both multiple, and one NVME unit and one diode are arranged in a group.

[0020] The grouping of multiple NVME units and diodes can provide more signal distribution options, help optimize signal transmission and processing, and improve the reliability and stability of data transmission.

[0021] The second aspect of the present application further provides an adjustment device for a PCH and SATA interface, a shell having a receiving cavity formed therein, and any of the above-mentioned adjustment circuits for the PCH and SATA interface, which are arranged in the shell.

[0022] The third aspect of the present application further provides an adjustment system for PCH and SATA interface, and the adjustment system for PCH and SATA interface includes the adjustment device.

[0023] Compared with the prior art, the beneficial effect of the present application is that: since one end of the RC circuit is respectively connected to the PCH sampling unit and the reset unit, and the other end of the RC circuit is connected to the field effect tube, and the field effect is respectively connected to the hard disk indicator light unit and the base of the transistor, the voltage of the PCH sampling unit during rising edge sampling is effectively stabilized, and signal errors caused by voltage instability are avoided, thereby improving the stability and reliability of data transmission, optimizing the voltage stability of the SATA interface, and enabling the SATA interface to better adapt to the requirements of high-speed data transmission. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 A schematic diagram of a regulation circuit for a PCH and SATA interface provided in an embodiment of the present application;

[0025] Figure 2 A system diagram of a regulation circuit for a PCH and SATA interface provided in an embodiment of the present application;

[0026] Figure 3 A schematic diagram of a hard disk indicator light unit provided in an embodiment of the present application;

[0027] Figure 4 A schematic diagram of a control unit provided in an embodiment of the present application; and

[0028] Figure 5 A schematic diagram of an NVME unit provided in an embodiment of the present application.

[0029] Description of reference numerals:

[0030] 100, SATA interface; 200, PCH sampling unit; 300, control unit; 400, reset unit; 500, hard disk indicator light unit; 600, NVME unit; 700, RC circuit; 701, first capacitor; 702, first resistor; 703, second resistor; 800, field effect transistor; 900, triode; 101, impedance circuit; 102, LED lamp; 1000, GPIO unit; 1100, diode. DETAILED DESCRIPTION

[0031] The specific implementation methods of the present application are described in detail below with reference to the accompanying drawings.

[0032] It should be noted that, in the absence of conflict, the embodiments and technical features in the embodiments of the present application can be combined with each other, and the detailed description in the specific implementation method should be understood as an explanation of the purpose of the present application and should not be regarded as an improper limitation on the present application.

[0033] It should be understood that the orientation or position relationship is based on the orientation or position relationship shown in the drawings. These orientation terms are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present application.

[0034] Figure 1 A schematic diagram of a regulation circuit for a PCH and SATA interface provided in an embodiment of the present application, Figure 2 A system diagram of a regulation circuit for a PCH and SATA interface provided in an embodiment of the present application, Figure 3 A schematic diagram of a hard disk indicator light unit provided in an embodiment of the present application, Figure 4 A schematic diagram of a control unit provided in an embodiment of the present application, Figure 5 A schematic diagram of an NVME unit provided in an embodiment of the present application. Figures 1 to 5 As shown, an embodiment of the present application provides a regulation circuit for a PCH and a SATA interface, and the regulation circuit for a PCH and a SATA interface includes: a SATA interface 100, a PCH sampling unit 200, a control unit 300, a reset unit 400, a hard disk indicator light unit 500, an NVME unit 600, an RC circuit 700, a field effect transistor 800, and a transistor 900, wherein one end of the RC circuit 700 is respectively connected to the PCH sampling unit 200 and the reset unit 400, and the other end of the RC circuit 700 is connected to the field effect transistor 800, and the field effect 800 is respectively connected to the base of the hard disk indicator light unit 500 and the transistor 900, and the emitter of the transistor 900 is connected to the SATA interface 100 and the NVME unit 600, and the collector of the transistor 900 is connected to the control unit 300, wherein the RC circuit 700 is used to stabilize the voltage during the rising edge sampling of the PCH sampling unit 200.

[0035] Specifically, in the adjustment circuit, the SATA interface 100 and the NVME unit 600 are integrated together and connected through a transistor 900, so that the SATA interface and the NVME unit 600 can work together in the same circuit. The PCH sampling unit 200 and the reset unit 400 are connected through an RC circuit 700, which can stabilize the voltage of the PCH sampling unit 200 during rising edge sampling, thereby improving the stability and reliability of the signal. The hard disk indicator light unit 500 is controlled by a field effect transistor 800, the emitter of the transistor 900 is connected to the SATA interface 100 and the NVME unit 600, and the collector is connected to the control unit 300, thereby realizing the control of the SATA interface and the NVME unit, thereby improving the flexibility and scalability of the system.

[0036] The control unit 300 is responsible for controlling the entire regulation circuit, including controlling the hard disk indicator light unit 500, the SATA interface 100, the NVME unit 600, etc. The RC circuit 700 is used to stabilize the voltage during the rising edge sampling of the PCH sampling unit 200. By adjusting the parameters of the RC circuit, the stability of the sampling voltage can be ensured, and signal errors caused by unstable voltage can be avoided. In particular, the transistor is a PNP type.

[0037] By setting the RC circuit 700 in the regulating circuit, the voltage of the PCH sampling unit 200 during rising edge sampling can be effectively stabilized, and signal errors caused by voltage instability can be avoided, thereby improving the stability and reliability of data transmission, optimizing the voltage stability of the SATA interface 100, and enabling the SATA interface 100 to better adapt to the requirements of high-speed data transmission, especially in the face of increasing bandwidth requirements, and better exerting the performance of the SATA hard disk.

[0038] In some embodiments, the RC circuit 700 includes a first capacitor 701, a first resistor 702 and a second resistor 703. The first resistor 702 and the second resistor 703 are connected in parallel to one end of the first capacitor 701. One end of the first capacitor 701 is connected to the field effect transistor 800, and the other end of the first capacitor 701 is grounded. The first resistor 702 is connected to the reset unit 400, and the second resistor 703 is connected to the PCH sampling unit 200.

[0039] Specifically, the first capacitor 701 is connected to one end of the field effect tube 800, and the other end of the first capacitor 701 is grounded. At the same time, the first resistor 702 and the second resistor 703 are connected in parallel to one end of the first capacitor 701, the first resistor 702 is connected to the reset unit 400, and the second resistor 703 is connected to the PCH sampling unit 200. A capacitor 701 with a suitable capacitance is selected to meet the system's requirements for voltage stability. It should be noted that the capacitance of the capacitor will affect the response speed and stability of the circuit, so it needs to be selected according to the specific application scenario, and the resistance of the resistor will affect the bandwidth and response speed of the circuit, so it needs to be selected according to the specific application scenario.

[0040] By controlling the conduction and cutoff of the field effect tube 800, the circuit can be regulated and controlled. According to the requirements of the system, the field effect tube can be programmed to achieve flexible control of the circuit. The reset unit 400 is used to reset the circuit to ensure that the circuit operates in a stable state. The PCH sampling unit 200 is used to sample the signal to obtain the voltage value of the signal.

[0041] The combination of the first capacitor 701 , the first resistor 702 and the second resistor 703 can effectively stabilize the voltage of the PCH sampling unit 200 during rising edge sampling, avoiding the occurrence of voltage instability, thereby improving the voltage stability of the overall circuit.

[0042] In some embodiments, the SATA interface 100 includes an impedance circuit 101 and an LED light 102 , the emitter of the transistor 900 , the LED light 102 and one end of the impedance circuit 101 are connected in sequence, and the other end of the impedance circuit 101 is connected to a power input.

[0043] Specifically, the emitter of the transistor 900 is connected to one end of the LED lamp 102, and the other end of the LED lamp 102 is connected to one end of the impedance circuit 101. The transistor 900, the LED lamp 102 and the impedance circuit 101 form a circuit connected in sequence. The other end of the impedance circuit 101 is connected to the power input, and the impedance circuit 101 can obtain electrical energy from the power supply to maintain its normal operation.

[0044] Among them, the LED light 102 is used to provide an intuitive indication function. For example, when the SATA interface 100 has data transmission, the LED light may flash or remain on to indicate the system status. The impedance circuit 101 is used to provide impedance matching of the interface to ensure the stability and efficiency of the signal during the transmission process, thereby improving the success rate of data transmission.

[0045] By integrating the impedance circuit 101 and the LED light 102 in the SATA interface 100, the compatibility of the interface with other devices is improved, ensuring that the system can correctly identify and use the SATA device. The design of the impedance circuit 101 helps to match the impedance of signal transmission, reduce signal reflection and loss, thereby enhancing signal integrity and improving data transmission reliability.

[0046] In some embodiments, the SATA interface 100 includes a plurality of LED lights 102 , and the plurality of LED lights 102 are arranged in parallel.

[0047] Specifically, multiple LED lamps 102 are set in parallel, and the parallel setting means that each LED lamp 102 is directly connected to the power input, and there is no voltage difference between them. In this way, when one of the LED lamps is damaged, the other LED lamps can still work normally. The power input provides power input for the LED lamp 102. The power input can come from the system power supply or the external power supply to ensure that the LED lamp has enough power to maintain its normal operation. The operation of the LED lamp 102 is controlled by the control circuit or the system software. For example, when data is transmitted, the LED lamp can be lit to indicate the ongoing operation. The LED lamp 102 can be used to indicate different system states. For example, when the SATA interface 100 has data transmission, the LED lamp may flash or remain on to indicate the system status.

[0048] A plurality of LED lights 102 are arranged in parallel in the SATA interface 100. The parallel arrangement of the plurality of LED lights 102 can provide more status information, help to quickly diagnose and locate faults in the system, and improve the efficiency of troubleshooting.

[0049] In some embodiments, the regulation circuit for the PCH and SATA interfaces includes a GPIO unit 1000 , which is connected to an impedance circuit 101 .

[0050] Specifically, by connecting the GPIO unit 1000 to the impedance circuit 101, the GPIO unit can adjust the SATA interface through the impedance circuit to ensure the stability and reliability of the signal. The GPIO unit 1000 can be used to provide various control signals for the SATA interface. For example, through the GPIO unit, the power on and data transmission of the SATA interface can be controlled. The impedance circuit 101 is used to provide impedance matching of the interface, which can ensure the stability and efficiency of the signal during the transmission process, thereby improving the success rate of data transmission. For example, the GPIO unit 1000 can be connected to the impedance circuit 101 through a pin or a socket, and the control signal can be transmitted to the impedance circuit 101 through the GPIO unit 1000, so as to adjust and control the SATA interface 100 in real time.

[0051] Since the adjustment circuit includes the GPIO unit 1000 and connects it to the impedance circuit 101, more input and output options can be provided, which helps to improve the compatibility of the system with other devices and ensure that the system can be seamlessly connected with various devices. The GPIO unit 1000 controls the impedance circuit 101, which can optimize the transmission and processing of signals and improve the reliability and stability of data transmission.

[0052] In some embodiments, the regulation circuit for the PCH and SATA interface includes a diode 1100 , which is located between the NVME unit 600 and the SATA interface 100 .

[0053] Specifically, the diode 1100 is located between the NVME (Non-Volume Memory Express) unit 600 and the SATA interface 100, and the diode 1100 can provide electrical isolation and protection between the NVME unit and the SATA interface. The diode 1100 is connected to the NVME unit 600 and the SATA interface 100 respectively. For example, one port of the diode is connected to the NVME unit 600, and the other port is connected to the SATA interface 100. The diode 1100 is used to provide overvoltage protection and reverse current protection. When the voltage between the NVME unit and the SATA interface is too high or there is a reverse current, the diode can be turned on to protect the circuit from damage. The connection between the NVME unit 600 and the SATA interface 100 can be achieved through a corresponding interface cable or a board-to-board connector, and the NVME unit 600 and the SATA interface 100 can perform data transmission and signal interaction.

[0054] Since the diode 1100 is included in the regulation circuit and is located between the NVME unit and the SATA interface, overvoltage or current is prevented from damaging the NVME unit and the SATA interface. The presence of the diode can play a voltage clamping role, ensuring that the signal is transmitted within a reasonable voltage range, thereby optimizing the quality and stability of signal transmission.

[0055] In some embodiments, there are multiple NVME units 600 and multiple diodes 1100 , and one NVME unit 600 and one diode 1100 are arranged in a group.

[0056] Specifically, a plurality of NVME units 600 and a plurality of diodes 1100 are divided into a plurality of groups, each group comprising an NVME unit and a corresponding diode, the NVME unit 600 is used to process high-speed data transmission and storage operations, each NVME unit has independent storage and processing capabilities, and can work in conjunction with other NVME units in the group, the diode 1100 is used to provide overvoltage protection and reverse current protection, and in each NVME unit 600 and diode 1100 group setting, the diode 1100 can be turned on, thereby protecting the circuit from damage.

[0057] The grouping of multiple NVME units 600 and diodes 1100 can provide more signal distribution options, help optimize signal transmission and processing, and improve the reliability and stability of data transmission.

[0058] The embodiment of the present application also provides an adjustment device for a PCH and SATA interface, a shell having a receiving cavity formed therein, and any of the above-mentioned adjustment circuits for the PCH and SATA interface, which are arranged in the shell.

[0059] The embodiment of the present application further provides a regulation system for PCH and SATA interface, and the regulation system for PCH and SATA interface includes a regulation device.

[0060] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit the same. Although the present application has been described in detail with reference to the aforementioned embodiments, it is still possible for those skilled in the art to modify the technical solutions described in the aforementioned embodiments, or to replace some of the technical features therein by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions claimed to be protected by the present application.

Claims

1. A regulation circuit for PCH and SATA interface, characterized in that: The regulating circuit for the PCH and SATA interface includes: the SATA interface, a PCH sampling unit, a control unit, a reset unit, a hard disk indicator light unit, an NVME unit, an RC circuit, a field effect transistor and a triode, one end of the RC circuit is respectively connected to the PCH sampling unit and the reset unit, the other end of the RC circuit is connected to the field effect transistor, the field effect is respectively connected to the hard disk indicator light unit and the base of the triode, the emitter of the triode is connected to the SATA interface and the NVME unit, the collector of the triode is connected to the control unit, wherein the RC circuit is used to stabilize the voltage of the PCH sampling unit during rising edge sampling.

2. The regulating circuit for PCH and SATA interface according to claim 1, characterized in that: The RC circuit includes a first capacitor, a first resistor and a second resistor. The first resistor and the second resistor are connected in parallel to one end of the first capacitor. One end of the first capacitor is connected to the field effect transistor, and the other end of the first capacitor is grounded. The first resistor is connected to the reset unit, and the second resistor is connected to the PCH sampling unit.

3. The regulating circuit for PCH and SATA interface according to claim 1, characterized in that: The transistor is of PNP type.

4. The regulating circuit for PCH and SATA interface according to claim 1, characterized in that: The SATA interface includes an impedance circuit and an LED lamp. The emitter of the transistor, the LED lamp and one end of the impedance circuit are connected in sequence, and the other end of the impedance circuit is connected to a power input.

5. The regulating circuit for PCH and SATA interface according to claim 4, characterized in that: The SATA interface includes a plurality of LED lights, and the plurality of LED lights are arranged in parallel.

6. The regulating circuit for PCH and SATA interface according to claim 4, characterized in that: The regulating circuit for the PCH and SATA interface comprises a GPIO unit, and the GPIO unit is connected to the impedance circuit.

7. The regulating circuit for PCH and SATA interface according to claim 1, characterized in that: The regulating circuit for the PCH and SATA interface includes a diode, which is located between the NVME unit and the SATA interface.

8. The regulating circuit for PCH and SATA interface according to claim 7, characterized in that: The NVME units and the diodes are both multiple, and one NVME unit and one diode are arranged in a group.

9. A regulating device for PCH and SATA interface, characterized in that: A shell having a receiving cavity formed therein, and the regulating circuit for the PCH and SATA interfaces according to any one of claims 1 to 8 are arranged in the shell.

10. A regulation system for PCH and SATA interface, characterized in that: The regulating system for PCH and SATA interfaces comprises the regulating device according to claim 9.

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