Control circuit capable of changing PFC loop response speed in real time

Abstract

The utility model discloses a control circuit capable of changing the response speed of a PFC (Power Factor Correction) loop in real time. The control circuit comprises a rectification filter circuit, a PFC booster circuit, a loop control circuit and a DC-DC (Direct Current-Direct Current) conversion circuit, the input end of the rectification filter circuit is connected with a grid; the input end of the PFC booster circuit is connected between the output end of the rectification filter circuit and the input end of the DC-DC conversion circuit; the loop control circuit is connected with the PFC booster circuit and is used for generating a first signal when detecting that the output voltage of the PFC booster circuit is higher than a preset value and generating a second signal when detecting that the output voltage is lower than the preset value; the DC-DC conversion circuit outputs V + and V-to provide energy for a load; the PFC booster circuit works in a first power state when receiving the first signal and works in a second power state when receiving the second signal, and the second power is smaller than the first power; through the structure, the PFC loop response can be changed in real time, so that the waste and pollution of the power supply to a power grid can be greatly reduced when the switching power supply is in light load.

Description

Technical Field

[0001] The utility model relates to a field, and in particular to a control circuit capable of changing the response speed of a PFC loop in real time. Background Art

[0002] With the development of science and technology, switching power supplies have flourished in the electronics industry, and the performance indicators of products have become more and more stringent. When the switching power supply is working, a large amount of high-order harmonics will be generated and fed back to the power grid, polluting the power grid; and when the switching power supply is working, it will also generate active power and reactive power, and reactive power is a waste of the power grid. The greater the reactive power, the greater the waste. Therefore, PF&THD is a very important indicator to measure the performance of switching power supply products.

[0003] The PFC boost circuit (20) is a circuit designed for this purpose. It not only increases the PF of the power supply and reduces the reactive power generation of the power supply, but also reduces the high-order harmonics of the power supply, thereby reducing the pollution it generates to the power grid. However, the switching power supplies currently produced basically only focus on the PF&THD of the product when it is fully loaded. In actual use, these switching power supplies are often not used at full load. Some are only half the power or even less. In particular, dimming power supplies basically do not work at full power. Due to the influence of the PFC circuit loop, at this time, the PF&THD of the switching power supply will become relatively poor, which will cause relatively large waste and pollution to the power grid.

[0004] Therefore, there is an urgent need for a control circuit that can change the response speed of the PFC loop in real time to solve the above problems. Utility Model Content

[0005] The utility model aims to solve at least one of the technical problems existing in the prior art. To this end, the utility model proposes a control circuit that can change the response speed of the PFC loop in real time.

[0006] The technical solution adopted by an embodiment of the utility model to solve its technical problem is: a control circuit capable of changing the response speed of a PFC loop in real time, comprising a rectifier filter circuit, a PFC boost circuit, a loop control circuit and a DC-DC conversion circuit;

[0007] The input end of the rectifier and filter circuit is connected to the power grid;

[0008] The input end of the PFC boost circuit is connected between the output end of the rectifier filter circuit and the input end of the DC-DC conversion circuit;

[0009] The loop control circuit is connected to the PFC boost circuit, and is used to generate a first signal when it is detected that the output voltage of the PFC boost circuit is higher than a preset value, and generate a second signal when it is detected that the output voltage of the PFC boost circuit is lower than the preset value;

[0010] The DC-DC conversion circuit outputs V+ and V- to provide energy to the load;

[0011] The PFC boost circuit operates in a first power state when receiving a first signal, and operates in a second power state when receiving a second signal, wherein the second power is less than the first power.

[0012] As one of the preferred embodiments of the utility model, the PFC boost circuit includes resistors R23-30, capacitors C4-7, inductor T2, diodes D5-6, MOS tube Q6, and PFC chip U1. The fourth end of the inductor T2 is connected to the first end of the capacitor C5 and the 8th pin of the PFC chip U1 through the diode D6 and the resistor R22, and outputs the power supply VCC; the first end of the inductor T2 is connected to the output end of the rectifier filter circuit and the first end of the resistor R24; the second end of the inductor T2 is connected to the first end of the MOS tube Q6 and the first end of the diode D5; the third end of the inductor T2 is connected to GND; the fourth end of the inductor T2 is connected to the 7th pin of the PFC chip U1 through the resistor R23; the other end of the capacitor C5 is connected to GND; The second end of the resistor R24 ​​is connected to the first pin of the PFC chip U1 and the first end of the resistor R25 respectively; the second pin of the PFC chip U1 is connected to GND through the resistor R27 and the capacitor C7; the third pin of the PFC chip U1 is connected to GND; the sixth pin of the PFC chip U1 is connected to the second end of the MOS tube Q6; the fifth pin of the PFC chip U1 is connected to the third end of the MOS tube Q6 and is connected to GND through the resistor R28; the fourth pin of the PFC chip U1 is connected to the second end of the diode D5 through the resistor R29, and is connected to the input end of the DC-DC conversion circuit together with the first end of the capacitor C4 and is connected to GND through the resistor R30; the second end of the capacitor C4 is connected to GND together with the DC-DC conversion circuit.

[0013] As one of the preferred embodiments of the utility model, the loop control circuit includes resistors R35-39, capacitor C8, comparator U7A and MOS tube Q7, one end of resistor R39 is connected to the PFC boost circuit; the other end of resistor R39 is connected to the negative input end of comparator U7A; the power supply VCC is divided by resistor R35 and resistor R38 to generate power supply VDD to power the comparator U7A, and the 8th pin of comparator U7A is connected to GND through capacitor C8; the power supply VDD is divided by resistor R37 and resistor R38 to obtain a reference voltage VREF; the reference voltage VREF is connected to the positive input end of comparator U7A through resistor R36; the ground end of comparator U7A is connected to GND; the output end of comparator U7A is connected to the second end of MOS tube Q7; the third end of MOS tube Q7 is connected to GND; the first end of MOS tube Q7 is connected to the PFC boost circuit through capacitor C6.

[0014] The beneficial effects of the utility model include: a control circuit capable of changing the response speed of a PFC loop in real time, comprising a rectifier filter circuit, a PFC boost circuit, a loop control circuit and a DC-DC conversion circuit; the input end of the rectifier filter circuit is connected to a power grid; the input end of the PFC boost circuit is connected between the output end of the rectifier filter circuit and the input end of the DC-DC conversion circuit; the loop control circuit is connected to the PFC boost circuit, and is used to generate a first signal when it is detected that the output voltage of the PFC boost circuit is higher than a preset value, and to generate a second signal when it is detected that the output voltage of the PFC boost circuit is lower than the preset value; the DC-DC conversion circuit outputs V+ and V- to provide energy for the load; the PFC boost circuit operates in a first power state when receiving the first signal, and operates in a second power state when receiving the second signal, wherein the second power is less than the first power; the above structure can change the response of the PFC loop in real time, thereby greatly reducing the waste and pollution of the power supply to the power grid when the switching power supply is lightly loaded. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The above and / or additional aspects and advantages of the present invention will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0016] Figure 1 The schematic diagram of a control circuit capable of changing the response speed of a PFC loop in real time is shown;

[0017] Figure 2 The schematic diagram of a control circuit capable of changing the response speed of a PFC loop in real time is shown in the figure. DETAILED DESCRIPTION

[0018] This section will describe in detail the specific embodiments of the utility model. The preferred embodiments of the utility model are shown in the accompanying drawings. The purpose of the accompanying drawings is to supplement the description of the text part of the specification with graphics, so that people can intuitively and vividly understand each technical feature and the overall technical solution of the utility model, but it cannot be understood as a limitation on the protection scope of the utility model.

[0019] In the description of the present utility model, the meaning of "more than" is more than two, "greater than", "less than", "exceed" etc. are understood to exclude the number itself, and "above", "below", "within" etc. are understood to include the number itself. If there is a description of "first" or "second", it is only used for the purpose of distinguishing technical features, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features or implicitly indicating the order of the indicated technical features.

[0020] In the description of the present invention, it should be understood that descriptions involving orientation, such as up, down, front, back, left, right, etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.

[0021] In the present invention, unless otherwise clearly defined, the words "set", "install", "connect" and the like should be understood in a broad sense, for example, they can be directly connected or indirectly connected through an intermediate medium; they can be fixedly connected or detachably connected or integrally formed; they can be mechanically connected; they can be the internal connection of two elements or the interaction relationship between two elements. Those skilled in the art can reasonably determine the specific meanings of the above words in the present invention in combination with the specific content of the technical solution.

[0022] Reference Figure 1 to Figure 2 , a control circuit capable of changing the response speed of a PFC loop in real time, comprising a rectifier filter circuit 10, a PFC boost circuit 20, a loop control circuit 30 and a DC-DC conversion circuit 40;

[0023] The input end of the rectifier and filter circuit 10 is connected to the power grid;

[0024] The input end of the PFC boost circuit 20 is connected between the output end of the rectifier filter circuit 10 and the input end of the DC-DC converter circuit 40;

[0025] The loop control circuit 30 is connected to the PFC boost circuit 20, and is used to generate a first signal when it is detected that the output voltage of the PFC boost circuit 20 is higher than a preset value, and to generate a second signal when it is detected that the output voltage of the PFC boost circuit 20 is lower than the preset value;

[0026] The DC-DC conversion circuit 40 outputs V+ and V- to provide energy for the load;

[0027] The PFC boost circuit 20 operates in a first power state when receiving the first signal, and operates in a second power state when receiving the second signal, wherein the second power is less than the first power.

[0028] In the present utility model, as a preferred embodiment of the PFC boost circuit 20, the PFC boost circuit 20 includes resistors R23-30, capacitors C4-7, inductor T2, diodes D5-6, MOS tube Q6, and PFC chip U1. The fourth end of the inductor T2 is connected to the first end of the capacitor C5 and the 8th pin of the PFC chip U1 through the diode D6 and the resistor R22, and outputs the power supply VCC; the first end of the inductor T2 is connected to the output end of the rectifier filter circuit 10 and the first end of the resistor R24; the second end of the inductor T2 is connected to the first end of the MOS tube Q6 and the first end of the diode D5; the third end of the inductor T2 is connected to GND; the fourth end of the inductor T2 is connected to the 7th pin of the PFC chip U1 through the resistor R23; the other end of the capacitor C5 is connected to GND; the second end of the resistor R24 ​​is respectively connected to the first end of the PFC chip U1 and the first end of the resistor R25; the second end of the PFC chip U1 is connected to GND through the resistor R27 and the capacitor C7; the third end of the PFC chip U1 is connected to GND; the sixth end of the PFC chip U1 is connected to the second end of the MOS tube Q6; the fifth end of the PFC chip U1 is connected to the third end of the MOS tube Q6 and is connected to GND through the resistor R28; the fourth end of the PFC chip U1 is connected to the second end of the diode D5 through the resistor R29, and is connected to the input end of the DC-DC conversion circuit 40 together with the first end of the capacitor C4 and is connected to GND through the resistor R30; the second end of the capacitor C4 is connected to GND together with the DC-DC conversion circuit 40.

[0029] In one embodiment, the loop control circuit 30 includes resistors R35-39, a capacitor C8, a comparator U7A and a MOS tube Q7, one end of the resistor R39 is connected to the PFC boost circuit 20; the other end of the resistor R39 is connected to the negative input end of the comparator U7A; the power supply VCC is divided by the resistor R35 and the resistor R38 to generate the power supply VDD to power the comparator U7A, and the 8th pin of the comparator U7A is connected to GND through the capacitor C8; the power supply VDD is divided by the resistor R37 and the resistor R38 to obtain the reference voltage VREF; the reference voltage VREF is connected to the positive input end of the comparator U7A through the resistor R36; the ground end of the comparator U7A is connected to GND; the output end of the comparator U7A is connected to the second end of the MOS tube Q7; the third end of the MOS tube Q7 is connected to GND; the first end of the MOS tube Q7 is connected to the PFC boost circuit 20 through the capacitor C6.

[0030] The specific working principle is as follows: when the system is powered on and works normally, the second end of the inductor T2 charges the capacitor C5 through the diode D6 and the resistor R22 until the PFC chip U1 starts to work and outputs energy to the DC-DC conversion circuit 40 by controlling the on and off of the MOS tube Q6; at this time, the second foot of the comparator U7A collects the voltage of the third foot of the MOS tube Q6 through the resistor R39 and compares it with the set reference voltage VREF; the reference voltage VREF is set to a certain value through the parameters of the resistor R35 and the resistor R38, and this value corresponds to the second power output by the PFC boost circuit 20; when the voltage collected by the second foot of the comparator U7A When the voltage collected by the second foot of the comparator U7A is higher than the reference voltage VREF, the comparator U7A outputs a low level, the MOS tube Q7 connected to its output end stops working, and the PFC boost circuit 20 works according to the PF&THD designed at the first power (full power); when the voltage collected by the second foot of the comparator U7A is lower than the reference voltage VREF, the comparator U7A outputs a high level, the MOS tube Q7 connected to its output end starts working, and the PFC boost circuit 20 works again according to the new response speed, so that the PFC boost circuit 20 can still allow the entire power supply to present a higher PF and lower THD when outputting a small power segment, so that the waste and pollution of the entire power supply to the power grid in the entire power segment are minimized.

[0031] The utility model has the advantages that: the PFC loop response can be changed in real time through the above structure, so that the waste and pollution caused by the power supply to the power grid can be greatly reduced when the switching power supply is lightly loaded.

[0032] Of course, the present invention is not limited to the above-mentioned embodiments, and technicians familiar with the field may make equivalent modifications or substitutions without violating the spirit of the present invention. These equivalent modifications and substitutions are all included in the scope defined by the claims of this application.

Claims

1. A control circuit capable of changing the response speed of a PFC loop in real time, characterized in that: It comprises a rectifier filter circuit (10), a PFC boost circuit (20), a loop control circuit (30) and a DC-DC conversion circuit (40); The input end of the rectifier and filter circuit (10) is connected to a power grid; The input end of the PFC boost circuit (20) is connected between the output end of the rectifier filter circuit (10) and the input end of the DC-DC conversion circuit (40); The loop control circuit (30) is connected to the PFC boost circuit (20) and is used to generate a first signal when it is detected that the output voltage of the PFC boost circuit (20) is higher than a preset value, and to generate a second signal when it is detected that the output voltage of the PFC boost circuit (20) is lower than the preset value; The DC-DC conversion circuit (40) outputs V+ and V- to provide energy for the load; The PFC boost circuit (20) operates in a first power state when receiving the first signal, and operates in a second power state when receiving the second signal, wherein the second power is less than the first power.

2. The control circuit capable of changing the PFC loop response speed in real time according to claim 1, characterized in that: The PFC boost circuit (20) comprises resistors R23-30, capacitors C4-7, inductor T2, diodes D5-6, MOS tube Q6, and a PFC chip U1; the fourth end of the inductor T2 is connected to the first end of the capacitor C5 and the eighth pin of the PFC chip U1 via the diode D6 and the resistor R22 respectively, and outputs a power supply VCC; the first end of the inductor T2 is connected to the output end of the rectifier filter circuit (10) and the first end of the resistor R24; the second end of the inductor T2 is connected to the first end of the MOS tube Q6 and the first end of the diode D5; the third end of the inductor T2 is connected to GND; the fourth end of the inductor T2 is connected to the seventh pin of the PFC chip U1 via the resistor R23; the other end of the capacitor C5 is connected to GND; the second end of the resistor R24 ​​is connected to GND; The pins are connected to the first pin of the PFC chip U1 and the first end of the resistor R25 respectively; the second pin of the PFC chip U1 is connected to GND through the resistor R27 and the capacitor C7; the third pin of the PFC chip U1 is connected to GND; the sixth pin of the PFC chip U1 is connected to the second end of the MOS transistor Q6; the fifth pin of the PFC chip U1 is connected to the third end of the MOS transistor Q6 and is connected to GND through the resistor R28; the fourth pin of the PFC chip U1 is connected to the second end of the diode D5 through the resistor R29, and is connected to the input end of the DC-DC conversion circuit (40) together with the first end of the capacitor C4, and is connected to GND through the resistor R30; the second end of the capacitor C4 and the DC-DC conversion circuit (40) are connected to GND together.

3. The control circuit capable of changing the PFC loop response speed in real time according to claim 1, characterized in that: The loop control circuit (30) comprises resistors R35-39, a capacitor C8, a comparator U7A and a MOS tube Q7, one end of the resistor R39 is connected to the PFC boost circuit (20); the other end of the resistor R39 is connected to the negative input end of the comparator U7A; the power supply VCC is divided by the resistor R35 and the resistor R38 to generate the power supply VDD for the comparator U7A, and the eighth foot of the comparator U7A is connected to GND through the capacitor C8; the power supply VDD is divided by the resistor R37 and the resistor R38 to obtain the reference voltage VREF; the reference voltage VREF is connected to the positive input end of the comparator U7A through the resistor R36; the ground end of the comparator U7A is connected to GND; the output end of the comparator U7A is connected to the second end of the MOS tube Q7; the third end of the MOS tube Q7 is connected to GND; the first end of the MOS tube Q7 is connected to the PFC boost circuit (20) through the capacitor C6.

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