High-resistance gate depletion type GaN HEMT device structure
By adopting a high-resistance gate depletion structure in GaN HEMT devices and using a high-resistance GaN layer to replace the insulating layer, the problems of gate leakage current and threshold voltage drift in the prior art are solved, and better current isolation effect and device stability are achieved.
Patent Information
- Application Number
- CN202421646978.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-07-11
- Publication Date
- 2025-05-13
- Estimated Expiration
- 2034-07-11
AI Technical Summary
The gate of the existing depletion HMET device structure has problems such as large leakage current or threshold voltage drift.
Using a high-resistance gate depletion type GaN HEMT device structure, by setting a gate directly above the base part and using the high-resistance GaN layer as a replacement for the barrier layer and the insulating layer, the interface trap density is reduced and a good interface state is formed, thereby reducing the threshold voltage drift and improving the suppression effect of gate leakage current.
It effectively weakens the threshold voltage drift, improves the effect of suppressing gate leakage current, and improves the stability and performance of the device.
Smart Images
Figure CN222869298U_ABST
Abstract
Description
Technical Field
[0001] The utility model belongs to the technical field of HEMT device structures, and in particular relates to a high-resistance gate depletion-type GaN HEMT device structure. Background Art
[0002] New gallium nitride (GaN) depletion mode (D-mode) high electron mobility transistor (HEMT) devices are widely used in power supplies, automotive electronics, and 5G base stations. GaN materials have good physical and electrical properties, such as high temperature resistance, radiation resistance, wide bandgap, high breakdown electric field, and large electron saturation drift velocity. These physical and electrical properties enable GaN-based HEMTs to have high switching frequency, high power density, high operating temperature, small gate charge, and low switching loss.
[0003] At present, the gates of depletion-mode HEMT device structures include Schottky gate and insulated gate. The threshold voltage of D-mode HEMT devices with Schottky gate structure is relatively stable and has a small drift, but because its gate metal is directly deposited on the barrier layer, there is a problem of large gate leakage current; D-mode HEMT devices with insulated gate structure can greatly reduce gate leakage current, but because an insulating dielectric layer such as SiN is added between the gate and the barrier layer, although the leakage current is reduced, the interface state between the barrier layer and the insulating layer forms an interface trap, so there is a problem of threshold voltage drift. Utility Model Content
[0004] In order to solve the above problems existing in the prior art, the utility model provides a high-resistance gate depletion-mode GaN HEMT device structure.
[0005] The technical problem to be solved by the utility model is achieved through the following technical solutions:
[0006] The utility model provides a high-resistance gate depletion-type GaN HEMT device structure, which comprises, from bottom to top, a substrate layer, a nucleation layer, a buffer layer, a channel layer, a barrier layer, a high-resistance GaN layer and a gate;
[0007] The channel layer, the barrier layer and the high-resistance GaN layer together constitute a base part; a source is arranged on one side of the base part; a drain is arranged on the other side of the base part; the lower ends of the source and the drain are arranged inside the buffer layer and the lower ends of the source and the drain are close to the upper surface of the buffer layer; the length of the gate is smaller than the length of the base part and the gate is arranged directly above the base part.
[0008] Optionally, the high-resistance GaN layer is made of U-GaN, carbon-doped high-resistance GaN or magnesium-doped high-resistance GaN.
[0009] Optionally, the nucleation layer is made of GaN, AlN or AlGaN, and has a thickness of 10 to 50 nm.
[0010] Optionally, the substrate layer is made of sapphire, SiC, Si or GaN.
[0011] Optionally, the thickness of the high-resistance GaN layer is 10-500 nm.
[0012] Optionally, the barrier layer is made of AlGaN or AlN, and has a thickness of 10 to 200 nm.
[0013] Optionally, the buffer layer is made of at least one of GaN, AlN and AlGaN.
[0014] Optionally, the source and the drain are both made of a metal combination of Ti / Al / Ni / Au, Ti / Al / Pt / Au or Ti / Al / Ti / TiN.
[0015] Optionally, the thickness of the buffer layer is 0 to 20000 nm; the thickness of the channel layer is 0 to 800 nm.
[0016] Optionally, the gate uses a Ni / Au-based or Ti / Al-based metal combination.
[0017] The utility model provides a high-resistance gate depletion-type GaN HEMT device structure, which includes from bottom to top: a substrate layer, a nucleation layer, a buffer layer, a channel layer, a barrier layer, a high-resistance GaN layer and a gate; the channel layer, the barrier layer and the high-resistance GaN layer together constitute a base part; a source is arranged on one side of the base part; a drain is arranged on the other side of the base part; the lower ends of the source and the drain are arranged inside the buffer layer and the lower ends of the source and the drain are close to the upper surface of the buffer layer; the length of the gate is less than the length of the base part and the gate is arranged directly above the base part. In the utility model, based on the fact that most of the existing barrier layer materials use AlGaN or AlN, the insulating layer under the existing insulated gate structure is changed to high-resistance GaN. Since homogeneous epitaxy can greatly reduce the interface trap density and form a good interface state, the problem of threshold voltage drift is greatly reduced; further, since the high-resistance GaN can achieve a current isolation effect that is basically consistent with the insulating layer under the gate of the existing insulated gate structure, the suppression effect of gate leakage current is also improved.
[0018] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS
[0019] Figure 1 A schematic diagram of a high-resistance gate depletion-mode GaN HEMT device structure provided by an embodiment of the utility model;
[0020] Figure 2 A schematic structural diagram of a high-resistance gate depletion-mode GaN HEMT device structure provided by another embodiment of the utility model;
[0021] Figure 3 A schematic structural diagram of a high-resistance gate depletion-mode GaN HEMT device structure provided in another embodiment of the present invention. DETAILED DESCRIPTION
[0022] The present invention is further described in detail below in conjunction with specific embodiments, but the implementation methods of the present invention are not limited thereto.
[0023] In order to solve the problem of large gate 9 leakage current or threshold voltage drift in the existing depletion-type HMET gate structure, the embodiment of the utility model provides a high-resistance gate depletion-type GaN HEMT device structure. Figure 1 A schematic diagram of a high-resistance gate depletion-mode GaN HEMT device structure provided by an embodiment of the utility model. Figure 1 As shown, the high-resistance gate depletion-mode GaN HEMT device structure includes, from bottom to top, a substrate layer 1, a nucleation layer 2, a buffer layer 3, a channel layer 4, a barrier layer 5, a high-resistance GaN layer 6, and a gate 9;
[0024] The channel layer 4, the barrier layer 5 and the high-resistance GaN layer 6 together constitute a base part; a source electrode 7 is arranged on one side of the base part; a drain electrode 8 is arranged on the other side of the base part; the lower ends of the source electrode 7 and the drain electrode 8 are both arranged inside the buffer layer 3 and the lower ends of the source electrode 7 and the drain electrode 8 are close to the upper surface of the buffer layer 3; the length of the gate electrode 9 is less than the length of the base part and the gate electrode is arranged directly above the base part.
[0025] It should be noted that, in the embodiment of the present utility model, the length of the base part and the position of the gate can be adjusted according to actual needs.
[0026] The embodiment of the utility model provides a high-resistance gate depletion-type GaN HEMT device structure, which includes, from bottom to top, a substrate layer 1, a nucleation layer 2, a buffer layer 3, a channel layer 4, a barrier layer 5, a high-resistance GaN layer 6 and a gate 9; the channel layer 4, the barrier layer 5 and the high-resistance GaN layer 6 together constitute a base part; a source electrode 7 is arranged on one side of the base part; a drain electrode 8 is arranged on the other side of the base part; the lower ends of the source electrode 7 and the drain electrode 8 are both arranged inside the buffer layer 3 and the lower ends of the source electrode 7 and the drain electrode 8 are close to the upper surface of the buffer layer 3; the length of the gate electrode 9 is less than the length of the base part and the gate electrode 9 is arranged directly above the base part. In the utility model, based on the fact that most existing barrier layer materials are AlGaN or AlN, the insulating layer under the existing insulated gate structure is changed to high-resistance GaN. Since homogeneous epitaxy can greatly reduce the interface trap density and form a good interface state, the problem of threshold voltage drift is greatly reduced. Furthermore, since the high-resistance GaN layer 6 can achieve basically the same current isolation effect as the insulating layer under the existing insulated gate structure, the effect of suppressing the leakage current of the gate 9 is also improved.
[0027] Optionally, the high-resistance GaN layer 6 is made of U-GaN, carbon-doped high-resistance GaN or magnesium-doped high-resistance GaN.
[0028] It should be noted that in the embodiment of the present invention, the length and height of the high-resistance GaN layer 6 can be flexibly changed.
[0029] Optionally, the nucleation layer 2 is made of GaN, AlN or AlGaN, and has a thickness of 10 to 50 nm.
[0030] Optionally, the substrate layer 1 is made of sapphire, SiC, Si or GaN.
[0031] Optionally, the thickness of the high-resistance GaN layer 6 is 10-500 nm.
[0032] Optionally, the barrier layer 5 is made of AlGaN or AlN, and has a thickness of 10-200 nm.
[0033] It should be noted that the Al composition x in the barrier layer 5 can be varied.
[0034] Optionally, the buffer layer 3 is made of at least one of GaN, AlN and AlGaN.
[0035] Optionally, the source electrode 7 and the drain electrode 8 are both made of a metal combination of Ti / Al / Ni / Au, Ti / Al / Pt / Au or Ti / Al / Ti / TiN.
[0036] Optionally, the thickness of the buffer layer 3 is 0-20000 nm; the thickness of the channel layer 4 is 0-800 nm.
[0037] In addition, the channel layer 4 is made of one of GaN, AlN or AlGaN.
[0038] Optionally, in another possible implementation, an insertion layer for improving carrier mobility may be inserted between the barrier layer 5 and the channel layer 4 , and the material of the insertion layer includes but is not limited to AlN, InAlN or AlGaN.
[0039] Optionally, in some possible implementations, Figure 2 As shown, a 0-200nm Al2O3 layer 10 is grown between the high-resistance GaN layer 6 and the gate 9 to achieve a better gate 9 leakage current suppression effect. Figure 3 As shown, by using a hard mask secondary epitaxial high-resistance GaN method (i.e., setting an in-situ silicon nitride layer 11 inside the high-resistance GaN layer 6), it is possible to achieve separate control of the gate under-gate and gate-drain access regions, with better control effects. Figure 3 shown.
[0040] Optionally, the gate 9 adopts a metal combination based on Ni / Au or based on Ti / Al.
[0041] In addition, it should be noted that the source electrode 7 and the drain electrode 8 may also be made of other metal stacking layers to form source-drain ohmic contacts. The high-resistance GaN layer 6 may also be made of other high-resistance GaN materials.
[0042] The high-resistance gate depletion-mode GaN HEMT device structure provided by the embodiment of the utility model can be widely used in the industrial and automotive fields, such as telecommunication server power supplies, solar and battery power inverters, industrial automation and on-board charging of electric vehicles, and in higher voltage / power fields.
[0043] Furthermore, the preparation process of a high-resistance gate depletion-mode GaN HEMT device structure provided by the embodiment of the utility model is as follows:
[0044] 1. Provide a substrate and deposit and grow an AlN nucleation layer 2 with a thickness of 10 to 50 nm using a MOCVD process.
[0045] 2. On the nucleation layer 2, a GaN buffer layer 3 with a thickness of 0 to 20,000 nm and a GaN channel layer 4 with a thickness of 0 to 800 nm are sequentially deposited by MOCVD process.
[0046] 3. On the channel layer 4, a barrier layer 5 is deposited by MOCVD process. The composition of the barrier layer 5 is Al x Ga (1-x) N, Al x Ga (1-x) In the N barrier layer 5, the Al composition is 0.1 and the deposition thickness is 10 to 200 nm.
[0047] 4. In Al x Ga (1-x) On the N barrier layer 5, a high-resistance GaN layer 6 with a thickness of 0 to 500 nm is deposited and grown by using a MOCVD process to obtain an epitaxial wafer.
[0048] 5. Etch the source and drain regions (omit this step if high-temperature ohmic contact is made).
[0049] 6. Make a mask on the high-resistance GaN layer 6 to form an ohmic window, put it into an E-Beam electron beam evaporation device, and use the electron beam evaporation process to deposit the source 7 and the drain 8. Use Ti / Al / Ni / Au metal as the source 7 and the drain 8, and anneal it at 850°C for 30s to form a high-temperature ohmic contact, wherein the thickness of Ti is 20nm, the thickness of Al is 140nm, the thickness of Ni is 55nm, and the thickness of Au is 45nm; or use Ti / Al metal as the source 7 and the drain 8, and anneal it at 500°C for 1min to form a low-temperature ohmic contact, wherein the thickness of Ti is 20nm, and the thickness of Al is 200nm.
[0050] 7. A mask is made on the high-resistance GaN layer 6 to form a gate window. The sample with the gate window is placed in an electron beam evaporation reaction chamber. Ni and gold targets with a purity of 99.999% are used to deposit metal Ni / Au as a gate 9 in the gate window by electron beam evaporation process, wherein the thickness of Ni is 20nm and the thickness of Au is 50nm. Figure 1 shown.
[0051] 9. The sample after the above steps is placed in a plasma chemical vapor deposition (PECVD) reaction chamber. The PECVD process deposits a 0 to 200 nm thick SiN passivation layer on the high-resistance GaN layer 6, the source electrode 7, the drain electrode 8 and the gate electrode 9.
[0052] 10. Open holes in the passivation layer above the source 7, the drain 8 and the gate 9 to lead out the electrodes, thereby obtaining the high-resistance gate depletion-mode GaN HEMT device structure.
[0053] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the utility model. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification.
[0054] Although the present invention is described herein in conjunction with various embodiments, in the process of implementing the claimed invention, those skilled in the art may understand and implement other variations of the disclosed embodiments by viewing the drawings and the disclosed content. In the description of the present invention, the term "comprising" does not exclude other components or steps, "one" or "an" does not exclude multiple situations, and "multiple" means two or more, unless otherwise clearly and specifically limited. In addition, certain measures are recorded in different embodiments, but this does not mean that these measures cannot be combined to produce good results.
[0055] The above contents are further detailed descriptions of the present invention in combination with specific preferred implementations, and the specific implementation of the present invention cannot be considered to be limited to these descriptions. For ordinary technicians in the technical field to which the present invention belongs, several simple deductions or substitutions can be made without departing from the concept of the present invention, which should be regarded as falling within the protection scope of the present invention.
Claims
1. A high-resistance gate depletion-mode GaN HEMT device structure, characterized in that: The high-resistance gate depletion-mode GaN HEMT device structure includes, from bottom to top, a substrate layer, a nucleation layer, a buffer layer, a channel layer, a barrier layer, a high-resistance GaN layer and a gate; The channel layer, the barrier layer and the high-resistance GaN layer together constitute a base part; a source is arranged on one side of the base part; a drain is arranged on the other side of the base part; the lower ends of the source and the drain are both arranged inside the buffer layer and the lower ends of the source and the drain are close to the upper surface of the buffer layer; the length of the gate is less than the length of the base part and the gate is arranged directly above the base part.
2. A high-resistance gate depletion-mode GaN HEMT device structure according to claim 1, characterized in that: The high-resistance GaN layer is U-GaN, carbon-doped high-resistance GaN or magnesium-doped high-resistance GaN.
3. A high-resistance gate depletion-mode GaN HEMT device structure according to claim 1, characterized in that: The nucleation layer is GaN, AlN or AlGaN, and has a thickness of 10 to 50 nm.
4. The high-resistance gate depletion-mode GaN HEMT device structure according to claim 1, characterized in that: The substrate layer is sapphire, SiC, Si or GaN.
5. The high-resistance gate depletion-mode GaN HEMT device structure according to claim 1, characterized in that: The thickness of the high-resistance GaN layer is 10-500 nm.
6. A high-resistance gate depletion-mode GaN HEMT device structure according to claim 1, characterized in that: The barrier layer is AlGaN or AlN, and has a thickness of 10-200 nm.
7. The high-resistance gate depletion-mode GaN HEMT device structure according to claim 1, characterized in that: The buffer layer material is at least one of GaN, AlN and AlGaN.
8. The high-resistance gate depletion-mode GaN HEMT device structure according to claim 1, characterized in that: The source and the drain are a metal combination of Ti / Al / Ni / Au, Ti / Al / Pt / Au or Ti / Al / Ti / TiN.
9. The high-resistance gate depletion-mode GaN HEMT device structure according to claim 1, characterized in that: The thickness of the buffer layer is 0-20000 nm; the thickness of the channel layer is 0-800 nm.
10. The high-resistance gate depletion-mode GaN HEMT device structure according to claim 1, characterized in that: The gate is a Ni / Au based or Ti / Al based metal combination.