Electronic component packaging module and electronic component packaging structure
By using electronic component packaging modules in the laminated semiconductor device and using the combination of conductive parts to achieve interconnection between chips, the problems of complex and high cost of the laminated semiconductor device are solved, and the packaging effect of lower cost and simplified processes is achieved.
Patent Information
- Application Number
- CN202421470815.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-06-25
- Publication Date
- 2025-05-16
- Estimated Expiration
- 2034-06-25
AI Technical Summary
The process of laminated semiconductor devices is complex and costly, especially in interconnection processing between chips.
An electronic component packaging module is adopted to realize the electrical connection between the first electronic component and the second electronic component through the combination of the first conductive member, the second conductive member and the third conductive member, and act as a connecting bridge to avoid the silicon through-hole process, thereby reducing the packaging cost.
The silicon-free through-hole process is realized, reducing the packaging process cost of electronic components such as chips and simplifying the process process.
Smart Images
Figure CN222883545U_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of semiconductor technology, and in particular to an electronic component packaging module and an electronic component packaging structure. Background Art
[0002] With the continuous development of semiconductor technology, the integration density of semiconductor devices continues to increase. As a process that can effectively reduce the physical size of semiconductor devices, the stacking packaging process has been widely used. The core of the stacking packaging process is to manufacture active circuits such as logic, memory, and processor circuits on different wafers and packages, and then stack two or more packages. At the same time, each package transmits signals through a standard interface. Higher integration can be achieved by using stacked packaging semiconductor devices. In addition, stacked packaging semiconductor devices can achieve smaller form factors, higher cost-effectiveness, enhanced performance, and lower power consumption.
[0003] However, stacked semiconductor devices mostly use TSV (Through Silicon Via) technology to achieve interconnection between chips. This technology is to make vertical conductions between wafers, and the subsequent processing process for through holes is relatively complex and costly. Utility Model Content
[0004] The present application provides an electronic component packaging module and an electronic component packaging structure to solve the problem of complex process and high cost of stacked semiconductor devices in the prior art.
[0005] The present application provides an electronic component packaging module, including a first substrate layer, a first circuit layer, a first conductive member, a first electronic component, a second conductive member, a second electronic component, and a third conductive member, wherein the first substrate layer has a first surface on one side along the thickness direction; the first circuit layer is arranged in the first substrate layer; one end of the first conductive member is electrically connected to the first circuit layer; the first electronic component is electrically connected to the other end of the first conductive member away from the first circuit layer; one end of the second conductive member is electrically connected to the first circuit layer; the second electronic component is electrically connected to the other end of the second conductive member away from the first circuit layer; the third conductive member is arranged on the first surface, and the third conductive member is configured to be electrically connected to the first electronic component and the second electronic component.
[0006] In a possible implementation manner, the other end of the first conductive element away from the first circuit layer is at least partially exposed on the first surface; and / or
[0007] The other end of the second conductive element away from the first circuit layer is at least partially exposed on the first surface.
[0008] In a possible implementation, the first substrate layer is provided with a first opening and a second opening, the first opening and the second opening are recessed inward from the first surface, the first conductive member is at least partially received in the first opening, and the second conductive member is at least partially received in the second opening.
[0009] In a possible implementation, the third conductive member includes:
[0010] A conductive body disposed on the first surface;
[0011] A first conductive terminal, which is disposed on a side of the conductive body away from the first surface;
[0012] The surfaces of the first conductive member and the second conductive member at one end away from the first circuit layer are flush with the end surface of the first conductive terminal at one end away from the conductive body.
[0013] In a possible implementation manner, the first conductive member and the second conductive member are spaced apart from each other, and the third conductive member is located between the first conductive member and the second conductive member.
[0014] In a possible implementation manner, the number of the first conductive members and the number of the second conductive members are both set to be multiple, the first conductive members and the second conductive members are arranged in a staggered manner, and there is a third conductive member between any two adjacent first conductive members and the second conductive members.
[0015] In a possible implementation, the electronic component packaging module further includes a first sealing layer, which is disposed on the first surface and is configured to cover the first conductive member and the second conductive member, portions of the member extending beyond the first surface, and the third conductive member.
[0016] In a possible implementation, the first electronic component and the second electronic component are disposed on a side of the first sealing layer away from the first circuit layer, and the first conductive member, the second conductive member, and the third conductive member are at least partially exposed on a surface of the first sealing layer on a side away from the first circuit layer.
[0017] In a possible implementation, the electronic component packaging module further includes a second sealing layer, which is disposed on a surface of the first sealing layer away from the first circuit layer and is configured to cover the first electronic component and the second electronic component.
[0018] The present application also provides an electronic component packaging structure, including a packaging substrate, and at least two of the above-mentioned electronic component packaging modules, wherein the first circuit layers of at least two of the electronic component packaging modules are electrically connected to the packaging substrate.
[0019] In the electronic component packaging module of the present application, the first conductive member electrically connects the first electronic component to the first circuit layer, the second conductive member electrically connects the second electronic component to the first circuit layer, and the third conductive member electrically connects the first electronic component and the second electronic component at the same time. The third conductive member is used as a connecting bridge between the first electronic component and the second electronic component, thereby achieving a silicon-free through-hole via process and enabling interconnection between electronic components such as chips, thereby reducing the manufacturing cost of the packaging process for electronic components such as chips. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] Figure 1 Schematic diagram of the structure of the electronic component packaging module of the present application in one embodiment.
[0021] Figure 2 for Figure 1 A schematic structural diagram of an electronic component packaging module in one embodiment after the first base material layer is formed on a carrier substrate.
[0022] Figure 3 FIG. 1 is a schematic structural diagram of an electronic component packaging structure of the present application in one embodiment.
[0023] Description of main component symbols:
[0024] Electronic component packaging structure 200
[0025] Electronic component packaging module 100
[0026] Carrier substrate 11
[0027] First circuit layer 12
[0028] First base material layer 13
[0029] First surface 131
[0030] First opening 132
[0031] Second surface 133
[0032] Second opening 134
[0033] The third opening 135
[0034] The first conductive member 141
[0035] The second conductive member 142
[0036] The third conductive member 20
[0037] Conductive body 21
[0038] The first conductive terminal 22
[0039] Sealing layer 30
[0040] The first sealing layer 31
[0041] The second sealing layer 32
[0042] First electronic component 40
[0043] First element body 41
[0044] The second conductive terminal 42
[0045] Second electronic component 50
[0046] Second element body 51
[0047] The third conductive terminal 52
[0048] First Solder 61
[0049] Second solder 62
[0050] Fourth conductive member 70
[0051] Package substrate 300
[0052] Second base material layer 310
[0053] The second circuit layer 320
[0054] Fifth conductive member 330
[0055] Sixth conductive member 340
[0056] Seventh conductive member 350
[0057] Eighth conductive member 360
[0058] The following specific implementation methods will further illustrate the present application in conjunction with the above-mentioned drawings. DETAILED DESCRIPTION
[0059] The following description will refer to the accompanying drawings to more fully describe the content of the present application. Shown in the accompanying drawings are exemplary embodiments of the present application. However, the present application can be implemented in many different forms and should not be construed as being limited to the exemplary embodiments set forth herein. These exemplary embodiments are provided to make the present application thorough and complete, and to fully convey the scope of the present application to those skilled in the art. Similar reference numerals represent identical or similar components.
[0060] The terms used herein are only used for the purpose of describing specific exemplary embodiments and are not intended to limit the present application. As used herein, unless the context clearly indicates otherwise, the singular forms "a", "an" and "the" are intended to also include the plural forms. In addition, when used herein, "including" and / or "comprising" and / or "having", integers, steps, operations, components and / or components, but do not exclude the existence or addition of one or more other features, regions, integers, steps, operations, components and / or groups thereof.
[0061] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those of ordinary skill in the art to which this application belongs. In addition, unless explicitly defined herein, terms such as those defined in general dictionaries should be interpreted as having a meaning consistent with their meaning in the relevant technology and the content of this application, and will not be interpreted as an idealized or overly formal meaning.
[0062] The specific implementation methods of the present application are further described in detail below with reference to the accompanying drawings.
[0063] like Figure 1 to Figure 2 As shown, this embodiment provides an electronic component packaging module 100 , including a first substrate layer 13 , a first circuit layer 12 , a first conductive member 141 , a first electronic component 40 , a second conductive member 142 , a second electronic component 50 , and a third conductive member 20 .
[0064] Along the thickness direction of the first substrate layer 13 , the first substrate layer 13 has a first surface 131 and a second surface 133 opposite to each other. The first circuit layer 12 is disposed in the first substrate layer 13 , and the first substrate layer 13 completely covers the first circuit layer 12 .
[0065] The first conductive member 141 is at least partially disposed in the first substrate layer 13, one end of the first conductive member 141 is electrically connected to the first circuit layer 12, and the first electronic component 40 is electrically connected to the other end of the first conductive member 141 away from the first circuit layer 12. The second conductive member 142 is at least partially disposed in the first substrate layer 13, one end of the second conductive member 142 is electrically connected to the first circuit layer 12, and the second electronic component 50 is electrically connected to the other end of the second conductive member 142 away from the first circuit layer 12. The third conductive member 20 is disposed on the first surface 131, and the third conductive member 20 is configured to be electrically connected to the first electronic component 40 and the second electronic component 50.
[0066] The first electronic component 40 and the second electronic component 50 may be electronic components such as chips.
[0067] Thus, in the electronic component packaging module 100 of the present application, the first conductive member 141 electrically connects the first electronic component 40 to the first circuit layer 12, the second conductive member 142 electrically connects the second electronic component 50 to the first circuit layer 12, and the third conductive member 20 electrically connects the first electronic component 40 and the second electronic component 50 at the same time, and the third conductive member 20 is used as a connecting bridge between the first electronic component 40 and the second electronic component 50, thereby achieving a silicon-free through-hole via process and being able to realize the interconnection between electronic components such as chips, thereby reducing the manufacturing cost of the packaging process of electronic components such as chips.
[0068] It is worth noting that before preparing the electronic component packaging module 100, a carrier substrate 11 is provided, the first base material layer 13 is formed on the carrier substrate 11, and the second surface 133 is attached to the carrier substrate 11. The carrier substrate 11 can be one or more of a glass substrate, a wafer substrate, a steel plate, a flat plate, and the like.
[0069] Please combine again Figure 1 In one embodiment, the first substrate layer 13 is provided with a first opening 132 and a second opening 134. The first opening 132 and the second opening 134 are arranged at intervals along the length direction of the first substrate layer 13. The first opening 132 and the second opening 134 are both recessed from the first surface 131 toward the second surface 133, and the first opening 132 and the second opening 134 extend inwardly to allow the first circuit layer 12 to be at least partially exposed from the first opening 132 and the second opening 134.
[0070] The first conductive element 141 is at least partially received in the first opening 132, and the other end of the first conductive element 141 away from the first circuit layer 12 is at least partially exposed on the first surface 131. The second conductive element 142 is at least partially received in the second opening 134, and the other end of the second conductive element 142 away from the first circuit layer 12 is at least partially exposed on the first surface 131.
[0071] Specifically, one end of the first conductive member 141 is located in the first opening 132 and contacts the first circuit layer 12, so that the first conductive member 141 is electrically connected to the first circuit layer 12. The other end of the first conductive member 141 extends out of the first opening 132 and then exceeds the first surface 131, so that the first electronic component 40 is connected to the first conductive member 141. One end of the second conductive member 142 is located in the second opening 134 and contacts the first circuit layer 12, so that the second conductive member 142 is electrically connected to the first circuit layer 12. The other end of the second conductive member 142 extends out of the second opening 134 and then exceeds the first surface 131, so that the second electronic component 50 is connected to the second conductive member 142.
[0072] It is understandable that the first conductive member 141 and the second conductive member 142 can be conductive elements of metal or other materials installed in the first opening 132 and the second opening 134 , or can be conductive structures directly formed in the first opening 132 and the second opening 134 by selective electroplating or other methods.
[0073] It is worth noting that the number of the first conductive member 141 and the second conductive member 142 can be one or more, and the specific number can be selected according to actual design requirements. Accordingly, the number of the first opening 132 and the second opening 134 corresponds to the number of the first conductive member 141 and the second conductive member 142, respectively.
[0074] In this embodiment, the first substrate layer 13 further defines a third opening 135 that is recessed from the second surface 133 toward the first surface 131 and extends inwardly to expose at least a portion of the first circuit layer 12 from the third opening 135 .
[0075] The electronic component packaging module 100 further includes a fourth conductive member 70, which is at least partially received in the third opening 135. One end of the fourth conductive member 70 is located in the third opening 135 and contacts the first circuit layer 12, so that the fourth conductive member 70 is electrically connected to the first circuit layer 12, and the other end of the fourth conductive member 70 is at least partially exposed on the second surface 133, so that the first circuit layer 12 can be electrically connected to other circuit boards or electronic components through the fourth conductive member 70.
[0076] It is understandable that the fourth conductive member 70 may be a conductive element with a conductive function, or a solder ball formed in the third opening 135 by welding, and a part of the structure of the solder ball is located outside the first substrate layer 13 .
[0077] Please combine again Figure 1 In one embodiment, the third conductive member 20 includes a conductive body 21 and a first conductive terminal 22. The number of the first conductive terminal 22 is one or more, and the specific number is not limited in this application. The third conductive member 20 can be a structure with conductive function such as a silicon bridge structure.
[0078] The conductive body 21 is attached to the first surface 131, and the first conductive terminal 22 is protruding from the side of the conductive body 21 away from the first surface 131. The surfaces of the first conductive member 141 and the second conductive member 142 away from the first circuit layer 12 are flush with the end surface of the first conductive terminal 22 away from the conductive body 21.
[0079] It is understandable that, in other embodiments, the surfaces of the first conductive member 141 and the second conductive member 142 away from the first circuit layer 12 and the end surface of the first conductive terminal 22 away from the conductive body 21 may not be flush.
[0080] Please combine again Figure 1 In one embodiment, the electronic component packaging module 100 further includes a first sealing layer 31. The first sealing layer 31 is disposed on the first surface 131, and the first sealing layer 31 is made of an insulating material. The first sealing layer 31 is configured to cover the first conductive member 141 and the second conductive member 142 that extend beyond the first surface 131, and the third conductive member 20, so that the first sealing layer 31 isolates the first conductive member 141, the second conductive member 142, and the third conductive member 20 from the outside.
[0081] In this embodiment, the first electronic component 40 and the second electronic component 50 are arranged on a side of the first sealing layer 31 away from the first circuit layer 12, and the first conductive member 141, the second conductive member 142, and the third conductive member 20 are at least partially exposed on the surface of the first sealing layer 31 away from the first circuit layer 12.
[0082] Specifically, the surface of the first conductive member 141 and the second conductive member 142 away from the first circuit layer 12, and the end surface of the first conductive terminal 22 away from the conductive body 21 are all flush with the surface of the first sealing layer 31 away from the first circuit layer 12, so that the first conductive member 141, the second conductive member 142, and the first conductive terminal 22 can be exposed behind the first sealing layer 31 for connection with the first electronic component 40 and the second electronic component 50.
[0083] It is understandable that in other embodiments, the surface of the first conductive member 141 and the second conductive member 142 away from the first circuit layer 12, and the end surface of the first conductive terminal 22 away from the conductive body 21 may not be flush with the surface of the first sealing layer 31 away from the first circuit layer 12.
[0084] In this embodiment, along the length direction of the first sealing glue layer 31 , the first conductive member 141 and the second conductive member 142 are spaced apart from each other, and the third conductive member 20 is located between the first conductive member 141 and the second conductive member 142 .
[0085] In other embodiments, the number of the first conductive members 141 and the second conductive members 142 are both set to be multiple. Along the length direction of the first sealing glue layer 31, the first conductive members 141 and the second conductive members 142 are arranged alternately and spaced apart, and there is a third conductive member 20 between any two adjacent first conductive members 141 and the second conductive members 142. The first conductive members 141 and the second conductive members 142 are arranged alternately, so that there is a second conductive member 142 between any two adjacent first conductive members 141.
[0086] Specifically, the first electronic component 40 includes a first component body 41 and a second conductive terminal 42. The first component body 41 is disposed at intervals on a side of the first sealing layer 31 away from the first circuit layer 12, and the second conductive terminal 42 can be one or more in number and is convexly disposed on a side of the first component body 41 close to the first sealing layer 31.
[0087] The second electronic component 50 includes a second component body 51 and a third conductive terminal 52. The second component body 51 is disposed at intervals on a side of the first sealing layer 31 away from the first circuit layer 12. The third conductive terminal 52 may be one or more and is protrudingly disposed on a side of the second component body 51 close to the first sealing layer 31.
[0088] The second conductive terminal 42 and the third conductive terminal 52 are respectively connected to the first conductive member 141 and the second conductive member 142 by welding. After welding, at least two first solders 61 are formed between the second conductive terminal 42 and the first conductive member 141, so as to realize the electrical connection between the second conductive terminal 42 and the first conductive member 141 through the first solders 61. In addition, at least two second solders 62 are formed between the third conductive terminal 52 and the second conductive member 142, so as to realize the electrical connection between the third conductive terminal 52 and the second conductive member 142 through the second solders 62.
[0089] In this way, the electrical connection between the electronic component and the circuit layer is achieved by welding, which can enhance the reliability of the electronic component packaging module 100. In addition, the third conductive member 20, the first electronic component 40, and the second electronic component 50 are provided with the first conductive terminal 22, the second conductive terminal 42, and the third conductive terminal 52 respectively before packaging, that is, the third conductive member 20, the first electronic component 40, and the second electronic component 50 have completed the production of the first conductive terminal 22, the second conductive terminal 42, and the third conductive terminal 52 before forming the grain, and are then coated in the first sealing layer 31 and the second sealing layer 32 after the production is completed, which can further enhance the reliability of the electronic component packaging module 100.
[0090] Please combine again Figure 1In one embodiment, the electronic component packaging module 100 further includes a second sealing layer 32, which is disposed on a surface of the first sealing layer 31 on a side away from the first circuit layer 12. The second sealing layer 32 is made of an insulating material and is configured to cover the first electronic component 40 and the second electronic component 50, so that the second sealing layer 32 isolates the first electronic component 40 and the second electronic component 50 from the outside.
[0091] In addition, the second sealing layer 32 and the first sealing layer 31 may be made of the same material or different materials, and the second sealing layer 32 and the first sealing layer 31 constitute the sealing layer 30 of the entire electronic component packaging module 100 .
[0092] like Figure 3 As shown, and refer to Figure 1 The present application also provides an electronic component packaging structure 200, comprising a packaging substrate 300 and at least two of the above-mentioned electronic component packaging modules 100. The first circuit layers 12 of at least two electronic component packaging modules 100 are electrically connected to the packaging substrate 300, so that multiple electronic component packaging modules 100 can be installed on the packaging substrate 300 at the same time.
[0093] It is understandable that in other embodiments, the number of the electronic component packaging module 100 may also be one.
[0094] The packaging substrate 300 includes a second base material layer 310 , a second circuit layer 320 , a fifth conductive member 330 , a sixth conductive member 340 , a seventh conductive member 350 and an eighth conductive member 360 .
[0095] The second substrate layer 310 is arranged at intervals on a side of the first substrate layer 13 away from the packaging layer, and the second circuit layer 320 is arranged in the second substrate layer 310, and the second circuit layer 320 can be partially exposed from the second substrate layer 310, so that the end of the fourth conductive member 70 away from the first circuit layer 12 is in direct contact with the second circuit layer 320, thereby realizing electrical connection between the second circuit layer 320 and the fourth conductive member 70.
[0096] The number of the fifth conductive member 330 and the sixth conductive member 340 is one or more, and they are all located on the side of the second circuit layer 320 away from the first circuit layer 12. One end of the fifth conductive member 330 and the sixth conductive member 340 are both buried in the second substrate layer 310 and electrically connected to the second circuit layer 320, and the other end of the fifth conductive member 330 and the sixth conductive member 340 are both exposed in the second substrate layer 310 and are respectively connected to an eighth conductive member 360 to achieve electrical connection between the eighth conductive member 360 and the second circuit layer 320. The eighth conductive member 360 is a structure such as a solder ball, and is used to connect other electronic components or electronic assemblies.
[0097] The seventh conductive member 350 is disposed on the surface of the second substrate layer 310 away from the first substrate layer 13. There are multiple seventh conductive members 350, and the multiple seventh conductive members 350 are all located between the fifth conductive member 330 and the sixth conductive member 340. One end of each seventh conductive member 350 away from the second substrate layer 310 is connected to the eighth conductive member 360. The seventh conductive member 350 is an electrical contact point structure disposed on the surface of the second substrate layer 310.
[0098] In the above, the specific embodiments of the present application are described with reference to the accompanying drawings. However, those skilled in the art will appreciate that various changes and substitutions may be made to the specific embodiments of the present application without departing from the scope of the present application. These changes and substitutions are all within the scope defined by the present application.
Claims
1. An electronic component packaging module, characterized in that: include: A first substrate layer having a first surface on one side along the thickness direction; A first circuit layer, which is disposed in the first substrate layer; A first conductive member, one end of which is electrically connected to the first circuit layer; A first electronic component electrically connected to the other end of the first conductive member away from the first circuit layer; A second conductive member, one end of which is electrically connected to the first circuit layer; A second electronic component electrically connected to the other end of the second conductive member away from the first circuit layer; The third conductive element is disposed on the first surface, and the third conductive element is configured to be electrically connected to the first electronic component and the second electronic component.
2. The electronic component packaging module according to claim 1, characterized in that: The other end of the first conductive member away from the first circuit layer is at least partially exposed on the first surface; and / or The other end of the second conductive element away from the first circuit layer is at least partially exposed on the first surface.
3. The electronic component packaging module according to claim 2, characterized in that: The first substrate layer is provided with a first opening and a second opening, the first opening and the second opening are recessed inward from the first surface, the first conductive member is at least partially received in the first opening, and the second conductive member is at least partially received in the second opening.
4. The electronic component packaging module according to claim 1, characterized in that: The third conductive member comprises: A conductive body disposed on the first surface; A first conductive terminal, which is disposed on a side of the conductive body away from the first surface; The surfaces of the first conductive member and the second conductive member at one end away from the first circuit layer are flush with the end surface of the first conductive terminal at one end away from the conductive body.
5. The electronic component packaging module according to claim 1, characterized in that: The first conductive member and the second conductive member are spaced apart from each other, and the third conductive member is located between the first conductive member and the second conductive member.
6. The electronic component packaging module according to claim 5, characterized in that: The number of the first conductive members and the number of the second conductive members are both set to be multiple, the first conductive members and the second conductive members are arranged in a staggered manner, and there is a third conductive member between any two adjacent first conductive members and the second conductive members.
7. The electronic component packaging module according to claim 1, characterized in that: The electronic component packaging module further includes a first sealing layer, which is disposed on the first surface and is configured to cover the first conductive member and the second conductive member, portions of the portions extending beyond the first surface, and the third conductive member.
8. The electronic component packaging module according to claim 7, characterized in that: The first electronic component and the second electronic component are arranged on a side of the first sealing layer away from the first circuit layer, and the first conductive member, the second conductive member, and the third conductive member are at least partially exposed on a surface of the first sealing layer away from the first circuit layer.
9. The electronic component packaging module according to claim 8, characterized in that: The electronic component packaging module further includes a second sealing layer, which is disposed on a surface of the first sealing layer away from the first circuit layer and is configured to cover the first electronic component and the second electronic component.
10. An electronic component packaging structure, characterized in that: It comprises a packaging substrate and at least two electronic component packaging modules according to any one of claims 1 to 9, wherein the first circuit layers of at least two of the electronic component packaging modules are electrically connected to the packaging substrate.