Switching circuit, circuit board and Type-C adapter
By designing the adapter circuit and control chip in the Type-C female to female adapter, detecting and correcting the misaligned connection between CC1 and CC2 wires, the problem that the Type-C adapter cannot ensure the correct connection of the CC wire before fast charging is solved, and correct data transmission and PD protocol execution are achieved.
Patent Information
- Application Number
- CN202421820360.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-07-30
- Publication Date
- 2025-05-16
- Estimated Expiration
- 2034-07-30
AI Technical Summary
Before fast charging, the existing Type-C female to female adapter needs to ensure the correct connection between the CC1 and CC2 of the male heads of the two charging cables. Otherwise, the correct data transmission and the smooth execution of the PD protocol cannot be ensured, resulting in the inability to perform fast charging.
An adapter circuit is designed, including a first Type-C pin group, a second Type-C pin group and a control chip. When the control chip detects that one of the two is being connected to an external device and the other is being connected in reverse, it sends a control signal to turn on the first and second conversion switches, thereby ensuring the correct connection between the CC1 pin and the CC2 pin.
With this design, the male connectors of two external devices can be properly turned on, and even if one is directly connected and the other is reversed, it can avoid the problem of fast charging failure caused by misaligned connections.
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Figure CN222884025U_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of adapters, and in particular to an adapter circuit, a circuit board, and a Type-C adapter. Background Art
[0002] The Type-C adapter is an adapter used to connect devices with different interfaces. It allows users to connect devices with Type-C interface to other types of interfaces (such as USB, HDMI, VGA, 3.5mm audio, etc.), thereby achieving functions such as data transmission, charging, audio and video output, etc.
[0003] The PD protocol, full name Power Delivery, is a fast charging standard based on USB Type-Cd developed by USB-IF (USB Implementers Forum). It aims to provide higher charging power and faster charging speed by adjusting the voltage and current to meet the needs of modern electronic devices for fast charging. In the PD fast charging protocol, the CC line plays a vital role. By communicating through the CC line, the Source end (such as a charger) and the Sink end (such as a mobile phone) can negotiate the specifications of power transmission (such as voltage, current, etc.) to achieve fast charging. This communication process requires the support of the CC line to ensure the correct transmission of data and the smooth execution of the protocol.
[0004] The Type-C female to female adapter refers to an adapter with two Type-C female heads, which can be plugged into external devices respectively, so that charging and / or data transmission between external devices can be realized through the adapter. Before fast charging, the Type-C female to female adapter must ensure the correct connection of the CC1 line and CC2 line of the male head of the two charging cables to ensure the correct transmission of data and the smooth execution of the PD protocol. The Type-C female to female adapter currently on the market, when one end is plugged in forward and the other end is plugged in reverse (the male connector is plugged in forward or reverse), causes the connection mode to be misaligned, so that the CC1 pin of the male connector of the first device is connected to the CC2 pin of the male connector of the second device, and the CC2 pin of the male connector of the first device is connected to the CC1 pin of the male connector of the second device. Since the correct communication connection cannot be established, fast charging cannot be performed between devices. Utility Model Content
[0005] The purpose of the present application is to provide a conversion circuit, a circuit board and a Type-C adapter, which can solve the problem in the prior art that the Type-C adapter cannot achieve fast charging because one end of the Type-C adapter is reversely connected to the external device and the other end is positively connected to the external device.
[0006] In order to achieve the above object, the present application provides a switching circuit for a Type-C adapter, the Type-C adapter comprising a first Type-C female connector and a second Type-C female connector, and the switching circuit comprising:
[0007] A first Type-C pin group, each pin of the first Type-C pin group is configured to be connected to each pin of the first Type-C female connector, and the first Type-C pin group includes a first CC1 pin and a first CC2 pin;
[0008] a second Type-C pin group, wherein each pin of the second Type-C pin group is configured to be connected to each pin of the second Type-C female connector, and the second Type-C pin group includes a second CC1 pin and a second CC2 pin;
[0009] A control chip, wherein the control chip is configured to detect whether the first Type-C female connector and the second Type-C female connector are positively or reversely connected to an external device, and the control chip comprises a third CC1 pin, a third CC2 pin, a first signal pin, a second signal pin, and a power input pin, wherein the third CC1 pin is connected to the first CC1 pin, the third CC2 pin is connected to the first CC2 pin, the third CC1 pin is connected to the first signal pin, and the third CC2 pin is connected to the second signal pin;
[0010] A first conversion switch, the first conversion switch comprising a first control pin, a third signal pin and a fourth signal pin, the third signal pin is connected to the second signal pin, and the fourth signal pin is connected to the second CC1 pin;
[0011] A second conversion switch, the second conversion switch comprising a second control pin, a fifth signal pin and a sixth signal pin, the fifth signal pin is connected to the first signal pin, and the sixth signal pin is connected to the second CC2 pin;
[0012] When the control chip detects that one of the first Type-C female connector and the second Type-C female connector is positively connected to an external device and the other is reversely connected to an external device, the control chip sends a control signal to the first control pin and the second control pin, respectively, and the first conversion switch conducts between the third signal pin and the fourth signal pin according to the corresponding control signal, and the second conversion switch conducts between the fifth signal pin and the sixth signal pin according to the corresponding control signal.
[0013] Optionally, the first control pin is a selection pin, and after the first control pin receives the corresponding control signal, the third signal pin and the fourth signal pin are turned on; and / or
[0014] The second control pin is a selection pin. After the second control pin receives the corresponding control signal, the fifth signal pin and the sixth signal pin are turned on.
[0015] The first conversion switch further includes a seventh signal pin, and the selection pin selects to conduct the fourth signal pin and the seventh signal pin or the third signal pin and the fourth signal pin based on the received signal; and / or
[0016] The second conversion switch further includes an eighth signal pin, and the selection pin selects to conduct the sixth signal pin and the eighth signal pin or the fifth signal pin and the sixth signal pin based on a received signal.
[0017] Optionally, the control signal is a level signal.
[0018] Optionally, the model of the first conversion switch and / or the second conversion switch is SN74LVC1G3157DCKR.
[0019] Optionally, the first Type-C pin group further includes a first VBUS pin;
[0020] The second Type-C pin group further includes a second VBUS pin, and the second VBUS pin is connected to the first VBUS pin;
[0021] The control chip further includes a power input pin, the first VBUS pin and the second VBUS pin are connected to the power input pin, and the power input pin is grounded through a first capacitor.
[0022] Optionally, a first dual MOS transistor, the first dual MOS transistor includes a first source, a second source, a first drain, a second drain, a first gate, and a second gate, the first source is connected to the first CC1 pin through a first resistor, the second source is connected to the first CC2 pin through a second resistor, the first drain is grounded through a first pull-down resistor, the second drain is grounded through a second pull-down resistor, the first gate and the second gate are connected to a third control pin of the control chip, and the third control pin is grounded through a third resistor;
[0023] A second dual MOS transistor, wherein the second dual MOS transistor includes a third source, a fourth source, a third drain, a fourth drain, a third gate and a fourth gate, the third source is connected to the second CC1 pin through a fourth resistor, the fourth source is connected to the second CC2 pin through a fifth resistor, the third drain is grounded through a second third pull-down resistor, the fourth drain is grounded through a fourth pull-down resistor, the third gate and the fourth gate are connected to a fourth control pin of the control chip, and the fourth control pin is grounded through a sixth resistor;
[0024] The first CC1 pin, the first CC2 pin, the second CC2 pin and the second CC2 pin are grounded via a voltage stabilizing diode respectively;
[0025] When the control chip detects that both the first Type-C female connector and the second Type-C female connector are positively connected to an external device or both are reversely connected to an external device, the third control pin outputs a level signal to the first gate and the second gate to turn on the first dual MOS tube, and the fourth control pin outputs a level signal to the third gate and the fourth gate to turn on the second dual MOS tube.
[0026] Optionally, the control chip also includes a positive power pin, a first basic input-output pin and a second basic input-output pin, the positive power pin is grounded through a second capacitor, the first basic input-output pin is connected to the second CC1 pin and the second CC2 pin, the first basic input-output pin is grounded through a seventh resistor, and an eighth resistor is connected in series between the second basic input-output pin and the seventh resistor.
[0027] In order to achieve the above-mentioned objectives, the present application also provides a circuit board for a Type-C adapter, including the adapter circuit as described above.
[0028] In order to achieve the above-mentioned objectives, the present application also provides a Type-C adapter, including a first Type-C female connector, a second Type-C female connector and the circuit board as described above, wherein different positions of the circuit board are respectively connected to the first Type-C female connector and the second Type-C female connector.
[0029] In the embodiment of the present application, the third CC1 pin of the control chip is connected to the first CC1 pin of the first Type-C pin group, the third CC2 pin of the control chip is connected to the first CC2 pin of the first Type-C pin group, the third CC1 pin is connected to the first signal pin, and the third CC2 pin is connected to the second signal pin. The third signal pin of the first conversion switch is connected to the second signal pin, the fourth signal pin is connected to the second CC1 pin, the fifth signal pin of the second conversion switch is connected to the first signal pin, and the sixth signal pin is connected to the second CC2 pin. When the control chip detects that the plugging direction of the external device connected to the first Type-C female connector and the second Type-C female connector is that one end is forwardly connected and the other end is reversely connected, the control chip outputs a control signal to the first control pin of the first conversion switch to turn on the first conversion switch and outputs a control signal to the second control pin of the second conversion switch to turn on the second conversion switch. Since the third signal pin of the first conversion switch is connected to the second signal pin of the control chip, after the first conversion switch is turned on, a path is formed between the first CC2 pin and the second CC1 pin by connecting the third CC2 pin, the second signal pin, and the first conversion switch. Since the fifth signal pin of the second conversion switch is connected to the first signal pin of the control chip, after the second conversion switch is turned on, a path is formed between the first CC1 pin and the second CC2 pin by connecting the third CC1 pin, the first signal pin, and the second conversion switch. Therefore, when one of the first Type-C female connector and the second Type-C female connector is forwardly connected to the external device and the other is reversely connected to the external device, the male connectors of the two external devices can still be CC1 pins connected to CC1 pins and CC2 pins connected to CC2 pins, thereby avoiding the problem of being unable to perform fast charging due to misaligned connections. BRIEF DESCRIPTION OF THE DRAWINGS
[0030] Figure 1 Schematic diagram of the switching circuit in the embodiment of the present application.
[0031] Figure 2 This is a circuit diagram of a part of the switching circuit in an embodiment of the present application.
[0032] Figure 3 Schematic diagram of another part of the switching circuit in the embodiment of the present application.
[0033] Figure 4 This is a schematic diagram of the front structure of the circuit board in the embodiment of the present application.
[0034] Figure 5 This is a schematic diagram of the reverse structure of the circuit board in the embodiment of the present application.
[0035] Figure 6 This is a schematic diagram of the front structure of the Type-C adapter in an embodiment of the present application.
[0036] Figure 7 This is a schematic diagram of the reverse structure of the Type-C adapter in an embodiment of the present application. DETAILED DESCRIPTION
[0037] In order to explain the technical content, structural features and achieved effects of the present application in detail, the following is a detailed description in combination with the implementation methods and the accompanying drawings.
[0038] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are described in detail below in conjunction with the accompanying drawings. In the following description, many specific details are set forth to facilitate a full understanding of the present application. However, the present application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without violating the connotation of the present application, so the present application is not limited by the specific embodiments disclosed below.
[0039] See also Figures 1 to 7 The embodiment of the present application discloses a conversion circuit for a Type-C adapter, the Type-C adapter includes a first Type-C female connector 1 and a second Type-C female connector 2, and the conversion circuit includes a first Type-C pin group 31, a second Type-C pin group 32, a control chip U2, a first conversion switch U7 and a second conversion switch U8.
[0040] Each pin of the first Type-C pin group 31 is configured to be connected to each pin of the first Type-C female connector 1, and the first Type-C pin group 31 includes a first CC1 pin and a first CC2 pin. Each pin of the second Type-C pin group 32 is configured to be connected to each pin of the second Type-C female connector 2, and the second Type-C pin group 32 includes a second CC1 pin and a second CC2 pin.
[0041] The control chip U2 is configured to detect whether the first Type-C female connector 1 and the second Type-C female connector 2 are positively or reversely connected to an external device. The control chip U2 includes a third CC1 pin, a third CC2 pin, a first signal pin DP1, a second signal pin DP2 and a power input pin VIN. The third CC1 pin is connected to the first CC1 pin, the third CC2 pin is connected to the first CC2 pin, the third CC1 pin is connected to the first signal pin DP1, and the third CC2 pin is connected to the second signal pin DP2.
[0042] The first conversion switch U7 includes a first control pin Select, a third signal pin B1 and a fourth signal pin A, wherein the third signal pin B1 is connected to the second signal pin DP2, and the fourth signal pin A is connected to the second CC1 pin. The second conversion switch U8 includes a second control pin Select, a fifth signal pin B1 and a sixth signal pin A, wherein the fifth signal pin B1 is connected to the first signal pin DP1, and the sixth signal pin A is connected to the second CC2 pin.
[0043] When the control chip U2 detects that one of the first Type-C female connector 1 and the second Type-C female connector 2 is positively connected to the external device and the other is reversely connected to the external device, the control chip U2 sends a control signal to the first control pin Select and the second control pin Select respectively, and the first conversion switch U7 connects the third signal pin B1 and the fourth signal pin A according to the corresponding control signal, and the second conversion switch U8 connects the fifth signal pin B1 and the sixth signal pin A according to the corresponding control signal.
[0044] Among them, the first CC1 pin and the first CC2 pin correspond to Figures 1 to 3 The middle CC1A pin and CC2A pin, the second CC1 pin and the second CC2 pin correspond to the CC1B pin and the CC2B pin of the second Type-C female connector 2 respectively, and the third CC1 pin and the third CC2 pin correspond to the CC1 pin and the CC2 pin of the control chip U2 respectively.
[0045] Specifically, the first control pin Select is connected to the CMPV pin of the control chip U2, and the second control pin Select is connected to the CSP2 pin of the control chip U2.
[0046] Specifically, the first Type-C pin group 31 also includes a first VBUS pin, the second Type-C pin group 32 also includes a second VBUS pin, the second VBUS pin is connected to the first VBUS pin, the control chip U2 also includes a power input pin VIN, the first VBUS pin and the second VBUS pin are connected to the power input pin VIN, and the power input pin VIN is grounded through the first capacitor C95.
[0047] More specifically, the specification of the first capacitor C95 is 1uF / 50V.
[0048] It should be noted that the first Type-C female connector 1 and the second Type-C female connector 2 adopt the universal Type-C standard protocol, including 24 pins, which are arranged in two rows in reverse, each row including two ground pins GND, four power input pins VBUS, one direction detection pin CC, one auxiliary pin SBU and 6 data pins DN, DP, SSRXP, SSRXN, SSTXN, SSTXP. The two pairs of pins DN and DP are used for USB 2.0 data transmission, and the four pairs of pins SSRXP / SSRXN and SSTXN / SSTXP are used for high-speed data transmission of USB 3.0 and higher versions. The pins on the first Type-C female connector 1 and the second Type-C female connector 2 correspond one by one to the pins of the first Type-C pin group 31 and the second Type-C pin group 32. The VBUS pin, DN pin and DP pin of the first Type-C pin group 31 are connected to the VBUS pin, DN pin and DP pin of the second Type-C pin group 32 respectively for power supply voltage and data transmission.
[0049] The first Type-C female connector 1 and the second Type-C female connector 2 of the present application are respectively connected to an external device male connector (not shown in the figure), the first Type-C female connector 1 is connected to the first Type-C male connector, the second Type-C female connector 2 is connected to the second Type-C male connector, the first Type-C male connector and the second Type-C male connector use the same Type-C standard protocol as the first Type-C female connector 1 and the second Type-C female connector 2, and the CC1 pin and CC2 pin of the first Type-C male connector are respectively recorded as CC1A' and CC2A', and the CC1 pin and CC2 pin of the second Type-C male connector are respectively recorded as CC1B' and CC2B'. When the first Type-C male connector is positively connected to the first Type-C female connector 1, the CC1A' pin is connected to the CC1A pin, and the CC2A' pin is connected to the CC2A pin; when the first Type-C male connector is reversely connected to the first Type-C female connector 1, the CC1A' pin is connected to the CC2A pin, and the CC2A' pin is connected to the CC1A pin. Similarly, when the second Type-C male connector is connected to the second Type-C female connector 2, the CC1B' pin is connected to the CC1B pin, and the CC2B' pin is connected to the CC2B pin; when the second Type-C male connector is connected to the second Type-C female connector 2, the CC1B' pin is connected to the CC1B pin, and the CC2B' pin is connected to the CC2B pin.
[0050] In an embodiment of the present application, when the control chip U2 detects that one of the first Type-C female connector 1 and the second Type-C female connector 2 is positively connected to an external device and the other is reversely connected to an external device, after the CC1 pin and CC2 pin of the control chip U2 receive signals from the CC1A pin and CC2A pin, the CSP2 pin of the control chip U2 outputs a control signal to the second control pin Select to turn on the second conversion switch U8, and the signal of the CC1A pin flows out through the first signal pin DP1 and then flows to the second conversion switch U8, flows to the sixth signal pin A via the fifth signal pin B1, and then flows to the CC2B pin connected to the sixth signal pin A; the CMPV pin of the control chip U2 outputs a control signal to the first control pin Select to turn on the first conversion switch U7, and the signal of the CC2A pin flows out through the second signal pin DP2 and then flows to the first conversion switch U7, flows to the fourth signal pin A via the third signal pin B1, and then flows to the CC1B pin connected to the fourth signal pin A. Similarly, since a conduction path is formed between the CC1A pin and the CC2B pin, and a conduction path is formed between the CC2A pin and the CC1B pin, the signal of the CC2B pin will also flow to the CC1A pin, and the signal of the CC1B pin will also flow to the CC2A pin, thereby achieving correct conduction between the CC1A' pin and the CC1B' pin, and between the CC2A' pin and the CC2B' pin, thereby achieving fast charging.
[0051] In some embodiments, the first control pin Select is a selection pin. After the first control pin Select receives a corresponding control signal, the third signal pin B1 and the fourth signal pin A are turned on. The second control pin Select is a selection pin. After the second control pin Select receives a corresponding control signal, the fifth signal pin B1 and the sixth signal pin A are turned on.
[0052] Specifically, the first conversion switch U7 further includes a seventh signal pin B0, and the selection pin selects to conduct the fourth signal pin A and the seventh signal pin B0 or the third signal pin B1 and the fourth signal pin A based on the received signal.
[0053] Specifically, the second conversion switch U8 further includes an eighth signal pin B0 , and the selection pin selects to conduct the sixth signal pin A and the eighth signal pin B0 or the fifth signal pin B1 and the sixth signal pin A based on the received signal.
[0054] Specifically, the control signal is a level signal. In a specific example of the present application, the level signal is a high level signal.
[0055] Specifically, the model of the first conversion switch U7 and the second conversion switch U8 is SN74LVC1G3157DCKR. SN74LVC1G3157 is an analog switch based on CMOS technology. It has the good characteristics of low power consumption, low transmission delay and low output impedance. It has 6 pins, namely data ports B0, B1, A, ground terminal GND, power supply terminal VCC and control selection terminal Select. The Select terminal of the analog switch can select to conduct the connection line of B1 and A after receiving a high level signal, or select to conduct the connection line of B0 and A after receiving a low level signal.
[0056] In the specific example of the present application, the third signal pin and the fifth signal pin are set as the B1 pin, and the seventh signal pin and the eighth signal pin are set as the B0 pin. At this time, the first control pin Select and the second control pin Select will conduct the B1 pin and the A pin when receiving a high-level signal, and will open the B0 pin and the A pin when receiving a low-level signal. When both male connectors are inserted forward or reverse, the path between CC1A and CC2B and between CC2A and CC1B can be disconnected based on the low-level signal sent to the Select pin by the control chip U2. Of course, it is not ruled out that the B0 pin and the A pin are used to conduct the path between CC1A and CC2B or CC2A and CC1B.
[0057] Specifically, the switching circuit also includes a first dual MOS transistor U3 and a second dual MOS transistor U4. The first dual MOS transistor U3 includes a first source S1, a second source S2, a first drain D1, a second drain D2, a first gate G1 and a second gate G2, the first source S1 is connected to the first CC1 pin through a first resistor R147, the second source S2 is connected to the first CC2 pin through a second resistor R148, the first drain D1 is grounded through a first pull-down resistor R15, the second drain D2 is grounded through a second pull-down resistor R16, the first gate G1 and the second gate G2 are connected to the third control pin CMPI / SDA of the control chip U2, and the third control pin CMPI / SDA is grounded through a third resistor R17.
[0058] The second dual MOS tube U4 includes a third source S1, a fourth source S2, a third drain D1, a fourth drain D2, a third gate G1 and a fourth gate G2. The third source S1 is connected to the second CC1 pin through a fourth resistor R158, the fourth source S2 is connected to the second CC2 pin through a fifth resistor R159, the third drain D1 is grounded through a third pull-down resistor R161, the fourth drain D2 is grounded through a fourth pull-down resistor R160, the third gate G1 and the fourth gate G2 are connected to the fourth control pin SCL of the control chip U2, and the fourth control pin SCL is grounded through a sixth resistor R157.
[0059] More specifically, the first resistor R147, the second resistor R148, the fourth resistor R158 and the fifth resistor R159 use resistors with a resistance of 10 ohms, the third resistor R17 and the sixth resistor R157 use resistors with a specification of 100k, and the first pull-down resistor R15, the second pull-down resistor R16, the third pull-down resistor R161 and the fourth resistor R160 all use resistors with a specification of 5.1k.
[0060] More specifically, the first dual MOS transistor U3 and the second dual MOS transistor U4 are both formed by two PMOS transistors connected in series.
[0061] The first CC1 pin, the first CC2 pin, the second CC2 pin and the second CC2 pin are grounded through a voltage stabilizing diode D40 / D42 , respectively.
[0062] When the control chip U2 detects that both the first Type-C female connector 1 and the second Type-C female connector 2 are positively connected to the external device or both are reversely connected to the external device, the third control pin CMPI / SDA outputs a level signal to the first gate G1 and the second gate G2 to turn on the first dual MOS tube U3, and the fourth control pin SCL outputs a level signal to the third gate G1 and the fourth gate G2 to turn on the second dual MOS tube U4.
[0063] In the embodiment of the present application, when the control chip U2 detects that both the first Type-C female connector 1 and the second Type-C female connector 2 are positively connected to the external device or both are reversely connected to the external device, after the CC1 pin and CC2 pin of the control chip U2 receive signals from the CC1A pin and the CC2A pin, the CMPI / SDA pin of the control chip U2 outputs a control signal to the first gate G1 and the second gate G2 of the first dual MOS tube U3, so that the first source S1 and the first drain D1 are conductive, and the second source S2 and the second drain D2 are conductive, and the SCL pin outputs a control signal to the third gate G1 and the fourth gate G2 of the second dual MOS tube U4 to turn on the second dual MOS tube U4, so that the third source S1 and the third drain D1 are conductive, and the fourth source S2 and the fourth drain D2 are conductive. The first pull-down resistor R15 and the second pull-down resistor R16 pull down the CC1A pin and the CC2A pin to a low level respectively, and the third pull-down resistor R161 and the fourth pull-down resistor R160 pull down the CC1B pin and the CC2B pin to a low level respectively, so that after the CC1 pin and the CC2 pin of the first Type-C female connector 1 and the second Type-C female connector 2 receive the feedback level respectively, the control chip U2 makes CC1A and CC1B form a conduction path, and CC2A and CC2B form a conduction path. Thus, the CC1A' pin and the CC1B' pin, and the CC2A' pin and the CC2B' pin are correctly connected.
[0064] The control chip U2 also includes a positive power pin VCC, a first basic input and output pin GPIO1 and a second basic input and output pin GPIO2. The positive power pin VCC is grounded through a second capacitor C81. The first basic input and output pin GPIO1 is connected to the second CC1 pin and the second CC2 pin. The first basic input and output pin GPIO1 is grounded through a seventh resistor R165. An eighth resistor R164 is connected in series between the second basic input and output pin GPIO2 and the seventh resistor R165. The second basic input and output pin GPIO2 is grounded through the seventh resistor R165 and the eighth resistor R164.
[0065] Specifically, the specification of the second capacitor C81 is 2.2uF / 16V, the seventh resistor R165 adopts a 4.7k resistor, and the eighth resistor R164 adopts a 220k resistor.
[0066] See also Figure 4 and Figure 5 , an embodiment of the present application also discloses a circuit board 3 for a Type-C adapter, including the adapter circuit as described above.
[0067] See also Figure 6 and Figure 7 The embodiment of the present application also discloses a Type-C adapter, including a first Type-C female connector 1, a second Type-C female connector 2 and a circuit board 3 as described above, wherein different positions of the circuit board 3 are respectively connected to the first Type-C female connector 1 and the second Type-C female connector 2.
[0068] In summary, in the embodiment of the present application, the CC1 pin of the control chip U2 is connected to the CC1A pin, the CC2 pin of the control chip U2 is connected to the CC2A pin, the CC1 pin is connected to the DP1 pin, and the CC2 pin is connected to the DP2 pin. The third signal pin B1 of the first conversion switch U7 is connected to the DP2 pin, the fourth signal pin A is connected to the CC1B pin, the fifth signal pin B1 of the second conversion switch U8 is connected to the DP1 pin, and the sixth signal pin A is connected to the CC2B pin. When the control chip U2 detects that the male plug direction of the external device connected to the first Type-C female plug 1 and the second Type-C female plug 2 is that one end is positively connected and the other end is reversely connected, the control chip U2 outputs a control signal to the Select pin of the first conversion switch U7 to turn on the first conversion switch U7 and outputs a control signal to the Select pin of the second conversion switch U8 to turn on the second conversion switch U8. Since the B1 pin of the first conversion switch U7 is connected to the DP2 pin of the control chip U2, after the first conversion switch U7 is turned on, the CC2A pin is connected to the DP2 pin through the connection of the CC2 pin, the DP2 pin, and the first conversion switch U7. A pathway is formed between the CC1A pin and the CC2B pin, because the B1 pin of the second conversion switch U8 is connected to the DP1 pin of the control chip U2, and then after the second conversion switch U8 is turned on, a pathway is formed between the CC1A pin and the CC2B pin by connecting the CC1 pin, the DP1 pin, and the second conversion switch U8. Therefore, when one of the first Type-C female connector 1 and the second Type-C female connector 2 is positively connected to an external device and the other is reversely connected to an external device, the male connectors of the two external devices can still be connected by CC1 pin and CC1 pin, and CC2 pin and CC2 pin, thereby avoiding the problem of fast charging being unable to be performed due to misaligned connection.
[0069] The above disclosure is only a preferred example of the present application, and its role is to facilitate the technical personnel in this field to understand and implement it. Of course, it cannot be used to limit the scope of rights of the present application. Therefore, equivalent changes made according to the scope of the patent application of the present application still fall within the scope covered by the present application.
Claims
1. A switching circuit for a Type-C adapter, the Type-C adapter comprising a first Type-C female connector and a second Type-C female connector, characterized in that: The switching circuit comprises: A first Type-C pin group, each pin of the first Type-C pin group is configured to be connected to each pin of the first Type-C female connector, and the first Type-C pin group includes a first CC1 pin and a first CC2 pin; a second Type-C pin group, wherein each pin of the second Type-C pin group is configured to be connected to each pin of the second Type-C female connector, and the second Type-C pin group includes a second CC1 pin and a second CC2 pin; A control chip, wherein the control chip is configured to detect whether the first Type-C female connector and the second Type-C female connector are positively or reversely connected to an external device, and the control chip comprises a third CC1 pin, a third CC2 pin, a first signal pin, a second signal pin, and a power input pin, wherein the third CC1 pin is connected to the first CC1 pin, the third CC2 pin is connected to the first CC2 pin, the third CC1 pin is connected to the first signal pin, and the third CC2 pin is connected to the second signal pin; A first conversion switch, wherein the first conversion switch comprises a first control pin, a third signal pin and a fourth signal pin, wherein the third signal pin is connected to the second signal pin, and the fourth signal pin is connected to the second CC1 pin; A second conversion switch, wherein the second conversion switch comprises a second control pin, a fifth signal pin and a sixth signal pin, wherein the fifth signal pin is connected to the first signal pin, and the sixth signal pin is connected to the second CC2 pin; When the control chip detects that one of the first Type-C female connector and the second Type-C female connector is positively connected to an external device and the other is reversely connected to an external device, the control chip sends a control signal to the first control pin and the second control pin, respectively, and the first conversion switch conducts between the third signal pin and the fourth signal pin according to the corresponding control signal, and the second conversion switch conducts between the fifth signal pin and the sixth signal pin according to the corresponding control signal.
2. The switching circuit according to claim 1, characterized in that: The first control pin is a selection pin. After the first control pin receives the corresponding control signal, the third signal pin and the fourth signal pin are turned on; and / or The second control pin is a selection pin. After the second control pin receives the corresponding control signal, the fifth signal pin and the sixth signal pin are turned on.
3. The switching circuit according to claim 2, characterized in that: The first conversion switch further includes a seventh signal pin, and the selection pin selects to conduct the fourth signal pin and the seventh signal pin or the third signal pin and the fourth signal pin based on the received signal; and / or The second conversion switch further includes an eighth signal pin, and the selection pin selects to conduct the sixth signal pin and the eighth signal pin or the fifth signal pin and the sixth signal pin based on a received signal.
4. The switching circuit according to claim 2 or 3, characterized in that: The control signal is a level signal.
5. The switching circuit according to claim 4, characterized in that: The model of the first conversion switch and / or the second conversion switch is SN74LVC1G3157DCKR.
6. The switching circuit according to claim 1, characterized in that: The first Type-C pin group also includes a first VBUS pin; The second Type-C pin group further includes a second VBUS pin, and the second VBUS pin is connected to the first VBUS pin; The control chip further includes a power input pin, the first VBUS pin and the second VBUS pin are connected to the power input pin, and the power input pin is grounded through a first capacitor.
7. The switching circuit according to claim 1, characterized in that: Also includes: A first dual MOS transistor, the first dual MOS transistor comprising a first source, a second source, a first drain, a second drain, a first gate and a second gate, the first source being connected to the first CC1 pin through a first resistor, the second source being connected to the first CC2 pin through a second resistor, the first drain being grounded through a first pull-down resistor, the second drain being grounded through a second pull-down resistor, the first gate and the second gate being connected to a third control pin of the control chip, and the third control pin being grounded through a third resistor; A second dual MOS transistor, wherein the second dual MOS transistor comprises a third source, a fourth source, a third drain, a fourth drain, a third gate and a fourth gate, the third source is connected to the second CC1 pin through a fourth resistor, the fourth source is connected to the second CC2 pin through a fifth resistor, the third drain is grounded through a third pull-down resistor, the fourth drain is grounded through a fourth pull-down resistor, the third gate and the fourth gate are connected to the fourth control pin of the control chip, and the fourth control pin is grounded through a sixth resistor; The first CC1 pin, the first CC2 pin, the second CC2 pin and the second CC2 pin are grounded via a voltage stabilizing diode respectively; When the control chip detects that both the first Type-C female connector and the second Type-C female connector are positively connected to an external device or both are reversely connected to an external device, the third control pin outputs a level signal to the first gate and the second gate to turn on the first dual MOS tube, and the fourth control pin outputs a level signal to the third gate and the fourth gate to turn on the second dual MOS tube.
8. The switching circuit according to claim 1, characterized in that: The control chip also includes a positive power pin, a first basic input-output pin and a second basic input-output pin. The positive power pin is grounded through a second capacitor, the first basic input-output pin is connected to the second CC1 pin and the second CC2 pin, the first basic input-output pin is grounded through a seventh resistor, and an eighth resistor is connected in series between the second basic input-output pin and the seventh resistor.
9. A circuit board for a Type-C adapter, characterized in that: The invention comprises the switching circuit as claimed in any one of claims 1 to 8.
10. A Type-C adapter, characterized in that: It comprises the circuit board as claimed in claim 9, a first Type-C female connector and a second Type-C female connector, wherein the first Type-C female connector and the second Type-C female connector are respectively connected to different positions of the circuit board.