Limiting structure for chip mounting

Abstract

The utility model discloses a chip patch limiting structure, which comprises a patch board and a single patch product, a plurality of patch limiting grooves are formed in the patch surface of the patch board at intervals, the plurality of patch limiting grooves are formed along the patch positions of the single patch products, so that the plurality of single patch products are attached to the patch board through the plurality of patch limiting grooves, and the plurality of single patch products located in the same row share one patch limiting groove. The utility model relates to the technical field of semiconductor integrated circuits, and can solve the problems of long righting time and inconvenience in PCB (Printed Circuit Board) splitting when a single chip product is mounted in the prior art.

Description

Technical Field

[0001] The utility model relates to the technical field of semiconductor integrated circuits, in particular to a chip patch limiting structure. Background Art

[0002] Chip mounting is a process of directly pasting the chip on the PCB board. Its function is to integrate the chip and the circuit board together to achieve complex circuit functions. A large number of single chip products are usually pasted on a PCB board, and the PCB board after mounting is subsequently cut into panels according to usage requirements. Since single chip products need to be mounted on the pads of the PCB board, if the mounting position of the single chip product exceeds the pad, it is easy to be damaged during the panel cutting, so it is necessary to accurately control the mounting position of the single chip product.

[0003] At present, a single chip product needs to be repeatedly positioned by an operator before being attached to the pad of a PCB board. The patching time is long, the patching accuracy is poor, and the single chip product often needs to be straightened, which is time-consuming and laborious. At the same time, the PCB board has a certain thickness and hardness, and it is inconvenient to cut. Therefore, it is necessary to provide a chip patch limiting structure that can solve the problems of long straightening time and inconvenience in PCB board separation when patching a single chip product in the prior art. Summary of the invention

[0004] The utility model aims to provide a chip patch limiting structure, which can solve the problems of long straightening time and inconvenience in PCB board separation when patching a single chip product in the prior art.

[0005] The utility model is achieved in this way:

[0006] A chip patch limiting structure comprises a patch plate and a single patch product; a plurality of patch limiting grooves are formed at intervals on the patch surface of the patch plate, and the plurality of patch limiting grooves are arranged along the patch positions of the single patch products, so that a plurality of single patch products can be attached to the patch plate through the plurality of patch limiting grooves, and a plurality of single patch products in the same row share one patch limiting groove.

[0007] A plurality of first board dividing grooves are formed at intervals on the patch surface of the patch plate, the plurality of first board dividing grooves are arranged perpendicular to the patch limiting grooves, and one or a plurality of single patch products are arranged between two adjacent first board dividing grooves.

[0008] The first board dividing groove is arranged along the side edge of a single patch product.

[0009] A plurality of second board dividing grooves are formed at intervals on the non-patch surface of the patch board, and the plurality of second board dividing grooves are symmetrically arranged on the back of a plurality of first board dividing grooves and a plurality of patch limiting grooves.

[0010] The patch limiting groove, the first board dividing groove and the second board dividing groove are all V-shaped grooves, that is, a long strip structure with a V-shaped cross section.

[0011] The opening angle of the V-shaped groove is 15°-45°.

[0012] The thickness of the patch plate is 0.8±0.1 mm, and the distance between the tips of the two symmetrically arranged V-shaped grooves is 0.2±0.1 mm.

[0013] Compared with the prior art, the utility model has the following beneficial effects:

[0014] 1. The utility model is provided with a patch limiting groove, which is arranged along the patch position of a single patch product, so that it can play a role in rapid positioning and patch limiting when the single patch product is patched, reducing the positioning and straightening time of the operator, improving the patch efficiency, saving time and effort in operation, ensuring the patch accuracy of the single patch product on the corresponding pad of the patch plate, and avoiding damage to the single patch product when cutting the board.

[0015] 2. Since the utility model is provided with the first panel dividing groove and the second panel dividing groove, the patch limiting groove can also serve as the panel dividing groove. The first panel dividing groove and the second panel dividing groove are set according to the panel dividing requirements, and the symmetrical arrangement of the V-shaped groove is used to reduce the thickness of the patch sheet material, so that when the blade of the panel dividing machine is pressed down into the V-shaped groove, the patch sheet material can be quickly broken along the V-shaped groove, thereby reducing the difficulty of panel dividing. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 This is the front view of the chip patch limiting structure of the utility model;

[0017] Figure 2 This is a front view of the sub-board of the chip patch limiting structure of the utility model;

[0018] Figure 3 It is a partial cross-sectional view of a patch plate in the chip patch limiting structure of the utility model.

[0019] In the figure, 1 is a patch board, 11 is a patch limiting groove, 12 is a first dividing board groove, 13 is a second dividing board groove, and 2 is a single patch product. DETAILED DESCRIPTION

[0020] The utility model is further described below in conjunction with the accompanying drawings and specific embodiments.

[0021] Please see attached Figure 1 and attached Figure 2A chip patch limiting structure comprises a patch plate 1 and a single patch product 2; a plurality of patch limiting grooves 11 are formed at intervals on the patch surface of the patch plate 1, and the plurality of patch limiting grooves 11 are arranged along the patch positions of the single patch product 2, so that a plurality of single patch products 2 are attached to the patch plate 1 through the plurality of patch limiting grooves 11, and a plurality of single patch products 2 in the same row share one patch limiting groove 11.

[0022] The patch board 1 can be a patch board such as a PCB board, and the single patch product 2 can be a patch product such as a 6027 chip. The single patch product 2 is pasted on the corresponding pad of the patch board 1. The arrangement of a plurality of patch limiting grooves 11 arranged along the patch position of the single patch product 2 can play a limiting role when the single patch product 2 is patched, thereby improving the patch position accuracy of the single patch product 2, thereby avoiding damage to the single patch product 2 when separating the boards.

[0023] The number and location of the patch limiting grooves 11 can be adjusted according to the patch layout adaptability of a single patch product 2 , so that the patch limiting grooves 11 can effectively limit the patch position of the single patch product 2 .

[0024] Please see attached Figure 1 and attached Figure 2 A plurality of first panel dividing grooves 12 are formed at intervals on the panel surface of the panel plate 1. The plurality of first panel dividing grooves 12 are arranged perpendicular to the panel limiting grooves 11, and one or a plurality of single panel products 2 are arranged between two adjacent first panel dividing grooves 12.

[0025] The first board separation groove 12 can reduce the thickness of the patch board 1. When the blade of the board separation machine is pressed down along the first board separation groove 12, it is conducive to the rapid breaking of the patch board 1 without damaging a single patch product 2.

[0026] The number and location of the first board splitting slots 12 can be adaptively set according to actual board splitting requirements. For example, if 10 single patch products 2 are needed on a small board splitting board, a first board splitting slot 12 is arranged on both sides of every 10 single patch products 2 .

[0027] Please see attached Figure 2 The first panel splitting groove 12 is arranged along the side edge of the single patch product 2. The position of the first panel splitting groove 12 can be arranged along the cutting position of the small panel splitting plate, so as to ensure that the panel splitting cutting requirements are met while not damaging the single patch product 2.

[0028] Please see attached Figure 3 A plurality of second board dividing grooves 13 are formed at intervals on the non-patch surface of the patch board 1, and the plurality of second board dividing grooves 13 are symmetrically arranged on the back side of a plurality of first board dividing grooves 12 and a plurality of patch limiting grooves 11.

[0029] The second board separation groove 13 can further reduce the thickness of the patch plate 1, which is convenient for the board separation operation. The patch limiting groove 11, the first board separation groove 12 and the second board separation groove 13 can adopt the same shape of the groove structure, the patch limiting groove 11 can also serve as the board separation groove, and the first board separation groove 12 can also serve as the patch limiting groove, which is convenient for the board making of the patch plate 1. The patch limiting groove 11 and the first board separation groove 12 that are perpendicular to each other also facilitate the rapid board separation operation of the patch plate 1.

[0030] Please see attached Figure 3 The patch limiting groove 11, the first dividing plate groove 12 and the second dividing plate groove 13 are all V-shaped grooves, that is, a long strip structure with a V-shaped cross section.

[0031] The opening end of the V-shaped groove is located on the surface of the patch plate 1, and the tip of the V-shaped groove is close to the middle of the patch plate 1, which can facilitate the board separation operation of the patch plate 1 while ensuring the strength requirement of the patch plate 1.

[0032] Please see attached Figure 3 The opening angle of the V-shaped groove is 15°-45°, preferably 30°.

[0033] If the opening angle of the V-shaped groove is too large, it will easily affect the strength of the patch sheet 1. If the opening angle of the V-shaped groove is too small, it will easily increase the difficulty of separating the patch sheet 1. The size of the V-shaped groove can be adaptively adjusted according to the blade size of the board separation machine to ensure that the patch sheet 1 can be quickly broken along the V-shaped groove when the blade is pressed down into the V-shaped groove.

[0034] Please see attached Figure 3 The thickness of the patch plate 1 is 0.8±0.1 mm, and the distance between the tips of the two symmetrically arranged V-shaped grooves is 0.2±0.1 mm.

[0035] A plate thickness of 0.2±0.1 mm is reserved between the tips of the two symmetrically arranged V-shaped grooves to ensure the integrity of the patch plate 1, and to have a certain strength and hardness so as not to break accidentally during the patch operation. At the same time, it can break quickly under the pressure of the blade, which is beneficial to improving the efficiency and quality of the panel separation.

[0036] According to the size of the patch board 1 and the single patch product 2, five patch limiting grooves 11 are horizontally spaced apart on the patch surface of the patch board 1, and four first board dividing grooves 12 are vertically spaced apart. On the non-patch surface of the patch board 1, nine second board dividing grooves 13 are symmetrically arranged along the patch limiting grooves 11 and the first board dividing grooves 12.

[0037] During patching, a single patch product 2 is positioned along each patch limiting groove 11 , and two groups of single patch products 2 are patched on each patch limiting groove 11 , with 10 single patch products 2 in each group; the four first dividing board grooves 12 are respectively located at the two end edges of the two groups of single patch products 2 .

[0038] When separating the boards, the blade of the board separator cuts downward along the four first board separation grooves 12, and uses the four first board separation grooves 12 and the corresponding four second board separation grooves 13 to break the patch board 1 to form two separated boards, each of which has five groups of single patch products 2. The blade of the board separator cuts downward along the five patch limiting grooves 11, and uses the five patch limiting grooves 11 and the corresponding five second board separation grooves 13 to break the patch board 1 to form five small separated boards, each of which has one group of ten single patch products 2.

[0039] The above are only preferred embodiments of the present invention and are not intended to limit the scope of protection of the present invention. Therefore, any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A chip patch limiting structure, characterized by: The invention comprises a patch plate (1) and a single patch product (2); a plurality of patch limiting grooves (11) are formed at intervals on the patch surface of the patch plate (1); the plurality of patch limiting grooves (11) are arranged along the patch positions of the single patch products (2), so that a plurality of single patch products (2) are attached to the patch plate (1) through the plurality of patch limiting grooves (11); and a plurality of single patch products (2) in the same row share a patch limiting groove (11).

2. The chip placement limiting structure according to claim 1 is characterized in that: A plurality of first panel dividing grooves (12) are formed at intervals on the panel surface of the panel plate (1), the plurality of first panel dividing grooves (12) are arranged perpendicular to the panel limiting groove (11), and one or a plurality of single panel products (2) are arranged between two adjacent first panel dividing grooves (12).

3. The chip placement limiting structure according to claim 2 is characterized in that: The first panel splitting groove (12) is arranged along the side edge of a single patch product (2).

4. The chip placement limiting structure according to claim 2 is characterized in that: A plurality of second board dividing grooves (13) are formed at intervals on the non-patch surface of the patch plate (1), and the plurality of second board dividing grooves (13) are symmetrically arranged on the back side of a plurality of first board dividing grooves (12) and a plurality of patch limiting grooves (11).

5. The chip placement limiting structure according to claim 4 is characterized in that: The patch limiting groove (11), the first board dividing groove (12) and the second board dividing groove (13) are all V-shaped grooves, that is, long strip structures with V-shaped cross-sections.

6. The chip placement limiting structure according to claim 5 is characterized in that: The opening angle of the V-shaped groove is 15°-45°.

7. The chip placement limiting structure according to claim 5 or 6, characterized in that: The thickness of the patch plate (1) is 0.8±0.1 mm, and the distance between the tips of the two symmetrically arranged V-shaped grooves is 0.2±0.1 mm.

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