Lead frame, packaging structure and intelligent power module

Abstract

The utility model provides a lead frame, a packaging structure and an intelligent power module. The lead frame comprises at least two exposed base islands, at least one built-in base island, at least two first type pins and a plurality of second type pins; each exposed base island is partially exposed out of the plastic package body, and the plastic package body completely wraps the built-in base island; one first type pin is connected with one exposed base island, and the second type pin is separated from the exposed base island; wherein the width of the first type of pins is greater than that of the second type of pins, and the at least two first type of pins extend out of the same side of the plastic package body, so that a chip mounted on the exposed base island can dissipate heat by utilizing the wide pins and the exposed base island, and the heat dissipation effect can be improved; and the wide pins are positioned on the same side, so that the problem of high wiring difficulty of a substrate connected with the lead frame can be solved. The packaging structure comprises the lead frame. The intelligent power module comprises the packaging structure.

Description

Technical Field

[0001] The utility model relates to the technical field of packaging, in particular to a lead frame, a packaging structure and an intelligent power module. Background Art

[0002] Multi-chip co-packaging has the advantages of improving chip integration, enhancing system reliability, optimizing chip communication distance and improving transmission efficiency. IPM (Intelligent Power Module) is a type of power module with multi-chip co-packaging that integrates control chips and power devices. It has the advantages of low loss, high reliability and wide application conditions, and is more and more widely used in the field of power electronics.

[0003] However, with the update and iteration of products, the power and current used are gradually increasing. Conventional SOP (Small Outline Package) surface-mount packaging technology and DIP (Dual In-line Package) through-hole packaging technology cannot meet the heat dissipation requirements of the packaging structure of multi-chip co-packaging, and multi-chip co-packaging increases the difficulty of wiring (layout) of the substrate such as the PCB board. Summary of the Utility Model

[0004] One of the purposes of the utility model is to improve the heat dissipation problem of the packaging structure of multi-chip co-packaging and the high wiring difficulty of the substrate connected to the packaging structure of multi-chip co-packaging.

[0005] To achieve the above purpose, on the one hand, the utility model provides a lead frame. The lead frame includes at least two exposed base islands, at least one internal base island, at least two first-type pins and a plurality of second-type pins; each of the exposed base islands is partially exposed from the plastic package, and the plastic package completely wraps the internal base island; one of the first-type pins is connected to one of the exposed base islands, and the second-type pins are separated from the exposed base islands; wherein, the width of the first-type pins is greater than the width of the second-type pins, and at least two of the first-type pins extend from the same side of the plastic package.

[0006] Optionally, the plastic package has opposite first and second sides, the first-type pins all extend from the first side, and at least a part of the second-type pins extend from the second side.

[0007] Optionally, a part of the second-type pins extend from the first side and are located between adjacent first-type pins, and the rest of the second-type pins extend from the second side.

[0008] Optionally, both the exposed base island and the built-in base island have opposite top and bottom surfaces, and the top surfaces of the exposed base island and the built-in base island are in different planes.

[0009] Optionally, the bottom surfaces of at least two of the exposed base islands are in the same plane; at least a part of the bottom surface of the exposed base island is exposed from the encapsulant.

[0010] Optionally, at least two of the exposed base islands include a first exposed base island and a second exposed base island, and the number of the built-in base islands is one; the top surfaces of the exposed base island and the built-in base island are both parallel to the XY plane, the X direction and the Y direction are perpendicular to each other, and the center lines of the first exposed base island and the second exposed base island in one of the X and Y directions are on both sides of the center line of the built-in base island.

[0011] Optionally, the exposed base island and the built-in base island at least partially overlap in the X direction, and / or the exposed base island and the built-in base island at least partially overlap in the Y direction.

[0012] Optionally, the distance between two adjacent exposed base islands is greater than or equal to 2 mm.

[0013] Optionally, both the exposed base island and the built-in base island are used to mount at least one of a control chip or a power device; one power device and one control chip are mounted on at least one of the exposed base islands.

[0014] On the other hand, the present utility model provides a packaging structure. The packaging structure includes the above-mentioned lead frame, a control chip and a power device mounted on the lead frame, and an encapsulant.

[0015] Optionally, both the exposed base island and the built-in base island have opposite top and bottom surfaces; at least a part of the bottom surface of the exposed base island is exposed from the encapsulant, and the encapsulant covers the top and bottom surfaces of the built-in base island.

[0016] Optionally, at least two of the exposed base islands include a first exposed base island and a second exposed base island, and the packaging structure includes one built-in base island; the top surfaces of the exposed base island and the built-in base island are both parallel to the XY plane, the X direction and the Y direction are perpendicular to each other, and the center lines of the first exposed base island and the second exposed base island in one of the X and Y directions are on both sides of the center line of the built-in base island.

[0017] Optionally, the packaging structure includes a first control chip, a first power device and a second power device, the first control chip is mounted on the top surface of the built-in base island, the first power device is mounted on the top surface of the first exposed base island, and the second power device is mounted on the top surface of the second exposed base island.

[0018] Optionally, the encapsulation structure further includes a second control chip, which is mounted on the top surface of the second exposed base island, and the distance between the second power device and the first control chip is less than the distance between the second control chip and the first control chip.

[0019] Optionally, when one of the first power device and the second power device is in the working state, the other is in the low-voltage state.

[0020] The present utility model further provides an intelligent power module. The intelligent power module includes a substrate and the above-mentioned encapsulation structure, the encapsulation structure is mounted on the substrate, and the lead frame of the encapsulation structure is connected to the substrate.

[0021] In the lead frame provided in the present application, the encapsulation structure including the lead frame, and the intelligent power module including the encapsulation structure, the lead frame includes at least two exposed base islands, at least one built-in base island, at least two first-type pins, and a plurality of second-type pins; each exposed base island is partially exposed from the plastic package, and the plastic package completely wraps the built-in base island; one first-type pin is connected to one exposed base island, and the second-type pins are separated from the exposed base islands; wherein, the width of the first-type pins is greater than the width of the second-type pins, and at least two first-type pins extend from the same side of the plastic package. In the present application, the lead frame includes at least two exposed base islands, and the exposed pads are connected to the first-type pins with a larger width, which helps to effectively conduct the heat generated when the power devices and / or chips mounted on the exposed base islands work, improve the heat dissipation effect, ensure the normal working temperature of the devices and chips, and extend the service life of the devices and / or chips; the first-type pins with a larger width can also withstand a larger current, meet the requirements of high-current operation of the power devices, and the pins with a larger width make the encapsulation structure more stable during installation and use, and can reduce pin damage or poor contact caused by vibration or impact; the first-type pins with a larger width are arranged on the same side of the plastic package, which is convenient for the layout routing of the substrate connected to the pins and reduces the difficulty of substrate wiring. Description of the Drawings

[0022] Figure 1 It is a schematic structural diagram of a lead frame provided by an embodiment of the present utility model.

[0023] Figure 2 It is a schematic structural diagram of an encapsulation structure provided by an embodiment of the present utility model.

[0024] Figure 3 It is a schematic structural diagram of an encapsulation structure provided by another embodiment of the present utility model.

[0025] Figure 4The top view of the packaging structure provided by an embodiment of the present utility model.

[0026] Figure 5 The side view of the packaging structure provided by an embodiment of the present utility model.

[0027] Figure 6 The bottom view of the packaging structure provided by an embodiment of the present utility model.

[0028] Description of reference numerals: 101 - First type of pin; 102 - Second type of pin; 110 - Built-in base island; 111 - First exposed base island; 112 - Second exposed base island; 120 - Connecting rib; 201 - First control chip; 202 - Second control chip; 211 - First power device; 212 - Second power device; 300 - Plastic package; 400 - Bonding wire. Detailed implementation manners

[0029] In order to improve the heat dissipation problem of the packaging structure of multi-chip co-packaging and the high difficulty of substrate wiring connected to the packaging structure of multi-chip co-packaging, the present application provides a lead frame, a packaging structure including the lead frame, and an intelligent power module including the packaging structure.

[0030] The following further describes in detail the lead frame, the packaging structure, and the intelligent power module proposed by the present utility model in conjunction with the accompanying drawings and specific embodiments. According to the following description, the advantages and features of the present utility model will be clearer. It should be noted that the accompanying drawings are all in a very simplified form and use non-precise scales, only for the purpose of facilitating and clearly assisting in explaining the purpose of the embodiments of the present utility model.

[0031] As used in this application, the singular forms "a", "an", and "the" include plural referents, the term "or" is generally used in the sense of including "and / or", the term "several" is generally used in the sense of including "at least one", the terms "at least two" and "a plurality of" are generally used in the sense of including "two or more", in addition, the terms "first", "second", "third" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first", "second", "third" may explicitly or implicitly include one or at least two of such features, unless the content clearly indicates otherwise. Spatially relative terms, such as "under", "below", "lower", "above", "upper", etc., are used to simply describe the relationship between one element of the present disclosure and another element. Spatially relative terms are used to cover different orientations of a device including the element. Spatially relative terms are used to include different orientations of an encapsulated structure during use or operation, as well as the orientations described in the drawings. When the encapsulated structure is turned to a different orientation (rotated 90 degrees or other orientations), the spatially relative adjectives used therein will also be interpreted according to the turned orientation.

[0032] Figure 1 The structural schematic diagram of the lead frame provided by an embodiment of the present utility model. Figure 2 The structural schematic diagram of the encapsulation structure provided by an embodiment of the present utility model. Figure 3 The structural schematic diagram of the encapsulation structure provided by another embodiment of the present utility model.

[0033] Reference Figure 1 、 Figure 2 and Figure 3 As shown in, the lead frame includes at least two exposed base islands, at least one built-in base island 110, at least two first-type pins 101, and a plurality of second-type pins 102; each exposed base island is partially exposed from the encapsulant 300, and the encapsulant 300 completely wraps the built-in base island 110; one first-type pin 101 is connected to one exposed base island, and the second-type pins 102 are separated from the exposed base islands; wherein, the width of the first-type pins 101 is greater than the width of the second-type pins 102, and at least two first-type pins 101 extend from the same side of the encapsulant 300.

[0034] In this embodiment, as Figure 1As shown, the lead frame includes two exposed base islands and one built-in base island 110. The two exposed base islands are the first exposed base island 111 and the second exposed base island 112, but are not limited thereto. In other embodiments, the number of exposed base islands and the number of built-in base islands 110 can be selected according to actual situations. For example, the number of external base islands can be 3 or 4, etc., and the number of built-in base islands 110 can be 2 or 3, etc. Hereinafter, an example in which the lead frame includes two exposed base islands and one built-in base island will be used for illustration.

[0035] In this application, both the exposed base islands and the built-in base island 110 are used to mount chips. Since the lead frame includes at least two exposed base islands and at least one built-in base island 110, when using this lead frame for packaging, at least three chips are mounted on the lead frame. Furthermore, the packaging structure including this lead frame is a multi-chip co-packaging structure. It should be noted that for the convenience of description, in this specification, "chip" can generally refer to a control chip and a power device.

[0036] Exemplarily, when the lead frame is applied to an intelligent power module, both the exposed base islands and the built-in base island 110 are used to mount at least one of a control chip or a power device. Among them, each exposed base island partially exposes from the plastic package 300, and the plastic package completely wraps the built-in base island 110.

[0037] Figure 4 It is a top view of the packaging structure provided by an embodiment of the present invention. Figure 5 It is a side view of the packaging structure provided by an embodiment of the present invention. Figure 6 It is a bottom view of the packaging structure provided by an embodiment of the present invention. Specifically, both the exposed base islands and the built-in base island 110 have opposite top and bottom surfaces. Refer to Figure 1 and Figure 4 As shown, the plastic package 300 covers the top surfaces of the exposed base islands (including the first exposed base island 111 and the second exposed base island 112) and the top surface of the built-in base island 110. Refer to Figure 1 and Figure 6 As shown, the plastic package 300 covers the bottom surface of the built-in base island 110, and at least part of the bottom surface of the exposed base island exposes from the plastic package 300.

[0038] Among them, the area and shape of the exposed bottom surface of the exposed base island can be designed according to actual needs. Exemplarily, the area of the exposed bottom surface of the first exposed base island 111 is approximately 2.74 mm * 3.61 mm; the area of the exposed bottom surface of the second exposed base island 112 is approximately 2.74 mm * 2.21 mm.

[0039] It should be noted that in the present application, at least part of the bottom surface of the exposed base island is exposed from the encapsulant 300, so that the bottom surface of the exposed base island can be connected to a substrate (such as a PCB board) through solder paste. Furthermore, the junction temperature of the power device and the heat of the control chip can be effectively dissipated through the substrate, improving the heat dissipation capacity, protecting the chip, and helping to increase the service life of the chip.

[0040] In this embodiment, the top surfaces of the exposed base island and the built-in base island 110 are in different planes. Specifically, the top surface of the first exposed base island 111 and the top surface of the built-in base island 110 are in different planes, and the top surface of the second exposed base island 112 and the top surface of the built-in base island 110 are in different planes. Exemplarily, both the exposed base island and the built-in base island are sheet-shaped. Thus, the bottom surface of the first exposed base island 111 and the bottom surface of the built-in base island 110 are in different planes, and the bottom surface of the second exposed base island 112 and the bottom surface of the built-in base island 110 are in different planes. In the present application, the exposed base island can be sunken by indenting the lead frame, so that there is a certain height difference between the surface of the exposed base island and the surface of the built-in base island 110.

[0041] It should be noted that the height difference between the surfaces of the exposed base island and the built-in base island 110 can increase the insulation distance between the exposed base island and the built-in base island 110, reducing chip failures caused by insufficient insulation distance. It can not only reduce the risks of electrical breakdown and short circuit, reduce the possibility of leakage, improve the electrical safety of the entire chip system, increase the service life and stability of the chip, but also help to reduce the interference of external electromagnetic fields or static electricity on the internal circuit of the chip, improve the stability and reliability of the chip in a complex electromagnetic environment, and at the same time can withstand a higher voltage, be applicable to a high-voltage working environment, and broaden the application range of the chip.

[0042] In this embodiment, the bottom surfaces of at least two exposed base islands are in the same plane. Specifically, the bottom surfaces of the first exposed base island 111 and the second exposed base island 112 are in the same plane. In this way, it is convenient to expose the bottom surfaces of two or even more than two exposed base islands in the process. When the first exposed base island 111 and the second exposed base island 112 have the same thickness, the top surfaces of the first exposed base island 111 and the second exposed base island 112 can also be in the same plane. In other embodiments, the bottom surfaces of the first exposed base island 111 and the second exposed base island 112 can also be in different planes.

[0043] In this embodiment, the exposed base islands are all high-voltage regions, and the distance between two adjacent exposed base islands is greater than or equal to 2 mm; for example, the distance between the first exposed base island 111 and the second exposed base island 112 can be greater than or equal to 2 mm. This can reduce the mutual interference between the two high-voltage regions, reduce the electromagnetic interference of the exposed base islands, make the working state of the chips and / or power devices on the exposed base islands more stable, maintain sufficient electrical clearance and creepage distance, enhance the insulation effect, reduce the risk of leakage and short circuit. At the same time, it can also provide more sufficient space for the heat dissipation design of each exposed base island, avoid heat concentration and mutual influence, and improve the heat dissipation efficiency.

[0044] For example, referring to Figure 2 and Figure 3 as shown, the internal base island 110 is used to install the first control chip 201, and the first external base island 111 and the second external base island 112 are respectively installed with the first power device 211 and the second power device 212.

[0045] In some embodiments, at least one exposed base island is installed with a power device and a control chip. For example, as Figure 2 shown, the second exposed base island 112 is also installed with the second control chip 202. In this way, four chips can be placed in the three-base island structure, integrating more chips within the limited number of base islands, with high reliability and high integration, which helps to reduce the size of the overall circuit and achieve a more compact design.

[0046] It should be noted that the areas of the exposed base islands and the built-in base island 110 can be designed according to the areas of the control chips and / or power devices to be installed thereon, and the areas of the exposed base islands and the built-in base island 110 should be larger than the areas of the control chips and / or power devices installed thereon. When a control chip and a power device are installed on the second exposed base island 112, a power device is installed on the first exposed base island 111, and a control chip is installed on the built-in base island 110, the area of the second exposed base island 112 can be larger than the area of the first exposed base island 111 and larger than the area of the built-in base island 110, but not limited to this. In some embodiments, according to the actual situation, the area of the built-in base island 110 can also be larger than the area of the external base island.

[0047] When a control chip and a power device are installed on an exposed base island, it is necessary to first consider the safety distance between the control chip and the power device on the exposed base island, and secondly, consider the safety distance between the chip and the edge of the exposed base island. Therefore, the area of the exposed base island should be made as large as possible under the condition of permission. When only one chip is installed on the base island, the area of the base island only needs to meet the size for packaging the chip. In addition, making the area of the exposed base island as large as possible can better dissipate heat and accommodate larger chips, which helps to increase more application solutions.

[0048] In some embodiments of the present application, with reference to Figure 2 as shown, the top surfaces of the exposed base island and the built-in base island 110 are both parallel to the XY plane, the X direction and the Y direction are perpendicular to each other, and the centerlines of the first exposed base island 111 and the second exposed base island 112 in one of the XY plane directions are located on both sides of the centerline of the built-in base island 110. This facilitates the wire bonding connection between the control chip of the built-in base island 110 and the two exposed base islands, as well as the wire bonding connection between the control chip on the built-in base island 110 and the chips on the two exposed base islands, helps to shorten the wire bonding length, makes the circuit wiring shorter and more direct, reduces the delay and loss of signal transmission, reduces the risks that are prone to occur in wire bonding operations, such as wire collapse and wire punching, and improves the quality and yield of the finished chips. In addition, the insulation distance between the first exposed base island 111 and the second exposed base island 112 should be greater than or equal to 2 mm. If the built-in base island 110 is placed on the left side of the first exposed base island 111 or on the right side of the second exposed base island 112, it will cause the overall size of the chip to increase. That is, placing the built-in base island 110 between the first exposed base island 111 and the second exposed base island 112 can make full use of the insulation distance between the two exposed base islands, which is beneficial to reducing the overall area of the chip.

[0049] In some embodiments of the present application, with reference to Figure 1 as shown, the exposed base island and the built-in base island 110 at least partially overlap in the X direction, and / or the exposed base island and the built-in base island 110 at least partially overlap in the Y direction.

[0050] Exemplarily, with reference to Figure 1 as shown, the top surfaces of the first exposed base island 111, the second exposed base island 112 and the built-in base island 110 are all parallel to the XY plane, the X direction and the Y direction are perpendicular to each other; the first exposed base island 111 and the built-in base island 110 at least partially overlap in the X direction, and the first exposed base island 111 and the built-in base island 110 at least partially overlap in the Y direction; the second exposed base island 112 and the built-in base island 110 at least partially overlap in the X direction, and the second exposed base island 112 and the built-in base island 110 at least partially overlap in the Y direction. In this way, the arrangement between the built-in base island 110 and the two exposed base islands is compact, which helps to reduce the size of the lead frame and the overall area of the packaging structure.

[0051] With reference to Figure 1 as shown, the lead frame further includes at least two first-type pins 101 and a plurality of second-type pins 102. One first-type pin 101 is connected to one exposed base island, and the second-type pins 102 are separated from the exposed base island, that is, the second-type pins 102 are not connected to the exposed base island; wherein, the width of the first-type pins 101 is greater than the width of the second-type pins 102, and at least two first-type pins 101 extend from the same side of the plastic package 300.

[0052] In this application, both the first-type pins 101 and the second-type pins 102 are partially embedded in the plastic package 300 and partially protrude from the plastic package 300. The part of the pin that protrudes from the plastic package 300 is called the exposed part.

[0053] Exemplarily, the width of the first-type pin 101 is greater than or equal to 4 mm. Refer to Figure 1 As shown, the exposed part of the first-type pin 101 protruding from the plastic package 300 may have a groove. Setting a groove in the exposed part of the first-type pin 101 can reduce the difficulty of the lead cutting operation and improve the operation stability.

[0054] Refer to Figure 1 As shown, the plastic package 300 has opposite first and second sides. The first-type pins 101 may all protrude from the first side, and at least some of the second-type pins 102 protrude from the second side of the plastic package 300.

[0055] Exemplarily, the first exposed base island 111 is connected to a first-type pin 101 (i.e., Pin12), and the second exposed base island 112 is connected to a first-type pin 101 (i.e., Pin10). Both Pin10 and Pin12 protrude from the first side of the plastic package 300.

[0056] Some of the second-type pins 102 protrude from the first side of the plastic package 300 and are located between adjacent first-type pins 101, and the remaining second-type pins 102 protrude from the second side of the plastic package 300. Specifically, the multiple second-type pins 102 include Pin1, Pin2, Pin3, Pin4, Pin5, Pin6, Pin7, Pin8, Pin9, and Pin11. Among them, Pin11 is arranged between two first-type pins 101 (i.e., Pin10 and Pin12) and protrudes from the first side of the plastic package 300, and Pin1 to Pin9 are arranged along the second side of the plastic package 300 and protrude from the second side.

[0057] It should be noted that the first-type pins 101 are arranged on the first side of the plastic package 300, and the second-type pins 102 are concentrated as much as possible on the second side of the plastic package 300. This is convenient for the layout of the wiring of the substrate connected to the pins, and can also prevent the wide pins (i.e., the first-type pins 101) from affecting the layout of the relatively numerous narrow pins (i.e., the second-type pins 102), and will not increase the layout difficulty of the narrow pins.

[0058] In this embodiment, the distance (or horizontal distance) between Pin1 and the first exposed base island 111 in the XY plane is close, and the distances between Pin8, Pin9, and Pin11 and the second exposed base island 112 in the XY plane are close. Since the first exposed base island 111 and the second exposed base island 112 sink, the vertical distance (perpendicular to the XY plane) between Pin1, Pin8, Pin9, and Pin11 and the exposed base islands can be increased, thereby increasing the insulation distance between Pin1, Pin8, Pin9, and Pin11 and the exposed base islands.

[0059] Refer to Figure 1 As shown, Pin10 and Pin12 connected to the exposed base islands are high-voltage pins. Setting the high-voltage pins with a large width on the same side of the plastic package 300 can make the substrate wiring more regular and orderly, reduce the complexity and crossing of the wiring, reduce the risk of wiring errors, and the centralized layout helps to more effectively control and shield the electromagnetic field generated by the high voltage, reducing the electromagnetic interference to other circuit parts; in a system-on-chip, when isolation of the high-voltage part is required, setting the high-voltage pins with a large width on the same side of the plastic package 300 is easier to achieve physical isolation and insulation treatment, improving the safety of the circuit. During the manufacturing process, this layout can simplify the assembly and soldering processes, improving production efficiency and product consistency.

[0060] In some embodiments, refer to Figure 1 As shown, Pin1, which is a pin of the second type, can also be a high-voltage pin. Since a sufficient creepage distance is required between the high-voltage and low-voltage pins, at this time, the position of Pin2 can be vacant, and the low-voltage pins of the second type of pins start to be arranged from the position of Pin3. Setting Pin1 at the edge position of a row of narrow pins, or in other words, setting the high-voltage narrow pins away from the low-voltage narrow pins, is convenient for achieving isolation between the high-voltage pins and the low-voltage pins, and also convenient for the layout and wiring planning of the substrate.

[0061] It should be noted that Pin11 is a low-voltage pin. Setting the Pin11 with a small width between the high-voltage pins Pin10 and Pin12 with a large width can make full use of the isolation spacing between the two high-voltage pins, improve the space utilization rate of the lead frame, and thus can adapt to more products.

[0062] To ensure the external electrical isolation between Pin10, Pin11, and Pin12, the distance between the exposed parts of adjacent two pins needs to be greater than or equal to 1.4 mm. Exemplarily, the distance between the exposed parts of Pin10 and Pin11 is greater than or equal to 1.4 mm, and the distance between the exposed parts of Pin11 and Pin12 is greater than or equal to 2 mm.

[0063] Refer to Figure 1As shown, the pitch between two adjacent second-type pins 102 is greater than or equal to 0.6 mm, that is, the pitch between two adjacent pins among Pin1 to Pin9 is greater than or equal to 0.6 mm. This facilitates the layout of traces on the substrate and can avoid problems such as short circuits that are prone to occur during the soldering of system-on-chip.

[0064] Reference Figure 1 As shown, the built-in base island 110 is supported by two second-type pins Pin4 and Pin5 together, and both the first exposed base island 111 and the second exposed base island 112 are supported by the first-type pins 101 with large width and the wide connecting ribs 120 (as shown by the dashed box in Figure 1 ), which can reduce the operability problems caused by the instability of the frame due to factors such as vibration and impact during the packaging process.

[0065] In this application, the materials of the first-type pins 101, the second-type pins 102, the exposed base islands, and the built-in base island 110 can be the same. For example, they all include but are not limited to materials with good heat dissipation and electrical conductivity such as copper.

[0066] Reference Figure 2 and Figure 3 As shown, this application also provides a packaging structure, which includes the above-mentioned lead frame, a control chip and a power device mounted on the lead frame, and a plastic package 300.

[0067] Exemplarily, the control chip of this application includes but is not limited to an IC chip. The power device includes but is not limited to a MOS transistor, an IGBT (Insulated Gate Bipolar Transistor), or a GaN transistor.

[0068] The lead frame includes at least two exposed base islands, at least one built-in base island 110, at least two first-type pins 101, and a plurality of second-type pins 102; each exposed base island is partially exposed from the plastic package 300, and the plastic package 300 completely wraps the built-in base island 110; one first-type pin 101 is connected to one exposed base island, and the second-type pins 102 are separated from the exposed base islands; among them, the width of the first-type pins 101 is greater than the width of the second-type pins 102, and at least two first-type pins 101 extend from the same side of the plastic package 300.

[0069] Both the exposed base islands and the built-in base island have opposite top and bottom surfaces. At least part of the bottom surface of the exposed base island is exposed from the plastic package 300, and the plastic package 300 covers the top and bottom surfaces of the built-in base island 110. Exemplarily, the lead frame includes two exposed base islands and one built-in base island 110. The two exposed base islands are the first exposed base island 111 and the second exposed base island 112, and the first exposed base island 111 and the second exposed base island 112 are located on both sides of the built-in base island 110.

[0070] Exemplarily, the top surface of the first exposed base island 111 and the top surface of the built-in base island 110 are in different planes, and the top surface of the second exposed base island 112 and the top surface of the built-in base island 110 are in different planes. The exposed base island and the built-in base island are sheet-like with equal thickness, so that the bottom surface of the first exposed base island 111 and the bottom surface of the built-in base island 110 are in different planes, and the bottom surface of the second exposed base island 112 and the bottom surface of the built-in base island 110 are in different planes.

[0071] The bottom surfaces of at least two exposed base islands are in the same plane. Specifically, the bottom surfaces of the first exposed base island 111 and the second exposed base island 112 are in the same plane, so that it is convenient to expose the bottom surfaces of two or even more than two exposed base islands in the process.

[0072] In some embodiments of the present application, as Figure 2 shown, the packaging structure further includes a first control chip 201, a second control chip 202, a first power device 211 and a second power device 212; the first control chip 201 is installed on the top surface of the built-in base island 110; the first power device 211 is installed on the top surface of the first exposed base island 111; the second control chip 202 and the second power device 212 are installed on the top surface of the second exposed base island 112. In this way, the dual power devices utilize the area and structural characteristics of the exposed base island to dissipate heat more effectively, ensure that the chips work within a suitable temperature range, and the relative positions of the chips are fixed and compact, which helps to reduce the influence of external interference on the chip operation and improve the stability and reliability of the system. In the packaging process, the structure of three base islands with four chips is easier to implement an efficient packaging process and improve the quality and consistency of the packaging. Exemplarily, both the first control chip 201 and the second control chip 202 are IC chips; both the first power device 211 and the second power device 212 are MOS transistors, for example, both are planar MOS transistors.

[0073] Refer to Figure 2 shown, the distance between the second power device 212 and the first control chip 201 is less than the distance between the second control chip 202 and the first control chip 201. Or rather, the power device on the second exposed base island 112 is closer to the built-in base island relative to the control chip. The advantage is that it is convenient for wire bonding and can be wire bonded within the optimal range, making the bonding wire shorter and avoiding risks in the packaging operation.

[0074] Refer to Figure 2 shown, exemplarily, the first control chip 201 can be electrically connected to the first exposed base island 111, the second control chip 202, and the second power device 212 through bonding wires 400; the second control chip 202 can be electrically connected to the first power device 211 and the first exposed base island 111 through bonding wires 400.

[0075] In some embodiments of the present application, with reference to Figure 3 as shown, the packaging structure may include a first control chip 201, a first power device 211, and a second power device 212; the first control chip 201 is installed on the top surface of the built-in base island 110; the first power device 211 and the second power device 212 are respectively installed on the top surfaces of the first exposed base island 111 and the second exposed base island 112. Exemplarily, the first control chip 201 may be electrically connected to the second power device through a bonding wire 400, and the first power device 211 may be electrically connected to the second power device 212 and the second exposed base island 112 through a bonding wire 400. Exemplarily, the first control chip 201 is an IC chip, the first power device 211 is a GaN transistor, and the second power device 212 is a MOS transistor.

[0076] In the present application, with reference to Figure 2 and Figure 3 as shown, the second type of pin 102 may be electrically connected to the control chip and / or the power device through a bonding wire 400.

[0077] In the present application, with reference to Figure 2 and Figure 3 as shown, the packaging structure includes two power devices, wherein when one of the first power device 211 and the second power device 212 is in an operating state, the other is in a low voltage state.

[0078] Exemplarily, the packaging structure of the present application may be a multi-chip co-packaging structure for IPM products.

[0079] The present application also provides an intelligent power module. The intelligent power module includes a substrate and the above-mentioned packaging structure. The packaging structure is installed on the substrate, and the lead frame of the packaging structure is connected to the substrate.

[0080] The lead frame includes at least two exposed base islands, a first type of pin 101 connected to the exposed base islands, and a second type of pin 102 separated from the exposed base islands. The width of the first type of pin 101 is greater than that of the second type of pin 102. Wherein, the part of the exposed base island exposed from the plastic package 300, the first type of pin 101, and the second type of pin 102 can all be welded to the substrate, and the exposed base island and the first type of pin 101 with a large width can improve the heat dissipation effect of the control chip and the power device in the packaging structure.

[0081] In the lead frame provided by the present application, the packaging structure including the lead frame, and the intelligent power module including the packaging structure, the lead frame includes at least two exposed base islands, at least one built-in base island 110, at least two first-type pins 101, and a plurality of second-type pins 102; each exposed base island is partially exposed from the plastic package, and the plastic package completely wraps the built-in base island 110; one first-type pin 101 is connected to one exposed base island, and the second-type pins 102 are separated from the exposed base islands; wherein, the width of the first-type pins 101 is greater than the width of the second-type pins 102, and at least two first-type pins 101 extend from the same side of the plastic package 300. In the present application, the lead frame includes at least two exposed base islands, and the exposed pads are connected to the first-type pins 101 with a larger width, which helps to effectively conduct the heat generated when the power devices and / or chips mounted on the exposed base islands work, improve the heat dissipation effect, ensure the normal operating temperature of the devices and chips, and extend the service life of the devices and / or chips; the first-type pins 101 with a larger width can also withstand a larger current, meet the requirements of high-current operation of power devices, and the pins with a larger width make the packaging structure more stable during installation and use, and can reduce pin damage or poor contact caused by vibration or impact; the first-type pins 101 with a larger width are arranged on the same side of the plastic package, which is convenient for the layout of the substrate connected to the pins, and reduces the difficulty of substrate wiring.

[0082] It should be noted that this specification describes in a progressive manner. The packaging structure and the intelligent power module described later mainly focus on the differences from the lead frame described earlier. For the same and similar parts between each part, reference can be made to each other.

[0083] The above description is only a description of the preferred embodiments of the present invention, and does not limit the scope of the rights of the present invention in any way. Any person skilled in the art can make possible changes and modifications to the technical solutions of the present invention by using the methods and technical contents disclosed above without departing from the spirit and scope of the present invention. Therefore, any simple modifications, equivalent changes and modifications made to the above embodiments according to the technical essence of the present invention without departing from the technical solutions of the present invention all belong to the protection scope of the technical solutions of the present invention.

Claims

1. A lead frame, characterized in that: It includes at least two exposed base islands, at least one built-in base island, at least two first-type pins and multiple second-type pins; each of the exposed base islands partially exposes the plastic package, and the plastic package fully wraps the built-in base island; one first-type pin is connected to one of the exposed base islands, and the second-type pin is separated from the exposed base island; wherein the width of the first-type pin is greater than the width of the second-type pin, and at least two of the first-type pins extend from the same side of the plastic package.

2. The lead frame according to claim 1, wherein: The plastic package body has a first side and a second side opposite to each other, the first type pins all extend from the first side, and at least a portion of the second type pins extend from the second side.

3. The lead frame according to claim 2, wherein: A portion of the second type pins extend from the first side and are located between adjacent first type pins, and the rest of the second type pins extend from the second side.

4. The lead frame according to claim 1, wherein: The exposed base island and the built-in base island both have opposite top and bottom surfaces, and the top surface of the exposed base island and the top surface of the built-in base island are located in different planes.

5. The lead frame according to claim 4, wherein: The bottom surfaces of at least two of the exposed base islands are located in the same plane; at least part of the bottom surface of the exposed base island is exposed from the plastic packaging body.

6. The lead frame according to claim 1, wherein: At least two of the exposed base islands include a first exposed base island and a second exposed base island, and the number of the built-in base island is one; the top surfaces of the exposed base island and the built-in base island are parallel to the XY plane, the X direction and the Y direction are perpendicular to each other, and the center lines of the first exposed base island and the second exposed base island in one direction of the XY plane are located on both sides of the center line of the built-in base island.

7. The lead frame according to claim 6, wherein: The exposed base island and the built-in base island at least partially overlap in the X direction, and / or the exposed base island and the built-in base island at least partially overlap in the Y direction.

8. The lead frame according to claim 1, wherein: The distance between two adjacent exposed base islands is greater than or equal to 2 mm.

9. The lead frame according to claim 1, wherein: The exposed base island and the built-in base island are both used to install at least one of a control chip or a power device; one of the power device and the control chip is installed on at least one of the exposed base islands.

10. A packaging structure, characterized in that: It comprises a lead frame as claimed in any one of claims 1 to 9, a control chip and a power device mounted on the lead frame, and a plastic package.

11. The packaging structure according to claim 10, characterized in that: The exposed base island and the built-in base island both have opposite top and bottom surfaces; at least a portion of the bottom surface of the exposed base island is exposed from the plastic packaging body, and the plastic packaging body covers the top and bottom surfaces of the built-in base island.

12. The packaging structure according to claim 10, characterized in that: At least two of the exposed base islands include a first exposed base island and a second exposed base island, and the packaging structure includes an internal base island; the top surfaces of the exposed base island and the internal base island are parallel to the XY plane, the X direction and the Y direction are perpendicular to each other, and the center lines of the first exposed base island and the second exposed base island in one direction of the XY plane are located on both sides of the center line of the internal base island.

13. The packaging structure according to claim 12, characterized in that: The packaging structure includes a first control chip, a first power device and a second power device. The first control chip is mounted on the top surface of the built-in base island, the first power device is mounted on the top surface of the first exposed base island; and the second power device is mounted on the top surface of the second exposed base island.

14. The packaging structure according to claim 13, characterized in that: The packaging structure also includes a second control chip, which is mounted on the top surface of the second exposed base island, and a distance between the second power device and the first control chip is smaller than a distance between the second control chip and the first control chip.

15. The packaging structure according to claim 13, characterized in that: When one of the first power device and the second power device is in an operating state, the other is in a low voltage state.

16. An intelligent power module, characterized in that: The invention comprises a substrate and a packaging structure as claimed in any one of claims 10 to 15, wherein the packaging structure is mounted on the substrate, and a lead frame of the packaging structure is connected to the substrate.

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