Light-emitting element and light-emitting device

By designing multiple pixel cell regions and dummy structural regions in the light emitting element, each sub-cell region shares electrodes, the problem of limitations in the layout of light emitting elements in the prior art is solved, and assembly of larger-sized light emitting devices and efficient lead arrangement are realized.

CN222916543UActive Publication Date: 2025-05-27SUZHOU LEKIN OPTOELECTRONIC TECHNOLOGY CO LTD +1
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Patent Information

Application Number
CN202420840399.3
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-04-22
Publication Date
2025-05-27
Estimated Expiration
2034-04-22

AI Technical Summary

Technical Problem

The multiple pixel cell regions in the existing light emitting elements adopt the electrical connection method of a common cathode or a common anode, which leads to limitations in layout and is difficult to combine and splice into larger-sized light emitting devices.

Method used

A light emitting element is designed, including a plurality of pixel cell regions, each cell region including a plurality of sub-cell regions and a dummy structure region, and the common electrode pad is conductively connected to the first conductive semiconductor layer, allowing each sub-cell region to share electrodes, reduce the lead arrangement, and make the plurality of pixel cell regions independent of each other.

Benefits of technology

The flexible arrangement of multiple pixel unit areas is realized, which is conducive to the combined splicing of multiple light emitting elements, and obtains a larger-sized light emitting device, while reducing the lead arrangement and improving the assembly efficiency of the light emitting elements.

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Abstract

The embodiment of the utility model relates to a light-emitting element and a light-emitting device. The light-emitting element includes: a substrate; the epitaxial layer is located on the substrate and comprises a first conductive semiconductor layer, an active layer and a second conductive semiconductor layer; the epitaxial layer comprises a plurality of pixel unit areas arranged in an array, each pixel unit area comprises a first sub-pixel area, a second sub-pixel area, a third sub-pixel area and a dummy structure area, and the pixel unit areas are distributed at different positions of the pixel unit areas and extend to the boundaries of the pixel unit areas respectively; the dummy structure region is located in the pixel unit region or extends to the boundary of the pixel unit region; the first electrode bonding pad, the second electrode bonding pad, the third electrode bonding pad and the common electrode bonding pad are located on the sides, away from the substrate, of the first sub-pixel area, the second sub-pixel area, the third sub-pixel area and the dummy structure area respectively; the first electrode bonding pad, the second electrode bonding pad and the third electrode bonding pad are conductively connected with the second conductive semiconductor layer; the common electrode pad is conductively connected with the first conductive semiconductor layer.
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Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and particularly to a light-emitting element and a light-emitting device. Background Art

[0002] In related technologies, a common cathode (or common anode) electrical connection method is adopted for multiple pixel unit regions in a light-emitting element, which can reduce lead layout and control the light emission of multiple pixel unit regions simultaneously. However, this electrical connection method results in limitations in the layout of multiple pixel unit regions and the common electrode region, which is not conducive to the combination and splicing of multiple light-emitting elements, and it is difficult to obtain a larger-sized light-emitting device. Summary of the Utility Model

[0003] In view of this, embodiments of the present application provide a light-emitting element and a light-emitting device to solve at least one problem in the background art.

[0004] In a first aspect, embodiments of the present application provide a light-emitting element, which includes: a substrate including a first surface and a second surface opposite to each other; an epitaxial layer located on the first surface of the substrate, including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer stacked in sequence along a direction away from the substrate; the epitaxial layer is patterned and divided into multiple pixel unit regions arranged in an array, and each pixel unit region includes a first sub-pixel region, a second sub-pixel region, a third sub-pixel region, and a dummy structure region; the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region are distributed at different positions of the pixel unit region and respectively extend to the boundary of the pixel unit region; the dummy structure region is located inside the pixel unit region or extends to the boundary of the pixel unit region; a first electrode pad, a second electrode pad, a third electrode pad, and a common electrode pad are respectively located on the side away from the substrate of the first sub-pixel region, the second sub-pixel region, the third sub-pixel region, and the dummy structure region; the first electrode pad, the second electrode pad, and the third electrode pad are respectively electrically connected to the second conductive semiconductor layer in the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region; the common electrode pad is electrically connected to the first conductive semiconductor layer in the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region.

[0005] In combination with the first aspect of the present application, in an optional implementation manner, the dummy structure region extends to the boundary of the pixel unit region; the projections of the first sub-pixel region, the second sub-pixel region, the third sub-pixel region, and the dummy structure region on the plane where the substrate is located are respectively located at the four vertexes of a first quadrilateral region.

[0006] In combination with the first aspect of the present application, in an alternative embodiment, the first sub-pixel region is the light-emitting region of the red sub-pixels, the second sub-pixel region is the light-emitting region of the green sub-pixels, and the third sub-pixel region is the light-emitting region of the blue sub-pixels; the second sub-pixel region is arranged adjacent to the dummy structure region; the dummy structure region and the third sub-pixel region are arranged along the diagonal of the first quadrilateral region.

[0007] In combination with the first aspect of the present application, in an alternative embodiment, the light-emitting element further includes: a first pixel groove, a second pixel groove, and a third pixel groove, all extending from the second surface of the substrate towards the epitaxial layer, and respectively corresponding to the positions of the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region; an optical material located in the first pixel groove and the second pixel groove; wherein, the optical material located in the first pixel groove includes a red light conversion material, and the optical material located in the second pixel groove includes a green light conversion material.

[0008] In combination with the first aspect of the present application, in an alternative embodiment, the light-emitting element further includes: a second pixel groove extension extending from the second surface of the substrate towards the epitaxial layer and corresponding to the position of the dummy structure region; the second pixel groove extension communicates with the second pixel groove, and the green light conversion material is also located in the second pixel groove extension.

[0009] In combination with the first aspect of the present application, in an alternative embodiment, the sum of the projected areas of the second pixel groove and the second pixel groove extension on the plane of the substrate is greater than the projected area of the first pixel groove on the plane of the substrate.

[0010] In combination with the first aspect of the present application, in an alternative embodiment, on the plane of the substrate, the projected area of the third pixel groove is smaller than the projected area of the first pixel groove and smaller than the projected area of the second pixel groove.

[0011] In combination with the first aspect of the present application, in an alternative embodiment, on the plane of the substrate, the projected area of the third sub-pixel region is smaller than the projected area of the first sub-pixel region and smaller than the projected area of the second sub-pixel region; the projected area of the dummy structure region is smaller than the projected area of the first sub-pixel region and smaller than the projected area of the second sub-pixel region.

[0012] In combination with the first aspect of the present application, in an alternative embodiment, the ratio of the maximum groove width of the first pixel groove in a first direction to the maximum groove width of the second pixel groove in the first direction is 0.4:0.6 to 0.6:0.4; the first direction is the direction of the connection line between the most distal ends of the first pixel groove and the second pixel groove relative to each other.

[0013] In combination with the first aspect of the present application, in an alternative embodiment, the projections of the first pixel slot, the second pixel slot, the second pixel slot extension, and the third pixel slot on the plane where the substrate is located are located in the second quadrilateral region; the first pixel slot extends to the first side and the second side of the second quadrilateral region, and the first side and the second side intersect with each other; the second pixel slot extends to the third side and the fourth side of the second quadrilateral region, and the third side and the fourth side intersect with each other; the third pixel slot extends to the second side and the third side of the second quadrilateral region; the second pixel slot extension extends to the first side and the fourth side of the second quadrilateral region; along the extension direction of the first side, the maximum slot width of the first pixel slot is greater than half of the length of the first side; along the extension direction of the second side, the maximum slot width of the first pixel slot is greater than half of the length of the second side; along the extension direction of the third side, the maximum slot width of the second pixel slot is greater than half of the length of the third side; along the extension direction of the fourth side, the maximum slot width of the through slot formed by the mutual penetration of the second pixel slot extension and the second pixel slot is equal to the length of the fourth side.

[0014] In combination with the first aspect of the present application, in an alternative embodiment, the projection of the first pixel slot on the plane where the substrate is located is composed of a first rectangle and a first right trapezoid, and the lower base of the first right trapezoid coincides with one side of the first rectangle; the through slot formed by the mutual penetration of the second pixel slot and the second pixel slot extension is composed of a second rectangle, a third rectangle, and a second right trapezoid on the plane where the substrate is located, and the upper base and the lower base of the second right trapezoid coincide with one side of the second rectangle and the third rectangle respectively; the oblique waist of the second right trapezoid and the oblique waist of the first right trapezoid are adjacent and parallel to each other; the projection of the third pixel slot on the plane where the substrate is located is a rectangle.

[0015] In combination with the first aspect of the present application, in an alternative embodiment, the green light conversion material includes quantum dots; the optical material is located in the second pixel slot and the second pixel slot extension, and the optical material further includes a light diffusion material located between the green light conversion material and the epitaxial layer.

[0016] In connection with the first aspect of the present application, in an alternative embodiment, the light-emitting element further comprises: an isolation barrier wall, including a first sub-segment, a second sub-segment, a third sub-segment, and a fourth sub-segment; wherein, the first sub-segment is formed by a substrate between the first pixel trench and the third pixel trench, the second sub-segment is formed by a substrate between the second pixel trench and the third pixel trench; the third sub-segment is formed by a substrate between the first pixel trench and the second pixel trench; the fourth sub-segment is formed by a substrate between the extension of the second pixel trench and the first pixel trench; one end of the third sub-segment is connected to the first sub-segment and the second sub-segment, and the other end of the third sub-segment is connected to the fourth sub-segment; the substrate is a growth substrate for the epitaxial layer.

[0017] In connection with the first aspect of the present application, in an alternative embodiment, the light-emitting element further comprises: an isolation channel, including a first sub-channel, a second sub-channel, a third sub-channel, and a fourth sub-channel; wherein, the first sub-channel is located between the first sub-pixel region and the third sub-pixel region; the second sub-channel is located between the second sub-pixel region and the third sub-pixel region; the third sub-channel is located between the first sub-pixel region and the second sub-pixel region; the fourth sub-channel is located between the first sub-pixel region and the dummy structure region; one end of the third sub-channel is connected to the first sub-channel and the second sub-channel, and the other end of the third sub-channel is connected to the fourth sub-channel; in the plane of the substrate, the projected shapes of the first sub-segment, the second sub-segment, the third sub-segment, and the fourth sub-segment in the isolation barrier wall are the same as the projected shapes of the first sub-channel, the second sub-channel, the third sub-channel, and the fourth sub-channel in the isolation channel, and the projections of the first sub-channel, the second sub-channel, the third sub-channel, and the fourth sub-channel respectively fall within the projections of the first sub-segment, the second sub-segment, the third sub-segment, and the fourth sub-segment.

[0018] In connection with the first aspect of the present application, in an alternative embodiment, the light-emitting element further comprises: a first pixel trench, a second pixel trench, and a third pixel trench, all extending from the second surface of the substrate towards the epitaxial layer, and corresponding to the positions of the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region respectively; wherein, in the plane of the substrate, the projections of the active layers in the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region respectively fall within the projections of the first pixel trench, the second pixel trench, and the third pixel trench.

[0019] In combination with the first aspect of the present application, in an alternative embodiment, the light-emitting element further includes: an isolation trench including a fifth sub-trench located between the second sub-pixel region and the dummy structure region; the fifth sub-trench penetrates the second conductive semiconductor layer and the active layer from the epitaxial layer towards the substrate, and does not penetrate the first conductive semiconductor layer.

[0020] In combination with the first aspect of the present application, in an alternative embodiment, the light-emitting element further includes: a first upper reflective electrode, a second upper reflective electrode, and a third upper reflective electrode; the first upper reflective electrode is located between the second conductive semiconductor layer in the first sub-pixel region and the first electrode pad; the second upper reflective electrode is located between the second conductive semiconductor layer in the second sub-pixel region and the second electrode pad; the third upper reflective electrode is located between the second conductive semiconductor layer in the third sub-pixel region and the third electrode pad; an insulating layer including a first insulating portion, a second insulating portion, and a third insulating portion; wherein, the first insulating portion covers a part of the sidewall of the first sub-pixel region and extends onto the first upper reflective electrode; the second insulating portion covers a part of the sidewall of the second sub-pixel region and extends onto the second upper reflective electrode; the third insulating portion covers a part of the sidewall of the third sub-pixel region and extends onto the third upper reflective electrode; a first lower reflective electrode, a second lower reflective electrode, and a third lower reflective electrode; the first lower reflective electrode covers the sidewall of the first sub-pixel region not covered by the first insulating portion and extends onto the first insulating portion; the second lower reflective electrode covers the sidewall of the second sub-pixel region not covered by the second insulating portion and extends onto the second insulating portion; the third lower reflective electrode covers the sidewall of the third sub-pixel region not covered by the third insulating portion and extends onto the third insulating portion; wherein, in the thickness direction of the substrate, there is a partial overlap between the first lower reflective electrode and the first upper reflective electrode, a partial overlap between the second lower reflective electrode and the second upper reflective electrode, and a partial overlap between the third lower reflective electrode and the third upper reflective electrode.

[0021] In combination with the first aspect of the present application, in an alternative embodiment, the light-emitting element further includes: a first filter layer, a second filter layer, and a third filter layer, all located on the second surface of the substrate; wherein, the first filter layer covers the first pixel groove, the second filter layer covers the second pixel groove and the second pixel groove extension, and the third filter layer covers the third pixel groove; a protective cover layer covers the first filter layer, the second filter layer, the third filter layer, and the second surface of the substrate.

[0022] In combination with the first aspect of the present application, in an alternative embodiment, the shortest distance at the boundary between the pixel unit region and the light-emitting element is half of the distance between two adjacent pixel unit regions.

[0023] In a second aspect, an embodiment of the present application provides a light-emitting device, which includes a plurality of seamlessly spliced light-emitting elements as described in any of the above embodiments.

[0024] In the light-emitting element provided by the embodiment of the present application, by arranging the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region at different positions of the pixel unit region and extending to the boundary of the pixel unit region, the dummy structure region is located inside the pixel unit region or extends to the boundary of the pixel unit region, and the common electrode pad located on the dummy structure region is electrically connected to the first conductive semiconductor layer in the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region. In this way, the sub-pixel regions in one pixel unit region share an electrode, which can reduce the lead layout while making multiple pixel unit regions independent of each other. Thus, the multiple pixel unit regions in the light-emitting element can be flexibly arranged, which is beneficial to the combined splicing of multiple light-emitting elements to obtain a larger-sized light-emitting device.

[0025] Additional aspects and advantages of the present application will be given in part in the following description, become apparent in part from the following description, or be understood through the practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The schematic embodiments and descriptions thereof of the present application are used to explain the present application and do not constitute an improper limitation to the present application. In the drawings:

[0027] Figure 1 It is a schematic layout diagram of a pixel unit region in which the dummy structure region extends to the boundary of the pixel unit region provided by an embodiment of the present application;

[0028] Figure 2 It is a schematic layout diagram of a pixel unit region in which the dummy structure region is located inside the pixel unit region provided by an embodiment of the present application;

[0029] Figure 3 It is a schematic cross-sectional structure diagram of a pixel unit region provided by an embodiment of the present application, where FIGS. (a), (b), and (c) are schematic cross-sectional structure diagrams along the Figure 1 lines A-A', B-B', and C-C' respectively;

[0030] Figure 4 It is a schematic projection diagram of the first semiconductor layer in the first sub-pixel region, the second sub-pixel region, the third sub-pixel region, and the dummy structure region on the plane of the substrate provided by an embodiment of the present application;

[0031] Figure 5 A schematic diagram of the projection of the second semiconductor layer in the first sub-pixel region, the second sub-pixel region, the third sub-pixel region, and the dummy structure region provided in the embodiment of the present application on the plane of the substrate;

[0032] Figure 6 A microscope image of the light-emitting element provided in the embodiment of the present application;

[0033] Figure 7 A schematic diagram of the projection of the first pixel groove, the second pixel groove, the second pixel groove extension, and the third pixel groove provided in the embodiment of the present application on the plane of the substrate;

[0034] Figure 8 A schematic cross-sectional structure diagram of the first pixel groove, the second pixel groove, the second pixel groove extension, and the third pixel groove provided in the embodiment of the present application, wherein FIGS. (a), (b), and (c) are respectively the cross-sectional structure diagrams along Figure 6 the D-D' line, the E-E' line, and the F-F' line in;

[0035] Figure 9 A schematic cross-sectional structure diagram of the pixel unit provided in the embodiment of the present application, wherein FIGS. (a), (b), and (c) are respectively the cross-sectional structure diagrams along Figure 6 the D-D' line, the E-E' line, and the F-F' line in. Detailed implementation manners

[0036] Hereinafter, the exemplary embodiments disclosed in the present application will be described in more detail with reference to the drawings. Although the exemplary embodiments of the present application are shown in the drawings, it should be understood that the present application can be implemented in various forms and should not be limited by the specific implementation manners set forth herein. On the contrary, these embodiments are provided so that the present application can be more thoroughly understood and the scope of the present application disclosed can be fully communicated to those skilled in the art.

[0037] In the following description, numerous specific details are given to provide a more thorough understanding of the present application. However, it is obvious to those skilled in the art that the present application can be implemented without one or more of these details. In other examples, in order to avoid confusion with the present application, some technical features well known to those skilled in the art are not described; that is, not all features of the actual embodiments are described here, and the well-known functions and structures are not described in detail.

[0038] In the drawings, for clarity, the dimensions of layers, regions, elements, and their relative dimensions may be exaggerated. The same reference numerals denote the same elements throughout.

[0039] It should be understood that when an element or layer is referred to as being "on", "adjacent to", "connected to" or "coupled to" another element or layer, it can be directly on, adjacent to, connected or coupled to the other element or layer, or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on", "directly adjacent to", "directly connected to" or "directly coupled to" another element or layer, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers and / or portions, these elements, components, regions, layers and / or portions should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or portion from another element, component, region, layer or portion. Thus, without departing from the teachings of the present application, the first element, component, region, layer or portion discussed below may be referred to as the second element, component, region, layer or portion. And when discussing the second element, component, region, layer or portion, it does not imply that a first element, component, region, layer or portion necessarily exists in the present application.

[0040] Spatial relationship terms such as "under", "below", "lower", "beneath", "above", "upper", etc. are used herein for convenience in describing the relationship of one element or feature shown in the figures to other elements or features. It should be understood that, in addition to the orientation shown in the figures, spatial relationship terms are intended to include different orientations of the device in use and operation. For example, if the device in the figures is flipped, then an element or feature described as "under" or "beneath" or "below" other elements or features will be oriented "on" the other elements or features. Thus, the exemplary terms "under" and "below" can include both an upper and a lower orientation. The device may be otherwise oriented (rotated 90 degrees or other orientations) and the spatial descriptors used herein are to be interpreted accordingly.

[0041] The purpose of the terms used herein is only to describe specific embodiments and is not a limitation of the present application. As used herein, the singular forms "a", "an" and "the" are also intended to include the plural forms unless the context clearly dictates otherwise. It should also be understood that the terms "comprising" and / or "including", when used in this specification, identify the presence of the stated features, integers, steps, operations, elements and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups. As used herein, the term "and / or" includes any and all combinations of the related listed items.

[0042] To thoroughly understand this application, detailed steps and structures will be presented in the following description to illustrate the technical solutions of this application. The preferred embodiments of this application are described in detail below. However, in addition to these detailed descriptions, this application may have other implementation manners.

[0043] Figure 1 It is a schematic layout diagram of a pixel unit area where the dummy structure area provided in the embodiment of this application extends to the boundary of the pixel unit area; Figure 2 It is a schematic layout diagram of a pixel unit area where the dummy structure area provided in the embodiment of this application is located inside the pixel unit area; Figure 3 It is a schematic cross-sectional structure diagram of the pixel unit area provided in the embodiment of this application, where Figures (a), (b), and (c) are respectively the cross-sectional structure diagrams along Figure 1 the A-A' line, B-B' line, and C-C' line in it.

[0044] The embodiment of this application provides a light-emitting element. Please refer to Figures 1 to 3 and the light-emitting element includes:

[0045] A substrate 100, including a first surface 101 and a second surface 102 opposite to each other;

[0046] An epitaxial layer 110, located on the first surface 101 of the substrate 100, including a first conductive semiconductor layer 111, an active layer 112, and a second conductive semiconductor layer 113 stacked in sequence along the direction away from the substrate 100; the epitaxial layer 110 is patterned and divided into a plurality of pixel unit areas 120 arranged in an array. Each pixel unit area 120 includes a first sub-pixel area 120a, a second sub-pixel area 120b, a third sub-pixel area 120c, and a dummy structure area 120d; the first sub-pixel area 120a, the second sub-pixel area 120b, and the third sub-pixel area 120c are distributed at different positions of the pixel unit area 120 and respectively extend to the boundary of the pixel unit area 120; the dummy structure area 120d is located inside the pixel unit area 120 (as Figure 2 shown) or extends to the boundary of the pixel unit area 120 (as Figure 1 shown);

[0047] The first electrode pad 210a, the second electrode pad 210b, the third electrode pad 210c, and the common electrode pad 220 are respectively located on the side of the first sub-pixel region 120a, the second sub-pixel region 120b, the third sub-pixel region 120c, and the dummy structure region 120d away from the substrate 100; the first electrode pad 210a, the second electrode pad 210b, and the third electrode pad 210c are respectively electrically connected to the second conductive semiconductor layer 113 in the first sub-pixel region 120a, the second sub-pixel region 120b, and the third sub-pixel region 120c; the common electrode pad 220 is electrically connected to the first conductive semiconductor layer 111 in the first sub-pixel region 120a, the second sub-pixel region 120b, and the third sub-pixel region 120c.

[0048] It can be understood that for the light-emitting element provided in the embodiment of the present application, by arranging the first sub-pixel region 120a, the second sub-pixel region 120b, and the third sub-pixel region 120c at different positions in the pixel unit region 120 and extending to the boundary of the pixel unit region 120, and the dummy structure region 120d is located inside the pixel unit region 120 or extends to the boundary of the pixel unit region 120, and moreover, the common electrode pad 220 located on the dummy structure region 120d is electrically connected to the first conductive semiconductor layer 111 in the first sub-pixel region 120a, the second sub-pixel region 120b, and the third sub-pixel region 120c. In this way, the common electrodes of the sub-pixel regions in one pixel unit region 120 can reduce the lead layout while making multiple pixel unit regions 120 independent of each other. Thus, the multiple pixel unit regions 120 in the light-emitting element can be flexibly arranged, which is beneficial to the combination and splicing of multiple light-emitting elements to obtain a larger-sized light-emitting device.

[0049] In some embodiments, please refer to Figure 3 , the substrate 100 can be a sapphire substrate, a silicon carbide substrate, a gallium nitride substrate, a gallium arsenide substrate, a silicon substrate, or other semiconductor material substrates known in the art, etc. In the embodiment of the present application, the substrate 100 can be a silicon substrate.

[0050] It should be noted that the plane where the first surface 101 and the second surface 102 of the substrate 100 are located, or strictly speaking, the central plane in the thickness direction of the substrate 100, is determined as the plane where the substrate 100 is located, and the direction perpendicular to the plane where the substrate 100 is located is the thickness direction of the substrate 100.

[0051] In some specific embodiments, please refer to Figure 3 , the substrate 100 can be a growth substrate, and the epitaxial layer 110 is formed on the growth substrate by an epitaxial growth process. The epitaxial layer 110 is patterned (such as through processes like photolithography and etching), and is divided into multiple pixel unit regions 120 arranged in an array (such as Figure 1 and Figure 2as shown).

[0052] It should be understood that Figure 1 and Figure 2 only illustrate the case where the projected shape of the pixel unit region 120 on the plane where the substrate 100 is located is rectangular or circular, and each pixel unit region 120 includes three sub-pixel regions and a dummy structure region. This application does not exclude the case where the projected shape of the pixel unit region 120 on the plane where the substrate 100 is located is triangular, trapezoidal, pentagonal or other suitable shapes. This application also does not exclude the case where the pixel unit region 120 includes four, five or more sub-pixel regions; and / or, the pixel unit region 120 includes multiple dummy structure regions.

[0053] In some embodiments, the shortest distance at the boundary between the pixel unit region 120 and the light-emitting element is half of the distance between two adjacent pixel unit regions 120. In this way, after multiple light-emitting elements are combined and spliced, the distance between two adjacent pixel unit regions located on different light-emitting elements is equal to the distance between two adjacent pixel unit regions in one light-emitting element, which is beneficial to improving display performance such as the display consistency of the light-emitting device obtained by splicing multiple light-emitting elements.

[0054] In some embodiments, the distance between two adjacent pixel unit regions 120 is greater than the distance between the first sub-pixel region 120a, the second sub-pixel region 120b, the third sub-pixel region 120c and the dummy structure region 120d in the same pixel unit region 120.

[0055] In some embodiments, please refer to Figure 1 and Figure 3 , the light-emitting element further includes: an isolation channel 230, including a first sub-channel 231, a second sub-channel 232, a third sub-channel 233 and a fourth sub-channel 234; wherein, the first sub-channel 231 is located between the first sub-pixel region 120a and the third sub-pixel region 120c; the second sub-channel 232 is located between the second sub-pixel region 120b and the third sub-pixel region 120c; the third sub-channel 233 is located between the first sub-pixel region 120a and the second sub-pixel region 120b; the fourth sub-channel 234 is located between the first sub-pixel region 120a and the dummy structure region 120d; one end of the third sub-channel 233 is connected to the first sub-channel 231 and the second sub-channel 232, and the other end of the third sub-channel 233 is connected to the fourth sub-channel 234.

[0056] In this way, through the isolation effect of each sub-channel in the isolation channel 230, while ensuring the isolation of each sub-pixel region from each other, each sub-pixel region obtains a more reasonable distribution manner and a suitable regional contour, which is beneficial to adjusting the arrangement manner and the light-emitting area size of multiple sub-pixels of different colors.

[0057] Figure 4Schematic diagram of the projection of the first semiconductor layer in the first sub-pixel region, second sub-pixel region, third sub-pixel region, and dummy structure region provided in the embodiment of the present application on the plane of the substrate; Figure 5 Schematic diagram of the projection of the second semiconductor layer in the first sub-pixel region, second sub-pixel region, third sub-pixel region, and dummy structure region provided in the embodiment of the present application on the plane of the substrate.

[0058] Specifically, please refer to Figure 4 and Figure 5 , the first sub-channel 231, second sub-channel 232, third sub-channel 233, and fourth sub-channel 234 penetrate the second conductive semiconductor layer 113, active layer 112, and first conductive semiconductor layer 111 from the epitaxial layer 110 towards the substrate 100. That is to say, the first conductive semiconductor layer 111, active layer 112, and second conductive semiconductor layer 113 located on the first sub-channel 231, second sub-channel 232, third sub-channel 233, and fourth sub-channel 234 are all completely removed. The first sub-pixel region 120a, second sub-pixel region 120b, and third sub-pixel region 120c are isolated from each other. Of course, in some other embodiments, only a part of the epitaxial layer located on the first sub-channel 231, second sub-channel 232, third sub-channel 233, and fourth sub-channel 234 may be removed.

[0059] In some embodiments, please continue to refer to Figure 1 and Figure 3 , the isolation channel 230 further includes a fifth sub-channel 235, and the fifth sub-channel 235 is located between the second sub-pixel region 120b and the dummy structure region 120d; the fifth sub-channel 235 penetrates the second conductive semiconductor layer 113 and the active layer 112 from the epitaxial layer 110 towards the substrate 100, and does not penetrate the first conductive semiconductor layer 111. That is to say, the active layer 112 and the second conductive semiconductor layer 113 located on the fifth sub-channel 235 are completely removed, and only a part of the first conductive semiconductor layer 111 is removed. The epitaxial layers in the second sub-pixel region 120b and the dummy structure region 120d are not completely separated, and the first conductive semiconductor layer 111 in the dummy structure region 120d is connected to the first conductive semiconductor layer 111 in the second sub-pixel region 120b through the first conductive semiconductor layer 111 located on the fifth sub-channel 235 (as shown in Figure 4 ); or in other words, the first conductive semiconductor layer 111 in the dummy structure region 120d is physically connected to the first conductive semiconductor layer 111 in the second sub-pixel region 120b.

[0060] In some embodiments, please refer to Figure 3, the common electrode pad 220 forms an ohmic contact with the first conductive semiconductor layer 111 in the first sub-pixel region 120a, the second sub-pixel region 120b, and the third sub-pixel region 120c, which can provide low-series-resistance electrical conduction for the first sub-pixel region 120a, the second sub-pixel region 120b, and the third sub-pixel region 120c, and achieve the homogenization of the series resistance.

[0061] It should be noted that the dummy structure region 120d corresponding to the common electrode pad 220 is a structure that provides support for the common electrode pad 220 and is used to adjust the height of the common electrode pad 220. Here, the dummy structure region is not used as a light-emitting region, and the active layer 112 in the dummy structure region 120d does not emit light.

[0062] In the embodiment of the present application, along the thickness direction of the substrate 100, the height of the dummy structure region 120d is the same as that of the first sub-pixel region 120a, the second sub-pixel region 120b, and the third sub-pixel region 120c. Thus, along the thickness direction of the substrate 100, the distances between the first electrode pad 210a, the second electrode pad 210b, the third electrode pad 210c, and the common electrode pad 220 and the first surface 101 of the substrate 100 are the same, which can improve the height difference between the electrode pads, thereby improving the phenomena of poor soldering and over-soldering, further reducing the damage to the light-emitting elements, increasing the flip-chip soldering yield, and reducing the manufacturing cost.

[0063] In some embodiments, please refer to Figure 3 , the first conductive semiconductor layer 111 can be an N-type conductive semiconductor layer, and the second conductive semiconductor layer 113 can be a P-type conductive semiconductor layer; the active layer 112 can be a multi-quantum well layer. Correspondingly, the first electrode pad 210a, the second electrode pad 210b, and the third electrode pad 210c can be P-type electrode pads (P-PADs), and the common electrode pad 220 can be an N-type electrode pad (N-PAD). Here, the first conductive semiconductor layer 111 can also be referred to as the "first semiconductor layer", the second conductive semiconductor layer 113 can also be referred to as the "second semiconductor layer", and the active layer 112 can also be referred to as the "semiconductor light-emitting layer".

[0064] In some specific embodiments, the materials of the first conductive semiconductor layer 111 and the second conductive semiconductor layer 113 can include at least one of gallium nitride (GaN), gallium nitride arsenide (GaNAs), gallium phosphide (GaP), aluminum gallium arsenide (AlGaAs), and indium phosphide (InP). The materials of the first electrode pad 210a, the second electrode pad 210b, the third electrode pad 210c, and the common electrode pad 220 include at least one of titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), silver (Ag), and tin (Sn), or an alloy of the above metal materials.

[0065] In some embodiments, please refer to Figure 2 , the dummy structure region 120d is located inside the pixel unit region 120; the first sub-pixel region 120a, the second sub-pixel region 120b, and the third sub-pixel region 120c surround the dummy structure region 120d. The projections of the first sub-pixel region 120a, the second sub-pixel region 120b, the third sub-pixel region 120c, and the dummy structure region 120d on the plane where the substrate 100 is located are located in a circular region.

[0066] In other embodiments, please refer to Figure 1 , the dummy structure region 120d extends to the boundary of the pixel unit region 120; the projections of the first sub-pixel region 120a, the second sub-pixel region 120b, the third sub-pixel region 120c, and the dummy structure region 120d on the plane where the substrate 100 is located are respectively located at the four vertex corners of the first quadrilateral region 310. In this way, when the distance between each pixel unit region 120 is fixed, the occupied area of the pixel unit region 120 can be further increased, and the effective light-emitting area of the light-emitting element can be increased.

[0067] It should be understood that although Figure 1 only the projections of the first sub-pixel region 120a, the second sub-pixel region 120b, the third sub-pixel region 120c, and the dummy structure region 120d on the plane where the substrate 100 is located are respectively located at the four vertex corners of the rectangular region, the present application does not exclude the case where the projections of the first sub-pixel region 120a, the second sub-pixel region 120b, the third sub-pixel region 120c, and the dummy structure region 120d are located at the four vertex corners of a quadrilateral region such as a trapezoid, a parallelogram, or a rhombus.

[0068] In some specific embodiments, on the plane where the substrate 100 is located, the projection shapes of the first sub-pixel region 120a, the second sub-pixel region 120b, the third sub-pixel region 120c, and the dummy structure region 120d can be rectangular, trapezoidal, circular, triangular, or other suitable shapes; the projection shapes of the first sub-pixel region 120a, the second sub-pixel region 120b, the third sub-pixel region 120c, and the dummy structure region 120d can be the same or different. The present application does not make specific limitations on this.

[0069] In some embodiments, please refer to Figure 1 , the first sub-pixel region 120a is the light-emitting region of the red sub-pixel, the second sub-pixel region 120b is the light-emitting region of the green sub-pixel, and the third sub-pixel region 120c is the light-emitting region of the blue sub-pixel; the second sub-pixel region 120b is arranged adjacent to the dummy structure region 120d; the dummy structure region 120d and the third sub-pixel region 120c are arranged along the diagonal of the first quadrilateral region 310.

[0070] It can be understood that the red sub-pixel, the green sub-pixel, and the blue sub-pixel can form a light-emitting pixel unit (full-color LED chip), emitting red, green, and blue light. With the above arrangement, the red sub-pixel and the green sub-pixel can be arranged diagonally, and the blue sub-pixel and the common electrode region (i.e., the region where the dummy structure region 120d is located) can be arranged diagonally, which can provide a larger arrangement space for the red sub-pixel and the green sub-pixel. In this way, it is beneficial to expand the light-emitting area of the red sub-pixel and the green sub-pixel, reduce the filling difficulty of the light conversion material in the red sub-pixel and the green sub-pixel, and further reduce the blue light radiation intensity per unit area of the light conversion material, improving the service life of the light conversion material.

[0071] It should be noted that the sub-pixel region is also called the "light-emitting die", and the pixel unit region is also called the "light-emitting chip". The light-emitting chip can be a blue light chip or an ultraviolet light chip; the light-emitting chip can be a Micro LED (micro light-emitting diode) chip. The red, green, and blue sub-pixels use the same light-emitting chip, and the materials and light-emitting characteristics of the light-emitting regions of each sub-pixel are highly consistent, which is beneficial to improving the display effect and long-term stability of the light-emitting element (full-color LED wafer).

[0072] In the embodiments of the present application, please refer to Figure 1 , on the plane where the substrate 100 is located, the projected area of the third sub-pixel region 120c is smaller than the projected area of the first sub-pixel region 120a and smaller than the projected area of the second sub-pixel region 120b; the projected area of the dummy structure region 120d is smaller than the projected area of the first sub-pixel region 120a and smaller than the projected area of the second sub-pixel region 120b.

[0073] In some specific embodiments, please refer to Figure 1 , the first sub-pixel region 120a and the second sub-pixel region 120b can be located at the upper right corner and the lower left corner of the first quadrilateral region 310 respectively; the third sub-pixel region 120c and the dummy structure region 120d can be located at the lower right corner and the upper left corner of the first quadrilateral region 310 respectively.

[0074] Of course, in some other embodiments, the first sub-pixel region 120a and the second sub-pixel region 120b can be located at the lower left corner and the upper right corner of the first quadrilateral region 310 respectively; the third sub-pixel region 120c and the dummy structure region 120d can be located at the lower right corner and the upper left corner of the first quadrilateral region 310 respectively, or can be located at the upper left corner and the lower right corner of the first quadrilateral region 310 respectively.

[0075] Figure 6 is the microscope image of the light-emitting element provided by the embodiments of the present application; Figure 7Schematic diagram of the projections of the first pixel groove, the second pixel groove, the second pixel groove extension, and the third pixel groove provided in the embodiments of the present application on the plane where the substrate is located; Figure 8 Schematic cross-sectional structure diagrams of the first pixel groove, the second pixel groove, the second pixel groove extension, and the third pixel groove provided in the embodiments of the present application, where FIGS. (a), (b), and (c) are respectively the cross-sectional structure diagrams along Figure 6 lines D-D', E-E', and F-F' in

[0076] In some embodiments, please refer to Figures 6 to 8 , the light-emitting element further includes: a first pixel groove 130a, a second pixel groove 130b, and a third pixel groove 130c, all extending from the second surface 102 of the substrate 100 towards the epitaxial layer 110, and respectively corresponding to the positions of the first sub-pixel region 120a, the second sub-pixel region 120b, and the third sub-pixel region 120c.

[0077] It should be noted that in actual fabrication, the fabricated pixel unit region 120 needs to be flip-chip bonded to a temporary carrier to fabricate the first pixel groove 130a, the second pixel groove 130b, and the third pixel groove 130c on the second surface 102 of the substrate 100 through processes such as photolithography and etching. Therefore, it can be understood that Figure 6 and Figure 7 are schematic diagrams of the pixel unit region 120 being flip-chip mounted on a temporary carrier, with the first pixel groove 130a, the second pixel groove 130b, and the third pixel groove 130c located above the pixel unit region 120.

[0078] In some specific embodiments, the first pixel groove 130a, the second pixel groove 130b, and the third pixel groove 130c can penetrate the substrate 100 to expose the surface of the epitaxial layer 110 in contact with the substrate 100; when the substrate 100 has good light transmittance, each pixel groove can also only extend into the substrate 100.

[0079] In the embodiments of the present application, please refer to Figure 8 , the first pixel groove 130a, the second pixel groove 130b, and the third pixel groove 130c all penetrate the substrate 100; in the thickness direction of the substrate 100, the depths of the first pixel groove 130a, the second pixel groove 130b, and the third pixel groove 130c are equal to the thickness of the substrate 100.

[0080] In some embodiments, on the plane where the substrate 100 is located, the projected shapes of the first pixel groove 130a, the second pixel groove 130b, and the third pixel groove 130c can be rectangular, trapezoidal, circular, triangular, or other suitable shapes; the projected shapes of the first pixel groove 130a, the second pixel groove 130b, and the third pixel groove 130c can be the same or different.

[0081] In some specific embodiments, please refer to Figure 7 , the projected shapes of the first pixel slot 130a, the second pixel slot 130b, and the third pixel slot 130c are respectively the same as the projected shapes of the corresponding first sub-pixel region 120a, second sub-pixel region 120b, and third sub-pixel region 120c. Of course, in some other embodiments, the projected shapes of the first pixel slot 130a, the second pixel slot 130b, and the third pixel slot 130c may also be different from the projected shapes of the corresponding first sub-pixel region 120a, second sub-pixel region 120b, and third sub-pixel region 120c. The present application does not make specific limitations on this.

[0082] In some embodiments, please refer to Figure 8 , on the plane where the substrate 100 is located, the projections of the first pixel slot 130a, the second pixel slot 130b, and the third pixel slot 130c respectively fall within the projection of the first conductive semiconductor layer 111 of the first sub-pixel region 120a, second sub-pixel region 120b, and third sub-pixel region 120c.

[0083] In some embodiments, please refer to Figure 8 , on the plane where the substrate 100 is located, the projections of the active layers 112 in the first sub-pixel region 120a, second sub-pixel region 120b, and third sub-pixel region 120c respectively fall within the projections of the first pixel slot 130a, second pixel slot 130b, and third pixel slot 130c. In this way, the active layer 112 has a smaller area, which is beneficial to improving the current density of the light-emitting element, enabling the light-emitting element to operate at a higher current density, thereby improving the light output efficiency.

[0084] Figure 9 is a schematic cross-sectional structure diagram of a pixel unit provided by an embodiment of the present application, where FIGS. (a), (b), and (c) are respectively schematic cross-sectional structure diagrams along Figure 6 the D-D' line, E-E' line, and F-F' line in

[0085] In some embodiments, please refer to Figure 9 , the light-emitting element further includes: an optical material located in the first pixel slot 130a and the second pixel slot 130b; wherein, the optical material located in the first pixel slot 130a includes a red light conversion material 150a, and the optical material located in the second pixel slot 130b includes a green light conversion material 150b.

[0086] In some specific embodiments, the red light conversion material 150a and the green light conversion material 150b may include phosphors or quantum dots. When phosphors and quantum dots are excited by external energy, electron transitions will occur and energy will be released in the form of light. Moreover, by adjusting the composition, size, etc. of the phosphors and quantum dots, the emission color can be regulated, so that each pixel slot emits light of different colors. Here, the light conversion material is also referred to as a "color conversion material" or a "color conversion layer".

[0087] In actual preparation, please refer to Figure 9 , when both the red light conversion material 150a and the green light conversion material 150b include quantum dots, the optical material located in the first pixel slot 130a and the second pixel slot 130b further includes a light diffusion material 140. The light diffusion material 140 is located between the red light conversion material 150a and the epitaxial layer 110, and between the green light conversion material 150b and the epitaxial layer 110.

[0088] Here, setting the light diffusion material 140 is beneficial for the quantum dots to receive uniform light irradiation, thereby effectively reducing the light intensity received by the center of the quantum dots, greatly improving the light irradiation stability of the quantum dots, and can improve the situation that local quantum dots are prone to light quenching due to too high center light intensity, effectively extending the emission lifetime.

[0089] The light diffusion material 140 includes diffusion particles. The diffusion particles include organic materials, inorganic materials, and organic-inorganic composite materials, such as polystyrene, silicon dioxide, titanium dioxide, etc. By mixing the light diffusion particles into the interior or surface of the matrix, the light diffusion performance is achieved by the reflection and refraction of light between the diffusion particles. The light diffusion material 140 is also referred to as a "light diffusion layer".

[0090] In some embodiments, the optical material may also be located in the third pixel slot 130c. Specifically, when the light emitted by the first sub-pixel region 120a, the second sub-pixel region 120b, and the third sub-pixel region 120c is blue light, the optical material located in the third pixel slot 130c includes a light diffusion material 140 (as shown in FIG. (a) in Figure 9 ); when the light emitted by the first sub-pixel region 120a, the second sub-pixel region 120b, and the third sub-pixel region 120c is ultraviolet light, the optical material located in the third pixel slot 130c may include a blue light conversion material and a light diffusion material located between the blue light conversion material and the epitaxial layer 110.

[0091] In some embodiments, please refer to Figure 7, on the plane where the substrate 100 is located, the projected area of the third pixel groove 130c is smaller than the projected area of the first pixel groove 130a and smaller than the projected area of the second pixel groove 130b. In this way, it is beneficial to expand the filling area of the red light conversion material 150a and the green light conversion material 150b, reduce the filling difficulty of the red light conversion material 150a and the green light conversion material 150b, and reduce the blue light radiation intensity per unit area of the red light conversion material 150a and the green light conversion material 150b, thereby improving the service life of the red light conversion material 150a and the green light conversion material 150b.

[0092] In some embodiments, please refer to Figure 7 , the ratio of the maximum groove width D1 of the first pixel groove 130a along the first direction X to the maximum groove width D2 of the second pixel groove 130b along the first direction X is 0.4:0.6 to 0.6:0.4; the first direction X is the direction of the connection line of the outermost ends of the first pixel groove 130a and the second pixel groove 130b relative to each other.

[0093] It can be understood that if the ratio of D1 to D2 is too low or too high, it will cause the groove width of the first pixel groove 130a or the second pixel groove 130b along the first direction X to be too small, thereby affecting the efficiency of filling the optical material in the first pixel groove 130a and the second pixel groove 130b. Therefore, the ratio of D1 to D2 is 0.4:0.6 to 0.6:0.4, which is beneficial to reducing the difficulty of filling the optical material in the first pixel groove 130a or the second pixel groove 130b and improving the production efficiency.

[0094] In some embodiments, please refer to Figure 7 and Figure 8 , the light-emitting element further includes: a second pixel groove extension 130b', which extends from the second surface 102 of the substrate 100 toward the epitaxial layer 110 and corresponds to the position of the dummy structure region 120d; the second pixel groove extension 130b' communicates with the second pixel groove 130b, and the green light conversion material 150b is also located in the second pixel groove extension 130b'.

[0095] It should be noted that since the first conductive semiconductor layer 111 in the dummy structure region 120d is connected to the first conductive semiconductor layer 111 in the third sub-pixel region 120c through the first conductive semiconductor layer 111 located on the fifth sub-channel 235, when the second pixel groove extension 130b' communicates with the second pixel groove 130b, the first conductive semiconductor layer 111 located on the fifth sub-channel 235 can provide a supporting effect for the green light conversion material 150b.

[0096] In some specific embodiments, along the thickness direction of the substrate 100, the depth of the second pixel groove extension 130b' is the same as the depth of the second pixel groove 130b.

[0097] It can be understood that the second pixel slot extension 130b' and the second pixel slot 130b communicate with each other to form a through slot, so that the pixel slot filled with the green light conversion material 150b extends to the area where the dummy structure area 120d is located, and the area of the pixel slot corresponding to the green sub-pixel is further increased, which is beneficial to the filling of the green light conversion material 150b and the reduction of the blue light radiation intensity of the green light conversion material 150b, and improves the service life of the green light conversion material 150b.

[0098] In some embodiments, please refer to Figure 7 , the sum of the projected areas of the second pixel slot 130b and the second pixel slot extension 130b' on the plane where the substrate 100 is located is greater than the projected area of the first pixel slot 130a on the plane where the substrate 100 is located. In this way, it is beneficial for the pixel unit to emit white light. Specifically, the ratio of the areas of the first pixel slot 130a, the through slot, and the third pixel slot 130c is 3:6:1.

[0099] In some embodiments, please refer to Figure 9 , the green light conversion material 150b includes quantum dots; the optical material is located in the second pixel slot 130b and the second pixel slot extension 130b', and the optical material further includes a light diffusing material 140 located between the green light conversion material 150b and the epitaxial layer 110.

[0100] It can be understood that when the active layer 112 in the dummy structure area 120d does not emit light, by providing the light diffusing material 140 at the bottom of the second pixel slot 130b and the second pixel slot extension 130b', the light emitted from the second sub-pixel area 120b can be diffused into the second pixel slot extension 130b', so that the green sub-pixel emits uniform green light.

[0101] In some embodiments, please refer to Figure 7, the projections of the first pixel slot 130a, the second pixel slot 130b, the second pixel slot extension 130b', and the third pixel slot 130c on the plane of the substrate 100 are located in the second quadrilateral region 320; the first pixel slot 130a extends to the first side S1 and the second side S2 of the second quadrilateral region 320, and the first side S1 and the second side S2 intersect each other; the second pixel slot 130b extends to the third side S3 and the fourth side S4 of the second quadrilateral region 320, and the third side S3 and the fourth side S4 intersect each other; the third pixel slot 130c extends to the second side S2 and the third side S3 of the second quadrilateral region 320; the second pixel slot extension 130b' extends to the first side S1 and the fourth side S4 of the second quadrilateral region 320; along the extension direction of the first side S1, the maximum slot width D3 of the first pixel slot 130a is greater than half of the length of the first side S1; along the extension direction of the second side S2, the maximum slot width D4 of the first pixel slot 130a is greater than half of the length of the second side S2; along the extension direction of the third side S3, the maximum slot width D5 of the second pixel slot 130b is greater than half of the length of the third side S3; along the extension direction of the fourth side S4, the maximum slot width D6 of the through slot formed by the second pixel slot extension 130b' and the second pixel slot 130b communicating with each other is equal to the length of the fourth side S4.

[0102] In this way, the areas of the pixel slots corresponding to the red and green sub-pixels can be further enlarged, which is beneficial to the filling of the red light conversion material 150a and the green light conversion material 150b, reduces the blue light radiation intensity of the red light conversion material 150a and the green light conversion material 150b, and improves the service life of the red light conversion material 150a and the green light conversion material 150b.

[0103] In some specific embodiments, please refer to Figure 7 , the projection of the first pixel slot 130a on the plane of the substrate 100 is composed of a first rectangle R1 and a first right trapezoid T1, and the lower base of the first right trapezoid T1 coincides with one side of the first rectangle R1; the projection of the through slot formed by the second pixel slot 130b and the second pixel slot extension 130b' communicating with each other on the plane of the substrate 100 is composed of a second rectangle R2, a third rectangle R3, and a second right trapezoid T2, and the upper base and the lower base of the second right trapezoid T2 coincide with one side of the second rectangle R2 and the third rectangle R3 respectively; the oblique waist of the second right trapezoid T2 and the oblique waist of the first right trapezoid T1 are adjacent and parallel to each other; the projection of the third pixel slot 130c on the plane of the substrate 100 is a rectangle.

[0104] In this way, the areas of the pixel slots corresponding to the red and green sub-pixels can be maximized, which is conducive to the filling of the red light conversion material 150a and the green light conversion material 150b, reduces the blue light radiation intensity of the red light conversion material 150a and the green light conversion material 150b, and improves the service life of the red light conversion material 150a and the green light conversion material 150b.

[0105] It should be noted that in actual preparation, chamfering treatment needs to be performed on the edges and corners of the first pixel slot 130a, the through slot, and the third pixel slot 130c, so that the sharp protruding parts of the first pixel slot 130a, the through slot, and the third pixel slot 130c form a circular arc transition. Therefore, the above-mentioned rectangle and trapezoid refer to the shapes whose general outlines are the same as those of the rectangle and trapezoid.

[0106] Specifically, the top corners of the projected shape of the first pixel slot 130a composed of the first rectangle R1 and the first right trapezoid T1 are chamfered; the top corners of the projected shape of the through slot composed of the second rectangle R2, the third rectangle R3, and the second right trapezoid T2 are chamfered; the top corners of the rectangle obtained by projecting the third pixel slot 130c onto the plane of the substrate 100 are chamfered.

[0107] In some embodiments, a light isolation reflection layer (not shown in the figure) is further provided on the side walls of the first pixel slot 130a, the through slot, and the third pixel slot 130c to improve the phenomenon of light crosstalk between sub-pixels. The light isolation reflection layer can be a metal reflection layer, and the materials of the metal reflection layer include, for example, chromium (Cr), aluminum (Al); the light isolation reflection layer can also be a DBR reflection layer (Bragg reflection layer), and the materials of the DBR reflection layer include, for example, silicon oxide (SiO 2 ) and titanium oxide (TiO 2 ) and so on.

[0108] In some embodiments, please refer to Figure 7 and Figure 8 , the light-emitting element further includes:

[0109] The isolation barrier 160 includes a first sub-segment 160a, a second sub-segment 160b, a third sub-segment 160c, and a fourth sub-segment 160d. Among them, the first sub-segment 160a is composed of the substrate 100 located between the first pixel trench 130a and the third pixel trench 130c, and the second sub-segment 160b is composed of the substrate 100 located between the second pixel trench 130b and the third pixel trench 130c. The third sub-segment 160c is composed of the substrate 100 located between the first pixel trench 130a and the second pixel trench 130b. The fourth sub-segment 160d is composed of the substrate 100 located between the second pixel trench extension 130b' and the first pixel trench 130a. One end of the third sub-segment 160c is connected to the first sub-segment 160a and the second sub-segment 160b, and the other end of the third sub-segment 160c is connected to the fourth sub-segment 160d. The substrate 100 is the growth substrate of the epitaxial layer 110.

[0110] It can be understood that when it is necessary to expand the first pixel trench 130a, the through trench, and the third pixel trench 130c as much as possible, the width of the isolation barrier 160 is small, which may lead to poor structural stability of the light-emitting element. Therefore, using the growth substrate of the epitaxial layer 110 (i.e., the substrate 100) as the isolation barrier 160 is beneficial to improving the support strength of the isolation barrier 160 and the structural stability of the light-emitting element.

[0111] In some embodiments, the material of the isolation barrier 160 includes an opaque colloidal material, which effectively prevents the interference phenomenon that part of the light emitted by the sub-pixel enters the adjacent sub-pixel, can increase the refraction in the same sub-pixel area to improve the effective utilization rate of light, and can also avoid the re-excitation situation between different sub-pixel areas. The isolation barrier 160 is used to isolate the first pixel trench 130a, the second pixel trench 130b, the through trench, and the third pixel trench 130c. In the embodiments of the present application, the substrate 100 is a silicon substrate, the material of the isolation barrier 160 is silicon, and the isolation barrier is also called a "silicon wall".

[0112] In some embodiments, please refer to Figure 1 and Figure 7 , on the plane where the substrate 100 is located, the projected shapes of the first sub-segment 160a, the second sub-segment 160b, the third sub-segment 160c, and the fourth sub-segment 160d in the isolation barrier 160 are the same as the projected shapes of the first sub-channel 231, the second sub-channel 232, the third sub-channel 233, and the fourth sub-channel 234 in the isolation channel 230, and the projections of the first sub-channel 231, the second sub-channel 232, the third sub-channel 233, and the fourth sub-channel 234 respectively fall within the projections of the first sub-segment 160a, the second sub-segment 160b, the third sub-segment 160c, and the fourth sub-segment 160d. It can be seen that the line width of the isolation barrier 160 is greater than the line width of the isolation channel 230. In this way, it is beneficial to further improve the structural strength of the light-emitting element.

[0113] In some embodiments, referring to Figure 3 , the light-emitting element further includes:

[0114] a first upper reflective electrode 240a, a second upper reflective electrode 240b, and a third upper reflective electrode 240c; the first upper reflective electrode 240a is located between the second conductive semiconductor layer 113 and the first electrode pad 210a in the first sub-pixel region 120a; the second upper reflective electrode 240b is located between the second conductive semiconductor layer 113 and the second electrode pad 210b in the second sub-pixel region 120b; the third upper reflective electrode 240c is located between the second conductive semiconductor layer 113 and the third electrode pad 210c in the third sub-pixel region 120c;

[0115] an insulating layer, including a first insulating portion 250a, a second insulating portion 250b, and a third insulating portion 250c; wherein, the first insulating portion 250a covers a part of the sidewall of the first sub-pixel region 120a and extends onto the first upper reflective electrode 240a; the second insulating portion 250b covers a part of the sidewall of the second sub-pixel region 120b and extends onto the second upper reflective electrode 240b; the third insulating portion 250c covers a part of the sidewall of the third sub-pixel region 120c and extends onto the third upper reflective electrode 240c;

[0116] a first lower reflective electrode 260a, a second lower reflective electrode 260b, and a third lower reflective electrode 260c; the first lower reflective electrode 260a covers the sidewall of the first sub-pixel region 120a that is not covered by the first insulating portion 250a and extends onto the first insulating portion 250a; the second lower reflective electrode 260b covers the sidewall of the second sub-pixel region 120b that is not covered by the second insulating portion 250b and extends onto the second insulating portion 250b; the third lower reflective electrode 260c covers the sidewall of the third sub-pixel region 120c that is not covered by the third insulating portion 250c and extends onto the third insulating portion 250c; wherein,

[0117] in the thickness direction of the substrate 100, the first lower reflective electrode 260a and the first upper reflective electrode 240a partially overlap, the second lower reflective electrode 260b and the second upper reflective electrode 240b partially overlap, and the third lower reflective electrode 260c and the third upper reflective electrode 240c partially overlap.

[0118] It can be understood that, on the one hand, by providing a plurality of lower reflection electrodes as a light isolation reflection layer, light isolation between sub-pixel regions can be achieved, and light crosstalk between sub-pixels can be prevented; on the other hand, there is partial overlap between the plurality of upper reflection electrodes and the corresponding lower reflection electrodes (the upper reflection electrodes and the lower reflection electrodes overlap in the vertical direction), and the light emitted from the active layer 112 can be completely reflected to the first light-emitting surface (the side of the first sub-pixel region 120a, the second sub-pixel region 120b, and the third sub-pixel region 120c close to the first surface 101 of the substrate 100).

[0119] In some specific embodiments, the first upper reflection electrode 240a, the second upper reflection electrode 240b, and the third upper reflection electrode 240c are respectively in at least partial conductive connection with at least part of the second conductive semiconductor layer 113 in the first sub-pixel region 120a, the second sub-pixel region 120b, and the third sub-pixel region 120c to form an ohmic contact; and the first upper reflection electrode 240a, the second upper reflection electrode 240b, and the third upper reflection electrode 240c are respectively in at least partial conductive connection with at least part of the first electrode pad 210a, the second electrode pad 210b, and the third electrode pad 210c to form an ohmic contact.

[0120] The first lower reflection electrode 260a, the second lower reflection electrode 260b, and the third lower reflection electrode 260c are respectively in at least partial conductive connection with at least part of the first conductive semiconductor layer 111 in the first sub-pixel region 120a, the second sub-pixel region 120b, and the third sub-pixel region 120c to form an ohmic contact.

[0121] The first upper reflection electrode 240a, the second upper reflection electrode 240b, and the third upper reflection electrode 240c can be P ohmic contact electrodes, and the first lower reflection electrode 260a, the second lower reflection electrode 260b, and the third lower reflection electrode 260c can be N ohmic contact electrodes.

[0122] In some embodiments, please refer to Figure 3 , the light-emitting element further includes a conductive connection portion 270, which covers the side walls of the isolation trench 230 and the dummy structure region 120d and extends to the surface of the dummy structure region 120d away from the substrate 100. The first lower reflection electrode 260a, the second lower reflection electrode 260b, and the third lower reflection electrode 260c are electrically connected to the common electrode pad 220 through the conductive connection portion 270 to form an ohmic contact.

[0123] In some specific embodiments, the conductive connection portion 270 is integrally formed with the first lower reflection electrode 260a, the second lower reflection electrode 260b, and the third lower reflection electrode 260c.

[0124] In some embodiments, please refer to Figure 3, the light-emitting element further includes an isolation layer 280 covering the first lower reflective electrode 260a, the second lower reflective electrode 260b, the third lower reflective electrode 260c, and the conductive connection portion 270. The isolation layer 280 electrically isolates the first upper reflective electrode 240a from the first lower reflective electrode 260a, electrically isolates the second upper reflective electrode 240b from the second lower reflective electrode 260b, and electrically isolates the third upper reflective electrode 240c from the third lower reflective electrode 260c.

[0125] In actual preparation, the materials of the first upper reflective electrode 240a, the second upper reflective electrode 240b, and the third upper reflective electrode 240c may include at least one of titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), and silver (Ag); the materials of the first lower reflective electrode 260a, the second lower reflective electrode 260b, and the third lower reflective electrode 260c may include at least one of titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), and silver (Ag); the materials of the insulating layer and the isolation layer 280 include, but are not limited to, silicon oxide, silicon nitride, etc.

[0126] In some embodiments, please refer to Figure 9 , the light-emitting element further includes:

[0127] A first light-filtering layer 170a, a second light-filtering layer 170b, and a third light-filtering layer 170c, all located on the second surface 102 of the substrate 100; wherein, the first light-filtering layer 170a covers the first pixel groove 130a, the second light-filtering layer 170b covers the second pixel groove 130b and the second pixel groove extension 130b', and the third light-filtering layer 170c covers the third pixel groove 130c. In this way, it is beneficial to further improve the color purity of the light emitted by the red sub-pixel, the green sub-pixel, and the blue sub-pixel, so as to more accurately control the display color. And, it is beneficial to improve the blackness of the light-emitting element, reduce the reflection of the ambient light by the light-emitting element, and thus improve the contrast ratio.

[0128] In some specific embodiments, the light-filtering layer may be a color filter (CF) that can only transmit light within a specific wavelength range, and the type of the filter can be set according to the color of the light to be emitted. For example, a red light-filtering layer (CF-R) may cover the first pixel groove 130a, a green light-filtering layer (CF-G) may cover the through groove, and a blue light-filtering layer (CF-B) may cover the third pixel groove 130c.

[0129] In actual preparation, when the light emitted by each sub-pixel region is blue light, the red light-filtering layer and the green light-filtering layer may be filter materials for filtering out the blue light not absorbed by the light conversion material, and the blue light-filtering layer may be a transparent layer or a filter material for filtering out the wavelength bands other than blue light.

[0130] In some embodiments, referring to Figure 9 , the light-emitting element further includes:

[0131] A protective cover layer 180 covering the second surface 102 of the first filter layer 170a, the second filter layer 170b, the third filter layer 170c, and the substrate 100.

[0132] It can be understood that by providing the protective cover layer 180, on the one hand, the structural strength of the light-emitting unit can be improved; on the other hand, the contact between the optical material, the filter layer, and the outside air can be effectively isolated to protect the optical material and the filter layer. For example, when the optical material includes quantum dots, the problem of the decline and even inactivation of the internal quantum dot particles of the quantum dots due to water vapor and oxygen in the air can be reduced, thereby increasing the service life of the quantum dots.

[0133] In some specific embodiments, the protective cover layer 180 can be formed on the second surface 102 of the first filter layer 170a, the second filter layer 170b, the third filter layer 170c, and the substrate 100 by sputtering or evaporation. The material of the protective cover layer 180 can be an insulating material with a high light transmittance. For example, the material of the protective cover layer 180 includes silicon oxide (SiO 2 ), silicon nitride (SiN), aluminum oxide (Al 2 O 3 ), glass, sapphire and other inorganic materials or transparent polymer materials such as silica gel and resin.

[0134] Based on this, the embodiments of the present application further provide a light-emitting device, which includes a plurality of seamlessly spliced light-emitting elements as described in any of the above embodiments.

[0135] It can be understood that the light-emitting device obtained by seamlessly splicing a plurality of light-emitting elements has a large size and is suitable for large-screen display devices, such as liquid crystal TVs, computer monitors, and so on.

[0136] Based on this, referring to Figure 1 , the embodiments of the present application further provide a light-emitting element, including:

[0137] A substrate 100 including a first surface 101 and a second surface 102 opposite to each other;

[0138] The epitaxial layer 110 is located on the first surface 101 of the substrate 100 and includes a first conductive semiconductor layer 111, an active layer 112, and a second conductive semiconductor layer 113 that are sequentially stacked in a direction away from the substrate 100. The epitaxial layer 110 is patterned and divided into a plurality of pixel unit regions 120 arranged in an array. Each pixel unit region 120 includes a first sub-pixel region 120a, a second sub-pixel region 120b, a third sub-pixel region 120c, and a dummy structure region 120d. The first sub-pixel region 120a, the second sub-pixel region 120b, the third sub-pixel region 120c, and the dummy structure region 120d are distributed at different positions in the pixel unit region 120 and extend to the boundaries of the pixel unit region 120 respectively.

[0139] The projections of the first sub-pixel region 120a, the second sub-pixel region 120b, the third sub-pixel region 120c, and the dummy structure region 120d on the plane where the substrate 100 is located are respectively located at the four vertex angles of the first quadrilateral region 310. Among them, the second sub-pixel region 120b and the dummy structure region 120d are arranged adjacent to each other. The dummy structure region 120d and the third sub-pixel region 120c are arranged along the diagonal of the first quadrilateral region 310. The first sub-pixel region 120a is the light-emitting region of the red sub-pixel, the second sub-pixel region 120b is the light-emitting region of the green sub-pixel, and the third sub-pixel region 120c is the light-emitting region of the blue sub-pixel.

[0140] It can be understood that in the embodiment of the present application, the second sub-pixel region 120b and the dummy structure region 120d are arranged adjacent to each other; the dummy structure region 120d and the third sub-pixel region 120c are arranged along the diagonal of the first quadrilateral region 310. In this way, the red sub-pixel and the green sub-pixel can be arranged diagonally, and the blue sub-pixel and the common electrode region (i.e., the region where the dummy structure region 120d is located) can be arranged diagonally, which can provide a larger arrangement space for the red sub-pixel and the green sub-pixel. In this way, it is beneficial to expand the area of the red sub-pixel and the green sub-pixel, reduce the filling difficulty of the light conversion material in the red sub-pixel and the green sub-pixel, and further reduce the blue light radiation intensity per unit area of the light conversion material and improve the service life of the light conversion material.

[0141] It should be noted that the light-emitting element embodiment provided in the present application and the light-emitting device embodiment belong to the same concept; among the technical features in the technical solutions recorded in each embodiment, they can be arbitrarily combined without conflict.

[0142] It should be understood that the above embodiments are all exemplary and do not cover all possible implementation manners included in the claims. Without departing from the scope of the present disclosure, various deformations and changes can be made on the basis of the above embodiments. Similarly, the technical features of the above embodiments can be arbitrarily combined to form additional embodiments of the present application that may not be clearly described. Therefore, the above embodiments only represent several implementation manners of the present application and do not limit the protection scope of the patent of the present application.

Claims

1. A light emitting element, characterized in that: The light emitting element comprises: a substrate including a first surface and a second surface opposite to each other; An epitaxial layer, located on the first surface of the substrate, comprises a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer sequentially stacked in a direction away from the substrate; the epitaxial layer is patterned and divided into a plurality of pixel unit areas arranged in an array, each of the pixel unit areas comprises a first sub-pixel area, a second sub-pixel area, a third sub-pixel area, and a dummy structure area; the first sub-pixel area, the second sub-pixel area, and the third sub-pixel area are distributed at different positions of the pixel unit area and extend to the boundaries of the pixel unit area respectively; the dummy structure area is located inside the pixel unit area or extends to the boundary of the pixel unit area; The first electrode pad, the second electrode pad, the third electrode pad and the common electrode pad are respectively located on the side of the first sub-pixel area, the second sub-pixel area, the third sub-pixel area and the dummy structure area away from the substrate; the first electrode pad, the second electrode pad and the third electrode pad are respectively conductively connected to the second conductive semiconductor layer in the first sub-pixel area, the second sub-pixel area and the third sub-pixel area; the common electrode pad is conductively connected to the first conductive semiconductor layer in the first sub-pixel area, the second sub-pixel area and the third sub-pixel area.

2. The light emitting element according to claim 1, characterized in that The dummy structure area extends to the boundary of the pixel unit area; Projections of the first sub-pixel region, the second sub-pixel region, the third sub-pixel region and the dummy structure region on the plane where the substrate is located are respectively located at four vertices of the first quadrilateral region.

3. The light emitting element according to claim 2, characterized in that The first sub-pixel area is a light-emitting area of ​​a red sub-pixel, the second sub-pixel area is a light-emitting area of ​​a green sub-pixel, and the third sub-pixel area is a light-emitting area of ​​a blue sub-pixel; The second sub-pixel area is arranged adjacent to the dummy structure area; The dummy structure area and the third sub-pixel area are arranged along a diagonal line of the first quadrilateral area.

4. The light emitting element according to any one of claims 1 to 3, characterized in that: The light emitting element further comprises: The first pixel groove, the second pixel groove and the third pixel groove all extend from the second surface of the substrate toward the epitaxial layer, and correspond to the positions of the first sub-pixel area, the second sub-pixel area and the third sub-pixel area respectively; Optical material is located in the first pixel groove and the second pixel groove; wherein the optical material located in the first pixel groove includes a red light conversion material, and the optical material located in the second pixel groove includes a green light conversion material.

5. The light emitting element according to claim 4, characterized in that The light emitting element further comprises: The second pixel groove extension portion extends from the second surface of the substrate toward the epitaxial layer and corresponds to the position of the dummy structure area; the second pixel groove extension portion is interconnected with the second pixel groove, and the green light conversion material is also located in the second pixel groove extension portion.

6. The light emitting element according to claim 5, characterized in that A sum of the projection areas of the second pixel groove and the second pixel groove extension portion on the plane where the substrate is located is greater than a projection area of ​​the first pixel groove on the plane where the substrate is located.

7. The light emitting element according to claim 4, characterized in that On the plane where the substrate is located, a projection area of ​​the third pixel groove is smaller than a projection area of ​​the first pixel groove and smaller than a projection area of ​​the second pixel groove.

8. The light emitting element according to claim 1, characterized in that On the plane where the substrate is located, the projection area of ​​the third sub-pixel area is smaller than the projection area of ​​the first sub-pixel area and smaller than the projection area of ​​the second sub-pixel area; the projection area of ​​the dummy structure area is smaller than the projection area of ​​the first sub-pixel area and smaller than the projection area of ​​the second sub-pixel area.

9. The light emitting element according to claim 4, characterized in that: The ratio of the maximum width of the first pixel groove along the first direction to the maximum width of the second pixel groove along the first direction is 0.4:0.6 to 0.6:0.4; the first direction is the connecting direction of the farthest ends of the first pixel groove and the second pixel groove relative to each other.

10. The light emitting element according to claim 5, characterized in that Projections of the first pixel groove, the second pixel groove, the second pixel groove extension and the third pixel groove on the plane where the substrate is located are located in a second quadrilateral area; The first pixel groove extends to a first side and a second side of the second quadrilateral area, and the first side and the second side intersect each other; The second pixel groove extends to a third side and a fourth side of the second quadrilateral region, and the third side and the fourth side intersect each other; The third pixel groove extends to the second side and the third side of the second quadrilateral area; the second pixel groove extension portion extends to the first side and the fourth side of the second quadrilateral area; Along the extension direction of the first side, the maximum groove width of the first pixel groove is greater than half of the length of the first side; along the extension direction of the second side, the maximum groove width of the first pixel groove is greater than half of the length of the second side; along the extension direction of the third side, the maximum groove width of the second pixel groove is greater than half of the length of the third side; along the extension direction of the fourth side, the maximum groove width of the through groove formed by the second pixel groove extension portion and the second pixel groove penetrating each other is equal to the length of the fourth side.

11. The light emitting element according to claim 5, characterized in that The projection of the first pixel groove on the plane where the substrate is located consists of a first rectangle and a first right-angled trapezoid, and the lower base of the first right-angled trapezoid coincides with a side of the first rectangle; The projection of the through groove formed by the second pixel groove and the second pixel groove extension part penetrating each other on the plane where the substrate is located consists of a second rectangle, a third rectangle and a second right-angled trapezoid, and the upper base and the lower base of the second right-angled trapezoid coincide with one side of the second rectangle and the third rectangle respectively; The oblique waist of the second right-angled trapezoid and the oblique waist of the first right-angled trapezoid are adjacent and parallel to each other; The projection of the third pixel groove on the plane where the substrate is located is a rectangle.

12. The light emitting element according to claim 5, characterized in that The green light conversion material includes quantum dots; The optical material is located in the second pixel groove and the second pixel groove extension portion, and the optical material further includes a light diffusion material located between the green light conversion material and the epitaxial layer.

13. The light emitting element according to claim 5, characterized in that The light emitting element further comprises: An isolation retaining wall comprises a first sub-segment, a second sub-segment, a third sub-segment and a fourth sub-segment; wherein the first sub-segment is composed of a substrate located between the first pixel groove and the third pixel groove, the second sub-segment is composed of a substrate located between the second pixel groove and the third pixel groove; the third sub-segment is composed of a substrate located between the first pixel groove and the second pixel groove; the fourth sub-segment is composed of a substrate located between an extension of the second pixel groove and the first pixel groove; one end of the third sub-segment is connected to the first sub-segment and the second sub-segment, and the other end of the third sub-segment is connected to the fourth sub-segment; the substrate is a growth substrate for the epitaxial layer.

14. The light emitting element according to claim 13, characterized in that: The light emitting element further comprises: An isolation channel, comprising a first sub-channel, a second sub-channel, a third sub-channel and a fourth sub-channel; wherein the first sub-channel is located between the first sub-pixel region and the third sub-pixel region; the second sub-channel is located between the second sub-pixel region and the third sub-pixel region; the third sub-channel is located between the first sub-pixel region and the second sub-pixel region; the fourth sub-channel is located between the first sub-pixel region and the dummy structure region; one end of the third sub-channel is connected to the first sub-channel and the second sub-channel, and the other end of the third sub-channel is connected to the fourth sub-channel; On the plane where the substrate is located, the projection shapes of the first sub-segment, the second sub-segment, the third sub-segment and the fourth sub-segment in the isolation retaining wall are consistent with the projection shapes of the first sub-channel, the second sub-channel, the third sub-channel and the fourth sub-channel in the isolation channel, and the projections of the first sub-channel, the second sub-channel, the third sub-channel and the fourth sub-channel fall within the projections of the first sub-segment, the second sub-segment, the third sub-segment and the fourth sub-segment respectively.

15. The light emitting element according to claim 1, characterized in that The light emitting element further comprises: The first pixel groove, the second pixel groove and the third pixel groove all extend from the second surface of the substrate toward the epitaxial layer, and correspond to the positions of the first sub-pixel region, the second sub-pixel region and the third sub-pixel region respectively; wherein, On the plane where the substrate is located, projections of the active layer in the first sub-pixel area, the second sub-pixel area and the third sub-pixel area fall into projections of the first pixel groove, the second pixel groove and the third pixel groove respectively.

16. The light emitting element according to claim 1, characterized in that The light emitting element further comprises: The isolation channel includes a fifth sub-channel, wherein the fifth sub-channel is located between the second sub-pixel area and the dummy structure area; the fifth sub-channel penetrates the second conductive semiconductor layer and the active layer from the epitaxial layer toward the substrate, and does not penetrate the first conductive semiconductor layer.

17. The light emitting element according to claim 1, characterized in that The light emitting element further comprises: a first upper reflective electrode, a second upper reflective electrode and a third upper reflective electrode; the first upper reflective electrode is located between the second conductive semiconductor layer of the first sub-pixel region and the first electrode pad; the second upper reflective electrode is located between the second conductive semiconductor layer of the second sub-pixel region and the second electrode pad; the third upper reflective electrode is located between the second conductive semiconductor layer of the third sub-pixel region and the third electrode pad; an insulating layer, comprising a first insulating portion, a second insulating portion and a third insulating portion; wherein the first insulating portion covers a portion of a side wall of the first sub-pixel region and extends to the first upper reflective electrode; the second insulating portion covers a portion of a side wall of the second sub-pixel region and extends to the second upper reflective electrode; the third insulating portion covers a portion of a side wall of the third sub-pixel region and extends to the third upper reflective electrode; a first lower reflection electrode, a second lower reflection electrode and a third lower reflection electrode; the first lower reflection electrode covers the side wall of the first sub-pixel area not covered by the first insulating portion and extends to the first insulating portion; the second lower reflection electrode covers the side wall of the second sub-pixel area not covered by the second insulating portion and extends to the second insulating portion; the third lower reflection electrode covers the side wall of the third sub-pixel area not covered by the third insulating portion and extends to the third insulating portion; wherein, In the thickness direction of the substrate, the first lower reflection electrode partially overlaps with the first upper reflection electrode, the second lower reflection electrode partially overlaps with the second upper reflection electrode, and the third lower reflection electrode partially overlaps with the third upper reflection electrode.

18. The light emitting element according to claim 5, characterized in that The light emitting element further comprises: A first filter layer, a second filter layer and a third filter layer are all located on the second surface of the substrate; wherein the first filter layer covers the first pixel groove, the second filter layer covers the second pixel groove and the second pixel groove extension, and the third filter layer covers the third pixel groove; The protective cover layer covers the first filter layer, the second filter layer, the third filter layer and the second surface of the substrate.

19. The light emitting element according to claim 1, characterized in that The shortest distance between the pixel unit area and the light emitting element at the boundary is half of the distance between two adjacent pixel unit areas.

20. A light emitting device, characterized in that: The light-emitting device comprises a plurality of light-emitting elements according to any one of claims 1 to 19 which are seamlessly spliced.

Citation Information

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