PCIE (peripheral component interface express) on-off control circuit, test mainboard and test equipment

By designing the PCIE on-off control circuit and using the control module to control the connection relationship between the connection module and the interface module, the existing motherboard cannot support PCIE link function testing or expand other storage types, and the compatibility and convenient switching of multiple storage devices are achieved.

CN222927035UActive Publication Date: 2025-05-30CHENGDU TYTANTEST TECHNOLOGY CO LTD
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Patent Information

Application Number
CN202421999116.6
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-08-16
Publication Date
2025-05-30
Estimated Expiration
2034-08-16

AI Technical Summary

Technical Problem

Existing motherboards cannot support PCIE link function testing or expand other storage types, and cannot meet the multiple needs of users.

Method used

A PCIE on-off control circuit is designed, including a connection module, a switch module, an interface module and a control module. The state of the switch module is controlled by the control module to realize the connection relationship switching between the connection module and the interface module.

Benefits of technology

It realizes switching of each interface in the interface module, improves the interface compatibility of the circuit, is compatible with storage devices with multiple different interfaces, and meets the testing needs of multiple storage devices.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model relates to the field of circuit control, and discloses a PCIE (Peripheral Component Interface Express) on-off control circuit, a test mainboard and test equipment, the circuit comprises a connection module, a switch module, an interface module and a control module, the connection module is used for being connected with external equipment; the switch module is respectively connected with the connection module, the interface module and the control module; the control module controls the state of the switch module through a control signal, the state of the switch module is used for controlling the connection relation between the connection module and the interface module, and the interface module is used for being connected with a device to be tested. According to the circuit, the control module controls the switch to switch the connection relation between the connection module and the interface module, so that the interface compatibility of the circuit is improved while the switching function is realized.
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Description

Technical Field

[0001] The utility model relates to the field of circuit control, in particular to a PCIE on-off control circuit, a test main board and a test device. Background Art

[0002] With the continuous development of Internet technology, products involving data storage are widely used in many fields. Generally, existing main boards support M.2 and SATA storage products, and existing storage products are usually directly plugged into the corresponding storage interfaces of the main board. Products that need to implement PCIE link function testing or simultaneously expand other storage types cannot be supported, failing to meet the multiple needs of users. Content of the Utility Model

[0003] In a first aspect, the present application provides a PCIE on-off control circuit, including: a connection module, a switch module, an interface module and a control module;

[0004] The connection module is used to connect to an external device;

[0005] The switch module is respectively connected to the connection module, the interface module and the control module;

[0006] The control module controls the state of the switch module through a control signal, and the state of the switch module is used to control the connection relationship between the connection module and the interface module;

[0007] The interface module is used to connect to a device under test.

[0008] Further, the circuit further includes a clock module;

[0009] The clock module is respectively connected to the connection module and the switch module;

[0010] The clock module receives a clock signal from the connection module and transmits the clock signal to the interface module through the switch module.

[0011] Further, the interface module includes a first storage interface and a second storage interface;

[0012] The switch module includes a first pin, a second pin and a third pin. The first pin is connected to the connection module, and the second pin and the third pin are respectively connected to the first storage interface and the second storage interface.

[0013] Further, the switch module further includes a signal pin;

[0014] The signal pin is connected to the control module, and the control module sends a control signal to the switch module through the signal pin.

[0015] Further, the control signal includes a selection signal and a connection / disconnection signal;

[0016] The switch module determines whether the first pin is connected to the second pin or the third pin according to the selection signal;

[0017] The switch module determines the connection / disconnection relationship between the first pin and the second pin or the third pin according to the connection / disconnection signal.

[0018] Further, the first storage interface is an M.2 connector, and the second storage interface is a U.2 connector.

[0019] Further, the control module is a microprocessor;

[0020] The microprocessor is connected to the switch module through an input / output channel.

[0021] Further, the connection module is a gold finger, and the external device is a plug board adapted to the gold finger.

[0022] In a second aspect, the present application further provides a test main board, including the PCIE connection / disconnection control circuit described above.

[0023] In a third aspect, the present application further provides a test device, including a storage device, a processor, and the test main board described above.

[0024] The utility model relates to the field of circuit control, and discloses a PCIE connection / disconnection control circuit, a test main board, and a test device. The circuit includes: a connection module, a switch module, an interface module, and a control module; the connection module is used to connect to an external device; the switch module is respectively connected to the connection module, the interface module, and the control module; the control module controls the state of the switch module through a control signal, and the state of the switch module is used to control the connection relationship between the connection module and the interface module, and the interface module is used to connect to a device under test. This circuit controls the switch to switch the connection relationship between the connection module and the interface module, realizes the switching function, and improves the interface compatibility of the circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to more clearly illustrate the technical solutions of the present utility model, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present utility model, and therefore should not be regarded as limiting the protection scope of the present utility model. In each drawing, similar components are numbered similarly.

[0026] Figure 1 Shows a schematic structural diagram of a PCIE connection / disconnection control circuit according to an embodiment of the present application;

[0027] Figure 2 Shows a schematic diagram of another PCIE on-off control circuit structure according to an embodiment of the present application;

[0028] Figure 3 Shows a schematic diagram of still another PCIE on-off control circuit structure according to an embodiment of the present application;

[0029] Figure 4 Shows a schematic diagram of yet another PCIE on-off control circuit structure according to an embodiment of the present application. Detailed implementation manners

[0030] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments.

[0031] Generally, the components of the embodiments of the present invention described and illustrated herein can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the claimed present invention, but merely represents selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative efforts belong to the scope of protection of the present invention.

[0032] Hereinafter, the terms "including", "having" and their cognates that can be used in various embodiments of the present invention are only intended to represent specific features, numbers, steps, operations, elements, components or combinations of the foregoing items, and should not be construed as first excluding the existence or addition of one or more other features, numbers, steps, operations, elements, components or combinations of the foregoing items.

[0033] In addition, the terms "first", "second", "third", etc. are only used for descriptive distinction and cannot be understood as indicating or implying relative importance.

[0034] Unless otherwise defined, all terms (including technical terms and scientific terms) used herein have the same meaning as commonly understood by those of ordinary skill in the art to which various embodiments of the present invention belong. The terms (such as those defined in a general-use dictionary) will be interpreted as having the same meaning as the contextual meaning in the relevant technical field and will not be interpreted as having an idealized meaning or an overly formal meaning unless clearly defined in various embodiments of the present invention.

[0035] The technical solution of this application is applied to a PCIE on-off control circuit, which mainly includes: a connection module, a switch module, an interface module, and a control module; the connection module is used to connect to external devices; the switch module is respectively connected to the connection module, the switch module, the interface module, and the control module; the control module controls the state of the switch module through a control signal, and the state of the switch module is used to control the connection relationship between the connection module and the interface module. This enables the circuit to switch each interface in the interface module, so that the control circuit and the device equipped with this control circuit can be compatible with storage devices with a variety of different interfaces, achieving compatibility with a variety of storage devices.

[0036] Embodiment 1

[0037] As Figure 1 shown, the PCIE (Peripheral Component Interconnect Express, high-speed serial computer expansion bus standard) on-off control circuit of this embodiment includes: a connection module 100, a switch module 200, an interface module 300, and a control module 400.

[0038] PCIE is a high-speed serial computer expansion bus standard. In this embodiment, it is mainly applied to the scenario during the test of storage devices.

[0039] The connection module 100 is a gold finger slot. A gold finger is a kind of PCIE gold finger plug-in board, and the connection module is a slot corresponding to the gold finger plug-in board. In this embodiment, the slot is a PCIE slot, providing a PCIE signal interface and a power supply interface for the entire circuit.

[0040] Gold fingers have forms such as X4, X8, and X16. The difference in these forms lies in the different numbers of interfaces. It can be understood that the connection module 100 is an interface for inserting a gold finger plug-in board. By connecting to the above-mentioned connection module 100, the connection module 100 can bring control data for the entire circuit and provide power for the circuit.

[0041] Among them, the interface module 300 is used to connect to the storage device to be tested, and the connection module 100 is used to connect to external devices to provide functions such as power supply and data interfaces for other devices for this circuit. Among them, the connection module 100 can specifically be a gold finger slot dedicated to inserting other plug-in boards, so that this circuit can use the test programs, data interfaces, power supplies, and other resources in the inserted plug-in boards.

[0042] The external devices here refer to storage devices. During testing, these devices to be tested are directly connected through the interface module to achieve connection with the gold finger plug-in board inserted on the connection module, and obtain the power supply and data stream obtained by the connection module from the outside world, realizing electrical connection.

[0043] Among them, the switch module 200 is respectively connected to the connection module 100, the interface module 300, and the control module 400. In this way, the interface module 300 and the connection module 100 are connected through the switch module 200.

[0044] The switch module 200 is controlled by the control module 400, which can control the connection relationship between the switch module 200 and the interface module. A PCIE switching chip is provided inside the switch module, which can be used to switch the connection relationship between the interface modules, thereby realizing the switching of the PCIE link.

[0045] Among them, the interface module 300 of this embodiment includes a first interface and a second interface. The first interface and the second interface are different types of memory interfaces. For example, the first interface can be an M.2 connector, and the second interface can be a U.2 connector. The M.2 connector and the U.2 connector provide transmission signals and power interfaces for the storage devices corresponding to the interfaces, and different connectors can connect different storage devices. The interface module 300 of this embodiment has two interfaces, so the circuit of this embodiment can be used for testing two different storage devices. The M.2 connector and the U.2 connector are existing connectors on the current market. As long as they can provide transmission signals and power interfaces for the storage devices corresponding to the interfaces, they can be applied in this embodiment.

[0046] The control module 400 can be connected to the host computer through the network to realize the control of the PCIE link switching.

[0047] In addition, this embodiment also provides a switching control circuit for the interface module 300.

[0048] As Figure 2 shown, the switch module 200 further includes a first pin 210, a second pin 220, and a third pin 230. The first pin is connected to the connection module 100, and the second pin and the third pin are respectively connected to the first storage interface 310 and the second storage interface 320.

[0049] Among them, the control module controls the connection between the first pin and the second pin or the third pin through a level signal, so as to control which interface to use for testing during testing and which storage device on which interface to test. Therefore, the above-mentioned switch module is also provided with a signal pin 240, and the signal pin 240 is connected to the control module 400, and the control module sends a control signal to the switch module through the signal pin. For example, if the control module provides a high level, the switch module 200 connects the first pin and the second pin. At this time, the connection module 100 is connected to the storage device connected to the second pin. If the control module provides a low level, the switch module 200 connects the first pin and the third pin. At this time, the connection module 100 is connected to the storage device connected to the third pin. It can be understood that in this embodiment, the switching relationship of the switch module is controlled by high and low levels, so that the tester can switch the storage device actually being tested, and different types of interfaces enable the tester to switch between different types of storage devices.

[0050] It can be understood that there can be multiple above-mentioned interface modules 300. Therefore, when it is necessary to expand the number and types of interfaces, the number expansion and control can be achieved by connecting multiple interface modules in parallel and then adding multiple switch modules accordingly. That is to say, multiple Figure 2 The circuit structures in can be connected in parallel to form a control circuit with multiple circuits in parallel, thereby increasing the number of storage devices that the storage interface can connect and achieving the technical effect of increasing the number of devices tested simultaneously.

[0051] In addition, the control module can also provide a signal for controlling on and off. The signal for controlling the connection relationship between pins through high and low levels mentioned above is a selection signal. In actual work, the first pin does not need to be connected to the second pin or the third pin all the time, and it also has an open circuit state. Therefore, the control module will also send a control signal for controlling on and off to the switch module to control the on and off of the entire link. That is to say, when the first pin is not connected to the second pin or the third pin, it is an open circuit, and when it is connected to any one of them, it is a closed circuit.

[0052] Furthermore, the PCIE on-off control circuit in this embodiment further includes a clock module 500. As Figure 3 shown, the clock module 500 is respectively connected to the connection module 100 and the switch module 200. The clock module 500 obtains power and clock signals from the connection module 100, and then sends the clock signal to the interface module 300 through the switch module, so that the clock module can send the clock signal to the storage device connected to the interface module. Combining the foregoing, it can be known that there can be two interfaces in the interface module. Therefore, the clock module in this embodiment can provide differential clocks for two interfaces.

[0053] Among them, the above control module can be an MCU (microprocessor), which is connected to the switch module through GPIO (input / output channels). It can also be connected to an external host computer to receive signals from the outside world to control the switch module. Or a corresponding control program can be burned into the MCU, enabling the MCU to determine how to control the conduction status of the current link according to the actual working scenario.

[0054] As Figure 4 shown, it is a schematic diagram of the structure of a PCIE link on / off and switching control circuit integrating the above embodiments.

[0055] As Figure 4 shown, in this circuit structure, the circuit structures of Figure 2 and Figure 3 are combined. On the basis of Figure 2 , it further includes a clock module 500, which is also connected to the control module 400, the first storage interface 310, and the second storage interface 320. The control module 400 can control the clock module to send clock signals to the above two storage interfaces, enabling the clock module 500 to provide differential clock signals for two PCIE devices according to the control of the control module.

[0056] The PCIE on / off control circuit of this embodiment provides two different standard storage device interfaces through the interface module, enabling the circuit to be compatible with the test requirements of various storage devices. At the same time, through the control of the switch module by the control module, convenient switching during the test process is achieved, improving the motherboard's socket topology ability and application scenarios. Also, the switching is simple. If additional interfaces need to be expanded, only multiple interface modules need to be connected in parallel and correspondingly connected to the switch module. In this way, one circuit can support the access of more than one storage device, making it adaptable to various situations in actual application scenarios, making the circuit control more flexible and the expansion simpler, and capable of adapting to multiple subsequent usage scenarios, realizing the expansion and compatibility of multiple storage products on the PCIE slot; at the same time, it can implement the test of PCIE lifting or simulate the PCIE hot plug test.

[0057] Embodiment 2

[0058] This embodiment also provides a test motherboard, which is mainly used as the motherboard for storage device testing. The test motherboard can be a PCB board, which includes the PCIE on / off control circuit described in Embodiment 1. By carrying this circuit, connection test operations of multiple devices can be realized.

[0059] This embodiment also provides a testing device, which includes a storage device, a processor, and the aforementioned testing main board. This testing device can be an integrated computer device. For example, by reserving sockets for connection modules and sockets for interface modules, corresponding hardware devices can be replaced and inserted through these sockets during actual testing.

[0060] In several embodiments provided in this application, it should be understood that the disclosed device can also be implemented in other ways. The device embodiments described above are merely illustrative. For example, the structural diagrams in the drawings show the devices, system architectures, functions, and operations according to multiple embodiments of the present invention. In this regard, a part of the module contains one or more executable instructions for implementing the specified logical functions.

[0061] In addition, each functional module or unit in various embodiments of the present invention can be integrated together to form an independent part, or each module can exist alone, or two or more modules can be integrated to form an independent part.

[0062] The above is only the specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present invention can easily think of changes or substitutions, which should all be covered within the protection scope of the present invention.

Claims

1. A PCIE on-off control circuit, characterized in that: include: Connection module, switch module, interface module and control module; The connection module is used to connect to an external device; The switch module is connected to the connection module, the interface module and the control module respectively; The control module controls the state of the switch module through a control signal, and the state of the switch module is used to control the connection relationship between the connection module and the interface module; The interface module is used to connect to the device under test.

2. The PCIE on-off control circuit according to claim 1, characterized in that: Also includes a clock module; The clock module is connected to the connection module and the switch module respectively; The clock module receives a clock signal from the connection module, and transmits the clock signal to the interface module through the switch module.

3. The PCIE on-off control circuit according to claim 1, characterized in that: The interface module includes a first storage interface and a second storage interface; The switch module includes a first pin, a second pin and a third pin, the first pin is connected to the connection module, and the second pin and the third pin are connected to the first storage interface and the second storage interface respectively.

4. The PCIE on-off control circuit according to claim 3, characterized in that: The switch module also includes a signal pin; The signal pin is connected to the control module, and the control module sends a control signal to the switch module through the signal pin.

5. The PCIE on-off control circuit according to claim 4, characterized in that: The control signal includes a selection signal and an on-off signal; The switch module determines, according to the selection signal, that the first pin is connected to the second pin or to the third pin; The switch module determines the on-off relationship between the first pin and the second pin or the third pin according to the on-off signal.

6. The PCIE on-off control circuit according to claim 3, characterized in that: The first storage interface is an M.2 connector, and the second storage interface is a U.2 connector.

7. The PCIE on-off control circuit according to claim 1, characterized in that: The control module is a microprocessor; The microprocessor is connected to the switch module via an input and output channel.

8. The PCIE on-off control circuit according to claim 1, characterized in that: The connection module is a gold finger, and the external device is a plug-in board adapted to the gold finger.

9. A test motherboard, characterized in that: It comprises a PCIE on-off control circuit as claimed in any one of claims 1 to 8.

10. A testing device, characterized in that: The device comprises a storage device, a processor and the test mainboard as claimed in claim 9.