Multi-mode switching detection circuit and multi-mode switching detection method for Type-C interface

Abstract

The invention relates to the technical field of interface circuits, in particular to a multi-mode switching detection circuit for a Type-C interface, which is used for realizing peripheral type identification and automatic switching between a USB host mode and a DP input mode on a single Type-C interface. The circuit comprises an interface detection unit connected with a Type-C female seat interface, a voltage comparison unit, a main control processor chip, a mode discrimination unit and a control output unit. The voltage comparison unit carries out resistance voltage division and threshold comparison on CC pin voltage, two levels are formed at a detection node and sent to the main control processor chip, and USB equipment and DP source equipment are distinguished by the mode judgment unit. The control output unit controls the USB host power supply control circuit and the DP input chip power supply circuit, establishes a USB data channel in a USB host mode, and establishes a DP-to-video channel in a DP input mode. The circuit realizes rapid peripheral identification and mode automatic switching based on hardware, and is simple in structure, low in cost, high in response speed and high in system stability.

Description

Technical Field

[0001] This invention relates to the field of interface circuit technology, specifically to a multi-mode switching detection circuit and method for a Type-C interface, used to realize peripheral category identification and automatic switching between USB host mode and DP input mode on a single Type-C interface. Background Technology

[0002] The existing Type-C interface supports multiple operating modes, including USB host mode for connecting USB devices and DisplayPort input mode for receiving external video sources. When a terminal device connects to a peripheral device via the Type-C interface, it needs to select the appropriate operating mode and switch between power and data paths depending on whether the device is a USB device or a DisplayPort source device.

[0003] In existing technical solutions, a common approach is to use an external dedicated identification chip, combined with I... 2 The C communication interface and driver identify the peripheral type through a software protocol. This type of solution requires additional identification chips and peripheral interfaces, as well as supporting firmware and upper-layer software logic, resulting in a complex overall structure and high cost. Furthermore, software polling and protocol interaction introduce latency, leading to untimely mode switching responses. When peripherals are frequently plugged and unplugged or the system is under heavy load, issues such as identification errors, black screens, and failure to enter the correct mode promptly can easily occur, significantly impacting system stability and user experience.

[0004] On the other hand, the Type-C interface itself has set different electrical characteristics for different types of peripherals on the configuration channel pins. For example, the USB device end is pulled down to ground by a resistor to indicate that it is a powered end, and the DP source device end outputs a specific voltage level in the configuration channel for identification. However, some existing terminal devices do not make full use of this kind of electrical information for hardware-level identification. Instead, they still rely on external identification chips and complex software protocols, and have not formed a simple, low-cost, hardware-based multi-mode automatic switching detection circuit at the motherboard level. Summary of the Invention

[0005] To address the shortcomings of existing technologies, this application provides a multi-mode switching detection circuit based on Type-C configuration channel voltage discrimination. By using a simple resistor voltage divider and threshold comparison circuit, the voltage characteristics of different peripheral types are converted into level signals that can be recognized by the main control processor chip. Combined with the mode discrimination logic and GPIO control inside the main control processor chip, the circuit enables rapid automatic switching between USB host mode and DP input mode, reducing system costs and improving recognition speed and stability.

[0006] The purpose of this invention is to provide a multi-mode switching detection circuit and method for a Type-C interface. By utilizing the voltage characteristics on the Type-C interface configuration channel and through the cooperation of the interface detection unit, voltage comparison unit, main control processor chip, mode discrimination unit, and control output unit, hardware identification of peripheral types can be achieved without adding an external identification chip. This allows the power supply path and data path to automatically switch to USB host mode or DP input mode, thereby solving the problems of existing technologies that rely on dedicated chips and software protocols for identification, have complex structures, slow response speeds, and insufficient reliability.

[0007] To achieve the above objectives, the present invention adopts the following technical solution.

[0008] A multi-mode switching detection circuit for a Type-C interface includes: an interface detection unit, a voltage comparison unit, a main control processor chip, a mode discrimination unit, and a control output unit.

[0009] The interface detection unit is electrically connected to the configuration channel of the Type-C interface, and acquires a detection voltage characterizing the peripheral type from the configuration channel pin when the peripheral is inserted.

[0010] The voltage comparison unit is connected to the interface detection unit, compares the detected voltage with a preset threshold, and generates a comparison result signal reflecting different voltage ranges.

[0011] The main control processor chip has an analog-to-digital conversion detection pin and at least one GPIO control pin. The mode discrimination unit is electrically connected to the voltage comparison unit and the analog-to-digital conversion detection pin. It converts the comparison result signal into a digital level and performs level judgment to determine whether the Type-C interface is currently working in the first working mode or the second working mode.

[0012] The control output unit is connected to the GPIO control pin of the main control processor chip. When the first working mode is determined, the first control signal is output through the GPIO control pin to control the machine to provide DC power to the first peripheral type and establish a first data channel for first data communication in the first working mode. When the second working mode is determined, the second control signal is output through the GPIO control pin to control the machine to establish a second data channel for receiving data signals from the second peripheral type in the second working mode.

[0013] Preferably, the interface detection unit includes a Type-C female connector for connecting peripherals and configuration channel pins led out from the Type-C female connector. The configuration channel pins include a first configuration channel pin and a second configuration channel pin. The first and second configuration channel pins are respectively connected to a voltage comparison unit via a signal network on a printed circuit board, for sending the voltage on the configuration channel as a detection voltage to the voltage comparison unit. The signal network includes a first signal network and a second signal network. The first signal network is formed by printed circuit board wires and connects the first configuration channel pin to the input terminal of a first resistor divider circuit in the voltage comparison unit. The second signal network is formed by printed circuit board wires and connects the second configuration channel pin to the input terminal of a second resistor divider circuit in the voltage comparison unit.

[0014] Preferably, the voltage comparison unit includes a first resistor divider circuit corresponding to the first configuration channel pin, a second resistor divider circuit corresponding to the second configuration channel pin, and at least one threshold comparison circuit. The first resistor divider circuit consists of a first resistor and a second resistor connected in series between the first configuration channel pin and a reference potential, forming a first voltage divider node between the first and second resistors. The second resistor divider circuit consists of a third resistor and a fourth resistor connected in series between the second configuration channel pin and the reference potential, forming a second voltage divider node between the third and fourth resistors. The voltage comparison unit also includes a detection node. The input terminal of the threshold comparison circuit is connected to the first and second voltage divider nodes, and the output terminal is connected to the detection node. When the voltages of the first and second voltage divider nodes are within a first voltage range, the detection node presents a first potential; when the voltages of the first and second voltage divider nodes are within a second voltage range distinct from the first voltage range, the detection node presents a second potential.

[0015] Preferably, the threshold comparison circuit includes a first transistor and a second transistor. The base of the first transistor is connected to a first voltage divider node, the emitter is grounded, and the collector is connected to a detection node. The base of the second transistor is connected to a second voltage divider node, the emitter is grounded, and the collector is connected to a detection node. By setting the configuration channel voltage corresponding to the second peripheral type to be higher than the transistor's conduction threshold, a voltage sufficient to turn on the transistor is formed at the base after voltage division by a resistor, causing at least one of the transistors to conduct and pulling the detection node level to the second potential. By setting the configuration channel voltage corresponding to the first peripheral type to be close to 0V, a voltage lower than the transistor's conduction threshold is formed after voltage division by a resistor, causing both transistors to be turned off, and the detection node level is pulled up and maintained at the first potential.

[0016] Preferably, the detection node is connected to the analog-to-digital conversion detection pin of the main control processor chip via a pull-up resistor, so that the first potential and the second potential of the detection node correspond to different level values ​​collected by the analog-to-digital conversion detection pin. Based on the sampling results of the analog-to-digital conversion detection pin by the main control processor chip, the mode discrimination unit determines that when a first peripheral type is connected, a first level value is collected, corresponding to the Type-C interface operating in a first working mode; and when a second peripheral type is connected, a second level value is collected, corresponding to the Type-C interface operating in a second working mode.

[0017] Preferably, the first peripheral type is a USB device, the second peripheral type is a DP source device, the first working mode is USB host mode, and the second working mode is DP input mode.

[0018] In USB host mode, the control output unit may include a first control branch electrically connected to the HOST mode power supply control pin of the host processor chip and a USB host power supply control circuit. The input of the USB host power supply control circuit is connected to a DC power supply, and the output is connected to the power supply pin of the Type-C female connector. When the mode discrimination unit determines that the Type-C interface is working in USB host mode, the host processor chip outputs a first control signal through the HOST mode power supply control pin to turn on the USB host power supply control circuit, enabling the Type-C female connector to output a rated 5V DC power supply to the connected USB device, and communicate with the USB device through a first data channel formed by the internal USB host controller of the host processor chip and the Type-C data pin.

[0019] In DP input mode, the control output unit may include a second control branch connected to the DP input chip power supply circuit and a second data channel electrically connected to the main control processor chip's image input interface. The output of the DP input chip power supply circuit is connected to each power supply pin of the DP input chip, and the DP input chip is connected to the main control processor chip's image input interface via a video data interface. When the mode discrimination unit determines that the Type-C interface is operating in DP input mode, the main control processor chip outputs a second control signal through the second control branch, sequentially turning on multiple power switching devices to provide one or more sets of operating voltages to the DP input chip, and transmitting the DP video signal input via the Type-C interface to the main control processor chip for image processing via the second data channel.

[0020] Furthermore, the multi-mode switching detection circuit may also include a Type-C interface overvoltage protection circuit. The Type-C interface overvoltage protection circuit is connected between the power pin of the Type-C female connector and the internal power network. When the power supply voltage provided by the external device exceeds the preset safety range, it clamps the voltage on the power pin to prevent excessive voltage from being transmitted to the main control processor chip and the DP input chip, thereby improving the overall reliability and protection capability of the device.

[0021] Preferably, the first voltage range includes a voltage range close to 0V, and the second voltage range includes a voltage range higher than the transistor's conduction threshold and between 0.8V and 1.04V. This allows the configuration channel to generate a voltage close to 0V through pull-down resistors when a USB device is connected, and after voltage division by resistors, the voltages of the first and second voltage divider nodes are within the first voltage range. When a DP source device is connected, the configuration channel outputs a voltage of 0.8V to 1.04V, and after voltage division by resistors, the voltages of the first and second voltage divider nodes are within the second voltage range, thereby reliably distinguishing between the two types of peripherals.

[0022] A method for detecting multi-mode switching for a Type-C interface includes the following steps: Interface detection steps: After the peripheral is inserted into the Type-C interface, the detection voltage characterizing the peripheral category is obtained through the interface detection unit which is electrically connected to the configuration channel of the Type-C interface; Voltage comparison step: The detected voltage is input to the voltage comparison unit, which compares the detected voltage with a preset threshold and generates a comparison result signal; Mode discrimination step: Based on the comparison result signal, the mode discrimination unit determines whether the operating mode of the Type-C interface is the first operating mode or the second operating mode; First mode control step: When the mode discrimination step determines that the Type-C interface is working in the first working mode, the control output unit controls the local machine to provide DC power to the first type of connected peripheral device and establishes a first data channel for first data communication. Second mode control step: When the mode discrimination step determines that the Type-C interface is working in the second working mode, the control output unit controls the local machine to establish a second data channel for receiving data signals from the second peripheral type.

[0023] Furthermore, in the interface detection step, the voltage signal on the configuration channel is obtained through the first configuration channel pin and the second configuration channel pin of the Type-C female connector interface, and the voltage signal is used as the detection voltage input to the voltage comparison step.

[0024] Furthermore, in the voltage comparison step, the voltages on the first configuration channel pin and the second configuration channel pin are respectively subjected to resistor voltage division to form a first voltage divider node and a second voltage divider node. When the voltages of the first voltage divider node and the second voltage divider node are in a first voltage range, a comparison result signal corresponding to a first potential is generated. When the voltages of the first voltage divider node and the second voltage divider node are in a second voltage range, a comparison result signal corresponding to a second potential is generated.

[0025] Furthermore, in the mode discrimination step, the comparison result signal is input to the analog-to-digital conversion detection pin of the main control processor chip, and the Type-C interface is determined to be either the first working mode or the second working mode based on the acquired level value.

[0026] Furthermore, the first peripheral device type is a USB device, the first operating mode is a USB host mode, and in the first mode control step, the control output unit outputs a rated 5V DC power supply to the USB device, and performs USB data communication with the USB device through the first data channel.

[0027] Furthermore, the second peripheral type is a DP source device, the second operating mode is a DP input mode, and in the second mode control step, the DP input chip is powered by the control output unit, and video data signals from the DP source device are received through the second data channel.

[0028] Furthermore, in the first mode control step and the second mode control step, the power supply control operation and the data channel establishment operation are triggered by the same mode discrimination result and executed synchronously.

[0029] Compared with the prior art, the present invention has the following advantages: First, this invention utilizes the voltage difference on the Type-C configuration channel pins, combined with a voltage divider circuit using resistors and a threshold comparison circuit composed of transistors, to map the voltage characteristics of different peripheral types to two stable levels that the main control processor chip can recognize. Then, the mode discrimination unit inside the main control processor chip performs digital judgment, avoiding dependence on external identification chips and complex software protocols. This achieves peripheral type recognition based entirely on hardware circuits, with a short and clear recognition path. The recognition process does not depend on the system software state, resulting in higher recognition accuracy and stability.

[0030] Secondly, in this invention, the voltage comparison unit distinguishes different voltage ranges through a resistor voltage divider circuit and a threshold comparison circuit. Combined with the connection between the detection node and the analog-to-digital conversion detection pin, the closed loop from peripheral insertion to level change to mode determination can be completed in microseconds. Compared with the traditional software polling method, this significantly shortens the recognition and switching delay, making the switching between USB host mode and DP input mode more timely. This helps to avoid the phenomenon of black screen or failure to display images in time when peripherals are inserted.

[0031] Third, the interface detection unit, resistor voltage divider circuit, transistor threshold comparison circuit, and power supply control circuit that works with the GPIO control pin of the main control processor chip used in this invention are all composed of conventional discrete components and existing interface resources. There is no need to add a dedicated identification chip and an independent communication bus. The number of components is small, the circuit structure is simple, and the printed circuit board area is small, which helps to reduce material costs and overall machine costs. It is suitable for large-scale integration and application on a variety of terminal devices.

[0032] Fourth, this invention controls the USB host power supply control circuit and the DP input chip power supply circuit respectively through the GPIO control pins of the main control processor chip. In USB host mode, it provides 5V power to the USB device and turns off the DP input chip power. In DP input mode, it enables the DP input chip power supply and can turn off the local USB power supply path according to the system design. This ensures the correct power supply status during the mode switching process, reduces unnecessary power consumption, and improves the overall energy efficiency and battery life of the system.

[0033] Fifth, this invention clamps the power pins through a Type-C interface overvoltage protection circuit, placing the Type-C power pins, voltage comparison unit, main control processor chip, and DP input chip in a unified protection path. When an external DP source device or USB device outputs an abnormally high voltage, it can promptly limit the voltage amplitude transmitted to the motherboard, reduce the risk of circuit damage, and improve the long-term stability of the product in complex usage environments.

[0034] Sixth, this invention employs a design that combines near-0V and 0.8V to 1.04V voltage ranges, and uses a resistor divider circuit to map the configuration channel voltage to a suitable level range for transistor conduction and cutoff. This ensures effective differentiation between USB devices and DP source devices while reserving adjustment space for future expansion to other types of peripherals or other voltage standards, demonstrating good scalability. By adjusting the resistance values ​​of the voltage divider resistors and the parameters of the threshold comparison circuit, it is possible to adapt to different manufacturers' Type-C interface specifications, improving the system's compatibility. Attached Figure Description

[0035] Figure 1This is a schematic diagram of the TYPEC interface circuit for connecting peripherals according to the present invention, specifically a TYPEC female connector interface for connecting peripherals.

[0036] Figure 2 This is a circuit diagram of the interface detection unit of the present invention.

[0037] Figure 3 This is a circuit diagram of the voltage comparison unit of the present invention.

[0038] Figure 4 This is a circuit diagram of the TYPE-C interface overvoltage protection circuit of the present invention.

[0039] Figure 5 This is a circuit diagram of the HOST_USB power supply control circuit of the present invention.

[0040] Figure 6 The circuit diagram is for the DP_IN chip power supply circuit of the present invention.

[0041] Figure 7 This is a circuit diagram of the device detection unit of the present invention.

[0042] Figure 8 This is a circuit schematic diagram of the USB_HOST controller of the present invention.

[0043] Figure 9 This is a circuit schematic diagram of the CSI signal data output module of the DP_IN chip of the present invention.

[0044] Figure 10 This is a partial circuit schematic of the DP_IN_CSI signal input module of the present invention.

[0045] Figure 11 This is another part of the circuit schematic of the DP_IN_CSI signal input module of the present invention.

[0046] Figure 12 The circuit schematic of the GPIO port M39 for HOST mode 5V power supply control in this invention.

[0047] Figure 13 This is a functional block diagram of the present invention. Detailed Implementation

[0048] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention. It is understood that the accompanying drawings are provided for reference and illustration only, and are not intended to limit the present invention. The connection relationships shown in the accompanying drawings are only for clear description and do not limit the connection method.

[0049] like Figures 1-13 As shown, this embodiment of the invention provides a multi-mode switching detection circuit for a Type-C interface, comprising: An interface detection unit, electrically connected to the configuration channel of the Type-C interface, is used to acquire a detection voltage characterizing the peripheral type when a peripheral is inserted. A voltage comparison unit, connected to the interface detection unit, is used to compare the detected voltage with a preset threshold to generate a comparison result signal; The mode discrimination unit is electrically connected to the voltage comparison unit and is used to determine whether the operating mode of the Type-C interface is a first operating mode or a second operating mode based on the comparison result signal. The control output unit is configured to, when the mode discrimination unit determines that the Type-C interface is operating in the first operating mode, control the local unit to provide DC power to the connected first peripheral type in the first operating mode and establish a first data channel for first data communication; and when the mode discrimination unit determines that the Type-C interface is operating in the second operating mode, control the local unit to establish a second data channel for receiving data signals from a second peripheral type in the second operating mode.

[0050] This technical solution addresses a scenario where a single Type-C interface needs to support both a first and a second operating mode. These two modes correspond to different peripheral types, power supply methods, and data channels. Existing solutions often rely on external identification chips and upper-layer software protocols to determine the type of inserted device, resulting in long identification paths, slow response times, and high implementation costs. Furthermore, if software polling is untimely or protocol interaction is abnormal, issues such as failure to switch to the correct mode promptly, incorrect power supply path configuration, and incorrect data channel establishment can easily occur. To address this, this solution incorporates an interface detection unit and a voltage comparison unit on the Type-C configuration channel. This converts the voltage differences exhibited by different peripherals on the configuration channel into a clear comparison result signal. The mode discrimination unit then directly determines whether the interface should operate in the first or second operating mode based on this comparison result signal, fundamentally solving the technical problem of quickly distinguishing different peripheral types at the circuit level.

[0051] Based on this, this technical solution implements the mode determination result into power supply control and data path configuration through a control output unit. When the mode determination unit determines that the interface is in the first working mode, the control output unit controls the local unit to provide DC power to the first peripheral type and establishes a first data channel for first data communication. When the mode determination unit determines that the interface is in the second working mode, the control output unit stops power supply to the first peripheral type and only establishes a second data channel for receiving data signals from the second peripheral type. Since the peripheral type, working mode, power supply strategy, and data channel are integrated into the same decision link at the circuit level, the entire process from peripheral insertion, detection voltage sampling, threshold comparison, mode determination to power supply and data channel switching is completed within hardware circuits and simple logic control. Compared with methods that rely on software polling and complex protocol parsing, the response is faster, unaffected by software task load, and can significantly reduce latency and misjudgment probability during identification and switching.

[0052] In summary, this technical solution, through the cooperation of an interface detection unit, voltage comparison unit, mode discrimination unit, and control output unit, achieves hardware identification of different peripheral categories without adding external identification chips or additional communication buses, utilizing the electrical characteristics of the Type-C configuration channel. It also links the selection of the operating mode with the configuration of the power supply path and data path, simplifying the overall circuit structure, reducing material costs, and ensuring more reliable and consistent power supply status and data path during multi-mode switching. This effectively reduces abnormal situations such as black screens, no data, and power supply conflicts, improving the compatibility, stability, and user experience of the multi-mode Type-C interface system. Furthermore, because the first and second operating modes and their corresponding peripheral types are described abstractly, they can be easily mapped to specific USB host modes, DP input modes, or two other operating modes with different electrical characteristics in different products, demonstrating good versatility and scalability.

[0053] In one specific embodiment, the multi-mode switching detection circuit is arranged on the motherboard. The interface detection unit includes a Type-C female connector. The configuration channel pins of the Type-C female connector serve as the first configuration channel pin and the second configuration channel pin, forming a first signal network and a second signal network respectively through printed circuit board wires. The first signal network connects the first configuration channel pin to the input terminal of a first resistor voltage divider circuit, and the second signal network connects the second configuration channel pin to the input terminal of a second resistor voltage divider circuit. A Type-C interface overvoltage protection circuit can also be connected in series on the first and second signal networks to suppress overvoltage transients on the configuration channel.

[0054] The first resistor voltage divider circuit consists of a first resistor and a second resistor connected in series. One end of the first resistor is connected to the first configuration channel pin, and the other end of the second resistor is connected to the reference potential, typically the circuit ground (GND). The connection point of the first and second resistors forms the first voltage divider node. The second resistor voltage divider circuit consists of a third resistor and a fourth resistor connected in series. One end of the third resistor is connected to the second configuration channel pin, and the other end of the fourth resistor is connected to the reference potential. The connection point of the third and fourth resistors forms the second voltage divider node.

[0055] The threshold comparison circuit includes a first transistor and a second transistor. The base of the first transistor is connected to the first voltage divider node, and the base of the second transistor is connected to the second voltage divider node. The emitters of both transistors are grounded, and their collectors are connected to the detection node. The detection node is connected to the analog-to-digital conversion detection pin of the main control processor chip via a pull-up resistor. This pulls the detection node level up to near the internal reference voltage when both transistors are off, and pulls the detection node level down to near 0V when either transistor is on.

[0056] The analog-to-digital conversion detection pin inside the main control processor chip periodically collects the voltage value of the detection node. The mode discrimination unit compares the collected level value with a preset threshold. A high level corresponds to the first peripheral type and the Type-C interface is determined to work in the first working mode. A low level corresponds to the second peripheral type and the Type-C interface is determined to work in the second working mode.

[0057] When a user connects a USB device to the Type-C female connector via a Type-C cable, the USB device's configuration channel pin is pulled down to ground by a 5.1kΩ resistor, making the voltage on the first and second configuration channel pins close to 0V. After voltage division by the first and second resistor divider circuits, the voltages at both the first and second voltage divider nodes are in the first voltage range close to 0V, below the transistor's conduction threshold, and both transistors are cut off. At this time, the detection node is pulled up to close to 1.8V by a pull-up resistor, and the analog-to-digital conversion detection pin acquires a high level. Based on this, the mode discrimination unit determines the type of the first peripheral device connected and sets the Type-C interface's operating mode to USB host mode. The control output unit outputs a valid level through the host processor chip's HOST mode power supply control pin, controlling the USB host power supply control circuit to conduct, enabling the Type-C female connector to output 5V power to the USB device. Simultaneously, it enables the USB host controller inside the host processor chip to communicate with the USB device via the differential data line connected to the Type-C data pin.

[0058] When a user connects a DP source device to a Type-C female connector via a DP-enabled Type-C cable, the DP source device outputs a voltage of 0.8V to 1.04V on its configuration channel pins. Depending on the cable and connection direction, at least one of the first or second configuration channel pins will receive this voltage. After voltage division by the corresponding resistor divider circuit, the voltage at the first or second voltage divider node is set in a second voltage range higher than the transistor's conduction threshold, ensuring sufficient voltage at the base of the corresponding transistor to conduct. The conducting transistor pulls the detection node level close to 0V, and the analog-to-digital conversion detection pin detects a low level. Based on this, the mode discrimination unit determines the type of the second peripheral device connected and sets the Type-C interface operating mode to DP input mode. The control output unit controls the multiple power switching devices to turn on through the second control branch, providing core power, logic power and interface power to the DP input chip, enabling the DP input chip to enter the working state, and establishing a second data channel with the main control processor chip's image input interface through the video data interface, so that the video signal from the DP source device is processed by the DP input chip and transmitted to the main control processor chip in the form of video data for decoding and display.

[0059] In DP input mode, the control output unit can also turn off the USB host power supply control circuit, so that the power pin of the Type-C female interface no longer outputs 5V power supply, avoiding conflict with the power supply provided by the external DP source device, and reducing unnecessary power consumption of the device.

[0060] The above embodiments illustrate a typical application of the present invention. Those skilled in the art can replace or adjust the resistance value, comparison threshold, voltage range, and model of the main control processor chip and DP input chip without departing from the core concept of the present invention. They can also use other analog-to-digital conversion detection pins and GPIO control pins with similar functions to achieve the purpose of peripheral type identification and automatic switching of multiple modes by configuring the channel voltage through Type-C.

[0061] It should be added that, in order to ensure consistency between the terminology and the labeling in the drawings throughout this manual, the following has been added: Figures 1 to 13 The correspondence between the names in this document and the aforementioned technical terms shall be uniformly explained. Figure 1 The schematic diagram of the TYPEC interface circuit for connecting peripherals shown is specifically the TYPEC female connector interface and its surrounding connection circuit for connecting peripherals. This part is part of the interface detection unit described in this specification. Figure 2 The circuit diagram of the interface detection unit shown corresponds to the complete implementation of the interface detection unit in this specification, and is used to obtain the detection voltage from the configuration channel pin of the TYPEC female interface; Figure 3 The circuit diagram of the voltage comparison unit shown corresponds to the specific circuit implementation of the voltage comparison unit in this specification. The two CC pins are CC1 and CC2 pins, which form the first voltage divider node and the second voltage divider node through a voltage divider resistor network. They are then compared with the base voltage of transistors Q9306 and Q9307. When the voltage divider voltage is higher than the conduction threshold of about 0.6V, the collector and emitter of the transistor are turned on, thereby pulling the detection node SARADC_VIN5_USB_DEVICE_DET low. This detection node corresponds to the detection node output by the voltage comparison unit and sent to the analog-to-digital conversion detection pin of the main control processor chip in this specification. Figure 4 The circuit diagram shown is for the TYPEC interface overvoltage protection circuit, which corresponds to the Type-C interface overvoltage protection circuit described in this manual. It is used to provide overvoltage protection for the power supply pins and configuration channels of the TYPEC female connector. Figure 5 The circuit diagram of the HOST_USB power supply control circuit shown corresponds to the USB host power supply control circuit in this manual. Its control terminal is driven by the HOST mode power supply control pin M39 of the host processor chip, which is used to output 5V power to the external USB device in USB host mode. Figure 6The circuit diagram of the DP_IN chip power supply circuit shown corresponds to the DP input chip power supply circuit in this manual. The DP input chip, such as the LT7911UX, is supplied with various operating voltages by multiple power supply chips and switching devices, and is controlled by multiple GPIO control pins of the main control processor chip. Figure 7 The circuit diagram of the device detection unit shown corresponds to the relevant circuit in this specification for detecting the insertion status and type of peripheral devices by the main control processor chip in conjunction with the interface detection unit and voltage comparison unit, thereby realizing the discrimination of the first peripheral device type and the second peripheral device type; Figure 8 The circuit diagram of the USB_HOST controller shown corresponds to the USB host controller inside the main control processor chip in this specification and the first data channel formed by the TYPEC data pin, which is used to communicate with USB devices in USB host mode. Figure 9 The circuit diagram of the DP_IN chip CSI signal data output module shown corresponds to the end of the second data channel in this specification where the DP input chip outputs video data signals. Figure 10 and Figure 11 The circuit schematic of the DP_IN_CSI signal input module shown below constitutes two parts of the second data channel on the main control processor chip side, realizing the input of the CSI video data signal output by the DP input chip to the image input interface of the main control processor chip; Figure 12 The circuit schematic shown is for the GPIO port M39 of the HOST mode 5V power supply control. It corresponds to the GPIO control pin of the control output unit in this manual, which is used to control the USB host power supply control circuit and to switch the USB power supply state between the first working mode and the second working mode. Figure 13 The functional block diagram shown. Figure 13This is an overall functional block diagram of the multi-mode switching detection circuit for the Type-C interface of the present invention. In the diagram, the TYPEC port is a Type-C female connector for connecting peripherals. The CC line is connected to the level threshold control circuit to form a voltage comparison unit. The output of the level threshold control circuit is connected to the device identification module inside the SOC. The SOC integrates a USB_HOST controller, a CSI module, and GPIO pins for mode control and power supply control. The USB_HOST controller and the TYPEC port form a USB data path in USB host mode via a USB data line. The SOC controls the power supply of the USB_HOST through a set of GPIOs, enabling the USB_HOST power supply to output 5V to the TYPEC port in USB host mode. The DP data output from the TYPEC port is connected to the LT7911UX_DP_TO_CSI module. This module is connected to the CSI module inside the SOC through the CSI signal, forming a video data path in DP input mode. The SOC also controls the power supply of the LT7911UXPOWER through another set of GPIOs, which provides operating power to the LT7911UX_DP_TO_CSI module in DP input mode, realizing power-on and power-off management of the DP input chip.

[0062] To ensure consistency between the technical terminology used in this specification and the component identification, pin names, and net names in the original circuit design, the correspondence of key terms is explained as follows: The first and second configuration channel pins of the Type-C female connector interface described in this specification refer to the CC1 and CC2 pins of the Type-C interface, respectively. The two signal nets led out through the printed circuit board correspond to the net names A5_CC1_TPC and B5_CC2_TPC in the schematic diagram. The first and second resistor voltage divider circuits in the voltage comparison unit described in this specification are constructed by connecting resistors R90602 and R90601 in series, respectively. The circuit consists of resistors R90600 and R8150 connected in series, and their series connection points are the first and second voltage divider nodes in this specification, respectively. The first and second transistors in the threshold comparison circuit described in this specification correspond to transistors Q9306 and Q9307 in the schematic diagram. The detection node shared by their collectors is connected to the analog-to-digital conversion detection pin of the main control processor chip via pull-up resistor R90564. This pin is pin AW13 of the RK3588S chip in the actual circuit, corresponding to the network name SARADC_VIN5_USB_DEVICE_DET. The main control processor chip referred to in this specification is the RK3588S chip, in which... The GPIO control pin for USB host power supply control corresponds to pin M39 with network name IO1B4U_USB_HOST_5VEN. The USB host power supply control circuit described in this manual is composed of a power management chip U2500 and a load switch chip U9012. Its output network name is DP_INVBUS_PWR_VCC, which is ultimately connected to the VBUS power pin of the Type-C female connector. The DP input chip mentioned in this manual is the LT7911UX chip, and its various operating power supplies are provided by the DP input chip power supply circuit described in this manual, corresponding to power chips U1521, U9015, U1512, and U1531 in the schematic diagram. The enable control is achieved by the GPIO1_A4D_LT1V1_EN, GPIO1_A6D_LT1V8_EN, and GPIO1_B2D_LT3V3_EN control pins of the main control processor chip. The second data channel mentioned in this manual is the video data path between the DP input chip and the MIPICSI input terminal of the main control processor chip RK3588S through the MIPICSI interface. It corresponds to the DPIN chip CSI signal data output module and SOCMIPICSI signal input module in the schematic diagram. The HOST mode is the USB host mode, which is the first working mode. The first peripheral type is the USB device (such as a USB flash drive).Through the above correspondence, the abstract technical terms in this manual are consistent and interconnected with the device models, pin names, and network names in the actual circuit in terms of structure and function. This helps reviewers to understand the contents of the manual in a one-to-one correspondence with the accompanying circuit diagrams, and avoids situations where technical terms are inconsistent or their meanings are disconnected.

[0063] Detailed working principle and process of this case: like Figures 1-13 As shown, when there is a device on the TYPE-C female connector, the SOC_RK3588S uses the SARADC (Signal Controller Access Control) pin AW13. Figure 7 The ADC detection reads the value converted from analog voltage on the ADC and determines the device type based on the different values: 1. When a USB device is connected to the TYPE-C female connector, because one of the CC pins of the TYPE-C_OTG line is connected to ground with a 5.1K resistor, there is no voltage input to the CC pin of the TYPE-C line. The voltage levels of network names A5_CC1_TPC and B5_CC2_TYP are 0V, and the base voltage level of pin 1 of Q9306 and Q9305 is 0V. Therefore, transistors Q9306 and Q9307 are in the cutoff state. Figure 3 Because of the R90564 pull-up resistor, the network name SARADC_VIN5_USB_DEVICE_DET (i.e., the SOC_RK3588S's SARADC level through pin AW13 is 1.8V) indicates that the SOC_RK3588S determines that the TYPE-C female connector is connected to a USB device. The SOC_RK3588S then enters HOSTUSB mode. Through the GPIO pin M39, network name IO1B4U_USB_HOST_5VEN, the SOC_RK3588S enables pin 4 of the U2500, pulling it high to 1.8V. Figure 5 DPINVBUS_PWR_VCC provides 5V power to the USB device, which is then transmitted through U9012 ( Figure 4 Power is supplied to the TYPE-C female connector. After the USB device is powered on, the SOC_RK3588S supplies power through pins AW6 and AV6 of USB2.0 HOST0. Figure 8 USB20_HOST0_DP and USB20_HOST0_DM communicate with USB_device via USB data.

[0064] 2. When a DP source device is connected to the Type-C connector, one of the CC pins (B5 or A5) of the Type-C connector will have a 0.8-1.04V input level (the CC pin of the DP source has an output level, while a conventional dual-Type-C DP cable will have one CC pin connected). One of the network inputs, B5_CC2_TPC or A5_CC1_TPC, will have a 0.8-1.04V level. This level is then processed by resistors R90602 and R90601. After voltage division by R90600 and R8150, the base of one of the transistors Q9306 and Q9307 has a voltage level of 0.66-0.84V, causing one of Q9306 and Q9307 to saturate and conduct. The collector (pin 3) and emitter (pin 2) of either Q9307 or Q9306 are connected. Pin 2 of R90597 and R90599 is effectively connected to ground. R90564 and R90599 form a voltage divider, or R90564... Together with R90599, a voltage divider is formed. The SARADC level on pin AW13 of the SOC_RK3588S (network name SARADC_VIN5_USB_DEVICE_DET) changes from 1.8V to 0.16V after the voltage divider is applied. Upon detecting this change, the SOC_RK3588S determines that the device connected to the TYPE-C female connector is a DP source. Therefore, the SOC_RK3588S switches to DPIN mode. The SOC_RK3588S enables U1521, U9015, U1512, and U1531 by controlling pins G37 (GPIO1_A4D_LT1V1_EN), D39 (GPIO1_A6D_LT1V8_EN), and M38 (GPIO1_B2D_LT3V3_EN), thus powering U1525LT7911UX. LT7911UX powers the device via the MIPICSI interface (…). Figure 9 The image signal is transmitted to the MIPICSI of the SOC_RK3588S and then input to the SOC's image processing module for display. Figure 10 , Figure 11 , Figure 12 Because the DP source provides 5V power to the DPIN device, the SOC_RK3588S uses the GPIO network name IO1B4U_USB_HOST_5VEN on pin M39 to enable pin 4 of U2500 to a low level of 0V. Figure 5 This disables the U2500, disconnects the DPINVBUS_PWR_VCC power supply, and forces the LT7911UX to use an external DP power source, increasing the product's battery life.

[0065] In another embodiment, a multi-mode switching detection method for a Type-C interface includes an interface detection step, a voltage comparison step, a mode discrimination step, a first mode control step, and a second mode control step, with each step executed sequentially according to the time order after the peripheral is inserted.

[0066] In the interface detection step, after a peripheral device is inserted into the Type-C interface, the detection voltage on the configuration channel is obtained through the interface detection unit, which is electrically connected to the Type-C interface configuration channel. Since different types of peripheral devices exhibit different electrical characteristics on the configuration channel, this detection voltage is used to characterize the category of the currently connected peripheral device.

[0067] In the voltage comparison step, the detected voltage is input to the voltage comparison unit, which compares the detected voltage with a preset threshold and outputs a corresponding comparison result signal. This step converts the originally continuously changing analog voltage signal into a level result signal for subsequent discrimination, thereby reducing the complexity of subsequent pattern determination.

[0068] In the mode determination step, the mode determination unit determines whether the current operating mode of the Type-C interface is the first operating mode or the second operating mode based on the comparison result signal. This determination process is completed directly based on the voltage comparison result, without relying on complex software protocol parsing or polling operations, thus enabling rapid mode decision-making after peripheral insertion.

[0069] In the first mode control step, when the mode discrimination step determines that the Type-C interface is working in the first working mode, the control output unit controls the local machine to provide DC power to the connected first peripheral type, and at the same time establishes a first data channel for first data communication, so that the local machine can normally supply power and perform data communication with the first peripheral type in the first working mode.

[0070] In the second mode control step, when the mode discrimination step determines that the Type-C interface is working in the second working mode, the control output unit controls the local machine to establish a second data channel for receiving data signals from the second peripheral type, so that the local machine can receive and process data signals from the second peripheral type in the second working mode.

[0071] Through the combined steps described above, this embodiment achieves automatic selection of working mode based on different peripheral types under the same Type-C interface, and coordinated switching of power supply strategy and data channel.

[0072] It should be further pointed out that the core technical problem this case aims to solve is that, when a peripheral is inserted into the same Type-C interface, the system struggles to reliably and promptly distinguish between the first and second peripheral types. This results in an inability to select the first or second operating mode in a timely manner, further leading to errors in power supply path and data channel configuration. The solution is not to run a complex protocol first and then make a decision, but rather to utilize the electrical characteristics of the Type-C configuration channel. This allows the circuit to map the peripheral type to a stable, sampleable voltage level at the moment of insertion, and then the mode discrimination and control output directly translate this result into a switching action for the power supply and data channels.

[0073] The key to implementing the interface testing step is obtaining the configuration channel voltage of the Type-C female connector. The Type-C configuration channel typically corresponds to pins CC1 and CC2. After a peripheral is inserted, it will exhibit its identity characteristic on either pin CC1 or CC2. When the first peripheral type is a USB device, the USB device will use a pull-down resistor to make pins CC1 and CC2 appear close to 0V. When the second peripheral type is a DP source device, the DP source device will output a voltage between 0.8V and 1.04V on either pin CC1 or CC2. The function of the interface testing unit is to introduce this voltage state of pins CC1 and CC2 into the subsequent circuitry, enabling the subsequent circuitry to make a deterministic judgment based on the voltage difference. For the implementer, the most intuitive way to verify this step is to use a multimeter in DC voltage mode to measure the voltage of pins CC1 and CC2 relative to ground after the peripheral is inserted. When a USB device is inserted, both are close to 0V; when a DP source device is inserted, one of them falls within the range of 0.8V to 1.04V.

[0074] The core of the voltage comparison step is to transform the voltage detected by the interface into a result signal that is compatible with the main control processor chip. Since the main control processor chip can more reliably handle two stable states, such as high and low levels, rather than directly handling an analog voltage that may be affected by noise, the voltage comparison unit first adjusts the voltages of the CC1 and CC2 pins to a suitable comparison range using a resistor divider. Then, it utilizes the transistor's conduction threshold to achieve threshold comparison. Specifically, when the divided voltage is applied to the transistor's base, if the base voltage is higher than approximately 0.6V, the transistor enters the conducting state, forming a low-resistance path between its collector and emitter, effectively pulling the detection node to ground, thus making the detection node low. When the base voltage is lower than approximately 0.6V, the transistor is cut off, and the detection node is not pulled low; it remains high under the pull-up resistor. Thus, the CC voltage corresponding to the first peripheral type is close to 0V, and after voltage division, the base voltage is still significantly lower than approximately 0.6V, the transistor is cut off, and the detection node remains high. The CC voltage corresponding to the second peripheral type is between 0.8V and 1.04V. After voltage division, the base voltage is between 0.66V and 0.84V, which is about 0.6V higher. At least one transistor is conducting, and the detection node is pulled low. For the implementer, this step of the verification is also intuitive: use a multimeter to measure the voltage of the detection node relative to the circuit ground. When the first peripheral type is inserted, the detection node is close to the pull-up voltage, for example, 1.8V. When the second peripheral type is inserted, the detection node is close to 0V or significantly lower than 1.8V.

[0075] The core of the mode discrimination step is to convert the comparison result signal output by the voltage comparison unit into a clear mode conclusion, thereby eliminating the uncertainty brought about by software protocol recognition. The mode discrimination unit is typically executed by the main control processor chip. It reads the sampled value corresponding to the detection node, for example, by sampling the node voltage through an analog-to-digital converter detection pin. Because the peripheral category has already been mapped to two stable levels in the previous step, the main control processor chip only needs to set a discrimination threshold to complete the judgment. In implementation, a simple and reliable threshold determination method can be adopted, such as judging the first operating mode as the sampled value higher than a certain threshold and the second operating mode as the sampled value lower than a certain threshold. This step solves the core problem because it avoids the process of enumerating peripheral protocols, waiting for the enumeration to complete, and then determining the type. Instead, it directly reads a discrimination result quickly provided by the hardware circuit, resulting in faster response speed and less susceptibility to system load. For the implementer, the verifiable method for this step is to read the sampling results of the main control processor chip for the detection pin. When the first peripheral type is inserted, the sampling results stably fall in the high level range, and when the second peripheral type is inserted, the sampling results stably fall in the low level range, and they can stabilize very quickly after insertion.

[0076] The core technical effect of the first mode control step is to simultaneously accomplish two things when determining the first operating mode: providing DC power to the first peripheral type and establishing the first data channel. In this solution, the first peripheral type typically corresponds to a USB device, and the first data channel corresponds to the communication path of the USB data differential line. After determining the first operating mode, the main control processor chip drives the power supply control pin through the control output unit, enabling the USB host power supply control circuit to conduct and output 5V DC power to the Type-C power pin. Simultaneously, it establishes a usable data channel between the USB host controller's data port and the Type-C data pin. This step solves the problem that previously, when identification was untimely or incorrect, the USB device would easily fail to power on or the data link would not be established. This step strongly binds power supply and data channel establishment to mode determination, ensuring that once the first operating mode is determined, power supply and data path preparation are automatically completed, thereby improving success rate and stability. For implementers, the most intuitive verification method is to measure the Type-C power pin after inserting the USB device; it should display 5V, and the USB device should be able to enumerate and complete data read / write operations.

[0077] The core technical effect of the second-mode control step is to establish a second data channel when the second operating mode is determined, for receiving data signals from a second peripheral type. In this solution, the second peripheral type typically corresponds to a DP source device, and the second data channel corresponds to the channel from the DP input link to the video data output link. For example, the DP input chip converts the DP signal and sends it to the main control processor chip through the CSI interface. After determining the second operating mode, the main control processor chip enables the DP input chip power supply circuit through the control output unit, ensuring the DP input chip enters the working state and establishing a second data channel from the DP input chip to the main control processor chip's image input interface. Simultaneously, to avoid unnecessary power supply conflicts or reduce power consumption, the main control processor chip can also disable the USB host power supply control circuit in the first mode through the control output unit, preventing the Type-C port from outputting 5V. This step addresses the issue that video modes are more sensitive to timing and link integrity; inconsistencies in power supply and data channel preparation can easily lead to a black screen or no signal. This step binds the power supply preparation and data channel establishment for the second mode under the same mode determination result, enabling the DP input link to enter a stable operating state more quickly. For the implementer, the verification method is to insert the DP source device, ensure that the DP input chip power supply voltage is within the normal range, the main control processor chip can receive continuous video data streams and display images, and the Type-C port's native 5V output is either off or non-output according to the design.

[0078] By connecting the above five steps, the underlying logic for achieving the core technical effect of this case becomes clear. First, the interface detection step transforms the identity differences of peripherals on the configuration channel into measurable voltages. Then, the voltage comparison step compresses these voltages into stable two-state result signals. Next, the mode discrimination step transforms the result signal into a clear mode conclusion. Finally, the first or second mode control step immediately implements the mode conclusion into a hard switch of the power supply and data channels. Due to the short discrimination link, discrete signal states, and strong binding between the execution action and the discrimination result, the recognition speed can be significantly improved, the probability of misjudgment can be reduced, and the consistency of power supply and data channels during mode switching can be improved, thereby enhancing compatibility, stability, and user experience.

[0079] Finally, it should be noted that the above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A multi-mode switch detection circuit for Type-C interface, characterized in that, The application relates to a Type-C interface detection method and device. The application relates to a Type-C interface detection method and device. The application relates to a Type-C interface detection method and device. The application relates to a Type-C interface detection method and device. The application relates to a Type-C interface detection method and device.

2. The multi-mode switch detection circuit for Type-C interface according to claim 1, wherein, The application relates to a Type-C interface detection method and device. The application relates to a Type-C interface detection method and device. The application relates to a Type-C interface detection method and device.

3. The multi-mode switch detection circuit for Type-C interface according to claim 2, wherein, The application relates to a Type-C interface detection method and device. The application relates to a Type-C interface detection method and device. The application relates to a Type-C interface detection method and device. The application relates to a Type-C interface detection method and device. The application relates to a Type-C interface detection method and device. The application relates to a Type-C interface detection method and device. The application relates to a Type-C interface detection method and device. The application relates to a Type-C interface detection method and device. The application relates to a Type-C interface detection method and device. The application relates to a Type-C interface detection method and device. The application relates to a Type-C interface detection method and device. The application relates to a Type-C interface detection method and device. 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The application relates to a Type-C The voltage comparison unit comprises a first resistance voltage dividing circuit corresponding to the first configuration channel pin, a second resistance voltage dividing circuit corresponding to the second configuration channel pin, and at least one threshold comparison circuit; wherein the first resistance voltage dividing circuit comprises a first resistance and a second resistance connected in series between the first configuration channel pin and a reference potential and forms a first voltage dividing node between the first resistance and the second resistance, and the second resistance voltage dividing circuit comprises a third resistance and a fourth resistance connected in series between the second configuration channel pin and the reference potential and forms a second voltage dividing node between the third resistance and the fourth resistance; the voltage comparison unit further comprises a detection node, an input end of the threshold comparison circuit is connected with the first voltage dividing node and the second voltage dividing node, and an output end thereof is connected with the detection node, for making the detection node present a first potential when the voltage of the first voltage dividing node and the second voltage dividing node is in a first voltage interval, and making the detection node present a second potential when the voltage of the first voltage dividing node and the second voltage dividing node is in a second voltage interval which is distinguished from the first voltage interval.

4. The multi-mode switch detection circuit for Type-C interface according to claim 3, wherein, The threshold comparison circuit comprises a first transistor and a second transistor, a base of the first transistor is connected with the first voltage dividing node, an emitter thereof is grounded, and a collector thereof is connected with the detection node, a base of the second transistor is connected with the second voltage dividing node, an emitter thereof is grounded, and a collector thereof is connected with the detection node, by making the voltage of the first voltage dividing node and the second voltage dividing node higher than a transistor conduction threshold when the second peripheral type is accessed to turn on at least one transistor to pull the detection node level to the second potential, and making the voltage of the first voltage dividing node and the second voltage dividing node lower than the transistor conduction threshold when the first peripheral type is accessed to make the first transistor and the second transistor both cut off to keep the detection node level at the first potential; The detection node is connected to the analog-digital conversion detection pin of the host processor chip through a pull-up resistance, and the mode discrimination unit is configured to correspondingly determine that a first level value collected by the analog-digital conversion detection pin when the first peripheral type is accessed indicates that the Type-C interface works in the first working mode, and correspondingly determine that a second level value collected by the analog-digital conversion detection pin when the second peripheral type is accessed indicates that the Type-C interface works in the second working mode.

5. The multi-mode switch detection circuit for Type-C interface according to claim 4, wherein, The first peripheral type is a USB device, the second peripheral type is a DP source device, the first working mode is a USB host mode, and the second working mode is a DP input mode. The control output unit comprises a first control branch electrically connected with a HOST mode power supply control pin of the host processor chip and a USB host power supply control circuit, an input end of the USB host power supply control circuit is connected with a direct current power supply, and an output end of the USB host power supply control circuit is connected with a power supply pin of the Type-C female seat interface; when the mode discrimination unit determines that the Type-C interface works in the USB host mode, the control output unit outputs the first control signal through the HOST mode power supply control pin to turn on the USB host power supply control circuit, so that the Type-C female seat interface outputs a direct current power supply with a rated value of 5V to the connected USB device and performs USB data communication with the USB device through the first data channel.

6. The multi-mode switch detection circuit for Type-C interface according to claim 5, wherein, The control output unit comprises a second control branch connected with a DP input chip power supply circuit and a second data channel electrically connected with an image input interface of the host processor chip, an output end of the DP input chip power supply circuit is connected with each power supply pin of the DP input chip, the DP input chip is electrically connected with the image input interface of the host processor chip through a video data interface, when the mode discrimination unit determines that the Type-C interface works in the DP input mode, the control output unit outputs the second control signal through the second control branch to sequentially turn on a plurality of power supply switching devices to provide at least one group of working voltages for the DP input chip, and transmits the DP video signal input through the Type-C interface to the host processor chip through the second data channel for image processing; The Type-C interface overvoltage protection circuit is connected between the power supply pin of the Type-C female seat interface and an internal power supply network, and is used for clamping the voltage of the power supply pin when the power supply voltage provided by the external device exceeds a preset safety range and preventing the overhigh voltage from being transmitted to the host processor chip and the DP input chip; The first voltage interval comprises a voltage range close to 0V, and the second voltage interval comprises a voltage range higher than a threshold value of a triode and between 0.8V and 1.04V, so that the voltages of the first voltage dividing node and the second voltage dividing node are in the first voltage interval when the first external device type is connected, and the voltages of the first voltage dividing node and the second voltage dividing node are in the second voltage interval when the second external device type is connected.

7. A multi-mode switching detection method for Type-C interface, characterized in that, The method comprises the following steps: An interface detection step: after the external device is inserted into the Type-C interface, an interface detection unit electrically connected with a configuration channel of the Type-C interface obtains a detection voltage representing the category of the external device; A voltage comparison step: the detection voltage is input into a voltage comparison unit, so that the voltage comparison unit compares the detection voltage with a preset threshold value and generates a comparison result signal; A mode discrimination step: according to the comparison result signal, a mode discrimination unit determines that the working mode of the Type-C interface is the first working mode or the second working mode. The first mode control step: when the mode discrimination step determines that the Type-C interface works in the first working mode, the control output unit is used to control the host to provide DC power for the accessed first peripheral type, and a first data channel for first data communication is established; The second mode control step: when the mode discrimination step determines that the Type-C interface works in the second working mode, the control output unit is used to control the host to establish a second data channel for receiving data signals from the second peripheral type.

8. The multi-mode switch detection method for Type-C interface according to claim 7, characterized in that, In the interface detection step, the voltage signals on the configuration channels are obtained through the first configuration channel pin and the second configuration channel pin of the Type-C female interface, and the voltage signals are input into the voltage comparison step as the detection voltage; In the voltage comparison step, the voltage on the first configuration channel pin and the second configuration channel pin is respectively processed by resistance voltage division to form a first voltage division node and a second voltage division node, and a comparison result signal corresponding to a first potential is generated when the voltage of the first voltage division node and the second voltage division node is in a first voltage interval, and a comparison result signal corresponding to a second potential is generated when the voltage of the first voltage division node and the second voltage division node is in a second voltage interval.

9. The multi-mode switch detection method for Type-C interface according to claim 8, wherein, In the mode discrimination step, the comparison result signal is input into the analog-digital conversion detection pin of the host processor chip, and the Type-C interface is determined to be in the first working mode or the second working mode according to the collected level value. The first peripheral type is a USB device, the first working mode is a USB host mode, and in the first mode control step, the control output unit outputs a DC power of 5V to the USB device, and the USB data communication is performed through the first data channel.

10. The multi-mode switch detection method for Type-C interface according to claim 9, wherein, The second peripheral type is a DP source device, the second working mode is a DP input mode, and in the second mode control step, the control output unit supplies power for the DP input chip, and the video data signal from the DP source device is received through the second data channel. In the first mode control step and the second mode control step, the power supply control operation and the data channel establishment operation are triggered and executed synchronously by the same mode discrimination result.

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