Solid-state switch with self-locking function
By designing solid-state switches with self-locking function, using solid-state components and self-locking control circuits, the problem of mechanical electromagnetic switches being easy to start arc and ignite and responding for a long time under high load conditions is solved, and fast on-off and high reliability are achieved.
Patent Information
- Application Number
- CN202421734790.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-07-22
- Publication Date
- 2025-05-30
- Estimated Expiration
- 2034-07-22
AI Technical Summary
Existing mechanical electromagnetic switches are prone to arcing and ignition under high load conditions, causing contact ablation, and have a long response time, so they cannot quickly cut off the load, resulting in amplification of faults.
A solid-state switch with self-locking function was designed, using solid-state components such as PNP transistors, NPN transistors and N-channel field effect tubes, and a self-locking control circuit is formed by a normally open contact switch and a normally closed contact switch to achieve rapid on-off.
By canceling mechanical contacts, the problems of contact ablation and low life are avoided, and the switch is quickly turned on and off, and the response speed is fast and reliability is improved.
Smart Images

Figure CN222928379U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to a solid-state switch with a self-locking function, belonging to the technical field of switch design and control. Background Art
[0002] An electromagnetic switch is a device that uses electromagnetic principles to control the on-off of a circuit or perform mechanical actions. For example, mechanical electromagnetic switches and self-locking electromagnetic switches. Among them, the traditional mechanical electromagnetic switch is a switch controlled by an electromagnet. When the electromagnet coil is energized, electromagnetic suction is generated, and the movable switch pushes or pulls the switch contact to close, thereby connecting the control circuit; the self-locking electromagnetic switch is achieved by connecting an electromagnet coil in parallel on the load side. When the start switch is pressed, the electromagnet is energized to generate suction, sucking the corresponding iron sheet, so that the switch remains closed. When the off switch is pressed or the power is cut off, the electromagnet is de-energized and loses suction, and the switch is disconnected under the action of the spring to ensure power-off.
[0003] The above electromagnetic switch is designed with a mechanical structure. During the on-off process of the mechanical switch contacts, especially when carrying a large load current, it is easy to generate arc and spark, resulting in contact ablation. This will greatly reduce the service life of the switch, and even lead to poor switch contacts and electrical failure; in addition, the response time of the mechanical switch is often long. When a short circuit occurs in the load, the turn-off response time is long, and it cannot be quickly cut off, resulting in the expansion of the load fault. Summary of the Utility Model
[0004] The technical problem to be solved by the utility model is to provide a solid-state switch with a self-locking function, which uses solid-state components and is supplemented by a self-locking control circuit to replace the existing mechanical switch and efficiently realize the fast on-off of the switch.
[0005] The utility model adopts the following technical solutions to solve the above technical problems: The utility model designs a solid-state switch with a self-locking function for controlling the power supply to supply power to a load, which includes a PNP triode Q1, an NPN triode Q2, a normally open contact switch SW1, a normally closed contact switch SW2, a resistor R1, and an N-channel field-effect transistor Q3. Among them, one end of the normally open contact switch SW1, one end of the resistor R1, and the emitter of the PNP triode Q1 are connected to each other, and one side of the connected position constitutes the input end of the solid-state switch for connecting to the power supply, and the other side of the connected position constitutes the positive output end of the solid-state switch for connecting to the positive pole of the load. The other end of the normally open contact switch SW1, one end of the normally closed contact switch SW2, and the base of the NPN triode Q2 are connected to each other. The other end of the normally closed contact switch SW2, the collector of the PNP triode Q1, and the gate of the N-channel field-effect transistor Q3 are connected to each other. The other end of the resistor R1, the base of the PNP triode Q1, and the collector of the NPN triode Q2 are connected to each other. The emitter of the NPN triode Q2 and the source of the N-channel field-effect transistor Q3 are connected and grounded. The drain of the N-channel field-effect transistor Q3 constitutes the negative output end of the solid-state switch for connecting to the negative pole of the load. Based on the touch of the normally open contact switch SW1, the power supply to the load is turned on and self-locked, and based on the power failure or the touch of the normally closed contact switch SW2, the power supply to the load is turned off.
[0006] As a preferred technical solution of the utility model: It further includes a reverse diode D1. The positive pole of the reverse diode D1 is connected to the negative output end of the solid-state switch, and the negative pole of the reverse diode D1 is connected to the positive output end of the solid-state switch.
[0007] As a preferred technical solution of the utility model: It further includes a thermistor R2-NTC. The drain of the N-channel field-effect transistor Q3 is connected to one end of the thermistor R2-NTC, and the other end of the thermistor R2-NTC constitutes the negative output end of the solid-state switch.
[0008] As a preferred technical solution of the utility model: It further includes a main driver with overcurrent protection. The collector of the PNP triode Q1 is connected to the gate of the N-channel field-effect transistor Q3 in series through the main driver.
[0009] As a preferred technical solution of the utility model: It further includes at least one delay branch. Each delay branch respectively includes a time-delay device and an N-channel field-effect transistor Q4. Among them, the input end of the time-delay device constitutes the input end of the delay branch, and the output end of the time-delay device is connected to the gate of the N-channel field-effect transistor Q4. The collector of the PNP triode Q1 is connected to the input ends of each delay branch. The drain of the N-channel field-effect transistor Q4 in each delay branch is connected to the negative output end of the solid-state switch, and the source of the N-channel field-effect transistor Q4 in each delay branch is grounded.
[0010] As a preferred technical solution of the present utility model: each delay branch further includes a secondary driver with overcurrent protection. In the structure of each delay branch, the output end of the time delay device is connected in series with the secondary driver and then connected to the gate of the N-channel field effect transistor Q4.
[0011] As a preferred technical solution of the present utility model: it further includes an N-channel field effect transistor Q5 and an N-channel field effect transistor Q6. According to the following corresponding structural relationship, the PNP transistor Q1 is replaced by the N-channel field effect transistor Q5, and the NPN transistor Q2 is replaced by the N-channel field effect transistor Q6;
[0012] The N-channel field effect transistor Q5 corresponds to the PNP transistor Q1. Among them, the drain of the N-channel field effect transistor Q5 corresponds to the emitter of the PNP transistor Q1, the gate of the N-channel field effect transistor Q5 corresponds to the base of the PNP transistor Q1, and the source of the N-channel field effect transistor Q5 corresponds to the collector of the PNP transistor Q1;
[0013] The N-channel field effect transistor Q6 corresponds to the NPN transistor Q2. Among them, the gate of the N-channel field effect transistor Q6 corresponds to the base of the NPN transistor Q2, the drain of the N-channel field effect transistor Q6 corresponds to the collector of the NPN transistor Q2, and the source of the N-channel field effect transistor Q6 corresponds to the emitter of the NPN transistor Q2.
[0014] For the solid-state switch with a self-locking function described in the present utility model, compared with the prior art by adopting the above technical solutions, it has the following technical effects:
[0015] The solid-state switch with a self-locking function designed in the present utility model uses a PNP transistor Q1, an NPN transistor Q2, and an N-channel field effect transistor Q3, supplemented by a normally open contact switch SW1 and a normally closed contact switch SW2 to form a self-locking control circuit to construct the designed solid-state switch. In application, based on the touch of the normally open contact switch SW1, the power supply to the load is turned on and self-locked, and based on the power failure or the touch of the normally closed contact switch SW2, the power supply to the load is turned off; and a reverse diode D1 is added in the design to achieve freewheeling during the turn-off process of the N-channel field effect transistor Q3, avoiding the appearance of spike voltage on the N-channel field effect transistor Q3, and a thermistor R2-NTC is added to achieve the function of suppressing the starting spike current; the overall design cancels the mechanical contacts, avoiding reliability problems such as contact ablation and low life, and efficiently realizing the fast on-off of the switch. Description of the Drawings
[0016] Figure 1 It is a schematic diagram of the first embodiment of the solid-state switch with a self-locking function of the present utility model;
[0017] Figure 2Schematic diagram of the second embodiment of the solid-state switch with a self-locking function according to the present utility model. Specific embodiments
[0018] The specific embodiments of the present utility model will be further described in detail below with reference to the accompanying drawings of the specification.
[0019] The present utility model designs a solid-state switch with a self-locking function for controlling the power supply to a load. In practical applications, such as Figure 1 In the first embodiment shown, it includes a PNP transistor Q1, an NPN transistor Q2, a normally open contact switch SW1, a normally closed contact switch SW2, a resistor R1, and an N-channel field-effect transistor Q3. One end of the normally open contact switch SW1, one end of the resistor R1, and the emitter of the PNP transistor Q1 are connected together. The side of the connected position constitutes the input end of the solid-state switch for connecting to the power supply, and the other side of the connected position constitutes the positive output end of the solid-state switch for connecting to the positive pole of the load. The other end of the normally open contact switch SW1, one end of the normally closed contact switch SW2, and the base of the NPN transistor Q2 are connected together. The other end of the normally closed contact switch SW2, the collector of the PNP transistor Q1, and the gate of the N-channel field-effect transistor Q3 are connected together. The other end of the resistor R1, the base of the PNP transistor Q1, and the collector of the NPN transistor Q2 are connected together. The emitter of the NPN transistor Q2 and the source of the N-channel field-effect transistor Q3 are connected together and grounded. The drain of the N-channel field-effect transistor Q3 constitutes the negative output end of the solid-state switch for connecting to the negative pole of the load. Based on the touch of the normally open contact switch SW1, the power supply to the load is turned on and self-locked, and based on the power-off of the power supply or the touch of the normally closed contact switch SW2, the power supply to the load is turned off.
[0020] Based on the above-designed circuit structure, in practical applications, as Figure 1 shown, a reverse diode D1 and a thermistor R2-NTC are further added. Specifically, the positive pole of the reverse diode D1 is connected to the negative output end of the solid-state switch, the negative pole of the reverse diode D1 is connected to the positive output end of the solid-state switch, and the drain of the N-channel field-effect transistor Q3 is connected to one end of the thermistor R2-NTC, and the other end of the thermistor R2-NTC constitutes the negative output end of the solid-state switch.
[0021] In the specific actual application process, touch the normally open contact switch SW1. After the normally open contact switch SW1 is turned on and then bounces back, during the contact process of the normally open contact switch SW1, based on the power supply of the connected power source, the NPN transistor Q2 is turned on, and there is current flowing through the resistor R1, causing the PNP transistor Q1 to also be turned on. Then, the gate of the N-channel field effect transistor Q3 is charged, causing the N-channel field effect transistor Q3 to also be turned on, that is, power is supplied to the connected load. And during this process, when the PNP transistor Q1 is turned on, the current also flows through the normally closed contact switch SW2 to supply power to the base of the NPN transistor Q2, causing the NPN transistor Q2 to maintain the on state, realizing the self-locking start function at this time, that is, the power supply to the load is completed and self-locked.
[0022] When it is necessary to disconnect the power supply to the load, that is, in the above self-locking power supply state, touch the normally closed contact switch SW2. After the normally closed contact switch SW2 is turned off and then closed, during the process of the normally closed contact switch SW2 being turned off, the base of the NPN transistor Q2 loses power supply and is turned off, then the PNP transistor Q1 cannot maintain the on state either and executes the off state, that is, the power supply to the load is disconnected; in addition, when the connected power source is powered off, the power supply to the load is also disconnected.
[0023] And in the actual application, the addition of the reverse diode D1 realizes freewheeling during the turn-off process of the N-channel field effect transistor Q3, avoiding the appearance of spike voltage on the N-channel field effect transistor Q3, and the addition of the thermistor R2-NTC realizes the function of suppressing the starting spike current.
[0024] On the basis of Embodiment 1, Embodiment 2 is further designed, that is, as Figure 2 shown, first, for the collector of the PNP transistor Q1, a main driver with overcurrent protection is introduced, that is, the collector of the PNP transistor Q1 is connected in series with the main driver and then connected to the gate of the N-channel field effect transistor Q3; then at least one delay branch is further designed and added. Each delay branch respectively includes a time-delay device and an N-channel field effect transistor Q4. Among them, the input end of the time-delay device constitutes the input end of the delay branch, and the output end of the time-delay device is connected to the gate of the N-channel field effect transistor Q4; the collector of the PNP transistor Q1 is connected to the input ends of each delay branch, and the drain of the N-channel field effect transistor Q4 in each delay branch is connected to the negative output end of the solid-state switch, and the source of the N-channel field effect transistor Q4 in each delay branch is grounded.
[0025] And in the specific application of the delay branch, it is designed that each delay branch respectively further includes a secondary driver with overcurrent protection. In the structure of each delay branch, the output end of the time-delay device is connected in series with the secondary driver and then connected to the gate of the N-channel field effect transistor Q4.
[0026] Based on the structure of Embodiment 1 described above, the structural design of Embodiment 2 here is designed and obtained. Similarly, the overall structural design cancels the mechanical contacts, avoiding reliability problems such as contact ablation and low lifespan, and efficiently achieving the rapid on-off of the switch.
[0027] In addition, based on Embodiment 1 and Embodiment 2 respectively, further designs can be made in practical applications, that is, an N-channel field-effect transistor Q5 and an N-channel field-effect transistor Q6 are added. Specifically, according to the following corresponding structural relationships, the PNP transistor Q1 is replaced by the N-channel field-effect transistor Q5, and the NPN transistor Q2 is replaced by the N-channel field-effect transistor Q6.
[0028] The N-channel field-effect transistor Q5 corresponds to the PNP transistor Q1. Among them, the drain of the N-channel field-effect transistor Q5 corresponds to the emitter of the PNP transistor Q1, the gate of the N-channel field-effect transistor Q5 corresponds to the base of the PNP transistor Q1, and the source of the N-channel field-effect transistor Q5 corresponds to the collector of the PNP transistor Q1; the N-channel field-effect transistor Q6 corresponds to the NPN transistor Q2. Among them, the gate of the N-channel field-effect transistor Q6 corresponds to the base of the NPN transistor Q2, the drain of the N-channel field-effect transistor Q6 corresponds to the collector of the NPN transistor Q2, and the source of the N-channel field-effect transistor Q6 corresponds to the emitter of the NPN transistor Q2.
[0029] That is, based on Embodiment 1 and Embodiment 2 respectively, the PNP transistor Q1 is replaced by the N-channel field-effect transistor Q5, and the NPN transistor Q2 is replaced by the N-channel field-effect transistor Q6, respectively constituting Embodiment 3 and Embodiment 4.
[0030] The structural designs of the above embodiments use solid-state components and a self-locking control circuit composed of a normally open contact switch SW1 and a normally closed contact switch SW2 to construct the designed solid-state switch. In application, based on the touch of the normally open contact switch SW1, the power supply to the load is connected and self-locked, and based on the power-off or the touch of the normally closed contact switch SW2, the power supply to the load is disconnected; the overall design cancels the mechanical contacts, avoiding reliability problems such as contact ablation and low lifespan, efficiently achieving the rapid on-off of the switch, and the switch has a fast response speed.
[0031] The embodiments of the present invention have been described in detail above in conjunction with the accompanying drawings. However, the present invention is not limited to the above embodiments. Within the scope of knowledge possessed by those of ordinary skill in the art, various changes can be made without departing from the gist of the present invention.
Claims
1. A solid-state switch with a self-locking function, used to control a power supply to supply power to a load, characterized in that: It includes a PNP transistor Q1, an NPN transistor Q2, a normally open contact switch SW1, a normally closed contact switch SW2, a resistor R1, and an N-channel field effect transistor Q3; wherein one end of the normally open contact switch SW1, one end of the resistor R1, and the emitter of the PNP transistor Q1 are connected, and one side of the connected position constitutes the input end of the solid-state switch for connecting to a power source, and the other side of the connected position constitutes the positive output end of the solid-state switch for connecting to the positive electrode of the load; the other end of the normally open contact switch SW1, one end of the normally closed contact switch SW2, and the base of the NPN transistor Q2 are connected; the normally closed contact The other end of the switch SW2, the collector of the PNP transistor Q1, and the gate of the N-channel field effect transistor Q3 are connected; the other end of the resistor R1, the base of the PNP transistor Q1, and the collector of the NPN transistor Q2 are connected; the emitter of the NPN transistor Q2 and the source of the N-channel field effect transistor Q3 are connected and grounded; the drain of the N-channel field effect transistor Q3 constitutes the negative output end of the solid-state switch, which is used to connect to the negative electrode of the load; based on the touch of the normally open contact switch SW1, the power supply from the power supply to the load is turned on and self-locked, and based on the power supply being turned off or the touch of the normally closed contact switch SW2, the power supply from the power supply to the load is disconnected.
2. A solid-state switch with a self-locking function according to claim 1, characterized in that: It also includes a reverse diode D1, the anode of the reverse diode D1 is connected to the negative output end of the solid-state switch, and the cathode of the reverse diode D1 is connected to the positive output end of the solid-state switch.
3. A solid-state switch with a self-locking function according to claim 1 or 2, characterized in that: It also includes a thermistor R2-NTC, the drain of the N-channel field effect transistor Q3 is connected to one end of the thermistor R2-NTC, and the other end of the thermistor R2-NTC constitutes the negative output end of the solid-state switch.
4. A solid-state switch with a self-locking function according to claim 3, characterized in that: The main driver is provided with over-current protection. The collector of the PNP transistor Q1 is connected in series with the main driver and then connected to the gate of the N-channel field effect transistor Q3.
5. A solid-state switch with a self-locking function according to claim 4, characterized in that: It also includes at least one delay branch, each delay branch includes a delay device and an N-channel field effect transistor Q4, wherein the input end of the delay device constitutes the input end of the delay branch, and the output end of the delay device is connected to the gate of the N-channel field effect transistor Q4; the collector of the PNP transistor Q1 is connected to the input end of each delay branch, the drain of the N-channel field effect transistor Q4 in each delay branch is connected to the negative output end of the solid-state switch, and the source of the N-channel field effect transistor Q4 in each delay branch is grounded.
6. A solid-state switch with a self-locking function according to claim 5, characterized in that: Each delay branch also includes a sub-driver with overcurrent protection. In the structure of each delay branch, the output end of the delay device is connected in series with the sub-driver and then connected to the gate of the N-channel field effect transistor Q4.
7. A solid-state switch with a self-locking function according to claim 1, characterized in that: It also includes an N-channel field effect transistor Q5 and an N-channel field effect transistor Q6. According to the following corresponding structural relationship, the PNP transistor Q1 is replaced by the N-channel field effect transistor Q5, and the NPN transistor Q2 is replaced by the N-channel field effect transistor Q6; The N-channel field effect transistor Q5 corresponds to the PNP transistor Q1, wherein the drain of the N-channel field effect transistor Q5 corresponds to the emitter of the PNP transistor Q1, the gate of the N-channel field effect transistor Q5 corresponds to the base of the PNP transistor Q1, and the source of the N-channel field effect transistor Q5 corresponds to the collector of the PNP transistor Q1; The N-channel field effect transistor Q6 corresponds to the NPN transistor Q2, wherein the gate of the N-channel field effect transistor Q6 corresponds to the base of the NPN transistor Q2, the drain of the N-channel field effect transistor Q6 corresponds to the collector of the NPN transistor Q2, and the source of the N-channel field effect transistor Q6 corresponds to the emitter of the NPN transistor Q2.