High-voltage live display locking device circuit of GIS (Gas Insulated Switchgear) switch

Abstract

The utility model relates to a high-voltage live display locking device circuit of a GIS (Gas Insulated Switchgear) switch. Comprising a control unit circuit, and a high-voltage electrified signal sampling circuit, a sensor loop detection fault judgment circuit, an electricity testing self-diagnosis function circuit, a threshold value self-adjustment circuit module circuit, a locking control circuit, an electrified state remote signaling output circuit, a fault alarm circuit and a power supply module circuit which are connected with the control unit circuit, an indicating lamp control circuit and a control unit circuit; the high-voltage live-line signal sampling circuit is used for carrying out data acquisition on the live-line state of the GIS switch circuit and transmitting the data to the control unit circuit; the sensor loop detection fault judgment circuit is used for judging the running state of the sensor; the electricity testing self-diagnosis function circuit is used for receiving a self-checking signal of the control unit circuit to carry out function self-checking on the basic circuit of the locking device; and the threshold value self-adjusting circuit module circuit is used for automatically adjusting the signal intensity of the sensor and accurately displaying the electrified state of the GIS switch circuit.

Description

Technical Field

[0001] The utility model relates to a circuit of a high-voltage live display and locking device for a GIS switch, belonging to the technical field of intelligent equipment for electrical equipment. Background Art

[0002] At present, there are two types of high-voltage live display and locking devices according to the sensor signal sampling method. One is a contact type live display and locking device, and the other is an inductive high-voltage live display and locking device.

[0003] The sensor body of the contact type high-voltage live display and locking device uses a ceramic capacitor as the core rod, and the outer shell is cast with epoxy resin, or an insulator made of porcelain is used as the outer shell. The contact type live display and locking device obtains the energy required by the display through the ceramic induction capacitance voltage division principle. The signal is unstable and the error is large. The neon lamp is used to display the live state of the electrical equipment, which has the characteristic of passive display. This method has large limitations on the insulation size of the sensor, and there is a risk of causing single-phase grounding faults and partial discharges. It is mostly used in high-voltage switch cabinets of 10 - 35 kV, not suitable for outdoor environments, and not suitable for GIS switches.

[0004] The inductive high-voltage live display and locking device adopts the principle of indirect induction. It does not need to contact the high-voltage live body. By detecting some characteristic changes around the live body, it judges whether the high-voltage live body is in a live state. The induction unit of the inductive high-voltage live display and locking device is installed near the live body of the primary equipment. The induction signal is connected to the display unit through a shielded cable. The display unit is installed in the switch control cabinet, which can display the voltage state and output locking and unlocking signals to control the action of the interlock device of the switch equipment. The sensor signal is weak and is easily affected by electromagnetic interference of high-voltage equipment and unbalanced three-phase signals, and the probability of misoperation indication is high. Since the signal judgment of the live display and locking device uses a fixed threshold judgment, the line state judgment is often incorrect, and self-adjustment cannot be performed on-site, resulting in operation judgment defects. There is no circuit function of checking electricity and self-diagnosis. When the signal is abnormal, the live display and locking device cannot judge its own faults and can only wait for the GIS switch to be powered off for fault troubleshooting, which affects the daily operation and maintenance of the GIS switch.

[0005] At present, the construction of UHV power transmission is being widely applied, and GIS switches are being built in the direction of intelligence and digitalization. The high-voltage live display and locking device for GIS switches needs to be upgraded intelligently. Content of the Utility Model

[0006] In order to solve the problems existing in the above-mentioned prior art, the utility model provides a circuit of a high-voltage live display and locking device for a GIS switch.

[0007] The technical solution of the utility model is as follows:

[0008] A circuit of a high-voltage live display and interlock device for a GIS switch, comprising a control unit circuit and a high-voltage live signal sampling circuit, a sensor loop detection fault judgment circuit, a live-line verification self-diagnosis function circuit, a threshold self-adjustment circuit module circuit, an interlock control circuit, a live-state remote signaling output circuit, a fault alarm circuit, a power supply module circuit, an indicator light control circuit and a control unit circuit connected to the control unit circuit; the high-voltage live signal sampling circuit is used for collecting data on the live state of the GIS switch line and transmitting the data to the control unit circuit; the sensor loop detection fault judgment circuit is used for judging the operating state of the sensor; the live-line verification self-diagnosis function circuit is used for receiving the self-check signal of the control unit circuit to perform self-check on the basic circuit functions of the interlock device; the threshold self-adjustment circuit module circuit is used for automatically adjusting the sensor signal intensity to accurately display the live state of the GIS switch line; the interlock control circuit is used for controlling the live state of the GIS switch line; the live-state remote signaling output circuit is used for outputting the live state of the GIS switch line; the fault alarm circuit is used for monitoring the operating state of the GIS switch line; the power supply module is used for supplying power to all circuit modules; the indicator light circuit is used for displaying the operating state of the monitored circuit module.

[0009] The utility model has the following beneficial effects:

[0010] 1. By designing the threshold self-adjustment circuit module circuit, the threshold self-adjustment circuit module circuit is designed and adjusted by using a knob potentiometer voltage division circuit. When the sensor signal decays or there is three-phase imbalance, the designed threshold conditioning circuit can perform signal self-adjustment to accurately display the live state of the GIS switch line. By designing the threshold self-adjustment circuit module circuit, since the sensor signals for detecting the live state of the GIS switch at different voltage levels are inconsistent, through the threshold self-adjustment circuit module circuit, the compatibility of the high-voltage live display and interlock device supporting the GIS switch at different voltage levels is realized, increasing the generality.

[0011] 2. The utility model designs a self-diagnosis signal function in the high-voltage live signal sampling circuit, simulates the sensor input signal to verify the basic functions of the device, and checks whether the device is normal.

[0012] 3. Through the sensor loop detection fault judgment circuit, the utility model detects the state of the sensor. In the threshold circuit, the signal characteristics of the sensor access and disconnection are compared with the threshold circuit for operation circuit calculation. The output signal of the operational amplifier undergoes logical calculation through a logical NAND circuit, and finally the condition of the sampling signal loop is obtained to judge the operation of the sensor.

[0013] 4. The latching control circuit designed by the present utility model has an isolation design. In the traditional live display and latching device, the latching control circuit and the signal control loop are not signal-isolated. When the latching control circuit works, the disturbance signals generated are likely to be coupled into the signal control loop, interfering with the normal operation of the live display and latching device. The signal control loop and the control circuit are electrically isolated, with a DC-DC control power supply design and optocoupler devices for isolation, meeting the requirements of high-voltage electromagnetic compatibility and ensuring the reliability of the device. Description of the Drawings

[0014] Figure 1 It is a schematic diagram of the connection relationship between the circuit modules of the present utility model;

[0015] Figure 2 It is the structural diagram of the A-phase threshold self-adjusting circuit;

[0016] Figure 3 It is the structural diagram of the B-phase threshold self-adjusting circuit;

[0017] Figure 4 It is the structural diagram of the C-phase threshold self-adjusting circuit;

[0018] Figure 5 It is the structural diagram of the A-phase high-voltage live signal sampling circuit;

[0019] Figure 6 It is the structural diagram of the B-phase high-voltage live signal sampling circuit;

[0020] Figure 7 It is the structural diagram of the C-phase high-voltage live signal sampling circuit;

[0021] Figure 8 It is the structural diagram of the A-phase open-circuit identification circuit;

[0022] Figure 9 It is the structural diagram of the B-phase open-circuit identification circuit;

[0023] Figure 10 It is the structural diagram of the C-phase open-circuit identification circuit;

[0024] Figure 11 It is the structural diagram of the A-phase latching control circuit;

[0025] Figure 12 It is the structural diagram of the B-phase latching control circuit;

[0026] Figure 13 It is the structural diagram of the C-phase latching control circuit;

[0027] Figure 14 It is the structural diagram of the fault alarm circuit;

[0028] Figure 15 It is the structural diagram of the indicator light control circuit;

[0029] Figure 16 It is a structural diagram of the main control chip and the reset circuit;

[0030] Figure 17 It is a structural diagram of the crystal oscillator drive circuit;

[0031] Figure 18 It is a structural diagram of the AC 220V to DC 12V power supply circuit;

[0032] Figure 19 It is a structural diagram of the DC 12V to DC 5V power supply circuit;

[0033] Figure 20 It is a structural diagram of the DC 5V to DC 3.3V power supply circuit. Specific implementation mode

[0034] The present utility model will be described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0035] See Figure 1 , a high-voltage live display and locking device circuit for a GIS switch, characterized in that it includes a control unit circuit and a high-voltage live signal sampling circuit, a sensor loop detection fault judgment circuit, a live verification self-diagnosis function circuit, a threshold self-adjustment circuit module circuit, a locking control circuit, a live state remote signaling output circuit, a fault alarm circuit, a power supply module circuit, an indicator light control circuit and a control unit circuit connected to the control unit circuit; the high-voltage live signal sampling circuit is used to collect data on the live state of the GIS switch line and transmit the data to the control unit circuit; the sensor loop detection fault judgment circuit is used to judge the operating state of the sensor; the live verification self-diagnosis function circuit is used to receive the self-check signal of the control unit circuit for self-checking the basic circuit functions of the locking device; the threshold self-adjustment circuit module circuit is used to automatically adjust the sensor signal strength to accurately display the live state of the GIS switch line; the locking control circuit is used to control the live state of the GIS switch line; the live state remote signaling output circuit is used to output the live state of the GIS switch line; the fault alarm circuit is used to monitor the operating state of the GIS switch line; the power supply module is used to supply power to all circuit modules; the indicator light circuit is used to display the operating state of the monitored circuit module.

[0036] In this embodiment, a non-contact sensor design is adopted for collecting the live state signals of the GIS switch line, which overcomes the hidden danger that electronic components are easily broken down under the long-term high-voltage environment of the contact sensor; the threshold self-adjusting circuit module circuit design, the threshold self-adjusting circuit module circuit is designed and adjusted by using a knob potentiometer voltage-dividing circuit. When the sensor signal decays or the three-phase is unbalanced, the designed threshold conditioning circuit can perform signal self-adjustment to accurately display the live state of the GIS switch line; the threshold self-adjusting circuit module circuit is designed. Since the sensor signals for detecting the live state of the GIS switch at different voltage levels are inconsistent, through the threshold self-adjusting circuit module circuit, the compatibility of the high-voltage live display and locking device supporting the GIS switch at different voltage levels is realized, increasing the versatility; the sensor loop detection fault judgment circuit design is used to detect the sensor state. A threshold circuit is designed, and the characteristics of the sensor access and disconnection signals are compared with the threshold circuit for operation circuit calculation. The output signal of the operational amplifier undergoes logical calculation through a logic NAND circuit, and finally the condition of the sampling signal loop is obtained to judge the operation of the sensor; a self-diagnosis circuit for verifying the power-on test of the locking device is designed in the high-voltage live signal sampling circuit. An analog signal generating circuit is designed to turn on the self-diagnosis signal function for the power-on test, simulate the sensor input signal to verify the basic function of the device, and check whether the device is normal;

[0037] The high-voltage live locking control circuit design includes electrical isolation design between the signal control loop and the control circuit, DC-DC design of the control power supply, and isolation by optocoupler devices; the indicator light control loop design, which displays the live indication of the high-voltage three-phase signals, the locking control state, and the device operation state through the indicator lights; the control module circuit design, which uses the C8051F340 single-chip microcomputer as the data processing unit and designs the peripheral hardware circuit module of the single-chip microcomputer; the power supply circuit design, which divides the power supply circuit into modules according to functions. One is the AC 220V to DC 12V power supply circuit design, the second is the DC 12V to DC 5V power supply circuit design, and the third is the DC 5V to DC 3.3V power supply circuit design.

[0038] The connection relationship between the modules is as Figure 1 shown.

[0039] Further, the threshold self-adjusting circuit module circuit includes a phase A threshold self-adjusting circuit, a phase B threshold self-adjusting circuit, and a phase C threshold self-adjusting circuit;

[0040] The phase A threshold self-adjusting circuit includes a resistor R20, an adjustable potentiometer RW1, and a capacitor C17; one end of the resistor R20 is connected to the power supply module circuit, and the other end is respectively connected to one end of the adjustable potentiometer RW1 and the signal output terminal; the other end of the adjustable potentiometer RW1 is connected to the capacitor C17, and the other end of the capacitor C17 is connected to the signal output terminal;

[0041] In this embodiment, the structural diagram of the phase-A threshold self-adjusting circuit is as follows Figure 2 As shown, the module circuit of the phase-A threshold self-adjusting circuit divides the voltage by the resistor R20 and the adjustable potentiometer RW1. C17 is for voltage stabilization and filtering. The threshold self-adjusting output signal is P_A. The threshold self-adjusting output signal P_A and the phase-A input sensor perform signal comparison operations through the operational amplifier LM358 of U8A to judge the state of the phase-A signal with display. When the phase-A input sensor is greater than the value of P_A, the pin 1 of U8A LM358 outputs a high level. The resistor R11 and the capacitor C10 form a low-pass filter circuit to eliminate high-frequency interference. D5 is a diode for signal protection and reverse suppression.

[0042] The phase-B threshold self-adjusting circuit includes a resistor R21, an adjustable potentiometer RW2, and a capacitor C18. One end of the resistor R21 is connected to the power supply module circuit, and the other end is respectively connected to one end of the adjustable potentiometer RW2 and the signal output terminal. The other end of the adjustable potentiometer RW2 is connected to the capacitor C18, and the other end of the capacitor C18 is connected to the signal output terminal.

[0043] In this embodiment, the structural diagram of the phase-B threshold self-adjusting circuit is as follows Figure 3 As shown, the principle is the same as that of the phase-A threshold self-adjusting circuit and will not be elaborated here.

[0044] The phase-C threshold self-adjusting circuit includes a resistor R22, an adjustable potentiometer RW3, and a capacitor C19. One end of the resistor R22 is connected to the power supply module circuit, and the other end is respectively connected to one end of the adjustable potentiometer RW3 and the signal output terminal. The other end of the adjustable potentiometer RW3 is connected to the capacitor C19, and the other end of the capacitor C19 is connected to the signal output terminal.

[0045] In this embodiment, the circuit diagram of the phase-C threshold self-adjusting circuit is as follows Figure 4 As shown, the principle is the same as that of the phase-A threshold self-adjusting circuit and will not be elaborated here.

[0046] Furthermore, the high-voltage live signal sampling circuit includes a phase-A high-voltage live signal sampling circuit, a phase-B high-voltage live signal sampling circuit, and a phase-C high-voltage live signal sampling circuit:

[0047] The A-phase high-voltage live signal sampling circuit includes an A-phase input signal protection circuit, an A-phase signal filtering circuit, an A-phase signal detection circuit, an A-phase signal conditioning and amplification circuit, and an A-phase threshold adjustment and setting module; the A-phase input signal protection circuit, the A-phase signal detection circuit, the A-phase signal conditioning and amplification circuit, the A-phase threshold adjustment and setting module, and the A-phase signal filtering circuit are connected in sequence; the A-phase input signal protection circuit includes a TVS Schottky diode D4, a resistor R2, a current-limiting resistor R3, a varistor R8, and a capacitor C6; the A-phase signal detection circuit includes a filtering capacitor E1, diodes D1, D2, D3, a resistor R4, a resistor R10, capacitors C7 and C8; the A-phase signal conditioning and amplification circuit includes operational amplifier chips U7A and U7B, resistors R1, R13, R14, R15, capacitors C1 and C11; the A-phase threshold adjustment and setting module includes an operational amplifier chip U8A, a resistor R7, and a capacitor C9; the A-phase signal filtering circuit includes a resistor R11, a capacitor C10, and a diode D5;

[0048] The input ends of the TVS Schottky diode D4 and the current-limiting resistor R3 are both connected to the signal input end; the output end of the TVS Schottky diode D4 is grounded; the output end of the current-limiting resistor R3 is grounded through a varistor R8, grounded through a capacitor C6, and connected to the power supply module circuit through a resistor R2; the positive pole of the filter capacitor E1 is connected to the output end of the current-limiting resistor R3, and the negative pole of the filter capacitor E1 is grounded through a capacitor C7; the negative pole of the diode D3, the positive pole of the diode D2, and the negative pole of the diode D1 are all connected to the negative pole of the filter capacitor E1, the positive pole of the diode D3 is grounded, the positive pole of the diode D1 is connected to the self-check signal output end of the control unit circuit, and the negative pole of the diode D2 is connected to one end of the resistor R4; the other end of the resistor R4 is grounded through a resistor R10 and a capacitor C8 respectively, and is also connected to the non-inverting input end of the operational amplifier chip U7A; the inverting input end of the operational amplifier chip U7A is grounded through a capacitor C11; the resistor R15 is connected in parallel with the capacitor C11, one end of the resistor R15 is grounded, and the other end is connected to the power supply module circuit after being connected in series with a resistor R14; the output end of the operational amplifier chip U7A is connected back to the non-inverting input end through a resistor R1 and a capacitor C1, and the resistor R1 and the capacitor C1 are connected in parallel; the non-inverting input end of the operational amplifier chip U7B is connected to the output end of the operational amplifier chip U7A, and the inverting input end of the operational amplifier chip U7B is connected to the output end of the operational amplifier chip U7B through a resistor R13; the output end of the operational amplifier chip U7B is connected to the non-inverting input end of the operational amplifier chip U8A through a resistor R7; the non-inverting input end of the operational amplifier chip U8A is grounded through a capacitor C9, the inverting input end of the U8A is connected to the signal output end of the A-phase threshold self-adjustment circuit, and the output end of the operational amplifier chip U8A is connected to one end of the resistor R11; the other end of the resistor R11 is connected to one end of the capacitor C10 and the positive pole of the diode D5 respectively; the other end of the capacitor C10 is grounded, and the negative pole of the diode D5 is used as the signal output end;

[0049] In this embodiment, the structural diagram of the A-phase high-voltage live signal sampling circuit is as Figure 5As shown in the figure, the input signal protection circuit: D4 is a TVS Schottky diode to suppress overvoltage signals and protect the subsequent circuit from overvoltage impact. R3 is a current-limiting resistor of 100 kΩ to absorb overcurrent. R8 is a varistor 07D471K for lightning protection and suppression. C6 is a capacitor for filtering. The signal detection circuit: E1 is a capacitor to filter out DC signals and low-frequency clutter signals. D2 and D3 form a rectifier circuit to condition the signal into a positive half-wave signal and filter out the negative half-wave signal. C8 is a capacitor for voltage stabilization. The signal conditioning and amplification circuit: Resistors R14 and R15 are used for voltage division to form a reverse input threshold comparison circuit of a first-stage operational amplifier. U7A is an LM358 operational amplifier chip. The resistor R1 with a resistance value of 1 MΩ and the capacitor C1 with a capacitance value of 10 nF form a feedback loop of a first-stage operational amplifier. U7B is an LM358 operational amplifier chip, which forms a voltage follower with the resistor R13 with a resistance value of 10 kΩ to play a buffering and isolation role. U8A is an LM358 operational amplifier chip as a threshold adjustment and setting device. The resistor R11 and the capacitor C10 form a low-pass filter circuit to eliminate high-frequency interference. D5 is a diode for signal protection and reverse suppression.

[0050] The B-phase high-voltage live signal sampling circuit includes a B-phase input signal protection circuit, a B-phase signal filtering circuit, a B-phase signal detection circuit, a B-phase signal conditioning and amplification circuit, and a B-phase threshold adjustment and setting module; the B-phase input signal protection circuit, the B-phase signal detection circuit, the B-phase signal conditioning and amplification circuit, the B-phase threshold adjustment and setting module, and the B-phase signal filtering circuit are connected in sequence; the B-phase input signal protection circuit includes a TVS Schottky diode D9, a resistor R24, a current-limiting resistor R25, a varistor R28, and a capacitor C16; the B-phase signal detection circuit includes a filtering capacitor E2, diodes D6, D7, D8, resistors R26, R29, capacitors C20, C21; the B-phase signal conditioning and amplification circuit includes operational amplifier chips U9A, U9B, resistors R19, R32, R33, R34, capacitors C12, C24; the B-phase threshold adjustment and setting module includes an operational amplifier chip U12A, a resistor R27, and a capacitor C22; the B-phase signal filtering circuit includes a resistor R30, a capacitor C23, and a diode D10;

[0051] The input ends of the TVS Schottky diode D9 and the current-limiting resistor R25 are both connected to the signal input end; the output end of the TVS Schottky diode D9 is grounded; the output end of the current-limiting resistor R25 is grounded via a varistor R28, grounded via a capacitor C16, and connected to the power supply module circuit via a resistor R24; the positive pole of the filter capacitor E2 is connected to the output end of the current-limiting resistor R25, and the negative pole of the filter capacitor E2 is grounded via a capacitor C20; the negative pole of the diode D8, the positive pole of the diode D7, and the negative pole of the diode D6 are all connected to the negative pole of the filter capacitor E2, the positive pole of the diode D8 is grounded, the positive pole of the diode D6 is connected to the self-check signal output end of the control unit circuit, and the negative pole of the diode D7 is connected to one end of a resistor R26; the other end of the resistor R26 is grounded via a resistor R29 and a capacitor C21 respectively, and is also connected to the non-inverting input end of the operational amplifier chip U9A; the inverting input end of the operational amplifier chip U9A is grounded via a capacitor C24; the resistor R34 is connected in parallel with the capacitor C24, one end of the resistor R34 is grounded, and the other end is connected to the power supply module circuit after being connected in series with a resistor R33; the output end of the operational amplifier chip U9A is connected back to the non-inverting input end via a resistor R19 and a capacitor C12, and the resistor R19 and the capacitor C12 are connected in parallel; the non-inverting input end of the operational amplifier chip U9B is connected to the output end of the operational amplifier chip U9A, and the inverting input end of the operational amplifier chip U9B is connected to the output end of the operational amplifier chip U9B via a resistor R32; the output end of the operational amplifier chip U9B is connected to the non-inverting input end of the operational amplifier chip U12A via a resistor R27; the non-inverting input end of the operational amplifier chip U12A is grounded via a capacitor C22, the inverting input end of the U12A is connected to the signal output end of the B-phase threshold self-adjustment circuit, and the output end of the operational amplifier chip U12A is connected to one end of a resistor R30; the other end of the resistor R30 is connected to one end of a capacitor C23 and the positive pole of a diode D10 respectively; the other end of the capacitor C23 is grounded, and the negative pole of the diode D10 is used as the signal output end;

[0052] In this embodiment, the structural diagram of the B-phase high-voltage live signal sampling circuit is as Figure 6 shown, and the principle is the same as that of the A-phase high-voltage live signal sampling circuit, so it will not be elaborated here.

[0053] The C-phase high-voltage live signal sampling circuit includes a C-phase input signal protection circuit, a C-phase signal filtering circuit, a C-phase signal detection circuit, a C-phase signal conditioning and amplification circuit, and a C-phase threshold adjustment and setting module; the C-phase input signal protection circuit, the C-phase signal detection circuit, the C-phase signal conditioning and amplification circuit, the C-phase threshold adjustment and setting module, and the C-phase signal filtering circuit are connected in sequence; the C-phase input signal protection circuit includes a TVS Schottky diode D14, a resistor R36, a current-limiting resistor R37, a varistor R41, and a capacitor C28; the C-phase signal detection circuit includes a filtering capacitor E3, diodes D11, D12, D13, a resistor R38, a resistor R42, a capacitor C29, and a capacitor C30; the C-phase signal conditioning and amplification circuit includes operational amplifier chips U10A and U10B, a resistor R35, a resistor R44, a resistor R46, a resistor R47, a capacitor C25, and a capacitor C35; the C-phase threshold adjustment and setting module includes an operational amplifier chip U14A, a resistor R40, and a capacitor C31; the C-phase signal filtering circuit includes a resistor R43, a capacitor C34, and a diode D15;

[0054] The input ends of the TVS Schottky diode D14 and the current-limiting resistor R37 are both connected to the signal input end; the output end of the TVS Schottky diode D14 is grounded; the output end of the current-limiting resistor R37 is grounded through the varistor R41, grounded through the capacitor C28, and connected to the power supply module circuit through the resistor R36; the positive pole of the filter capacitor E3 is connected to the output end of the current-limiting resistor R37, and the negative pole of the filter capacitor E3 is grounded through the capacitor C29; the negative pole of the diode D13, the positive pole of the diode D12, and the negative pole of the diode D11 are all connected to the negative pole of the filter capacitor E3, the positive pole of the diode D13 is grounded, the positive pole of the diode D11 is connected to the self-check signal output end of the control unit circuit, and the negative pole of the diode D12 is connected to one end of the resistor R38; the other end of the resistor R38 is grounded through the resistor R42 and the capacitor C30 respectively, and is also connected to the non-inverting input end of the operational amplifier chip U10A; the inverting input end of the operational amplifier chip U10A is grounded through the capacitor C35; the resistor R47 is connected in parallel with the capacitor C35, one end of the resistor R47 is grounded, and the other end is connected to the power supply module circuit after being connected in series with the resistor R46; the output end of the operational amplifier chip U10A is connected back to the non-inverting input end through the resistor R35 and the capacitor C25, and the resistor R35 and the capacitor C25 are connected in parallel; the non-inverting input end of the operational amplifier chip U10B is connected to the output end of the operational amplifier chip U10A, and the inverting input end of the operational amplifier chip U10B is connected to the output end of the operational amplifier chip U10B through the resistor R44; the output end of the operational amplifier chip U10B is connected to the non-inverting input end of the operational amplifier chip U14A through the resistor R40; the non-inverting input end of the operational amplifier chip U14A is grounded through the capacitor C31, the inverting input end of the U12A is connected to the signal output end of the C-phase threshold self-adjustment circuit, and the output end of the operational amplifier chip U14A is connected to one end of the resistor R43; the other end of the resistor R43 is respectively connected to one end of the capacitor C34 and the positive pole of the diode D15; the other end of the capacitor C34 is grounded, and the negative pole of the diode D15 is used as the signal output end.

[0055] In this embodiment, the structural diagram of the C-phase high-voltage live signal sampling circuit is as Figure 7 shown, and the principle is the same as that of the A-phase high-voltage live signal sampling circuit, which will not be elaborated here.

[0056] Furthermore, the power-on self-diagnosis function circuit includes an A-phase power-on self-diagnosis function circuit, a B-phase power-on self-diagnosis function circuit, and a C-phase power-on self-diagnosis function circuit; the A-phase power-on self-diagnosis function circuit uses the A-phase signal detection circuit in the A-phase high-voltage live signal sampling circuit; the B-phase power-on self-diagnosis function circuit uses the B-phase signal detection circuit in the B-phase high-voltage live signal sampling circuit; the C-phase power-on self-diagnosis function circuit uses the C-phase signal detection circuit in the C-phase high-voltage live signal sampling circuit.

[0057] In this embodiment, the power-on self-diagnosis function circuit for each phase is respectively carried out by using the signal detection circuit in the high-voltage live signal sampling circuit for each phase. The circuit function has been introduced in the sampling circuit and will not be elaborated here.

[0058] Further, the sensor loop detection fault judgment circuit includes an A-phase disconnection identification circuit, a B-phase disconnection identification circuit, and a C-phase disconnection identification circuit;

[0059] The A-phase disconnection identification circuit includes a resistor R6, a resistor R12, a resistor R16, an operational amplifier U11A, and an A-phase NAND gate logic judgment module; the non-inverting input terminal of the operational amplifier U11A is respectively connected to one end of the resistor R6 and the resistor R12, the other end of the resistor R6 is grounded, and the other end of the resistor R12 is connected to the power supply module circuit; the inverting input terminal of the operational amplifier U11A is respectively connected to one end of the resistor R16 and the AND gate of the A-phase NAND gate logic judgment module, and the other end of the resistor R16 is connected to the signal output terminal of the A-phase high-voltage live signal sampling circuit; the output terminal of the operational amplifier U11A is connected to another AND gate of the A-phase NAND gate logic judgment module; the NOT gate of the A-phase NAND gate logic judgment module is connected to the main control circuit;

[0060] In this embodiment, the structural diagram of the A-phase disconnection identification circuit is as Figure 8 shown. DL_A is the sensor input signal point. The resistors R6 and R12 are used for voltage division to form the comparison threshold voltage for A-phase disconnection judgment. The DL_A, resistor R6, resistor R12, and U11A LM358 operational amplifier form the A-phase disconnection identification circuit. When there is a disconnection fault in the A-phase sensor, the pin 1 of U11A LM358 outputs a low level, and the low level is output through the NAND calculation of U5B and the fault judgment is carried out through the main control circuit;

[0061] The B-phase disconnection identification circuit includes a resistor R18, a resistor R23, a resistor 31, an operational amplifier U11B, and a B-phase NAND gate logic judgment module; the non-inverting input terminal of the operational amplifier U11B is respectively connected to one end of the resistor R18 and the resistor R23, the other end of the resistor R18 is grounded, and the other end of the resistor R23 is connected to the power supply module circuit; the inverting input terminal of the operational amplifier U11B is respectively connected to one end of the resistor R31 and the AND gate of the B-phase NAND gate logic judgment module, and the other end of the resistor R31 is connected to the signal output terminal of the B-phase high-voltage live signal sampling circuit; the output terminal of the operational amplifier U11B is connected to another AND gate of the B-phase NAND gate logic judgment module; the NOT gate of the B-phase NAND gate logic judgment module is connected to the main control circuit;

[0062] In this embodiment, the structural diagram of the B-phase disconnection identification circuit is as Figure 9As shown, the circuit principle is the same as that of the A-phase open-circuit identification circuit, which will not be elaborated here;

[0063] The C-phase open-circuit identification circuit includes a resistor R5, a resistor R9, a resistor R17, an operational amplifier U13A, and a C-phase NAND gate logic judgment module; the non-inverting input terminal of the operational amplifier U13A is respectively connected to one end of the resistor R5 and the resistor R9, the other end of the resistor R5 is grounded, and the other end of the resistor R9 is connected to the power supply module circuit; the inverting input terminal of the operational amplifier U13A is respectively connected to one end of the resistor R17 and the AND gate of the C-phase NAND gate logic judgment module, and the other end of the resistor R17 is connected to the signal output terminal of the C-phase high-voltage live signal sampling circuit; the output terminal of the operational amplifier U13A is connected to another AND gate of the C-phase NAND gate logic judgment module; the NOT gate of the C-phase NAND gate logic judgment module is connected to the main control circuit.

[0064] In this embodiment, the structural diagram of the C-phase open-circuit identification circuit is as Figure 10 shown, the circuit principle is the same as that of the A-phase open-circuit identification circuit, which will not be elaborated here;

[0065] Furthermore, the blocking control circuit includes an A-phase blocking control circuit, a B-phase blocking control circuit, and a C-phase blocking control circuit;

[0066] The A-phase blocking control circuit includes a diode D18, an optocoupler U52, a resistor R53, a resistor R54, a resistor R65, a resistor R69, a triode Q3, a filter capacitor E6, and a blocking relay J6; the negative electrode of the diode D18 is connected to the blocking control signal output terminal of the control unit circuit, and the positive electrode of the diode D18 is connected to the cathode of the optocoupler U52; the anode of the optocoupler U52 is connected to one end of the resistor R53, and the other end of the resistor R53 is connected to the power supply module circuit; the collector of the optocoupler U52 is connected to one end of the resistor R54, and the other end of the resistor R54 is connected to the power supply module circuit; the emitter of the optocoupler U52 is connected to the base of the triode Q3 through the resistor R65; one end of the emitter of the triode Q3 is grounded, and the other end is connected back to the base through the resistor R69; the collector of the triode Q3 is connected to the input pin of the blocking relay J6, the ground wire pin of the blocking relay J6 is connected to the positive electrode of the filter capacitor E6, and the negative electrode of the filter capacitor E6 is grounded;

[0067] In this embodiment, the structural diagram of the A-phase blocking control circuit is as Figure 11As shown, when the A-phase blocking control signal A_BS is at a low level, the 3rd pin of the optocoupler U52 works at a high level. Through the voltage division of resistors R6 and R12, it drives the triode Q3 (S8050) to work, and the coil of the relay J6 is energized, and the blocking relay works. When the A-phase blocking control signal A_BS is at a high level, the 3rd pin of the optocoupler U52 works at a low level, the triode Q3 (S8050) does not work, the coil of the relay J6 is de-energized, the blocking relay does not work, and the blocking is released.

[0068] The B-phase blocking control circuit includes a diode D28, an optocoupler U56, resistors R75, R76, R81, R85, a triode Q7, a filter capacitor E12, and a blocking relay J10; the negative pole of the diode D28 is connected to the output terminal of the blocking control signal of the control unit circuit, and the positive pole of the diode D28 is connected to the cathode of the optocoupler U56; the anode of the optocoupler U56 is connected to one end of the resistor R75, and the other end of the resistor R75 is connected to the power supply module circuit; the collector of the optocoupler U56 is connected to one end of the resistor R76, and the other end of the resistor R76 is connected to the power supply module circuit; the emitter of the optocoupler U56 is connected to the base of the triode Q7 through the resistor R81; one end of the emitter of the triode Q7 is grounded, and the other end is connected back to the base through the resistor R85; the collector of the triode Q7 is connected to the input pin of the blocking relay J10, the ground wire pin of the blocking relay J10 is connected to the positive pole of the filter capacitor E12, and the negative pole of the filter capacitor E12 is grounded;

[0069] In this embodiment, the structural diagram of the B-phase blocking control circuit is as Figure 12 shown. The circuit principle is the same as that of the A-phase blocking control circuit and will not be elaborated here.

[0070] The C-phase blocking control circuit includes a diode D19, an optocoupler U53, resistors R55, R56, R66, R70, a triode Q4, a filter capacitor E7, and a blocking relay J7; the negative pole of the diode D19 is connected to the output terminal of the blocking control signal of the control unit circuit, and the positive pole of the diode D19 is connected to the cathode of the optocoupler U53; the anode of the optocoupler U53 is connected to one end of the resistor R55, and the other end of the resistor R55 is connected to the power supply module circuit; the collector of the optocoupler U53 is connected to one end of the resistor R56, and the other end of the resistor R56 is connected to the power supply module circuit; the emitter of the optocoupler U53 is connected to the base of the triode Q4 through the resistor R66; one end of the emitter of the triode Q4 is grounded, and the other end is connected back to the base through the resistor R70; the collector of the triode Q4 is connected to the input pin of the blocking relay J7, the ground wire pin of the blocking relay J7 is connected to the positive pole of the filter capacitor E7, and the negative pole of the filter capacitor E7 is grounded.

[0071] In this embodiment, the structure diagram of the C phase locking control circuit is as follows: Figure 13 As shown, the circuit principle is the same as the A-phase locking control circuit principle, which will not be repeated here.

[0072] Furthermore, the fault alarm circuit includes a diode D29, a photoelectric coupler U57, a resistor R77, a resistor R78, a resistor R82, a resistor R86, a transistor Q8, a filter capacitor E13, and a locking relay J11; the cathode of the diode D29 is connected to the locking control signal output end of the control unit circuit, and the anode of the diode D29 is connected to the cathode of the photoelectric coupler U57; the anode of the photoelectric coupler U57 is connected to one end of the resistor R77, and the other end of the resistor R77 is connected to the power supply module circuit; The collector of the photoelectric coupler U57 is connected to one end of the resistor R78, and the other end of the resistor R78 is connected to the power supply module circuit; the emitter of the photoelectric coupler U57 is connected to the base of the transistor Q8 via the resistor R82; one end of the emitter of the transistor Q8 is grounded, and the other end is connected back to the base via the resistor R86; the collector of the transistor Q8 is connected to the input pin of the latching relay J11, the ground pin of the latching relay J11 is connected to the positive electrode of the filter capacitor E13, and the negative electrode of the filter capacitor E13 is grounded.

[0073] In this embodiment, the structure diagram of the fault alarm circuit is as follows: Figure 14 As shown, when the fault alarm control signal GZ_BJ is at a low level, the working pin 3 of the U57 optocoupler is at a high level, and the voltage is divided by the R82 resistor and the R86 resistor to drive the Q8 transistor S8050 to work, the relay J11 coil is energized, and the relay works to lock the node and output the alarm node; when the fault alarm control signal GZ_BJ is at a high level, the working pin 3 of the U57 optocoupler is at a low level, the Q8 transistor S8050 does not work, the relay J11 coil is de-energized, the relay does not work, the locking node is disconnected, and the fault alarm output signal is released.

[0074] Further, the indicator light control circuit shown includes a power supply module circuit indicator light circuit, an A-phase live state indication circuit, a B-phase live state indication circuit, a C-phase live state indication circuit, a locking state indication circuit, and a fault indication circuit;

[0075] The power supply module circuit indicator light circuit includes a light emitting diode D20 and a resistor R57; the positive electrode of the light emitting diode D20 is connected to one end of the resistor R57, and the negative electrode is grounded; the other end of the resistor R57 is connected to the power supply module circuit;

[0076] The A-phase live state indication circuit includes a light-emitting diode D21 and a resistor R58; the positive electrode of the light-emitting diode D21 is connected to one end of the resistor R58, and the negative electrode is connected to the control unit circuit; the other end of the resistor R58 is connected to the power supply module circuit;

[0077] The B-phase live state indication circuit includes a light-emitting diode D22 and a resistor R59; the positive electrode of the light-emitting diode D22 is connected to one end of the resistor R59, and the negative electrode is connected to the control unit circuit; the other end of the resistor R59 is connected to the power supply module circuit;

[0078] The C-phase live state indication circuit includes a light-emitting diode D23 and a resistor R60; the positive electrode of the light-emitting diode D23 is connected to one end of the resistor R60, and the negative electrode is connected to the control unit circuit; the other end of the resistor R60 is connected to the power supply module circuit;

[0079] The locking state indication circuit includes a light-emitting diode D24 and a resistor R61; the positive electrode of the light-emitting diode D24 is connected to one end of the resistor R61, and the negative electrode is connected to the control unit circuit; the other end of the resistor R61 is connected to the power supply module circuit;

[0080] The fault indication circuit includes a light-emitting diode D25 and a resistor R62; the positive electrode of the light-emitting diode D25 is connected to one end of the resistor R62, and the negative electrode is connected to the control unit circuit; the other end of the resistor R62 is connected to the power supply module circuit;

[0081] In this embodiment, the structural diagram of the indicator control circuit is as Figure 15 shown.

[0082] Furthermore, the control unit circuit includes a main control chip, a crystal oscillator drive circuit, and a reset circuit; the crystal oscillator drive circuit includes capacitors C37, C38, a crystal oscillator XT1, and a resistor R48; the reset circuit includes capacitors C32 and C33; one end of the crystal oscillator XT is respectively connected to one end of the capacitor C37 and the input pin of the main control chip, and the other end is respectively connected to one end of the capacitor C38 and another input pin of the main control chip; the other ends of the capacitors C37 and C38 are both grounded; the resistor R48 is connected in parallel with the crystal oscillator XT1; the capacitors C32 and C33 are connected in parallel, and one end of the parallel connection is respectively connected to the reset pin of the main control chip, the input pin of the main control chip, and the power supply module circuit, and the other end of the parallel connection is grounded.

[0083] In this embodiment, the structural diagram of the main control chip and the reset circuit is as Figure 16 shown, and the structural diagram of the crystal oscillator drive circuit is as Figure 17 shown. The main function of the crystal oscillator drive circuit is to provide a pacing reference and a stable frequency for the main control chip.

[0084] Further, the power supply module circuit includes an AC 220V to DC 12V power supply circuit, a DC 12V to DC 5V power supply circuit, and a DC 5V to DC 3.3V power supply circuit;

[0085] The AC 220V to DC 12V power supply circuit includes a varistor S1, a common mode inductor L1, a thermistor NTC, a capacitor C39, a power supply module U2, an aluminum electrolytic capacitor E8, a chip capacitor C40, and a chip capacitor C41; one end of the varistor S1 is respectively connected to the live wire and one end of the upper half coil of the common mode inductor L1, and the other end is respectively connected to one end of the thermistor NTC and one end of the lower half coil of the common mode inductor L1; the other end of the thermistor NTC is connected to the neutral wire; the other end of the upper half coil of the common mode inductor L1 is respectively connected to one end of the capacitor C39 and the neutral wire input terminal of the power supply module U2, and the other end of the lower half coil of the common mode inductor L1 is respectively connected to the other end of the capacitor C39 and the live wire input terminal of the power supply module U2; the output terminal of the power supply module U2 is respectively connected to one end of the aluminum electrolytic capacitor E8, the chip capacitor C40, and the chip capacitor C41, and the other ends of the aluminum electrolytic capacitor E8, the chip capacitor C40, and the chip capacitor C41 are all grounded; the grounding terminal of the power supply module U2 is grounded;

[0086] In this embodiment, the structure diagram of the AC 220V to DC 12V power supply circuit is as Figure 18 shown. S1 is a varistor for overvoltage protection, L1 is a common mode inductor for suppressing and protecting power supply spike pulse signals, and C39 is a Y capacitor for voltage stabilization and filtering. U2 is a power supply module that outputs DC 12V, E8 is an aluminum electrolytic capacitor for voltage stabilization, and C40 and C41 are chip capacitors for 12V capacitor voltage stabilization and filtering.

[0087] The DC 12V to DC 5V power supply circuit includes an aluminum electrolytic capacitor E9, a power supply chip U3, a capacitor C42, a capacitor C43, and a capacitor C44; the input terminal of the power supply chip U3 is respectively connected to the DC 12V power supply and one end of the aluminum electrolytic capacitor E9, and the other end of the aluminum electrolytic capacitor E9 is grounded; the output terminal of the power supply chip U3 is respectively connected to one end of the capacitor C42, the capacitor C43, and the capacitor C44, and the other ends of the capacitor C42, the capacitor C43, and the capacitor C44 are all grounded; the grounding terminal of the power supply chip U3 is grounded;

[0088] In this embodiment, the structure diagram of the DC 12V to DC 5V power supply circuit is as Figure 19 shown. E9 is an aluminum electrolytic capacitor for voltage stabilization and filtering. U3 is a power supply chip that outputs DC 5V, and C42, C43, and C44 are chip capacitors for voltage stabilization and filtering.

[0089] The DC 5V to DC 3.3V power supply circuit includes an aluminum electrolytic capacitor E14, a power supply chip U6, a capacitor C48, a capacitor C49, and a capacitor C50. The input end of the power supply chip U6 is respectively connected to the DC 5V power supply and one end of the aluminum electrolytic capacitor E14, and the other end of the aluminum electrolytic capacitor E14 is grounded. The output end of the power supply chip U6 is respectively connected to one end of the capacitor C48, the capacitor C49, and the capacitor C50, and the other ends of the capacitor C48, the capacitor C49, and the capacitor C50 are all grounded. The ground end of the power supply chip U6 is grounded.

[0090] In this embodiment, the structural diagram of the DC 5V to DC 3.3V power supply circuit is as Figure 20 shown. E14 is an aluminum electrolytic capacitor for voltage stabilization and filtering. U6 is a power supply chip that outputs DC 3.3V, and C48, C49, and C50 are chip capacitors for voltage stabilization and filtering.

[0091] The above are only the preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements, and improvements made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A GIS switch high voltage live display locking device circuit, characterized in that: It includes a control unit circuit and a high-voltage live signal sampling circuit connected to the control unit circuit, a sensor loop detection fault judgment circuit, an electric self-diagnosis function circuit, a threshold self-adjustment circuit module circuit, a locking control circuit, a live state telemetering output circuit, a fault alarm circuit, a power supply module circuit, an indicator light control circuit and a control unit circuit; the high-voltage live signal sampling circuit is used to collect data on the live state of the GIS switch line and transmit the data to the control unit circuit; the sensor loop detection fault judgment circuit is used to judge the sensor operating state; the electric self-diagnosis function circuit is used to receive the self-test signal of the control unit circuit to perform self-test of the basic circuit function of the locking device; the threshold self-adjustment circuit module circuit is used to automatically adjust the sensor signal strength and accurately display the live state of the GIS switch line; the locking control circuit is used to control the live state of the GIS switch line; the live state telemetering output circuit is used to output the live state of the GIS switch line; the fault alarm circuit is used to monitor the operating state of the GIS switch line; the power supply module is used to supply power to all circuit modules; the indicator light control circuit is used to display the operating state of the monitored circuit module.

2. The GIS switch high voltage live display locking device circuit according to claim 1 is characterized in that: The threshold self-adjusting circuit module circuit includes an A-phase threshold self-adjusting circuit, a B-phase threshold self-adjusting circuit and a C-phase threshold self-adjusting circuit; The A-phase threshold self-adjusting circuit includes a resistor R20, an adjustable potentiometer RW1 and a capacitor C17; one end of the resistor R20 is connected to the power supply module circuit, and the other end is respectively connected to one end of the adjustable potentiometer RW1 and the signal output end; the other end of the adjustable potentiometer RW1 is connected to the capacitor C17, and the other end of the capacitor C17 is connected to the signal output end; The B-phase threshold self-adjusting circuit includes a resistor R21, an adjustable potentiometer RW2 and a capacitor C18; one end of the resistor R21 is connected to the power supply module circuit, and the other end is respectively connected to one end of the adjustable potentiometer RW2 and the signal output end; the other end of the adjustable potentiometer RW2 is connected to the capacitor C18, and the other end of the capacitor C18 is connected to the signal output end; The C-phase threshold self-adjustment circuit includes a resistor R22, an adjustable potentiometer RW3 and a capacitor C19; one end of the resistor R22 is connected to the power supply module circuit, and the other end is respectively connected to one end of the adjustable potentiometer RW3 and the signal output end; the other end of the adjustable potentiometer RW3 is connected to the capacitor C19, and the other end of the capacitor C19 is connected to the signal output end.

3. A GIS switch high voltage live display locking device circuit according to claim 2, characterized in that: The high-voltage live signal sampling circuit includes an A-phase high-voltage live signal sampling circuit, a B-phase high-voltage live signal sampling circuit and a C-phase high-voltage live signal sampling circuit: The A-phase high-voltage live signal sampling circuit includes an A-phase input signal protection circuit, an A-phase signal filtering circuit, an A-phase signal detection circuit, an A-phase signal conditioning and amplifying circuit, and an A-phase threshold value adjustment and setting module; the A-phase input signal protection circuit, the A-phase signal detection circuit, the A-phase signal conditioning and amplifying circuit, the A-phase threshold value adjustment and setting module, and the A-phase signal filtering circuit are connected in sequence; the A-phase input signal protection circuit includes a TVS Schottky diode D4, a current limiting resistor R3, and a varistor R8; the A-phase signal detection circuit includes a filter The wave capacitor E1, the diode D1, the diode D2, the diode D3, the resistor R2, the capacitor C6, the capacitor C7; the A-phase signal conditioning and amplification circuit includes an operational amplifier chip U7A, an operational amplifier chip U7B, a resistor R1, a resistor R4, a resistor R10, a resistor R13, a resistor R14, a resistor R15, a capacitor C1, a capacitor C8, and a capacitor C11; the A-phase threshold adjustment and setting module includes an operational amplifier chip U8A, a resistor R7, and a capacitor C9; the A-phase signal filtering circuit includes a resistor R11, a capacitor C10, and a diode D5; The input ends of the TVS Schottky diode D4 and the current-limiting resistor R3 are both connected to the signal input end; the output end of the TVS Schottky diode D4 is grounded; the output end of the current-limiting resistor R3 is grounded through the varistor R8, the capacitor C6, and the power supply module circuit through the resistor R2; the positive electrode of the filter capacitor E1 is connected to the output end of the current-limiting resistor R3, and the negative electrode of the filter capacitor E1 is grounded through the capacitor C7; the negative electrode of the diode D3, the positive electrode of the diode D2 and the negative electrode of the diode D1 are all connected to the negative electrode of the filter capacitor E1, the positive electrode of the diode D3 is grounded, the positive electrode of the diode D1 is connected to the self-test signal output end of the control unit circuit, and the negative electrode of the diode D2 is connected to one end of the resistor R4; the other end of the resistor R4 is grounded through the resistor R10 and the capacitor C8, and is also connected to the same-direction input end of the operational amplifier chip U7A; the reverse input end of the operational amplifier chip U7A is grounded through the capacitor C11; the resistor R15 is connected to the capacitor C1 1 in parallel, one end of the resistor R15 is grounded, and the other end is connected in series with the resistor R14 and then connected to the power supply module circuit; the output end of the operational amplifier chip U7A is connected back to the same-direction input end through the resistor R1 and the capacitor C1, and the resistor R1 and the capacitor C1 are connected in parallel; the same-direction input end of the operational amplifier chip U7B is connected to the output end of the operational amplifier chip U7A, and the reverse input end of the operational amplifier chip U7B is connected to the output end of the operational amplifier chip U7B through the resistor R13; the output end of the operational amplifier chip U7B is connected to the same-direction input end of the operational amplifier chip U8A through the resistor R7; the same-direction input end of the operational amplifier chip U8A is grounded through the capacitor C9, and the reverse input end of U8A is connected to the signal output end of the A-phase threshold self-adjusting circuit, and the output end of the operational amplifier chip U8A is connected to one end of the resistor R11; the other end of the resistor R11 is respectively connected to one end of the capacitor C10 and the positive electrode of the diode D5; the other end of the capacitor C10 is grounded, and the negative electrode of the diode D5 is used as the signal output end; The B-phase high-voltage live signal sampling circuit includes a B-phase input signal protection circuit, a B-phase signal filtering circuit, a B-phase signal detection circuit, a B-phase signal conditioning and amplification circuit, and a B-phase threshold adjustment and setting module; the B-phase input signal protection circuit, the B-phase signal detection circuit, the B-phase signal conditioning and amplification circuit, the B-phase threshold adjustment and setting module, and the B-phase signal filtering circuit are connected in sequence; the B-phase input signal protection circuit includes a TVS Schottky diode D9, a current limiting resistor R25, and a varistor R28; the B-phase signal detection circuit includes a filter capacitor E2 , diode D6, diode D7, diode D8, resistor R24, capacitor C16, capacitor C20; the B-phase signal conditioning and amplification circuit includes an op amp chip U9A, an op amp chip U9B, a resistor R19, a resistor R26, a resistor R29, a resistor R32, a resistor R33, a resistor R34, a capacitor C12, a capacitor C21, and a capacitor C24; the B-phase threshold adjustment and setting module includes an op amp chip U12A, a resistor R27, and a capacitor C22; the B-phase signal filtering circuit includes a resistor R30, a capacitor C23, and a diode D10; The input ends of the TVS Schottky diode D9 and the current limiting resistor R25 are both connected to the signal input end; the output end of the TVS Schottky diode D9 is grounded; the output end of the current limiting resistor R25 is grounded via the varistor R28, the capacitor C16, and the power supply module circuit via the resistor R24; the positive electrode of the filter capacitor E2 is connected to the output end of the current limiting resistor R25, and the negative electrode of the filter capacitor E2 is grounded via the capacitor C20; the negative electrode of the diode D8 and the positive electrode of the diode D7 The cathode of the diode D6 is connected to the cathode of the filter capacitor E2, the anode of the diode D8 is grounded, the anode of the diode D6 is connected to the self-test signal output terminal of the control unit circuit, and the cathode of the diode D7 is connected to one end of the resistor R26; the other end of the resistor R26 is grounded via the resistor R29 and the capacitor C21, and is also connected to the same-direction input terminal of the operational amplifier chip U9A; the reverse input terminal of the operational amplifier chip U9A is grounded via the capacitor C24; the resistor R34 and the capacitor C24 are connected to the ground. In parallel, one end of the resistor R34 is grounded, and the other end is connected in series with the resistor R33 and then connected to the power supply module circuit; the output end of the operational amplifier chip U9A is connected back to the same-direction input end via the resistor R19 and the capacitor C12, and the resistor R19 and the capacitor C12 are connected in parallel; the same-direction input end of the operational amplifier chip U9B is connected to the output end of the operational amplifier chip U9A, and the reverse input end of the operational amplifier chip U9B is connected to the output end of the operational amplifier chip U9B via the resistor R32; the output end of the operational amplifier chip U9B is connected to the same-direction input end via the resistor R 27 is connected to the same-direction input terminal of the operational amplifier chip U12A; the same-direction input terminal of the operational amplifier chip U12A is grounded via capacitor C22, the reverse input terminal of U12A is connected to the signal output terminal of the B-phase threshold self-adjusting circuit, the output terminal of the operational amplifier chip U12A is connected to one end of the resistor R30; the other end of the resistor R30 is respectively connected to one end of the capacitor C23 and the positive electrode of the diode D10; the other end of the capacitor C23 is grounded, and the negative electrode of the diode D10 serves as the signal output terminal; The C-phase high-voltage live signal sampling circuit includes a C-phase input signal protection circuit, a C-phase signal filtering circuit, a C-phase signal detection circuit, a C-phase signal conditioning and amplification circuit, and a C-phase threshold adjustment and setting module; the C-phase input signal protection circuit, the C-phase signal detection circuit, the C-phase signal conditioning and amplification circuit, the C-phase threshold adjustment and setting module, and the C-phase signal filtering circuit are connected in sequence; the C-phase input signal protection circuit includes a TVS Schottky diode D14, a current limiting resistor R37, and a varistor R41; the C-phase signal detection circuit includes a filter capacitor E3, a second The diode D11, the diode D12, the diode D13, the resistor R36, the capacitor C28, and the capacitor C29; the C-phase signal conditioning and amplification circuit includes an operational amplifier chip U10A, an operational amplifier chip U10B, a resistor R35, a resistor R38, a resistor R42, a resistor R44, a resistor R46, a resistor R47, a capacitor C25, a capacitor C30, and a capacitor C35; the C-phase threshold adjustment and setting module includes an operational amplifier chip U14A, a resistor R40, and a capacitor C31; the C-phase signal filtering circuit includes a resistor R43, a capacitor C34, and a diode D15; The input ends of the TVS Schottky diode D14 and the current limiting resistor R37 are both connected to the signal input end; the output end of the TVS Schottky diode D14 is grounded; the output end of the current limiting resistor R37 is grounded via the varistor R41, grounded via the capacitor C28, and connected to the power supply module circuit via the resistor R36; the positive electrode of the filter capacitor E3 is connected to the output end of the current limiting resistor R37, and the negative electrode of the filter capacitor E3 is grounded via the capacitor C29; the negative electrode of the diode D13 and the positive electrode of the diode D12 The cathode of the diode D11 is connected to the cathode of the filter capacitor E3, the anode of the diode D13 is grounded, the anode of the diode D11 is connected to the self-test signal output terminal of the control unit circuit, and the cathode of the diode D12 is connected to one end of the resistor R38; the other end of the resistor R38 is grounded via the resistor R42 and the capacitor C30, and is also connected to the same-direction input terminal of the operational amplifier chip U10A; the reverse input terminal of the operational amplifier chip U10A is grounded via the capacitor C35; the resistor R47 is connected to the capacitor C 35 is connected in parallel, one end of the resistor R47 is grounded, and the other end is connected in series with the resistor R46 and then connected to the power supply module circuit; the output end of the operational amplifier chip U10A is connected back to the same-direction input end via the resistor R35 and the capacitor C25, and the resistor R35 and the capacitor C25 are connected in parallel; the same-direction input end of the operational amplifier chip U10B is connected to the output end of the operational amplifier chip U10A, and the reverse input end of the operational amplifier chip U10B is connected to the output end of the operational amplifier chip U10B via the resistor R44; the output end of the operational amplifier chip U10B It is connected to the same-direction input terminal of the operational amplifier chip U14A via resistor R40; the same-direction input terminal of the operational amplifier chip U14A is grounded via capacitor C31, the reverse input terminal of U12A is connected to the signal output terminal of the C-phase threshold self-adjusting circuit, and the output terminal of the operational amplifier chip U14A is connected to one end of resistor R43; the other end of the resistor R43 is respectively connected to one end of capacitor C34 and the positive electrode of diode D15; the other end of the capacitor C34 is grounded, and the negative electrode of the diode D15 serves as the signal output terminal.

4. The GIS switch high voltage live display locking device circuit according to claim 3 is characterized in that: The electrical test self-diagnosis function circuit includes an A-phase electrical test self-diagnosis function circuit, a B-phase electrical test self-diagnosis function circuit and a C-phase electrical test self-diagnosis function circuit; the A-phase electrical test self-diagnosis function circuit adopts the A-phase signal detection circuit in the A-phase high-voltage live signal sampling circuit; the B-phase electrical test self-diagnosis function circuit adopts the B-phase signal detection circuit in the B-phase high-voltage live signal sampling circuit; the C-phase electrical test self-diagnosis function circuit adopts the C-phase signal detection circuit in the C-phase high-voltage live signal sampling circuit.

5. The GIS switch high voltage live display locking device circuit according to claim 1 is characterized in that: The sensor circuit detection fault judgment circuit includes an A-phase disconnection identification circuit, a B-phase disconnection identification circuit and a C-phase disconnection identification circuit; The A-phase disconnection identification circuit includes a resistor R6, a resistor R12, a resistor R16, an operational amplifier U11A, and an A-phase NAND gate logic judgment module; the same-direction input end of the operational amplifier U11A is respectively connected to one end of the resistor R6 and the resistor R12, the other end of the resistor R6 is grounded, and the other end of the resistor R12 is connected to the power supply module circuit; the reverse input end of the operational amplifier U11A is respectively connected to one end of the resistor R16 and the AND gate of the A-phase NAND gate logic judgment module, and the other end of the resistor R16 is connected to the signal output end of the A-phase high-voltage live signal sampling circuit; the output end of the operational amplifier U11A is connected to another AND gate of the A-phase NAND gate logic judgment module; the NAND gate of the A-phase NAND gate logic judgment module is connected to the main control circuit; The B-phase disconnection identification circuit includes a resistor R18, a resistor R23, a resistor 31, an operational amplifier U11B, and a B-phase NAND gate logic judgment module; the same-direction input end of the operational amplifier U11B is respectively connected to one end of the resistor R18 and the resistor R23, the other end of the resistor R18 is grounded, and the other end of the resistor R23 is connected to the power supply module circuit; the reverse input end of the operational amplifier U11B is respectively connected to one end of the resistor R31 and the AND gate of the B-phase NAND gate logic judgment module, and the other end of the resistor R31 is connected to the signal output end of the B-phase high-voltage live signal sampling circuit; the output end of the operational amplifier U11B is connected to another AND gate of the B-phase NAND gate logic judgment module; the NAND gate of the B-phase NAND gate logic judgment module is connected to the main control circuit; The C-phase broken line identification circuit includes a resistor R5, a resistor R9, a resistor R17, an operational amplifier U13A, and a C-phase NAND gate logic judgment module; the same-direction input end of the operational amplifier U13A is respectively connected to one end of the resistor R5 and the resistor R9, the other end of the resistor R5 is grounded, and the other end of the resistor R9 is connected to the power supply module circuit; the reverse input end of the operational amplifier U13A is respectively connected to one end of the resistor R17 and the AND gate of the C-phase NAND gate logic judgment module, and the other end of the resistor R17 is connected to the signal output end of the C-phase high-voltage live signal sampling circuit; the output end of the operational amplifier U13A is connected to another AND gate of the C-phase NAND gate logic judgment module; the NOT gate of the C-phase NAND gate logic judgment module is connected to the main control circuit.

6. The GIS switch high voltage live display locking device circuit according to claim 1 is characterized in that: The locking control circuit includes an A-phase locking control circuit, a B-phase locking control circuit and a C-phase locking control circuit; The A-phase locking control circuit includes a diode D18, a photoelectric coupler U52, a resistor R53, a resistor R54, a resistor R65, a resistor R69, a transistor Q3, a filter capacitor E6, and a locking relay J6; the cathode of the diode D18 is connected to the locking control signal output end of the control unit circuit, and the anode of the diode D18 is connected to the cathode of the photoelectric coupler U52; the anode of the photoelectric coupler U52 is connected to one end of the resistor R53, and the other end of the resistor R53 is connected to the power supply module circuit; The collector of the electric coupler U52 is connected to one end of the resistor R54, and the other end of the resistor R54 is connected to the power supply module circuit; the emitter of the photoelectric coupler U52 is connected to the base of the transistor Q3 via the resistor R65; one end of the emitter of the transistor Q3 is grounded, and the other end is connected back to the base via the resistor R69; the collector of the transistor Q3 is connected to the input pin of the latching relay J6, the ground pin of the latching relay J6 is connected to the positive electrode of the filter capacitor E6, and the negative electrode of the filter capacitor E6 is grounded; The B-phase locking control circuit includes a diode D28, a photoelectric coupler U56, a resistor R75, a resistor R76, a resistor R81, a resistor R85, a transistor Q7, a filter capacitor E12, and a locking relay J10; the cathode of the diode D28 is connected to the locking control signal output end of the control unit circuit, and the anode of the diode D28 is connected to the cathode of the photoelectric coupler U56; the anode of the photoelectric coupler U56 is connected to one end of the resistor R75, and the other end of the resistor R75 is connected to the power supply module circuit; the photoelectric coupler U56 is connected to one end of the resistor R75, and the other end of the resistor R75 is connected to the power supply module circuit; The collector of the coupler U56 is connected to one end of the resistor R76, and the other end of the resistor R76 is connected to the power supply module circuit; the emitter of the photoelectric coupler U56 is connected to the base of the transistor Q7 via the resistor R81; one end of the emitter of the transistor Q7 is grounded, and the other end is connected back to the base via the resistor R85; the collector of the transistor Q7 is connected to the input pin of the latching relay J10, the ground pin of the latching relay J10 is connected to the positive electrode of the filter capacitor E12, and the negative electrode of the filter capacitor E12 is grounded; The C phase locking control circuit includes a diode D19, a photoelectric coupler U53, a resistor R55, a resistor R56, a resistor R66, a resistor R70, a transistor Q4, a filter capacitor E7, and a locking relay J7; the cathode of the diode D19 is connected to the locking control signal output end of the control unit circuit, and the anode of the diode D19 is connected to the cathode of the photoelectric coupler U53; the anode of the photoelectric coupler U53 is connected to one end of the resistor R55, and the other end of the resistor R55 is connected to the power supply module circuit; The collector of the electric coupler U53 is connected to one end of the resistor R56, and the other end of the resistor R56 is connected to the power supply module circuit; the emitter of the photoelectric coupler U53 is connected to the base of the transistor Q4 via the resistor R66; one end of the emitter of the transistor Q4 is grounded, and the other end is connected back to the base via the resistor R70; the collector of the transistor Q4 is connected to the input pin of the latching relay J7, the ground pin of the latching relay J7 is connected to the positive electrode of the filter capacitor E7, and the negative electrode of the filter capacitor E7 is grounded.

7. The GIS switch high voltage live display locking device circuit according to claim 1 is characterized in that: The fault alarm circuit includes a diode D29, a photoelectric coupler U57, a resistor R77, a resistor R78, a resistor R82, a resistor R86, a transistor Q8, a filter capacitor E13, and a locking relay J11; the cathode of the diode D29 is connected to the locking control signal output end of the control unit circuit, and the anode of the diode D29 is connected to the cathode of the photoelectric coupler U57; the anode of the photoelectric coupler U57 is connected to one end of the resistor R77, and the other end of the resistor R77 is connected to the power supply module circuit; the photoelectric coupler The collector of the coupler U57 is connected to one end of the resistor R78, and the other end of the resistor R78 is connected to the power supply module circuit; the emitter of the photocoupler U57 is connected to the base of the transistor Q8 via the resistor R82; one end of the emitter of the transistor Q8 is grounded, and the other end is connected back to the base via the resistor R86; the collector of the transistor Q8 is connected to the input pin of the latching relay J11, the ground pin of the latching relay J11 is connected to the positive electrode of the filter capacitor E13, and the negative electrode of the filter capacitor E13 is grounded.

8. The GIS switch high voltage live display locking device circuit according to claim 1 is characterized in that: The indicator light control circuit shown includes a power supply module circuit indicator light circuit, an A-phase live state indication circuit, a B-phase live state indication circuit, a C-phase live state indication circuit, a locking state indication circuit, and a fault indication circuit; The power supply module circuit indicator light circuit includes a light emitting diode D20 and a resistor R57; the positive electrode of the light emitting diode D20 is connected to one end of the resistor R57, and the negative electrode is grounded; the other end of the resistor R57 is connected to the power supply module circuit; The A-phase charged state indication circuit includes a light-emitting diode D21 and a resistor R58; the positive electrode of the light-emitting diode D21 is connected to one end of the resistor R58, and the negative electrode is connected to the control unit circuit; the other end of the resistor R58 is connected to the power supply module circuit; The B-phase charged state indication circuit includes a light-emitting diode D22 and a resistor R59; the positive electrode of the light-emitting diode D22 is connected to one end of the resistor R59, and the negative electrode is connected to the control unit circuit; the other end of the resistor R59 is connected to the power supply module circuit; The C-phase charged state indication circuit includes a light-emitting diode D23 and a resistor R60; the positive electrode of the light-emitting diode D23 is connected to one end of the resistor R60, and the negative electrode is connected to the control unit circuit; the other end of the resistor R60 is connected to the power supply module circuit; The locking state indicating circuit comprises a light emitting diode D24 and a resistor R61; the positive electrode of the light emitting diode D24 is connected to one end of the resistor R61, and the negative electrode is connected to the control unit circuit; the other end of the resistor R61 is connected to the power supply module circuit; The fault indication circuit includes a light emitting diode D25 and a resistor R62; the positive electrode of the light emitting diode D25 is connected to one end of the resistor R62, and the negative electrode is connected to the control unit circuit; the other end of the resistor R62 is connected to the power supply module circuit.

9. The GIS switch high voltage live display locking device circuit according to claim 1 is characterized in that: The control unit circuit includes a main control chip, a crystal oscillator drive circuit, and a reset circuit; the crystal oscillator drive circuit includes capacitor C37, capacitor C38, crystal oscillator XT1, and resistor R48; the reset circuit includes capacitor C32 and capacitor C33; one end of the crystal oscillator XT is respectively connected to one end of capacitor C37 and an input pin of the main control chip, and the other end is respectively connected to one end of capacitor C38 and another input pin of the main control chip; the other ends of the capacitors C37 and C38 are both grounded; the resistor R48 is connected in parallel with crystal oscillator XT1; the capacitors C32 and C33 are connected in parallel, and one end after the parallel connection is respectively connected to the reset pin of the main control chip, the input pin of the main control chip and the power supply module circuit, and the other end after the parallel connection is grounded.

10. The GIS switch high voltage live display locking device circuit according to claim 1 is characterized in that: The power supply module circuit includes an AC 220V to DC 12V power supply circuit, a DC 12V to DC 5V power supply circuit, and a DC 5V to DC 3.3V power supply circuit; The AC 220V power conversion DC12V power supply circuit includes a varistor S1, a common mode inductor L1, a thermistor NTC, a capacitor C39, a power module U2, an aluminum electrolytic capacitor E8, a chip capacitor C40, and a chip capacitor C41; one end of the varistor S1 is respectively connected to the live wire and one end of the upper half coil of the common mode inductor L1, and the other end is respectively connected to one end of the thermistor NTC and one end of the lower half coil of the common mode inductor L1; the other end of the thermistor NTC is connected to the neutral line; the common mode inductor The other end of the upper half coil of L1 is respectively connected to one end of the capacitor C39 and the neutral line input end of the power module U2, and the other end of the lower half coil of the common mode inductor L1 is respectively connected to the other end of the capacitor C39 and the live line input end of the power module U2; the output end of the power module U2 is respectively connected to one end of the aluminum electrolytic capacitor E8, the chip capacitor C40, and the chip capacitor C41, and the other ends of the aluminum electrolytic capacitor E8, the chip capacitor C40, and the chip capacitor C41 are all grounded; the grounding end of the power module U2 is grounded; The DC12V to DC5V power supply circuit includes an aluminum electrolytic capacitor E9, a power chip U3, a capacitor C42, a capacitor C43, and a capacitor C44; the input end of the power chip U3 is respectively connected to the DC12V power supply and one end of the aluminum electrolytic capacitor E9, and the other end of the aluminum electrolytic capacitor E9 is grounded; the output end of the power chip U3 is respectively connected to one end of the capacitor C42, the capacitor C43, and the capacitor C44, and the other ends of the capacitor C42, the capacitor C43, and the capacitor C44 are all grounded; the ground end of the power chip U3 is grounded; The DC5V to DC3.3V power supply circuit includes an aluminum electrolytic capacitor E14, a power chip U6, a capacitor C48, a capacitor C49, and a capacitor C50; the input end of the power chip U6 is respectively connected to the DC5V power supply and one end of the aluminum electrolytic capacitor E14, and the other end of the aluminum electrolytic capacitor E14 is grounded; the output end of the power chip U6 is respectively connected to one end of the capacitor C48, the capacitor C49, and the capacitor C50, and the other ends of the capacitor C48, the capacitor C49, and the capacitor C50 are all grounded; the ground end of the power chip U6 is grounded.

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