Semiconductor device and electronic device

Abstract

The utility model provides a semiconductor device and an electronic device. According to the semiconductor device, a first electrode comprises at least one annular first sub-electrode, a second electrode comprises at least one annular second sub-electrode and a first connecting line, and the first sub-electrode is arranged around the second sub-electrode, so that the width of the opposite part of the first sub-electrode and the second sub-electrode can be increased; therefore, the channel width of the semiconductor device is increased, the width-to-length ratio of the semiconductor device is increased, the on-state current is improved, the occupied space of the first electrode and the second electrode does not need to be increased, and the effect of considering the high on-state current and the high aperture ratio of the thin film transistor is achieved; the first connecting line passes through the first opening and is connected with the second sub-electrode, so that the second sub-electrode can be connected with the doping part, other electrodes and the wire through the first connecting line, and the semiconductor device can work normally.

Description

Technical Field

[0001] The utility model relates to the field of display technology, in particular to a semiconductor device and an electronic device. Background Art

[0002] With the development of display technology, existing display devices have put forward requirements such as large size, high resolution, and high refresh rate. As the requirements for display devices become higher, the electrical requirements for thin film transistors will also be higher. It is required that the thin film transistors have better driving capabilities while occupying less space to increase the aperture ratio. However, the existing thin film transistors adopt an I-type design, and the width-to-length ratio of the thin film transistors is relatively small, resulting in a small on-state current of the thin film transistors. In order to increase the width-to-length ratio of the thin film transistors, it is necessary to increase the width of the source, drain, active layer, and gate, but this will cause the aperture ratio of the display device to decrease, and it is impossible to achieve the effect of both high on-state current and high aperture ratio of the thin film transistors.

[0003] Therefore, the existing display devices have the technical problem of being unable to achieve both high on-state current and high aperture ratio of the thin film transistor. Utility Model Content

[0004] The embodiments of the utility model provide a semiconductor device and an electronic device, which are used to solve the technical problem that the existing display devices cannot take into account both the high on-state current and the high aperture ratio of the thin film transistor.

[0005] The present invention provides a semiconductor device, which includes:

[0006] substrate;

[0007] A source-drain electrode layer is disposed on one side of the substrate, the source-drain electrode layer includes a first electrode and a second electrode, the first electrode includes at least one annular first sub-electrode, and the second electrode includes at least one annular second sub-electrode and a first connecting line;

[0008] The first sub-electrode is arranged around the second sub-electrode, the first sub-electrode is provided with a first opening, and the first connecting line passes through the first opening to connect with the second sub-electrode.

[0009] In some embodiments, the first electrode includes at least two annular first sub-electrodes, the second electrode includes at least two annular second sub-electrodes and at least two first connecting lines, each of the first sub-electrodes surrounds a second sub-electrode, each of the first sub-electrode includes a first opening, at least two of the second sub-electrodes are respectively connected to corresponding first connecting lines, and at least two of the first connecting lines are connected through the first opening.

[0010] In some embodiments, the first electrode includes four interconnected annular first sub-electrodes, the second electrode includes four annular second sub-electrodes and four first connecting lines, the first connecting lines are arranged between the four second sub-electrodes, the first sub-electrode also includes a second opening, the second electrode also includes a second connecting line, and the second connecting line passes through the second opening to connect to the second sub-electrode.

[0011] In some embodiments, the semiconductor device also includes a gate layer, the gate layer is arranged on one side of the substrate, the gate layer includes a gate, the gate includes at least one first through hole, and the first through hole is arranged corresponding to at least one of the second sub-electrode and the first connecting line.

[0012] In some embodiments, the gate includes five first through holes, each of the second sub-electrodes is disposed corresponding to a first through hole, and the first connecting line is disposed corresponding to a first through hole.

[0013] In some embodiments, the gate layer further includes a scan line, the source and drain layer further includes a data line, the second opening is disposed on a side away from the scan line, and the second opening is disposed on a side away from the data line.

[0014] In some embodiments, the semiconductor device further includes an active layer, the active layer is disposed on one side of the substrate, the active layer includes a second through hole, and the second through hole is disposed corresponding to the first through hole.

[0015] In some embodiments, each of the first sub-electrodes is connected to the active layer, or one of the first sub-electrodes is connected to the active layer; and the second connecting line is connected to the active layer.

[0016] In some embodiments, the spacing between the sides of the first sub-electrode and the corresponding sides of the second sub-electrode is equal.

[0017] Meanwhile, an embodiment of the utility model provides an electronic device, which includes the semiconductor device as described in any of the above embodiments.

[0018] Beneficial effects: The utility model provides a semiconductor device and an electronic device; the semiconductor device includes at least one annular first sub-electrode at the first electrode, and the second electrode includes at least one annular second sub-electrode and a first connecting line, so that the first sub-electrode is arranged around the second sub-electrode, thereby increasing the width of the portion directly facing the first sub-electrode and the second sub-electrode, thereby increasing the channel width of the semiconductor device, increasing the aspect ratio of the semiconductor device, and improving the on-state current without increasing the occupied space of the first electrode and the second electrode, thereby achieving the effect of high on-state current and high aperture ratio of the thin film transistor, and the first sub-electrode is provided with a first opening, and the first connecting line passes through the first opening to be connected to the second sub-electrode, so that the second sub-electrode can be connected to the doped part, other electrodes and wiring through the first connecting line, so that the semiconductor device can work normally. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The technical solutions and other beneficial effects of the present invention will be made apparent by describing in detail the specific embodiments of the present invention in conjunction with the accompanying drawings.

[0020] Figure 1 A schematic diagram of a comparative display device provided in an embodiment of the utility model.

[0021] Figure 2 A schematic diagram of a semiconductor device provided in accordance with an embodiment of the present invention.

[0022] Figure 3 A stacking diagram of various film layers of a semiconductor device provided in an embodiment of the utility model.

[0023] Figure 4 for Figure 3 An exploded view of the individual film layers of a semiconductor device in FIG. DETAILED DESCRIPTION

[0024] The following will be combined with the drawings in the embodiments of the utility model to clearly and completely describe the technical solutions in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the utility model.

[0025] In the description of the present utility model, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present utility model and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present utility model. In addition, the terms "first" and "second" are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present utility model, the meaning of "multiple" is two or more, unless otherwise clearly and specifically defined.

[0026] In the description of the present utility model, it should be noted that, unless otherwise clearly specified and limited, the terms "installation", "connection" and "connection" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, an electrical connection, or mutual communication; it can be a direct connection, or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present utility model can be understood according to specific circumstances.

[0027] In the present utility model, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may include that the first and second features are in direct contact, or may include that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, a first feature being "above", "above" and "above" a second feature includes that the first feature is directly above and obliquely above the second feature, or simply indicates that the first feature is higher in level than the second feature. A first feature being "below", "below" and "below" a second feature includes that the first feature is directly below and obliquely below the second feature, or simply indicates that the first feature is lower in level than the second feature.

[0028] The disclosure below provides many different embodiments or examples for realizing different structures of the utility model. In order to simplify the disclosure of the utility model, the components and settings of specific examples are described below. Of course, they are merely examples, and the purpose is not to limit the utility model. In addition, the utility model may repeat reference numbers and / or reference letters in different examples, and such repetition is for the purpose of simplification and clarity, and does not itself indicate the relationship between the various embodiments and / or settings discussed. In addition, the utility model provides various specific examples of processes and materials, but those of ordinary skill in the art may be aware of the application of other processes and / or the use of other materials.

[0029] As an introduction to the embodiments of the present utility model, a comparative semiconductor device is provided to illustrate the principle of the technical problem to be solved by the embodiments of the present utility model. Figure 1 As shown, the comparative semiconductor device includes a gate electrode 11, an active layer (not shown), a source electrode 121 and a drain electrode 122. The comparative semiconductor device adopts an I-type structure, the source electrode 121 and the drain electrode 122 extend in the longitudinal direction, and the source electrode 121 and the drain electrode 122 are arranged opposite to each other in the transverse direction. In order to improve the driving ability of the comparative semiconductor device, it is necessary to increase the width of the source electrode 121 and the drain electrode 122 in the longitudinal direction, and correspondingly increase the width of the active layer and the gate electrode 11. The source electrode 121, the drain electrode 122, the gate electrode 11 and the active layer are all opaque, but this will cause the area of ​​the light-transmitting region in the comparative semiconductor device to decrease, thereby causing a decrease in the aperture ratio. Reducing the width of the source electrode 121 and the drain electrode 122 in the longitudinal direction can increase the aperture ratio, but it will cause the on-state current of the comparative semiconductor device to decrease, and the performance of the comparative semiconductor device to decrease. Therefore, the existing display device has a technical problem that it cannot take into account both the high on-state current and the high aperture ratio of the thin film transistor.

[0030] In view of the above technical problems, the embodiments of the present utility model provide a semiconductor device and an electronic device to solve the above technical problems.

[0031] Figure 2 A schematic diagram of a semiconductor device provided in accordance with an embodiment of the present invention. Figure 3 A stacking diagram of various film layers of a semiconductor device provided in an embodiment of the utility model. Figure 4 for Figure 3 An exploded view of the various film layers of a semiconductor device in FIG. Figure 4 (a) in Figure 3 An exploded view of a gate layer of a semiconductor device in FIG. Figure 4 (b) in Figure 3 An exploded view of the active layer of a semiconductor device in FIG. Figure 4 (c) in Figure 3 An exploded view of the source and drain layers of a semiconductor device in FIG.

[0032] like Figures 2 to 4 As shown, an embodiment of the utility model provides a semiconductor device, the semiconductor device 2 includes a substrate 21 and a source-drain layer 25, the source-drain layer 25 is arranged on one side of the substrate 21, the source-drain layer 25 includes a first electrode 251 and a second electrode 252, the first electrode 251 includes at least one annular first sub-electrode 251a, the second electrode 252 includes at least one annular second sub-electrode 252a and a first connecting line 252b;

[0033] The first sub-electrode 251 a is disposed around the second sub-electrode 252 a . The first sub-electrode 251 a is provided with a first opening 261 . The first connecting line 252 b passes through the first opening 261 and is connected to the second sub-electrode 252 a .

[0034] An embodiment of the utility model provides a semiconductor device. By making the first electrode include at least one annular first sub-electrode, the second electrode includes at least one annular second sub-electrode and a first connecting line, and the first sub-electrode is arranged around the second sub-electrode, the width of the portion directly facing the first sub-electrode and the second sub-electrode can be increased, thereby increasing the channel width of the semiconductor device, increasing the aspect ratio of the semiconductor device, and improving the on-state current without increasing the occupied space of the first electrode and the second electrode, thereby achieving the effect of high on-state current and high aperture ratio of the thin film transistor. The first sub-electrode is provided with a first opening, and the first connecting line passes through the first opening to be connected to the second sub-electrode, so that the second sub-electrode can be connected to the doped part, other electrodes and wiring through the first connecting line, so that the semiconductor device can work normally.

[0035] Specifically, the semiconductor device may be an array substrate, and the semiconductor device may include a thin film transistor.

[0036] Specifically, it can be understood that the first sub-electrode and the second sub-electrode are both ring-shaped, and the first sub-electrode is arranged around the second sub-electrode. Then, under the same area (taking the inner ring and the outer ring of the first electrode and the second electrode as an example, the width of the facing parts of the first sub-electrode and the second sub-electrode in the embodiment of the utility model is four times the width of the facing parts of the source electrode and the drain electrode in the semiconductor device, thereby increasing the channel width of the semiconductor device, and the channel length can be kept unchanged, thereby increasing the on-state current of the semiconductor device, taking into account the effects of high on-state current and high aperture ratio of the semiconductor device.

[0037] Specifically, the first electrode can include only one first sub-electrode, and the second electrode can include one second sub-electrode. Then, under the same area (taking the inner ring and the outer ring of the first electrode and the second electrode as an example, the width of the facing parts of the first electrode and the second electrode is four times the width of the facing parts of the source electrode and the drain electrode of the comparison semiconductor device, and the spacing between the first electrode and the second electrode can be kept unchanged, so that the width-to-length ratio of the channel of the semiconductor device in the embodiment of the utility model is four times the width-to-length ratio of the channel of the I-type thin film transistor, thereby increasing the on-state current and driving performance of the semiconductor device without reducing the aperture ratio. Accordingly, the width of the semiconductor device can be adjusted to achieve the effect of increasing the on-state current of the semiconductor device and increasing the aperture ratio.

[0038] Specifically, when the first electrode includes only one first sub-electrode and the second electrode includes only one second sub-electrode, the second electrode can be connected to the doped portion of the active layer through a first connecting line, and the first connecting line can be connected to other signal lines and electrodes.

[0039] In some embodiments, Figure 3 As shown, the first electrode 251 includes at least two annular first sub-electrodes 251a, the second electrode 252 includes at least two annular second sub-electrodes 252a and at least two first connecting wires 252b, each of the first sub-electrodes 251a surrounds a second sub-electrode 252a, each of the first sub-electrodes 251a includes a first opening 261, at least two of the second sub-electrodes 252a are respectively connected to the corresponding first connecting wires 252b, and at least two of the first connecting wires 252b are connected through the first opening 261. By making the first electrode include at least two annular first sub-electrodes, the second electrode include at least two annular second sub-electrodes and at least two first connecting wires, and each first sub-electrode is arranged around a second sub-electrode, the channel width of the semiconductor device can be further increased, the on-state current of the semiconductor device can be improved, and each second sub-electrode is connected to the first connecting wire, and can be connected to the doped part, other signal wires and electrodes through the first connecting wire to input and output signals, so that the semiconductor device works normally.

[0040] Specifically, when the first electrode includes two annular first sub-electrodes and the second electrode includes two annular second sub-electrodes, the two first sub-electrodes can be arranged longitudinally while the two second sub-electrodes are arranged longitudinally. The two first sub-electrodes can also be arranged transversely while the two second sub-electrodes are arranged transversely.

[0041] Specifically, when the first electrode includes two ring-shaped first sub-electrodes and the second electrode includes two ring-shaped second sub-electrodes, under the same area (taking the inner ring and the outer ring of the first electrode as squares, and the inner ring and the outer ring of the second sub-electrode as rectangles as an example), the width of the facing parts of the first electrode and the second electrode is six times the width of the facing parts of the source electrode and the drain electrode of the comparison semiconductor device, and the spacing between the first electrode and the second electrode can be kept unchanged, so that the width-to-length ratio of the channel of the semiconductor device in the embodiment of the utility model is six times the width-to-length ratio of the channel of the I-type thin film transistor, thereby increasing the on-state current and driving performance of the semiconductor device without reducing the aperture ratio. Accordingly, the width of the semiconductor device can be adjusted to achieve the effect of increasing the on-state current of the semiconductor device and increasing the aperture ratio.

[0042] Specifically, the first electrode can also include three annular first sub-electrodes, and the second electrode can include three annular second sub-electrodes, so that each first sub-electrode surrounds a second sub-electrode, and the three annular second sub-electrodes are respectively connected to three first connecting lines, and the three first connecting lines are connected through the first opening, so that under the same area (taking the inner ring and the outer ring of the first electrode as squares, and the inner ring and the outer ring of the second sub-electrode as rectangles), the width of the facing part of the first electrode and the second electrode is seven times the width of the facing part of the source electrode and the drain electrode of the comparison semiconductor device, thereby further increasing the on-state current and driving performance of the semiconductor device without reducing the aperture ratio. Accordingly, the width of the semiconductor device can be adjusted to achieve the effect of increasing the on-state current of the semiconductor device and increasing the aperture ratio.

[0043] In some embodiments, Figure 3 , Figure 4 As shown, the first electrode 251 includes four interconnected annular first sub-electrodes 251a, the second electrode 252 includes four annular second sub-electrodes 252a and four first connecting wires 252b, the first connecting wires 252b are arranged between the four second sub-electrodes 252a, the first sub-electrode 251a also includes a second opening 262, the second electrode 252 also includes a second connecting wire 252c, and the second connecting wire 252c passes through the second opening 262 and is connected to the second sub-electrode 252a. By making the first electrode include four interconnected annular first sub-electrodes, the second electrode includes four annular second sub-electrodes, and each first sub-electrode is arranged around a second sub-electrode, the channel width of the semiconductor device can be further increased, and the on-state current of the semiconductor device can be improved, and each second sub-electrode is connected to the first connecting wire, so that multiple second sub-electrodes can be connected, and by setting the second opening and the second connecting wire, the second connecting wire can be connected to the doped part, other signal lines and electrodes to input and output signals, so that the semiconductor device works normally.

[0044] Specifically, when the first electrode includes four ring-shaped first sub-electrodes and the second electrode includes four ring-shaped second sub-electrodes, under the same area (taking the inner ring and the outer ring of the first electrode as squares, and the inner ring and the outer ring of the second sub-electrode as rectangles as an example), the width of the facing parts of the first electrode and the second electrode is eight times the width of the facing parts of the source electrode and the drain electrode of the comparison semiconductor device, and the spacing between the first electrode and the second electrode can be kept unchanged, so that the width-to-length ratio of the channel of the semiconductor device in the embodiment of the utility model is eight times the width-to-length ratio of the channel of the I-type thin film transistor, thereby increasing the on-state current and driving performance of the semiconductor device without reducing the aperture ratio. Accordingly, the width of the semiconductor device can be adjusted to achieve the effect of increasing the on-state current of the semiconductor device and increasing the aperture ratio.

[0045] Specifically, the length and width of each second sub-electrode can be increased so that the width-to-length ratio of the channel of the semiconductor device in the embodiment of the utility model is 16 times the width-to-length ratio of the channel in the comparative semiconductor device, thereby improving the on-state current of the semiconductor device.

[0046] In some embodiments, at least one of the four adjacently connected annular first sub-electrodes is provided with a break, and the first sub-electrodes on both sides of the break are connected. When the annular first sub-electrodes are provided, the first sub-electrodes may be provided with a break, but the parts of the first sub-electrodes are ensured to remain connected.

[0047] In some embodiments, Figures 2 to 4 As shown, the semiconductor device 2 further includes a gate layer 22, the gate layer 22 is arranged on one side of the substrate 21, the gate layer 22 includes a gate 221, the gate 221 includes at least one first through hole 31, and the first through hole 31 is arranged corresponding to at least one of the second sub-electrode 252a and the first connecting line 252b. By making the gate include at least one first through hole, and the first through hole is arranged corresponding to at least one of the second sub-electrode and the first connecting line, the overlapping area of ​​the gate and the second electrode can be reduced, the parasitic capacitance can be reduced, the voltage drop of the electrical signal can be reduced, and the penetration rate of the semiconductor device can be improved. Since this part of the gate does not serve as a functional part of the gate, removing this part does not affect the normal function of the semiconductor device.

[0048] Specifically, since the first opening is arranged corresponding to at least one of the second sub-electrode and the first connecting line, at least one of the second sub-electrode and the first connecting line can have no overlap with the gate, thereby reducing the parasitic capacitance between the second electrode and the gate, reducing the voltage drop of the signal on the gate and the second electrode, and the through hole can improve the penetration rate of the semiconductor device.

[0049] In some embodiments, Figure 3 , Figure 4 As shown, the gate 221 includes five first through holes 31, each of the second sub-electrodes 252a is arranged corresponding to a first through hole 31, and the first connecting wire 252b is arranged corresponding to a first through hole 31. By arranging each second sub-electrode corresponding to a first through hole, and the first connecting wire corresponding to a first through hole, the second sub-electrode and the first connecting wire can be made to not overlap with the gate, thereby reducing the parasitic capacitance between the second electrode and the gate, and reducing the voltage drop of the signal on the gate and the second electrode, and the multiple through holes can improve the penetration rate of the semiconductor device and improve the aperture ratio.

[0050] Specifically, the above embodiment is described by taking the gate including five first through holes as an example, but the embodiment of the utility model is not limited to this. The number of first through holes can be set according to the number of second sub-electrodes. For example, the second electrode includes two second sub-electrodes, and three through holes can be set, so that the second sub-electrodes are set corresponding to the through holes, and the first connecting lines are set corresponding to the through holes.

[0051] Specifically, the area of ​​the outer ring of the second sub-electrode may be equal to or unequal to the area of ​​the first through hole, and the area of ​​the first connecting line may be equal to or unequal to the area of ​​the first through hole.

[0052] In some embodiments, Figure 2 , Figure 3 As shown, the gate layer 22 further includes a scan line 222, the source-drain electrode layer 25 further includes a data line 253, and the second opening 262 is disposed on a side away from the scan line 222, and the second opening 262 is disposed on a side away from the data line 253. By disposing the second opening on a side away from the scan line and the second opening on a side away from the data line, it is possible to avoid the parasitic capacitance caused by the second connection line overlapping with the scan line to affect the signal of the scan line, and to prevent the second connection line from being short-circuited with the data line.

[0053] In some embodiments, Figures 2 to 4 As shown, the semiconductor device 2 further includes an active layer 24, the active layer 24 is disposed on one side of the substrate 21, and the active layer 24 includes a second through hole 32, and the second through hole 32 is disposed corresponding to the first through hole 31. By providing the active layer with the second through hole, and the second through hole is disposed corresponding to the first through hole, the overlapping area of ​​the active layer and the gate can be reduced, the parasitic capacitance between the active layer and the gate can be reduced, and the penetration rate of the semiconductor device can be increased, and the aperture ratio of the semiconductor device can be increased.

[0054] Specifically, the projection of the second through hole on the substrate may coincide with the projection of the first through hole on the substrate.

[0055] In some embodiments, each of the first sub-electrodes is connected to the active layer, or one of the first sub-electrodes is connected to the active layer; and the second connection line is connected to the active layer. When the first electrode and the second electrode are connected to the active layer, each of the first sub-electrodes can be connected to the active layer, or one of the first sub-electrodes can be connected to the active layer, and at the same time, the second connection line can be connected to the active layer to achieve normal operation of the semiconductor device.

[0056] In some embodiments, the spacing between the sides of the first sub-electrode and the sides corresponding to the second sub-electrode is equal. By making the spacing between the sides of the first sub-electrode and the sides corresponding to the second sub-electrode equal, the channel length of the semiconductor device remains unchanged, the electrical properties of each region are similar or even the same, and the performance of the semiconductor device is improved.

[0057] Specifically, the shape of the first sub-electrode can be an open square, the inner ring and the outer ring of the first sub-electrode can both be open squares, the shape of the second sub-electrode can be a square, the inner ring and the outer ring of the first sub-electrode can both be squares. However, the embodiment of the utility model is not limited thereto, the shape of the first sub-electrode can be an open pentagon, hexagon or other shapes, and similarly, the second sub-electrode can be a pentagon, hexagon or other shapes.

[0058] Specifically, Figure 2 As shown, the semiconductor device 2 further includes a gate insulating layer 23 , which is disposed on a side of the gate layer 22 away from the substrate, an active layer 24 is disposed on a side of the gate insulating layer 23 away from the gate layer 22 , and a source-drain layer 25 is disposed on a side of the active layer 24 away from the gate insulating layer 23 .

[0059] Specifically, the drawings in the embodiments of the present invention illustrate the structure of the semiconductor device as a bottom gate and a top contact as an example, but the embodiments of the present invention are not limited thereto. The semiconductor device may be a top gate structure or a bottom contact structure.

[0060] Meanwhile, an embodiment of the utility model provides an electronic device, which includes the semiconductor device as described in any of the above embodiments.

[0061] Specifically, the electronic device may be a liquid crystal display panel or an organic light emitting diode display panel.

[0062] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0063] The semiconductor device and electronic device provided by the embodiments of the present invention are introduced in detail above. The principles and implementation methods of the present invention are explained in this article using specific examples. The description of the above embodiments is only used to help understand the technical solution and core idea of ​​the present invention. Ordinary technicians in this field should understand that they can still modify the technical solutions recorded in the aforementioned embodiments, or replace some of the technical features therein with equivalents. However, these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A semiconductor device, characterized in that: include: substrate; A source-drain electrode layer is disposed on one side of the substrate, the source-drain electrode layer includes a first electrode and a second electrode, the first electrode includes at least one annular first sub-electrode, and the second electrode includes at least one annular second sub-electrode and a first connecting line; The first sub-electrode is arranged around the second sub-electrode, the first sub-electrode is provided with a first opening, and the first connecting line passes through the first opening to connect with the second sub-electrode.

2. The semiconductor device according to claim 1, wherein The first electrode includes at least two annular first sub-electrodes, the second electrode includes at least two annular second sub-electrodes and at least two first connecting lines, each of the first sub-electrodes surrounds a second sub-electrode, each of the first sub-electrodes includes a first opening, at least two of the second sub-electrodes are respectively connected to corresponding first connecting lines, and at least two of the first connecting lines are connected through the first openings.

3. The semiconductor device according to claim 2, wherein: The first electrode includes four interconnected annular first sub-electrodes, the second electrode includes four annular second sub-electrodes and four first connecting lines, the first connecting lines are arranged between the four second sub-electrodes, the first sub-electrode also includes a second opening, the second electrode also includes a second connecting line, and the second connecting line passes through the second opening to be connected to the second sub-electrode.

4. The semiconductor device according to claim 3, characterized in that The semiconductor device further includes a gate layer, which is disposed on one side of the substrate. The gate layer includes a gate, and the gate includes at least one first through hole, which is disposed corresponding to at least one of the second sub-electrode and the first connecting line.

5. The semiconductor device according to claim 4, wherein: The gate includes five first through holes, each of the second sub-electrodes is arranged corresponding to a first through hole, and the first connecting line is arranged corresponding to a first through hole.

6. The semiconductor device according to claim 4, wherein: The gate layer further includes a scan line, the source-drain layer further includes a data line, the second opening is arranged at a side away from the scan line, and the second opening is arranged at a side away from the data line.

7. The semiconductor device according to claim 4, wherein: The semiconductor device further comprises an active layer, wherein the active layer is arranged on one side of the substrate, and the active layer comprises a second through hole, wherein the second through hole is arranged corresponding to the first through hole.

8. The semiconductor device according to claim 7, wherein: Each of the first sub-electrodes is connected to the active layer, or one of the first sub-electrodes is connected to the active layer; and the second connection line is connected to the active layer.

9. The semiconductor device according to claim 1, wherein: The spacing between each side edge of the first sub-electrode and the corresponding side edge of the second sub-electrode is equal.

10. An electronic device, characterized in that: Comprising the semiconductor device as claimed in any one of claims 1 to 9.

Images