Sine wave shaping square wave circuit

Abstract

The utility model discloses a sine wave shaping square wave circuit which comprises a resistor R1, a resistor R2, a resistor R4, a resistor R5, a resistor R7, a capacitor C1, a capacitor C4, a capacitor C5 and a voltage comparator U1. Wherein one end of the capacitor C5 is connected with an input circuit, and the other end of the capacitor C5 is connected with the resistor R2, the resistor R5, the resistor R7 and a third pin of the voltage comparator U1; a fourth pin of the voltage comparator U1 is connected with a power supply and one end of a capacitor C1. The fifth pin of the voltage comparator U1 is connected with one end of the resistor R3 and the other end of the resistor R5. And the other end of the resistor R3 is connected with the output circuit. The circuit provided by the utility model can realize efficient conversion from sine waves to square waves, has the functions of signal amplification and noise suppression, and is suitable for a plurality of fields such as digital signal processing, clock signal generation and the like.

Description

Technical Field

[0001] The utility model belongs to the technical field of electronic circuits, and particularly relates to a sine wave shaping square wave circuit. Background Technique

[0002] The output of high-precision time requires the rising edge accuracy of the pulse signal to reach the nanosecond (ns) level. Before the sine signal is connected to the FPGA for digital processing, it also needs to be shaped into a fast-edge pulse signal to facilitate digital processing. In order to be able to interface with digital circuits during signal processing, not only does the rising edge accuracy need to reach the ns level, but also its output level needs to match the digital circuit. Usually, a comparator shaping circuit is used to obtain a better pulse rising edge.

[0003] In the prior art, for example, the technical solution described in the patent with the publication number: CN217404367U: A waveform generation circuit applicable to vehicle electronic instrument testing, including a sine wave generation circuit, a square wave generation adjustment control circuit, and a waveform switching output circuit. The sine wave generation circuit is used to generate and output a sine wave signal, and its output terminal is respectively connected to the waveform switching output circuit and the square wave generation adjustment circuit; the square wave generation adjustment circuit converts and adjusts the sine wave and then outputs a square wave signal, and its output terminal is connected to the waveform switching output circuit. The waveform switching output circuit is used to switch the output of the sine wave / square wave signal.

[0004] In the prior art, most comparator circuit chips use dual power supplies, with a rising edge accuracy of the us level, and the output level cannot match the digital level well. Summary of the Invention

[0005] The purpose of the utility model is to provide a sine wave shaping square wave circuit to solve the problem in the prior art in the background technique that most comparator circuit chips adopt a dual power supply scheme, making it difficult for the rising edge accuracy to reach the ns level, and its output level cannot match the digital level well.

[0006] To solve the above technical problems, the technical solution adopted by the utility model is:

[0007] A sine wave shaping square wave circuit includes a resistor R1, a resistor R2, a resistor R4, a resistor R5, a resistor R7, a capacitor C1, a capacitor C4, a capacitor C5, and a voltage comparator U1; wherein, one end of the capacitor C5 is connected to the input circuit, and the other end of the capacitor C5 is connected to the resistor R2, the resistor R5, the resistor R7, and the 3rd pin of the voltage comparator U1.

[0008] The other end of resistor R2 is respectively connected to one end of resistor R1 and the power supply; the other end of resistor R1 is respectively connected to resistor R4, capacitor C4 and the pin 1 of voltage comparator U1; the other ends of resistor R4 and capacitor C4 are grounded;

[0009] The pin 4 of voltage comparator U1 is respectively connected to the power supply and one end of capacitor C1; the other end of capacitor C1 is grounded; the pin 5 of voltage comparator U1 is respectively connected to one end of resistor R3 and the other end of resistor R5; the other end of resistor R3 is connected to the output circuit for outputting pulse signals, the pin 2 and pin 6 of voltage comparator U1 are connected, and the pin 2 and pin 6 of voltage comparator U1 are grounded;

[0010] The other end of resistor R7 is grounded.

[0011] According to the above technical solution, the input circuit includes resistor R6, resistor R9, capacitor C2, capacitor C3, capacitor C7, capacitor C8 and chip CY1; wherein, one end of resistor R6 is connected to the power supply circuit, and the other end of resistor R6 is respectively connected to capacitor C2 and one end of resistor R9; the other end of capacitor C2 is respectively connected to capacitor C3, one end of capacitor C7 and the pin 2 of chip CY1;

[0012] The other end of resistor R9 is respectively connected to capacitor C3, the other end of capacitor C7 and the pin 1 of chip CY1; the pin 4 of chip CY1 is respectively connected to the power supply and one end of capacitor C8, and the other end of capacitor C8 is grounded; the pin 3 of chip CY1 is connected to capacitor C5.

[0013] According to the above technical solution, the input circuit further includes connector J8. The pin 1 of connector J8 is respectively connected to the pin 3 of chip CY1 and capacitor C5, and the pins 2, 3, 4 and 5 of connector J8 are all grounded.

[0014] According to the above technical solution, capacitor C2, capacitor C3, capacitor C7 and the pin 2 of chip CY1 are all grounded.

[0015] According to the above technical solution, the power supply circuit includes chip U2, resistor R8, resistor R11, resistor R12, resistor R13, capacitor C6 and capacitor C9;

[0016] One ends of resistor R11, resistor R12 and resistor R13 are all connected to the power supply; the other ends of resistor R11, resistor R12 and resistor R13 are respectively connected to the pins 7, 6 and 5 of chip U2; the pin 8 of chip U2 is grounded;

[0017] The pin 1 of chip U2 is respectively connected to the power supply and one end of capacitor C6; the pin 2 of chip U2 is respectively connected to one end of capacitor C9 and the power supply voltage;

[0018] The 3rd pin of chip U2 is respectively connected to the 4th pin of chip U2 and one end of resistor R8, and the other end of resistor R8 is connected to resistor R6.

[0019] According to the above technical solution, the other ends of capacitor C6 and capacitor C9 are grounded.

[0020] According to the above technical solution, the output circuit includes chip U5 and capacitor C14. Among them, the 4th pin of chip U5 is respectively connected to the power supply and capacitor C14.

[0021] According to the above technical solution, the 2nd pin of chip U5 and capacitor C14 are both grounded.

[0022] Compared with the prior art, the present utility model has the following beneficial effects:

[0023] In the present utility model, the circuit shapes the input sine wave signal into a more standard square wave signal, making the rising edge and falling edge of the output pulse signal steeper, thereby improving the sharpness and clarity of the signal. The use of voltage comparator U1 can amplify the amplitude of the input signal to ensure that the output signal is within the required amplitude range, which is helpful for the processing of subsequent circuits. By appropriately selecting the values of resistors and capacitors, filtering of the input signal can be achieved, thereby suppressing some high-frequency noises and improving the signal-to-noise ratio. By adjusting the values of resistors and capacitors in the circuit, the pulse width of the square wave signal (i.e., the duration of high level and low level) can be controlled to make it suitable for different application requirements.

[0024] The circuit in the present utility model can achieve efficient conversion from sine wave to square wave, and has functions of signal amplification and noise suppression, and is applicable to multiple fields such as digital signal processing and clock signal generation. Description of the Drawings

[0025] Figure 1 One of the sine wave shaping square wave circuit diagrams of the present utility model;

[0026] Figure 2 The input circuit diagram of the present utility model;

[0027] Figure 3 The power supply circuit diagram of the present utility model;

[0028] Figure 4 The output circuit diagram of the present utility model. Detailed Embodiments

[0029] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0030] Embodiment 1

[0031] As Figure 1 shown, a sine wave shaping square wave circuit includes a resistor R1, a resistor R2, a resistor R4, a resistor R5, a resistor R7, a capacitor C1, a capacitor C4, a capacitor C5, and a voltage comparator U1; wherein, one end of the capacitor C5 is connected to the input circuit, and the other end of the capacitor C5 is connected to the resistor R2, the resistor R5, the resistor R7, and the 3rd pin of the voltage comparator U1;

[0032] The other end of the resistor R2 is respectively connected to one end of the resistor R1 and the power supply; the other end of the resistor R1 is respectively connected to the resistor R4, the capacitor C4, and the 1st pin of the voltage comparator U1; the other ends of the resistor R4 and the capacitor C4 are grounded;

[0033] The 4th pin of the voltage comparator U1 is respectively connected to the power supply and one end of the capacitor C1; the other end of the capacitor C1 is grounded; the 5th pin of the voltage comparator U1 is respectively connected to one end of the resistor R3 and the other end of the resistor R5; the other end of the resistor R3 is connected to the output circuit for outputting a pulse signal, the 2nd pin and the 6th pin of the voltage comparator U1 are connected, and the 2nd pin and the 6th pin of the voltage comparator U1 are grounded;

[0034] The other end of the resistor R7 is grounded.

[0035] In the present invention, the circuit shapes the input sine wave signal into a more standard square wave signal, making the rising edge and falling edge of the output pulse signal steeper, thereby improving the sharpness and clarity of the signal. The use of the voltage comparator U1 can amplify the amplitude of the input signal, ensure that the output signal is within the required amplitude range, and contribute to the processing of subsequent circuits. By appropriately selecting the values of the resistors and capacitors, filtering of the input signal can be achieved, thereby suppressing some high-frequency noises and improving the signal-to-noise ratio. By adjusting the values of the resistors and capacitors in the circuit, the pulse width of the square wave signal (i.e., the duration of the high level and the low level) can be controlled to make it suitable for different application requirements.

[0036] The circuit in the present invention can achieve efficient conversion from sine wave to square wave, and has functions of signal amplification and noise suppression, and is applicable to multiple fields such as digital signal processing and clock signal generation.

[0037] Embodiment 2

[0038] This embodiment is a further refinement of Embodiment 1.

[0039] As Figure 2 shown, the input circuit includes resistor R6, resistor R9, capacitor C2, capacitor C3, capacitor C7, capacitor C8, and chip CY1; among them, one end of resistor R6 is connected to the power supply circuit, and the other end of resistor R6 is respectively connected to capacitor C2 and one end of resistor R9; the other end of capacitor C2 is respectively connected to one end of capacitor C3, capacitor C7, and pin 2 of chip CY1;

[0040] the other end of resistor R9 is respectively connected to the other ends of capacitor C3, capacitor C7, and pin 1 of chip CY1; pin 4 of chip CY1 is respectively connected to the power supply and one end of capacitor C8, and the other end of capacitor C8 is grounded; pin 3 of chip CY1 is connected to capacitor C5.

[0041] As Figure 2 shown, the input circuit further includes connector J8. Pin 1 of connector J8 is respectively connected to pin 3 of chip CY1 and capacitor C5, and pins 2, 3, 4, and 5 of connector J8 are all grounded.

[0042] Capacitor C2, capacitor C3, capacitor C7, and pin 2 of chip CY1 are all grounded.

[0043] As Figure 3 shown, the power supply circuit includes chip U2, resistor R8, resistor R11, resistor R12, resistor R13, capacitor C6, and capacitor C9;

[0044] One ends of resistor R11, resistor R12, and resistor R13 are all connected to the power supply; the other ends of resistor R11, resistor R12, and resistor R13 are respectively connected to pins 7, 6, and 5 of chip U2; pin 8 of chip U2 is grounded;

[0045] Pin 1 of chip U2 is respectively connected to the power supply and one end of capacitor C6; pin 2 of chip U2 is respectively connected to one end of capacitor C9 and the power supply voltage;

[0046] Pin 3 of chip U2 is respectively connected to pin 4 of chip U2 and one end of resistor R8, and the other end of resistor R8 is connected to resistor R6.

[0047] The other ends of capacitor C6 and capacitor C9 are grounded.

[0048] As Figure 4 shown, the output circuit includes chip U5 and capacitor C14, where pin 4 of chip U5 is respectively connected to the power supply and capacitor C14.

[0049] Pin 2 of chip U5 and capacitor C14 are both grounded.

[0050] The working principle of the present utility model is as follows: SINE-IN is the input terminal of the sine signal (i.e., the input terminal of capacitor C5), and PLUSE-OUT is the output terminal of the pulse signal (i.e., the output terminal of capacitor R3); the voltage comparator U1 is a single-supply voltage comparator of the TLV3501AIDBVR model; the voltage range of the circuit single supply VCC is 3.3V; the resistors R1 and R4 are divided in voltage and connected to the inverting input terminal of the voltage comparator U1 as the reference point of 1.65V for the voltage comparator U1.

[0051] Capacitor C3, resistors R2 and R6 constitute a shaping signal input stage, and resistor R5 is a feedback resistor. In actual application, resistor R6 is adjusted according to the amplitude of the input sine signal, so that the input voltage range of the non-inverting input terminal of the voltage comparator U1 is 200mV - 500mV. At this time, the shaping requirements of the square wave signal can be met, and the resistances of resistors R1 and R4 are adjusted to change the reference point of the voltage comparator U1. Capacitor C3 plays a role in blocking the DC component of the input sine signal, and capacitor C1 filters out the interference of the circuit single supply VCC. Resistor R3 is a matching resistor at the output terminal.

[0052] It should be noted that in this article, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprises", "comprising" or any other variation thereof is intended to cover a non-exclusive inclusion, so that a process, method, article or device comprising a series of elements includes not only those elements, but also other elements not expressly listed, or elements inherent to such process, method, article or device.

[0053] Finally, it should be noted that the above are only the preferred embodiments of the present utility model and are not used to limit the present utility model. Although the present utility model has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements for some of the technical features. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present utility model shall be included within the protection scope of the present utility model.

Claims

1. A sine wave shaping square wave circuit, characterized in that: It includes a resistor R1, a resistor R2, a resistor R4, a resistor R5, a resistor R7, a capacitor C1, a capacitor C4, a capacitor C5 and a voltage comparator U1; wherein one end of the capacitor C5 is connected to the input circuit, and the other end of the capacitor C5 is connected to the resistor R2, the resistor R5, the resistor R7 and the pin 3 of the voltage comparator U1; The other end of the resistor R2 is connected to one end of the resistor R1 and the power supply respectively; the other end of the resistor R1 is connected to the resistor R4, the capacitor C4 and the pin 1 of the voltage comparator U1 respectively; the other ends of the resistor R4 and the capacitor C4 are grounded; Pin 4 of the voltage comparator U1 is connected to the power supply and one end of the capacitor C1 respectively; the other end of the capacitor C1 is grounded; Pin 5 of the voltage comparator U1 is connected to one end of the resistor R3 and the other end of the resistor R5 respectively; the other end of the resistor R3 is connected to the output circuit for outputting a pulse signal, Pin 2 of the voltage comparator U1 is connected to Pin 6, and Pin 2 and Pin 6 of the voltage comparator U1 are grounded; The other end of the resistor R7 is grounded.

2. A sine wave shaping square wave circuit according to claim 1, characterized in that: The input circuit includes a resistor R6, a resistor R9, a capacitor C2, a capacitor C3, a capacitor C7, a capacitor C8 and a chip CY1; wherein one end of the resistor R6 is connected to the power circuit, and the other end of the resistor R6 is respectively connected to one end of the capacitor C2 and one end of the resistor R9; the other end of the capacitor C2 is respectively connected to one end of the capacitor C3, one end of the capacitor C7 and the No. 2 pin of the chip CY1; The other end of resistor R9 is connected to capacitor C3, the other end of capacitor C7 and pin 1 of chip CY1 respectively; pin 4 of chip CY1 is connected to the power supply and one end of capacitor C8 respectively, and the other end of capacitor C8 is grounded; pin 3 of chip CY1 is connected to capacitor C5.

3. A sine wave shaping square wave circuit according to claim 2, characterized in that: The input circuit also includes a connector J8, wherein pin 1 of the connector J8 is respectively connected to pin 3 of the chip CY1 and the capacitor C5, and pins 2, 3, 4 and 5 of the connector J8 are all grounded.

4. The sine wave shaping square wave circuit according to claim 3, characterized in that: Capacitor C2, capacitor C3, capacitor C7 and pin 2 of chip CY1 are all grounded.

5. A sine wave shaping square wave circuit according to claim 4, characterized in that: The power circuit includes a chip U2, a resistor R8, a resistor R11, a resistor R12, a resistor R13, a capacitor C6 and a capacitor C9; One end of the resistor R11, the resistor R12 and the resistor R13 are all connected to the power supply; the other ends of the resistor R11, the resistor R12 and the resistor R13 are respectively connected to the pins 7, 6 and 5 of the chip U2; the pin 8 of the chip U2 is grounded; Pin 1 of chip U2 is connected to the power supply and one end of capacitor C6 respectively; Pin 2 of chip U2 is connected to one end of capacitor C9 and the power supply voltage respectively; Pin No. 3 of the chip U2 is connected to pin No. 4 of the chip U2 and one end of the resistor R8 respectively, and the other end of the resistor R8 is connected to the resistor R6.

6. The sine wave shaping square wave circuit according to claim 5, characterized in that: The other ends of the capacitor C6 and the capacitor C9 are grounded.

7. The sine wave shaping square wave circuit according to claim 1, characterized in that: The output circuit includes a chip U5 and a capacitor C14, wherein pin 4 of the chip U5 is connected to a power source and the capacitor C14 respectively.

8. The sine wave shaping square wave circuit according to claim 7, characterized in that: Pin 2 of chip U5 and capacitor C14 are both grounded.

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