Data interaction circuit with anti-interference function and corresponding circuit board

Abstract

The utility model provides a data interaction circuit with an anti-interference function and a corresponding circuit board, the data interaction circuit can transmit a first data signal output by a single-chip microcomputer to an external device, and the data interaction circuit can transmit a second data signal output by the external device to the single-chip microcomputer. The isolation module receives the first data signal, can transmit the second data signal to the single-chip microcomputer, and is used for carrying out isolation operation on the first data signal and the second data signal. The Schmidt inverter module is used for suppressing noise interference of the first data signal, the interface module receives the second data signal, and the interface module transmits the first data signal to the external equipment. The high-frequency interference filtering module can filter high-frequency interference of the first data signal and the second data signal, the surge suppression module can suppress surge voltage of the first data signal and the second data signal, and the filtering module can filter the first data signal and the second data signal.

Description

Technical Field

[0001] The utility model relates to the technical field of circuits, and particularly relates to a data interaction circuit with anti-interference function and a corresponding circuit board. Background Art

[0002] In modern society, a single-chip microcomputer can transmit data signals bidirectionally with external devices, so that the single-chip microcomputer and the external devices can communicate with each other. However, during the transmission of data signals, the data signals are vulnerable to noise interference, which makes the data signals prone to distortion. Therefore, there is a technical problem that the data signals are vulnerable to noise interference during the transmission process.

[0003] Therefore, it is necessary to provide a data interaction circuit with anti-interference function and a corresponding circuit board to solve the above technical problems. Summary of the Utility Model

[0004] The utility model provides a data interaction circuit with anti-interference function and a corresponding circuit board, effectively solving the technical problem that the data signals are vulnerable to noise interference during the transmission process.

[0005] The utility model provides a data interaction circuit with anti-interference function, which is used to transmit the first data signal output by the single-chip microcomputer to an external device and transmit the second data signal output by the external device to the single-chip microcomputer, so that the single-chip microcomputer and the external device can communicate with each other based on the data interaction circuit. It includes:

[0006] An isolation module, connected to the single-chip microcomputer, receiving the first data signal and transmitting the second data signal to the single-chip microcomputer, and the isolation module is used to perform isolation operations on the first data signal and the second data signal;

[0007] A Schmitt inverter module, with one end connected to the isolation module and the other end connected to the interface module, for suppressing the noise interference of the first data signal;

[0008] An interface module, connected to the external device, receiving the second data signal and transmitting the first data signal to the external device;

[0009] When the data interaction circuit is in the receiving mode, the isolation module, the Schmitt inverter module and the interface module establish a first transmission channel, and the first transmission channel is used to transmit the first data signal;

[0010] When the data interaction circuit is in the sending mode, the isolation module and the interface module establish a second transmission channel, and the second transmission channel is used to transmit the second data signal;

[0011] A high-frequency interference filtering module, which is connected in parallel with the interface module and is used to filter out the high-frequency interference of the first data signal and the second data signal;

[0012] A surge suppression module, which is connected in parallel with the interface module and is used to suppress the surge voltage of the first data signal and the second data signal;

[0013] A filtering module, which is connected in parallel with the interface module and is used to perform filtering operations on the first data signal and the second data signal.

[0014] Further, the data interaction circuit further includes a discharging module, the discharging module is connected in parallel with the interface module, and the discharging module is used to discharge the electromagnetic interference of the first data signal and the second data signal.

[0015] Further, the data interaction circuit further includes a current limiting module, the current limiting module is connected between the interface module and the external device, and the current limiting module is used to perform current limiting operations on the first data signal and the second data signal.

[0016] Further, the isolation module includes an isolation chip, the isolation chip includes an INB pin and an OUTB pin, the Schmitt inverter module includes a Schmitt inverter, the Schmitt inverter includes a 5A pin and a 3Y pin, the interface module includes an interface chip, and the interface chip includes a DI pin and an input / output pin;

[0017] The INB pin is connected to the single-chip microcomputer, the INB pin is used to input the first data signal, the OUTB pin is used to connect to the 5A pin, the 3Y pin is used to connect to the DI pin, the Schmitt inverter is used to suppress the noise interference of the first data signal, the input / output pin is connected to the external device, and the input / output pin is used to transmit the first data signal to the external device.

[0018] Further, the isolation chip includes an INA pin and an OUTA pin, the interface chip includes an RO pin, the input / output pin is further used to input the second data signal, the INA pin is connected to the RO pin, and the OUTA pin is connected to the single-chip microcomputer, and the OUTA pin is used to transmit the second data signal to the single-chip microcomputer.

[0019] Further, the high-frequency interference filtering module includes a magnetic bead, the magnetic bead is connected in parallel with the input / output pin, and the magnetic bead is used to filter out the high-frequency interference of the first data signal and the second data signal.

[0020] Further, the surge suppression module includes the transient voltage suppression tube, which is connected in parallel with the input / output pin, and the transient voltage suppression tube is used to suppress the surge voltage of the first data signal and the second data signal.

[0021] Further, the filtering module includes a filtering capacitor and a filtering resistor, which are connected in parallel on the input / output pin, and the filtering capacitor and the filtering resistor are used to perform a filtering operation on the first data signal and the second data signal.

[0022] Further, the current limiting module includes the current limiting resistor, which is connected in series with the input / output pin, and the current limiting resistor is used to perform a current limiting operation on the first data signal and the second data signal.

[0023] A circuit board includes the data interaction circuit with anti-interference function described in any one of the above.

[0024] Compared with the prior art, the beneficial effects of the present utility model are as follows: The present utility model provides a data interaction circuit with anti-interference function, which includes an isolation module, a Schmitt inverter module, an interface module, a high-frequency interference filtering module, a surge suppression module, and a filtering module. When the data interaction circuit is in the receiving mode, the isolation module receives the first data signal output by the single-chip microcomputer, and the isolation module can perform an isolation operation on the first data signal. The Schmitt inverter module can suppress the noise interference of the first data signal, and the interface module can output the first data signal to an external device. When the data interaction circuit is in the transmitting mode, the interface module receives the second data signal output by the external device. The isolation module can perform an isolation operation on the second data signal, and the isolation module can transmit the second data signal to the single-chip microcomputer. Moreover, the high-frequency interference filtering module, the surge suppression module, and the filtering module are all connected in parallel with the interface module. The high-frequency interference filtering module filters the high-frequency interference of the first data signal and the second data signal, the surge suppression module can suppress the surge voltage of the first data signal and the second data signal, and the filtering module can perform a filtering operation on the first data signal and the second data signal. Therefore, the data interaction circuit with anti-interference function has strong anti-interference ability. The first data signal and the second data signal are transmitted through this data interaction circuit, which can enhance the anti-interference ability of the first data signal and the second data signal, and improve the reliability of the circuit and the stability of the product. During the signal transmission process, both the first data signal and the second data signal are hardly affected by the interference signal. Furthermore, the data interaction circuit with anti-interference function can effectively solve the technical problem that the data signal is easily affected by noise interference during the transmission process. The circuit structure of the data interaction circuit with anti-interference function is relatively simple, so the design and manufacturing cost of the corresponding circuit board is also relatively low. Brief Description of the Drawings

[0025] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following briefly introduces the drawings required to be used in the embodiments. The drawings in the following description are only the corresponding drawings of some embodiments of the present invention.

[0026] Figure 1 It is a block diagram of an embodiment of a data interaction circuit with anti-interference function of the present invention.

[0027] Figure 2 It is a circuit diagram of an isolation module of an embodiment of a data interaction circuit with anti-interference function of the present invention.

[0028] Figure 3 It is a circuit diagram of a Schmitt inverter module of an embodiment of a data interaction circuit with anti-interference function of the present invention.

[0029] Figure 4 It is one of the circuit diagrams of an interface module of an embodiment of a data interaction circuit with anti-interference function of the present invention.

[0030] Figure 5 It is the second of the circuit diagrams of an interface module of an embodiment of a data interaction circuit with anti-interference function of the present invention.

[0031] Figure 6 It is one of the circuit diagrams of a power supply module of an embodiment of a data interaction circuit with anti-interference function of the present invention.

[0032] Figure 7 It is the second of the circuit diagrams of a power supply module of an embodiment of a data interaction circuit with anti-interference function of the present invention.

[0033] Figure 8 It is a circuit diagram of a discharge module of an embodiment of a data interaction circuit with anti-interference function of the present invention.

[0034] In the figure, 10, data interaction circuit; 11, isolation module; 12, Schmitt inverter module; 13, interface module; 14, high-frequency interference filtering module; 15, surge suppression module; 16, filtering module; 17, discharge module; 171, current limiting module; 18, power supply module; 181, power supply; 19, single-chip microcomputer; 191, external device. Detailed Embodiments

[0035] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative efforts belong to the protection scope of the present invention.

[0036] The directional terms mentioned in the present invention, such as "up", "down", "front", "back", "left", "right", "inside", "outside", "side", "top" and "bottom", etc., are only references to the orientation of the accompanying drawings. The directional terms used are for explaining and understanding the present invention, rather than for limiting the present invention.

[0037] The terms "first", "second", etc. in the present invention are only for descriptive purposes and cannot be understood as indicating or implying relative importance, nor as a limitation on the order of precedence.

[0038] In the figure, units with similar structures are denoted by the same reference numerals.

[0039] Please refer to Figure 1 , the present invention provides a data interaction circuit 10 with anti-interference function. The data interaction circuit 10 is used to transmit the first data signal output by the single-chip microcomputer 19 to the external device 191, and the data interaction circuit 10 can also transmit the second data signal output by the external device 191 to the single-chip microcomputer 19, so that the single-chip microcomputer 19 and the external device 191 can perform interactive communication based on the data interaction circuit 10. The data interaction circuit 10 includes an isolation module 11, a Schmitt inverter module 12, an interface module 13, a high-frequency interference filtering module 14, a surge suppression module 15, a filtering module 16, a discharge module 17, and a current limiting module 171. The data interaction circuit 10 is applied to a circuit board.

[0040] Please refer to Figure 1 , the isolation module 11 is connected to the single-chip microcomputer 19, and the isolation module 11 can receive the first data signal. And the isolation module 11 can also transmit the second data signal to the single-chip microcomputer 19. The isolation module 11 is used to perform isolation operations on the first data signal and the second data signal. One end of the Schmitt inverter module 12 is connected to the isolation module 11, and the other end of the Schmitt inverter module 12 is connected to the interface module 13. The Schmitt inverter module 12 is used to suppress the noise interference of the first data signal. The interface module 13 is connected to the external device 191. The interface module 13 receives the second data signal, and the interface module 13 can also transmit the first data signal to the external device 191.

[0041] Please refer to Figure 1, when the data interaction circuit 10 is in the receiving mode, the isolation module 11, the Schmitt inverter U801 and the interface module 13 establish a first transmission channel for transmitting a first data signal. At this time, the isolation module 11 inputs the first data signal from the single-chip microcomputer 19. Then, the first data signal flows through the Schmitt inverter module 12. Subsequently, the interface module 13 outputs the first data signal to the external device 191. When the data interaction circuit 10 is in the sending mode, the isolation module 11 and the interface module 13 establish a second transmission channel for transmitting a second data signal. At this time, the interface module 13 inputs the second data signal from the external device 191. Then, the interface module 13 transmits the second data signal to the isolation module 11. Subsequently, the isolation module 11 outputs the second data signal to the single-chip microcomputer 19.

[0042] Please refer to Figure 1 , the high-frequency interference filtering module 14 is connected in parallel with the interface module 13, and the high-frequency interference filtering module 14 is used to filter the high-frequency interference of the first data signal and the second data signal. The surge suppression module 15 is connected in parallel with the interface module 13, and the surge suppression module 15 is used to suppress the surge voltage of the first data signal and the second data signal. The filtering module 16 is connected in parallel with the interface module 13, and the filtering module 16 is used to perform a filtering operation on the first data signal and the second data signal. The discharge module 17 is connected in parallel with the interface module 13, and the discharge module 17 is used to discharge the electromagnetic interference of the first data signal and the second data signal. The current limiting module 171 is connected between the interface module 13 and the external device 191, and the current limiting module 171 is used to perform a current limiting operation on the first data signal and the second data signal.

[0043] Please refer to Figures 2 to 8 , the following is a detailed description of the specific structure of the data interaction circuit 10:

[0044] Please refer to Figure 2 、 Figure 3 and Figure 4, the isolation module 11 includes an isolation chip U802, and the isolation chip U802 includes an INB pin and an OUTB pin. The Schmitt inverter U801 includes a Schmitt inverter U801, and the Schmitt inverter U801 includes a 5A pin and a 3Y pin. The interface module 13 includes an interface chip U802, and the interface chip U802 includes a DI pin and an input / output pin. The INB pin is connected to the single-chip microcomputer 19, and the INB pin is used to input the first data signal. The OUTB pin is used to connect to the 5A pin, and the 3Y pin is used to connect to the DI pin. The Schmitt inverter U801 is used to suppress the noise interference of the first data signal. The input / output pin is connected to the external device 191, and the input / output pin is used to transmit the first data signal to the external device 191. Among them, the input / output pin includes an input / output pin A and an input / output pin B. Moreover, the isolation module 11 further includes capacitors C806, C807, C808, and C809. The isolation chip U802 further includes a VDD1 pin, and this VDD1 pin is connected to an external power supply VCC3.3 of 3.3V. The isolation chip U802 adopts capacitive coupling technology, and the isolation chip U802 can isolate and process the first data signal. Thus, it is possible to avoid damage to the subsequent circuit components due to excessive voltage value of the first data signal. Moreover, the first data signal is transmitted through the isolation chip U802, which can effectively accelerate the transmission speed of the first data signal.

[0045] Please refer to Figure 2 , Figure 3 and Figure 4 , the first data signal can be input from the 5A pin. After being inverted twice by the Schmitt inverter U801, the first data signal is output from the 3Y pin. After being inverted three times by the Schmitt inverter U801, an enable signal is generated, and the enable signal can be output from the 6Y pin of the Schmitt inverter U801. The interface chip U802 further includes an RE pin, and this RE pin is connected to the 6Y pin. The RE pin is used to receive the enable signal. The enable signal can control the interface chip U802 to be turned on or off. When the interface chip U802 is turned on, the interface chip U802 can input or output signals, so that the interface chip U802 can transmit signals. When the interface chip U802 is turned off, the interface chip U802 cannot input or output signals, and thus the interface chip U802 cannot transmit signals. Moreover, the Schmitt inverter module further includes a capacitor C811, a resistor R80, and a switching diode D805. The resistor R806 and the capacitor C811 can be used for RC delay, and the switching diode D805 can play a freewheeling role. The enable signal is generated by the Schmitt inverter U801 and the RC delay capacitor C811 and resistor R80, and the Schmitt inverter has good anti-interference ability. The Schmitt inverter U801 can effectively suppress the noise interference of the first data signal.

[0046] Please refer to Figure 2 , Figure 3 and Figure 4 , the single-chip computer 19 can output the first data signal. The I NB pin of the isolation chip U802 receives the first data signal, the isolation chip U802 can isolate the first data signal, and the isolation chip U802 outputs the isolated first data signal through the INA pin. The first data signal can be input into the Schmitt inverter U801 from the 5A pin, the Schmitt inverter U801 can suppress the noise interference of the first data signal, and the first data signal after suppressing the noise interference can be output from the 3Y pin. Moreover, the DI pin of the interface chip U802 receives the first data signal, and the interface chip U802 can transmit the first data signal to the external device 191 through the input / output pin.

[0047] Please refer to Figure 2 , Figure 3 and Figure 4 , the isolation chip U802 includes an I NA pin and an OUTA pin, and the interface chip U802 includes an RO pin. The input / output pin is also used to input a second data signal, and the I NA pin is connected to the RO pin. The OUTA pin is connected to the single-chip microcomputer 19, and the OUTA pin is used to transmit the second data signal to the single-chip microcomputer 19. Among them, the external device 191 outputs a second data signal. The input / output pin receives the second data signal, and the interface module 13 transmits the second data signal to the isolation chip U802 through the RO pin. The isolation chip U802 receives the second data signal through the I NA pin, and the isolation chip U802 can isolate the second data signal, thereby preventing the voltage value of the second data signal from being too large and damaging the single-chip microcomputer 19. In addition, the isolation chip U802 can transmit the second data signal to the single-chip microcomputer 19 through the OUTA pin. The interface chip U802 uses a combination of a balanced driver and a differential receiver for signal transmission, so the interface chip U802 has a strong ability to resist common-mode interference.

[0048] Please refer to Figure 4 and Figure 5 , the interface module 13 also includes a pull-up resistor R808, a pull-down resistor R802 and a resistor R804, and the resistor R804 is connected to the RO pin. When the interface chip U802 is in an idle state, the pull-up resistor R808 can fix the input / output pin A at a high level, and the pull-down resistor R802 can fix the input / output pin B at a low level. Moreover, the interface module 13 is also provided with a resistor R804. The interface module 13 also includes an interface J801, and the interface J801 connects the input / output pin A and the input / output pin B, and the external device 191 can be connected to the interface chip U802 through the interface J801.

[0049] Please refer toFigure 6 and Figure 7 The data interaction circuit 10 further includes a power supply module 18. The power supply module 18 is connected to a power supply 181 which can output a power supply voltage, and the power supply 181 can also supply power to the interface J801. The power supply module 18 further includes a power isolation chip MD801 which includes a VO+ pin and a +Vin pin. The VO+ pin is connected to the power supply 181 and is used for inputting the power supply voltage. The power isolation chip MD801 can perform isolation operation on the power supply 181, so that the setting of the power isolation chip MD801 can prevent circuit elements at the subsequent stage from being damaged due to excessive voltage value of the power supply voltage. The power isolation chip MD801 can perform voltage regulation operation on the power supply voltage, so that the +Vin pin can output a stable power supply voltage, and the voltage value of the power supply voltage is 5V. Moreover, the +Vin pin is respectively connected to the VDD2 pin of the isolation chip U802, the VCC pin of U801, and the VCC pin of the interface chip U803, and the power supply voltage can supply power to the isolation chip U802, the Schmitt inverter U801, and the interface chip U802.

[0050] Please refer to Figure 6 and Figure 7 The power supply module 18 further includes a transient voltage suppression diode D802 which is used for surge protection of the power isolation chip MD801. The power supply module 18 further includes a diode D801 which is used to prevent reverse voltage from being transmitted to the power supply 181. The power supply module 18 further includes capacitors E801, C805, C801, C802, C803, and C804 which are used for filtering the power supply voltage of different frequencies. And, a resistor R801 is also provided in the power supply module 18, and the resistor R801 can be used to prevent the power supply voltage from fluctuating when the power supply module 18 is unloaded.

[0051] Please refer to Figure 4, the high-frequency interference filtering module 14 includes magnetic beads. The magnetic beads are connected in parallel with the input / output pins and are used to filter the high-frequency interference of the first data signal and the second data signal. The magnetic beads include magnetic bead FB802 and magnetic bead FB801. The magnetic bead FB802 is connected to the input / output pin A, and the magnetic bead FB801 is connected to the input / output pin B. When the input / output pin outputs the first data signal, the magnetic beads can suppress the high-frequency interference of the first data signal. Since the magnetic beads can filter the high-frequency interference of the first data signal, the quality of the first data signal can be improved. When the input / output pin inputs the second data signal, the magnetic beads can suppress the high-frequency interference of the second data signal. Since the magnetic beads can filter the high-frequency interference of the second data signal, the quality of the second data signal can be improved.

[0052] Please refer to Figure 4 , the surge suppression module 15 includes transient voltage suppression diodes. The transient voltage suppression diodes are connected in parallel with the input / output pins. The transient voltage suppression diodes are used to suppress the surge voltage of the first data signal and the second data signal. The transient voltage suppression diodes include transient voltage suppression diode D803, transient voltage suppression diode D804, transient voltage suppression diode D807, and transient voltage suppression diode D806. When the input / output pin outputs the first data signal, the transient voltage suppression diodes can suppress the surge voltage of the first data signal. When the input / output pin inputs the second data signal, the transient voltage suppression diodes can suppress the surge voltage of the second data signal. The transient voltage suppression diodes can absorb the transient high-energy impact and clamp the voltage across the interface chip U802, thereby effectively protecting the subsequent circuit.

[0053] Please refer to Figure 4 , the filtering module 16 includes filtering capacitor C810 and filtering resistor R805. The filtering capacitor C810 and the filtering resistor R805 are connected in parallel to the input / output pins and are used to filter the first data signal and the second data signal. When the input / output pin outputs the first data signal, the filtering capacitor C810 and the filtering resistor R805 can filter the first data signal. The filtering capacitor C810 and the filtering resistor R805 can filter out interference components such as clutter and noise in the first data signal. Therefore, the first data signal can be stably output to the external device 191. When the input / output pin inputs the second data signal, the filtering capacitor C810 and the filtering resistor R805 can filter the second data signal. The filtering capacitor C810 and the filtering resistor R805 can filter out interference components such as clutter and noise in the second data signal. Therefore, the second data signal can be stably input to the interface chip U802.

[0054] Please refer to Figure 4, the current limiting module 171 includes current limiting resistors, which are connected in series with the input / output pins. The current limiting resistors are used to perform current limiting operations on the first data signal and the second data signal. The current limiting resistors include current limiting resistor R803 and current limiting resistor R807. Resistor R807 is connected to input / output pin A, and resistor R803 is connected to input / output pin B. When the input / output pin outputs the first data signal, the current limiting resistor can perform a current limiting operation on the first data signal, thereby avoiding damage to external devices due to excessive current value of the first data signal. When the input / output pin inputs the second data signal, the current limiting resistor can perform a current limiting operation on the second data signal, thereby avoiding damage to interface chip U802 due to excessive current value of the second data signal.

[0055] Please refer to Figure 4 and Figure 8 , the discharging module 17 includes discharging resistors and discharging capacitors. The interface module 13 includes a protective grounding terminal PE and a wire grounding terminal GND_1. The wire grounding terminal is connected to the GND pin of interface chip U802, and the protective grounding terminal is connected to a transient voltage suppression diode. The discharging resistor is connected between the protective grounding terminal PE and the wire grounding terminal GND_1, and the discharging capacitor is connected between the protective grounding terminal PE and the wire grounding terminal GND_1. The discharging capacitor is connected in parallel with the discharging resistor. The discharging resistors include discharging resistor R809 and discharging resistor R810, and the discharging capacitors include discharging capacitor C812 and discharging capacitor C813. When the input / output pin outputs the first data signal, the discharging resistor and the discharging capacitor can discharge the electromagnetic interference of the first data signal. When the input / output pin inputs the second data signal, the discharging resistor and the discharging capacitor can discharge the electromagnetic interference of the second data signal. Since the discharging capacitor and the discharging resistor can filter out the electromagnetic interference of the signal, the setting of the discharging capacitor and the discharging resistor is beneficial to enhancing the anti-interference ability of the data interaction circuit 10.

[0056] The working principle of the present utility model is as follows: When the data interaction circuit 10 is in the receiving mode, the single-chip microcomputer 19 can output the first data signal. The I NB pin of the isolation chip U802 receives the first data signal. The isolation chip U802 can perform isolation processing on the first data signal, and the isolation chip U802 outputs the isolated first data signal through the I NA pin. The first data signal can be input into the Schmitt inverter U801 from the 5A pin. The Schmitt inverter U801 can suppress the noise interference of the first data signal, and the first data signal after suppressing the noise interference can be output from the 3Y pin of the Schmitt inverter U801. Moreover, the DI pin of the interface chip U802 receives the first data signal, and the interface chip U802 can transmit the first data signal to the external device 191 through the input / output pin.

[0057] When the data interaction circuit 10 is in the receiving mode, the external device 191 outputs a second data signal. The input / output pin receives the second data signal, and the interface module 13 transmits the second data signal to the isolation chip U802 through the RO pin. The isolation chip U802 receives the second data signal through the I NA pin, and the isolation chip U802 can perform isolation processing on the second data signal. Moreover, the isolation chip U802 can transmit the isolated second data signal to the single-chip microcomputer 19 through the OUTA pin.

[0058] To filter out the high-frequency interference of the first data signal and the second data signal, a high-frequency interference filtering module 14 is connected in parallel to the interface module 13. To suppress the surge voltage of the first data signal and the second data signal, a surge suppression module 15 is connected in parallel to the interface module 13. To perform filtering operations on the first data signal and the second data signal, a filtering module 16 is connected in parallel to the interface module 13. Since the interface module 13 is connected in parallel to the discharge module 17, the discharge module 17 can discharge the electromagnetic interference of the first data signal and the second data signal. Since the interface module 13 is connected in parallel to the current limiting module 171, the current limiting module 171 can perform current limiting operations on the first data signal and the second data signal.

[0059] The utility model provides a data interaction circuit with anti-interference function. The data interaction circuit includes an isolation module, a Schmitt inverter module, an interface module, a high-frequency interference filtering module, a surge suppression module, and a filtering module. When the data interaction circuit is in the receiving mode, the isolation module receives the first data signal output by the single-chip microcomputer, and the isolation module can perform isolation operation on the first data signal. The Schmitt inverter module can suppress the noise interference of the first data signal, and the interface module can output the first data signal to an external device. When the data interaction circuit is in the sending mode, the interface module receives the second data signal output by the external device. The isolation module can perform isolation operation on the second data signal, and the isolation module can transmit the second data signal to the single-chip microcomputer. Moreover, the high-frequency interference filtering module, the surge suppression module, and the filtering module are all connected in parallel with the interface module. The high-frequency interference filtering module filters the high-frequency interference of the first data signal and the second data signal, the surge suppression module can suppress the surge voltage of the first data signal and the second data signal, and the filtering module can perform filtering operation on the first data signal and the second data signal. Therefore, the data interaction circuit with anti-interference function has strong anti-interference ability. The first data signal and the second data signal are transmitted through the data interaction circuit, which can enhance the anti-interference ability of the first data signal and the second data signal, and improve the reliability of the circuit and the stability of the product. During the signal transmission process, it is difficult for the first data signal and the second data signal to be adversely affected by interference signals. Furthermore, the data interaction circuit with anti-interference function can effectively solve the technical problem that data signals are vulnerable to noise interference during the transmission process. The circuit structure of the data interaction circuit with anti-interference function is relatively simple, so the design and manufacturing cost of the corresponding circuit board is also relatively low.

[0060] In summary, although the present utility model has been disclosed above with preferred embodiments, the above preferred embodiments are not intended to limit the present utility model. Those of ordinary skill in the art can make various changes and modifications without departing from the spirit and scope of the present utility model. Therefore, the protection scope of the present utility model is subject to the scope defined by the claims.

Claims

1. A data interaction circuit with anti-interference function, characterized in that: It is used to transmit the first data signal output by the single-chip microcomputer to the external device, and transmit the second data signal output by the external device to the single-chip microcomputer, so that the single-chip microcomputer and the external device can communicate interactively based on the data interaction circuit, which includes: an isolation module connected to the single-chip microcomputer, the isolation module receiving the first data signal and transmitting the second data signal to the single-chip microcomputer, the isolation module being used to perform an isolation operation on the first data signal and the second data signal; A Schmidt inverter module, one end of which is connected to the isolation module and the other end of which is connected to the interface module, and is used to suppress noise interference of the first data signal; an interface module connected to the external device, the interface module receiving the second data signal and transmitting the first data signal to the external device; When the data interaction circuit is in a receiving mode, the isolation module, the Schmidt inverter module and the interface module establish a first transmission channel, where the first transmission channel is used to transmit the first data signal; When the data interaction circuit is in a sending mode, the isolation module and the interface module establish a second transmission channel, and the second transmission channel is used to transmit the second data signal; A high-frequency interference filtering module, connected in parallel with the interface module, and configured to filter out high-frequency interference of the first data signal and the second data signal; A surge suppression module, connected in parallel with the interface module, and configured to suppress surge voltages of the first data signal and the second data signal; A filtering module is connected in parallel with the interface module and is used to perform filtering operations on the first data signal and the second data signal.

2. The data interaction circuit with anti-interference function according to claim 1, characterized in that: The data interaction circuit further includes a discharge module, which is connected in parallel with the interface module and is used for discharging electromagnetic interference of the first data signal and the second data signal.

3. The data interaction circuit with anti-interference function according to claim 2, characterized in that: The data interaction circuit also includes a current limiting module, which is connected between the interface module and the external device, and is used to perform current limiting operations on the first data signal and the second data signal.

4. The data interaction circuit with anti-interference function according to claim 3, characterized in that: The isolation module includes an isolation chip, the isolation chip includes an INB pin and an OUTB pin, the Schmidt inverter module includes a Schmidt inverter, the Schmidt inverter includes a 5A pin and a 3Y pin, the interface module includes an interface chip, the interface chip includes a DI pin and an input / output pin; The INB pin is connected to the single-chip microcomputer, the INB pin is used to input the first data signal, the OUTB pin is used to connect to the 5A pin, the 3Y pin is used to connect to the DI pin, the Schmitt inverter is used to suppress noise interference of the first data signal, the input / output pin is connected to an external device, and the input / output pin is used to transmit the first data signal to the external device.

5. The data interaction circuit with anti-interference function according to claim 4, characterized in that: The isolation chip includes an INA pin and an OUTA pin, the interface chip includes an RO pin, the input / output pin is also used to input the second data signal, the INA pin is connected to the RO pin, the OUTA pin is connected to the single-chip microcomputer, and the OUTA pin is used to transmit the second data signal to the single-chip microcomputer.

6. The data interaction circuit with anti-interference function according to claim 5, characterized in that: The high-frequency interference filtering module includes magnetic beads, which are connected in parallel with the input / output pins and are used to filter out high-frequency interference of the first data signal and the second data signal.

7. The data interaction circuit with anti-interference function according to claim 5, characterized in that: The surge suppression module includes a transient voltage suppression tube, which is connected in parallel with the input / output pin and is used to suppress surge voltages of the first data signal and the second data signal.

8. The data interaction circuit with anti-interference function according to claim 5, characterized in that: The filtering module includes a filtering capacitor and a filtering resistor, the filtering capacitor and the filtering resistor are connected in parallel to the input / output pin, and the filtering capacitor and the filtering resistor are used to perform filtering operations on the first data signal and the second data signal.

9. The data interaction circuit with anti-interference function according to claim 5, characterized in that: The current limiting module includes a current limiting resistor, which is connected in series with the input / output pin, and is used to perform current limiting operations on the first data signal and the second data signal.

10. A circuit board, characterized in that: It includes the data interaction circuit with anti-interference function as described in any one of claims 1-9.

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