Capacitor discharge control circuit

Abstract

The utility model discloses a capacitor discharge control circuit, which comprises a delay trigger module, a switch module and a discharge module, and is characterized in that the discharge module is connected with an energy storage capacitor; wherein the delay trigger module is used for receiving a control signal (V signal), and when the control signal lasts for a preset time length, the switch module is controlled to be switched on; and after the switch module is switched on, the discharge module is controlled to discharge the energy storage capacitor. The application of the circuit realizes the improvement of the reliability, completely avoids the competition risk problem caused by the absence of a discharge loop in the energy storage capacitor, and improves the competitiveness of the product.

Description

Technical Field

[0001] The utility model relates to the technical field of power electronics, in particular to a capacitor discharge control circuit. Background Art

[0002] Energy storage capacitors play an important role in circuit systems. Most of them play the role of energy storage, smoothing filtering, suppressing spike pulses, impedance matching, stabilizing the system, suppressing interference, and improving the system power-off retention time. Based on the above reasons, the use of energy storage capacitors is indispensable in most applications. Regardless of its use location, the capacity of energy storage capacitors is generally large. Usually, in order to save costs, the energy storage capacitors are generally not equipped with discharge circuits. This will cause the energy storage capacitors to be unable to discharge for a long time. If the system is powered again at this time, due to the existence of charge energy and residual pressure in the energy storage capacitors, various problems will arise.

[0003] For example 1: In the module power automatic measurement and control system, due to the long distance between the test system power supply and the tested power supply, a long input lead will be introduced. The long lead will cause the input impedance to become larger and mismatched, and impedance mismatch will occur in the test of some modules that are sensitive to line impedance. To solve the impedance mismatch problem, it is necessary to connect an energy storage capacitor in parallel to the input end of the tested power supply. However, with the introduction of the energy storage capacitor, the test system cannot discharge the energy storage capacitor. When a new module under test is connected, sparking will occur, making it impossible to perform automated testing and reducing production efficiency.

[0004] Example 2: If the voltage of the energy storage capacitor is involved in the voltage acquisition and logic control circuit, the residual voltage will bring competition risks to the logic control circuit, thus causing the control circuit to lose control. At the very least, it will cause circuit malfunction or even damage to circuit components, and it is not ruled out that it will damage the equipment and cause unnecessary losses.

[0005] Example 3: In the existing cases of secondary-side synchronous rectification drive in active embedded forward topology, the power supply of synchronous rectification driver IC has not been specially delayed to start control. When the output is unloaded and the output has a large capacitance, the input power supply is immediately connected again after the input power is off. This working state is called pre-biased startup. When the synchronous rectifier freewheeling tube driving pulse width is started again, it is in a very high duty cycle state. At this time, the energy of the output capacitor forms a backflow phenomenon through the turned-on freewheeling tube and the energy storage inductor, and because the duty cycle is very large, it is close to DC. Therefore, the output capacitor is equivalent to being short-circuited by the energy storage inductor (the freewheeling tube is turned on). The ultra-high short-circuit current will instantly break down the freewheeling tube. This phenomenon makes the product have no pre-biased startup capability. In specific applications, if the power is turned off at no load and the output has a large capacitance, when the capacitor is not fully discharged, the input power supply is turned on again, and the freewheeling tube of the power module is likely to break down instantly, causing damage.

[0006] For the above reasons, when the energy storage capacitor must be large, a smart capacitor discharge circuit after power-off needs to be added to ensure the reliable operation and safe operation of other devices in the power supply system. Content of the Utility Model

[0007] In view of the defects in the prior art, the utility model provides a capacitor discharge control circuit to solve the technical problems proposed in the background art.

[0008] A capacitor discharge control circuit includes a delay trigger module, a switch module, and a discharge module. The discharge module is connected to the energy storage capacitor. Among them,

[0009] The delay trigger module receives a control signal and controls the switch module to conduct after the control signal lasts for a preset duration. After the switch module conducts, it controls the discharge module to discharge the energy storage capacitor.

[0010] Further, the delay trigger module includes a comparator N1, a ninth resistor R9, a tenth resistor R10, a second capacitor C2, and a third diode VD3. The ninth resistor R9 is connected in series between the non-inverting input terminal of the comparator N1 and the control signal input port. The tenth resistor R10 is connected between the output terminal and the non-inverting input terminal of the comparator N1. The second capacitor C2 is connected between the non-inverting input terminal of the comparator N1 and the ground. The third diode VD3 is connected between the non-inverting input terminal of the comparator N1 and the control signal input port.

[0011] Further, the switch module includes a first MOS transistor VM1, a triode VT1, a first resistor R1, and a sixth resistor R6.

[0012] The gate of the first MOS transistor VM1 is connected to the output terminal of the comparator N1. The source of the first MOS transistor VM1 is grounded. The first resistor R1 and the sixth resistor R6 are connected in series between the drain of the first MOS transistor VM1 and the auxiliary power supply Vcc.

[0013] The triode VT1 is a PNP-type triode. The base of the triode VT1 is connected between the first resistor R1 and the sixth resistor R6. The emitter of the triode VT1 is connected to the auxiliary power supply Vcc. The collector of the triode VT1 is connected to the discharge module.

[0014] Further, a seventh resistor R7 and a second diode VD2 are connected in parallel between the gate of the first MOS transistor VM1 and the output terminal of the comparator N1. A third capacitor C3 and an eighth resistor R8 are connected in parallel between the gate of the first MOS transistor VM1 and the ground.

[0015] Further, the discharge module includes a second MOS transistor VM2, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, and a first diode VD1. The second resistor R2 and the fifth resistor R5 are connected in series between the collector of the triode VT1 and the ground. The gate of the second MOS transistor VM2 is connected between the second resistor R2 and the fifth resistor R5. The source of the second MOS transistor VM2 is grounded. The third resistor R3 and the fourth resistor R4 are connected in parallel between the drain of the second MOS transistor VM2 and the energy storage capacitor;

[0016] The first diode VD1 is connected between the gate of the second MOS transistor VM2 and the control signal input port.

[0017] Further, a first capacitor C1 is connected between the gate of the second MOS transistor VM2 and the ground.

[0018] The beneficial effects of the present utility model are as follows:

[0019] The capacitor discharge control circuit provided by the present application can solve the problem that the module power supply with high source impedance requirements cannot be tested when the test module power supply of the automated test system is tested, thereby improving production efficiency. The capacitor discharge control circuit provided by the present application can also be applied to discharge the PFC energy storage capacitor, thereby accelerating the release of the energy storage capacitor's charge to avoid triggering the chip restart mechanism during no-load undervoltage shutdown and unable to quickly and reliably shut down the system. The capacitor discharge control circuit provided by the present application can also be used to improve the reverse injection problem that may occur in the application of pre-biased secondary synchronous rectification, and then cooperate with the addition of delayed startup on the primary side of the power supply.

[0020] In summary, the application of this circuit realizes the improvement of reliability, completely avoids the race hazard problem caused by the lack of a discharge circuit for the energy storage capacitor, and enhances the competitiveness of the product. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the following will briefly introduce the drawings required for use in the description of the specific embodiments or the prior art. In all the drawings, similar elements or parts are generally denoted by similar reference numerals. In the drawings, the elements or parts are not necessarily drawn to actual scale.

[0022] The drawings herein are incorporated into the specification and form a part of this specification, showing embodiments consistent with the present application, and are used together with the specification to explain the principles of the present application. For those of ordinary skill in the art, other drawings can also be obtained based on these drawings without creative efforts.

[0023] Figure 1Schematic diagram of a capacitor discharge control circuit provided by an embodiment of the present utility model;

[0024] Figure 2 Circuit diagram of a capacitor discharge control circuit provided by an embodiment of the present utility model;

[0025] The realization of the purpose of this application, functional features and advantages will be further described in conjunction with the embodiments with reference to the accompanying drawings. Through the above-mentioned accompanying drawings, specific embodiments of this application have been shown, and there will be more detailed descriptions hereinafter. These drawings and textual descriptions are not intended to limit the scope of the concept of this application in any way, but to illustrate the concept of this application to those skilled in the art by referring to specific embodiments. Specific embodiments

[0026] The embodiments of the technical solution of the present invention will be described in detail below with reference to the accompanying drawings. The following embodiments are only used to illustrate the technical solution of the present invention more clearly, so they are only examples and cannot be used to limit the protection scope of the present invention.

[0027] It should be noted that unless otherwise specified, the technical terms or scientific terms used in this application should have the ordinary meanings understood by those skilled in the art to which the present invention belongs.

[0028] In the description of this application, it should be understood that the orientation or positional relationships indicated by the terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. are based on the orientation or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation of the present invention.

[0029] In addition, the terms "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. In the description of the present invention, the meaning of "a plurality" is more than two unless otherwise specifically defined.

[0030] In this application, unless otherwise clearly defined or limited, terms such as "installed", "connected", "linked", "fixed", etc. shall be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or integrated; it can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, and it can be the communication inside two components or the interaction relationship between two components. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0031] In this application, unless otherwise clearly defined or limited, the first feature being "on" or "under" the second feature can be that the first and second features are in direct contact, or the first and second features are indirectly in contact through an intermediate medium. Moreover, the first feature being "above", "over" and "on top of" the second feature can be that the first feature is directly above or obliquely above the second feature, or simply means that the horizontal height of the first feature is higher than that of the second feature. The first feature being "under", "beneath" and "underneath" the second feature can be that the first feature is directly below or obliquely below the second feature, or simply means that the horizontal height of the first feature is less than that of the second feature.

[0032] As Figure 1 shown, a structural schematic diagram of a capacitor discharge control circuit provided by the present utility model includes a delay trigger module, a switch module and a discharge module, and the discharge module is connected to an energy storage capacitor. Among them, the delay trigger module receives a control signal (V discharge signal), and when the control signal lasts for a preset duration, it controls the switch module to conduct. Due to the delay effect of the delay trigger module, misoperation can be avoided. After the switch module conducts, it controls the discharge module to discharge the energy storage capacitor.

[0033] As Figure 2 shown, the delay trigger module includes a comparator N1, a ninth resistor R9, a tenth resistor R10, a second capacitor C2 and a third diode VD3. The ninth resistor R9 is connected in series between the non-inverting input terminal of the comparator N1 and the control signal input port. The tenth resistor R10 is connected between the output terminal and the non-inverting input terminal of the comparator N1. The second capacitor C2 is connected between the non-inverting input terminal of the comparator N1 and the ground. The third diode VD3 is connected between the non-inverting input terminal of the comparator N1 and the control signal input port. The inverting input terminal of the comparator N1 is connected to the reference voltage Vcc / 2.

[0034] V discharge is the port of the energy storage capacitor to be discharged; V discharge signal represents the control signal. When the control signal is a low-level signal, the second capacitor C2 discharges towards the control signal input port through the third diode VD3.

[0035] As Figure 2 shown, R9 and C2 determine the delay time constant and are compared with Vcc / 2. VD3 is the discharge diode of C2. R10 is the positive feedback hysteresis resistance. When the V discharge signal port is at a high level and the high level lasts for a period of time, when the non-inverting input voltage of N1 is higher than the inverting input voltage Vcc / 2, N1 outputs a high level. When the V discharge signal port is at a low level, the second capacitor C2 discharges through the third diode VD3, making the second capacitor C2 not charged, ensuring that the delay trigger module has a delay trigger function.

[0036] Furthermore, the switch module includes a first MOS transistor VM1, a triode VT1, a first resistor R1, and a sixth resistor R6; the gate of the first MOS transistor VM1 is connected to the output terminal of the comparator N1, the source of the first MOS transistor VM1 is grounded, and the first resistor R1 and the sixth resistor R6 are connected in series between the drain of the first MOS transistor VM1 and the auxiliary power supply Vcc; the triode VT1 is a PNP-type triode, the base of the triode VT1 is connected between the first resistor R1 and the sixth resistor R6, the emitter of the triode VT1 is connected to the auxiliary power supply Vcc, and the collector of the triode VT1 is connected to the discharge module.

[0037] Furthermore, a seventh resistor R7 and a second diode VD2 are connected in parallel between the gate of the first MOS transistor VM1 and the output terminal of the comparator N1, and a third capacitor C3 and an eighth resistor R8 are connected in parallel between the gate of the first MOS transistor VM1 and the ground. C3 is a bypass capacitor, and VD2 is the discharge diode of C3.

[0038] Furthermore, the discharge module includes a second MOS transistor VM2, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, and a first diode VD1. The second resistor R2 and the fifth resistor R5 are connected in series between the collector of the triode VT1 and the ground. The gate of the second MOS transistor VM2 is connected between the second resistor R2 and the fifth resistor R5. The source of the second MOS transistor VM2 is grounded. The third resistor R3 and the fourth resistor R4 are connected in parallel between the drain of the second MOS transistor VM2 and the energy storage capacitor. R3 and R4 are bleeder resistors for current limiting when discharging the energy storage capacitor.

[0039] The first diode VD1 is connected between the gate of the second MOS transistor VM2 and the control signal input port. When the control signal is a low-level signal, it can quickly turn off the second MOS transistor VM2 and stop discharging the energy storage capacitor.

[0040] Further, a first capacitor C1 is connected between the gate of the second MOS transistor VM2 and the ground. The first capacitor C1 plays a voltage stabilizing role. At the same time, the first capacitor C1 can also discharge through the first diode VD1.

[0041] Working principle:

[0042] The final behavior of the power MOS VM2 is controlled by collecting the level of the control signal V discharge signal port. When the V discharge signal port is at a low level, the VM2 MOS is quickly turned off, and the dead load R3 in parallel with R4 and the Vdischarge port stop discharging the energy storage capacitor. On the contrary, when the Vdischarge signal port is at a high level and the high level lasts for a period of time, when the in-phase input voltage of N1 is higher than the anti-phase input voltage Vcc / 2, N1 outputs a high level.

[0043] The high level output by N1 is divided and sent to the gate of VM1. When the turn-on voltage of VM1 is reached, the drain of VM1 outputs a low potential, so that R1 and R6 divide Vcc, and thus VT1 is turned on, and R2 and R5 divide Vcc.

[0044] When the voltage on R5 is higher than the turn-on voltage of VM2, VM2 conducts, and the external energy storage capacitor of the V discharge port can be discharged. The discharge loop is R3 in parallel with R4, the conduction of VM2, and the GND port.

[0045] In summary, the capacitor discharge control circuit provided by the present application can solve the problem that the module power supply with high source impedance requirements cannot be tested when the test module power supply of the automated test system, thereby improving production efficiency; the capacitor discharge control circuit provided by the present application can also be applied to discharge the PFC energy storage capacitor, thereby accelerating the release of the energy storage capacitor's charge to avoid triggering the chip restart mechanism during no-load undervoltage shutdown and unable to quickly and reliably turn off the system; the capacitor discharge control circuit provided by the present application can also be used to improve the reverse injection problem that may occur in the pre-biased secondary synchronous rectification application. By adding a delay to the power source side, the pre-biased start can be achieved.

[0046] In summary, the application of this circuit realizes the improvement of reliability, completely avoids the race hazard problem caused by the lack of a discharge loop for the energy storage capacitor, and improves the competitiveness of the product.

[0047] Finally, it should be noted that: the technical features of the technical solution of the present application can be combined arbitrarily. For the sake of brevity of description, all possible combinations of the above technical features in the above embodiments are not described. However, as long as the combinations of these technical features do not conflict, they should be considered as within the scope recorded in the present application.

[0048] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements on some or all of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present invention, and they should all be covered within the scope of the claims and the description of the present invention.

Claims

1. A capacitor discharge control circuit, characterized in that: It includes a delay trigger module, a switch module and a discharge module, wherein the discharge module is connected to the energy storage capacitor; wherein, The delay trigger module receives a control signal, and controls the switch module to turn on when the control signal lasts for a preset time; after the switch module is turned on, the discharge module is controlled to discharge the energy storage capacitor; The delay trigger module includes a comparator N1, a ninth resistor R9, a tenth resistor R10, a second capacitor C2 and a third diode VD3, the ninth resistor R9 is connected in series between the non-inverting input terminal and the control signal input port of the comparator N1, the tenth resistor R10 is connected between the output terminal and the non-inverting input terminal of the comparator N1, the second capacitor C2 is connected between the non-inverting input terminal of the comparator N1 and ground, and the third diode VD3 is connected between the non-inverting input terminal and the control signal input port of the comparator N1.

2. A capacitor discharge control circuit according to claim 1, characterized in that: The switch module includes a first MOS transistor VM1, a transistor VT1, a first resistor R1, and a sixth resistor R6; The gate of the first MOS transistor VM1 is connected to the output end of the comparator N1, the source of the first MOS transistor VM1 is grounded, and the first resistor R1 and the sixth resistor R6 are connected in series between the drain of the first MOS transistor VM1 and the auxiliary power supply Vcc; The transistor VT1 is a PNP transistor, the base of the transistor VT1 is connected between the first resistor R1 and the sixth resistor R6, the emitter of the transistor VT1 is connected to the auxiliary power supply Vcc, and the collector of the transistor VT1 is connected to the discharge module.

3. A capacitor discharge control circuit according to claim 2, characterized in that: A seventh resistor R7 and a second diode VD2 are connected in parallel between the gate of the first MOS transistor VM1 and the output end of the comparator N1 , and a third capacitor C3 and an eighth resistor R8 are connected in parallel between the gate of the first MOS transistor VM1 and the ground.

4. A capacitor discharge control circuit according to claim 2, characterized in that: The discharge module includes a second MOS transistor VM2, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5 and a first diode VD1, the second resistor R2 and the fifth resistor R5 are connected in series between the collector of the transistor VT1 and the ground, the gate of the second MOS transistor VM2 is connected between the second resistor R2 and the fifth resistor R5, the source of the second MOS transistor VM2 is grounded, and the third resistor R3 and the fourth resistor R4 are connected in parallel between the drain of the second MOS transistor VM2 and the energy storage capacitor; The first diode VD1 is connected between the gate of the second MOS transistor VM2 and a control signal input port.

5. A capacitor discharge control circuit according to claim 4, characterized in that: A first capacitor C1 is connected between the gate of the second MOS transistor VM2 and the ground.

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