High-voltage interlocking fault detection device and vehicle

Abstract

The utility model discloses a high-voltage interlocking fault detection device and a vehicle. The high-voltage interlocking fault detection device comprises a high-voltage interlocking detection string, a coding unit and a fault detection unit. Wherein the first end of the high-voltage interlocking detection string is connected with a first power supply, the second end of the high-voltage interlocking detection string is grounded, the high-voltage interlocking detection string comprises a plurality of high-voltage interlocking detection units which are connected in series, and each high-voltage interlocking detection unit comprises an interlocking component and detection subunits which are connected to the two ends of the interlocking component in parallel. The detection end of the detection subunit is used for outputting an interlocking state signal; the coding unit comprises a plurality of first input ends and a plurality of output ends, each first input end is connected with one detection end, and the coding unit is used for coding the interlocking state signals output by all the detection subunits to obtain interlocking fault signals; and the fault detection unit is connected with a plurality of output ends of the coding unit. By means of the mode, the faulty interlocking component can be accurately detected.

Description

Technical Field

[0001] This application relates to the technical field of vehicles, and particularly to a high-voltage interlock fault detection device and a vehicle. Background Art

[0002] High-voltage interlock (HVIL, High Voltage Inter-lock) is an important safety function for electric vehicles or hybrid vehicles. Its main function is to monitor the connection status of high-voltage components (such as power batteries, on-board chargers, DC-DC converters, motor controllers, etc.) in the vehicle's high-voltage circuit through low-voltage electrical signals.

[0003] Currently, each high-voltage component has a corresponding high-voltage connector, and the high-voltage connector is internally designed with an interlock component (including two interlock terminals). When the interlock component is normally connected, it represents that the corresponding high-voltage component is normally connected; when the interlock component is disconnected, it represents that the corresponding high-voltage component has a connection fault. That is, the connection status of the interlock component can represent the connection status of the corresponding high-voltage component.

[0004] When a connection fault occurs in a high-voltage component in the high-voltage circuit, if the faulty interlock component can be accurately detected, it will help relevant personnel quickly lock the high-voltage component with the connection fault, thereby improving the fault troubleshooting efficiency. Summary of the Invention

[0005] The main technical problem to be solved by this application is to provide a high-voltage interlock fault detection device and a vehicle that can accurately detect the faulty interlock component.

[0006] To solve the above technical problem, a technical solution adopted by this application is: to provide a high-voltage interlock fault detection device, including: a high-voltage interlock detection string, the first end of the high-voltage interlock detection string is used to connect to a first power supply and the second end of the high-voltage interlock detection string is grounded. The high-voltage interlock detection string includes a plurality of serially connected high-voltage interlock detection units. Each high-voltage interlock detection unit includes an interlock component and a detection sub-unit connected in parallel across the interlock component. The detection end of the detection sub-unit is used to output an interlock status signal; an encoding unit, the encoding unit includes a plurality of first input terminals and a plurality of output terminals, and each first input terminal of the encoding unit is respectively connected to the detection end of a detection sub-unit. The encoding unit is used to encode the interlock status signals output by all detection sub-units to obtain an interlock fault signal, and output the interlock fault signal through a plurality of output terminals. The interlock fault signal characterizes the faulty interlock component; a fault detection unit, the fault detection unit is connected to the plurality of output terminals of the encoding unit.

[0007] Optionally, each detection sub-unit includes a detection resistor string. The detection resistor string includes at least one detection resistor connected in series. One end of each detection resistor string connected to the first power supply is the detection end of the corresponding detection sub-unit.

[0008] Optionally, each detection subunit includes a detection resistor string, a light-emitting element, and a photosensitive sensor. The detection resistor string includes at least one detection resistor connected in series, the detection resistor string is connected in series with the light-emitting element, and the signal output end of each photosensitive sensor is the detection end of the corresponding detection subunit.

[0009] Optionally, the encoding unit includes at least one encoder.

[0010] Optionally, the type of the encoder is a priority encoder.

[0011] Optionally, the high-voltage interlock fault detection device further includes a first resistor connected between the first power supply and the first end of the high-voltage interlock detection string; and / or, the high-voltage interlock fault detection device further includes a second resistor, one end of the second resistor is connected to the second end of the high-voltage interlock detection string, and the other end of the second resistor is grounded.

[0012] Optionally, the high-voltage interlock fault detection device further includes a plurality of first inverters, the input ends of each first inverter are respectively connected to the detection end of a detection subunit, and the output ends of each first inverter are respectively connected to a first input end of the encoding unit.

[0013] Optionally, the encoding unit further includes at least one second input end, each second input end of the encoding unit is grounded through a second inverter respectively, or each second input end of the encoding unit is connected to the second power supply.

[0014] Optionally, the high-voltage interlock fault detection device further includes a switch unit, the first end of the switch unit is connected to the first power supply, the second end of the switch unit is connected to the first end of the high-voltage interlock detection string, and the controlled end of the switch unit is connected to the control signal output end of the fault detection unit; and / or, the fault detection unit is further connected to the second end of the high-voltage interlock detection string; and / or, the number of the plurality of first input ends of the encoding unit is more than the number of the plurality of output ends of the encoding unit.

[0015] To solve the above technical problems, another technical solution adopted by this application is: to provide a vehicle, which includes the high-voltage interlock fault detection device described in any one of the above.

[0016] In the above solution, each detection subunit can detect the state of the corresponding interlock component and output an interlock state signal corresponding to the corresponding interlock component to the encoding unit. The encoding unit can encode all the input interlock state signals of the interlock components to obtain an interlock fault signal and output the interlock fault signal to the fault detection unit. Since the interlock fault signal can characterize the faulty interlock component, the fault detection unit can accurately determine the faulty interlock component through the interlock fault signal. Description of the Drawings

[0017] Figure 1 It is a schematic flowchart of an embodiment of the high-voltage interlock fault detection device provided by the present application;

[0018] Figure 2 It is a schematic flowchart of another embodiment of the high-voltage interlock fault detection device provided by the present application;

[0019] Figure 3 It is a schematic flowchart of yet another embodiment of the high-voltage interlock fault detection device provided by the present application;

[0020] Figure 4 It is a schematic flowchart of yet another embodiment of the high-voltage interlock fault detection device provided by the present application. Detailed implementation manners

[0021] To make the objectives, technical solutions and effects of the present application clearer and more definite, the following further describes the present application in detail with reference to the accompanying drawings and by way of examples.

[0022] It should be noted that the term "and / or" in this article is merely a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist simultaneously, and B exists alone. In addition, the terms "first", "second", etc. in the specification, claims and drawings of this article are used to distinguish similar objects and do not necessarily describe a specific order or sequence.

[0023] Please refer to Figure 1 , Figure 1 It is a schematic structural diagram of an embodiment of the high-voltage interlock fault detection device provided by the present application. As Figure 1 shown, the high-voltage interlock fault detection device includes a high-voltage interlock detection string 10, an encoding unit 20, and a fault detection unit 30.

[0024] Among them, the first end of the high-voltage interlock detection string 10 is connected to the first power supply 40, and the second end of the high-voltage interlock detection string 10 is grounded. The high-voltage interlock detection string 10 includes a plurality of serially connected high-voltage interlock detection units. Each high-voltage interlock detection unit includes an interlock component 11 and a detection sub-unit 12 connected in parallel across the interlock component 11. The detection end of each detection sub-unit 12 is used to output the interlock status signal corresponding to the interlock component 11, and the level status of the interlock status signal can be a high level or a low level.

[0025] In one embodiment, each detection sub-unit 12 includes a detection resistor string. The detection resistor string includes at least one detection resistor connected in series, and the end of each detection resistor string connected to the first power supply 40 is the detection end of the corresponding detection sub-unit 12. The resistance values of the detection resistor strings are different, and the resistance values of the detection resistor strings can be set according to actual requirements.

[0026] In another embodiment, each detection subunit 12 includes a detection resistor string, a light-emitting element, and a photosensitive sensor. The detection resistor string includes at least one detection resistor connected in series, the detection resistor string is connected in series with the light-emitting element, and the signal output end of each photosensitive sensor is the detection end of the corresponding detection subunit 12. The resistance values of the detection resistor strings are the same or different, and the resistance values of the detection resistor strings can be set according to actual requirements.

[0027] The encoding unit 20 includes a plurality of first input ends and a plurality of output ends, and each first input end of the encoding unit 20 is respectively connected to the detection end of a detection subunit 12. The encoding unit 20 may include at least one encoder. For example, the encoding unit 20 includes one encoder, two encoders, three encoders, etc. The specific number of encoders can be determined according to the actual number of input pins of the encoder and the actual number of the interlock components 11. The type of the encoder may be a general encoder or a priority encoder, and the encoder may be active with a high-level input or active with a low-level input.

[0028] Exemplarily, the encoder may include 8 input pins and 3 output pins, or the encoder may also include 10 input pins and 4 output pins. Alternatively, the number of output pins and the number of output pins of the encoder may also be other values, and this embodiment does not make specific limitations thereto.

[0029] The encoding unit 20 is configured to encode the interlock status signals output by all the detection subunits 12 to obtain an interlock fault signal, and output the interlock fault signal through a plurality of output ends. The interlock fault signal can characterize the faulty interlock component 11. Taking the encoding unit 20 including one encoder as an example, the interlock status signals output by the plurality of detection subunits 12 managed by the encoder form a status signal combination. When different interlock components 11 fail, the corresponding status signal combinations are different, and the interlock fault signals after the encoder encodes the status signal combinations are also different. Therefore, the interlock fault signal can characterize the faulty interlock component 11 among the plurality of interlock components 11 managed by the encoder.

[0030] It should be noted that when the encoding unit 20 includes a plurality of encoders, each encoder can respectively encode the interlock fault signals output by the plurality of detection subunits 12 managed thereby to obtain an interlock fault signal, and each encoder respectively outputs the corresponding interlock fault signal to the fault detection subunit 12.

[0031] The fault detection unit 30 is connected to multiple output terminals of the encoding unit 20. Specifically, the fault detection unit 30 can determine the interlock component 11 with a current fault based on the currently received interlock fault signal and a pre-stored corresponding relationship (such as a truth table). The corresponding relationship includes several preset interlock fault signals and the interlock components 11 with faults corresponding to each preset interlock fault signal respectively, and the interlock components 11 with faults corresponding to different preset interlock fault signals are different.

[0032] Exemplarily, the fault detection unit 30 is an MCU (Microcontroller Unit).

[0033] In this embodiment, each detection subunit can detect the state of the corresponding interlock component and output an interlock status signal corresponding to the corresponding interlock component to the encoding unit. The encoding unit can encode the interlock status signals of all input interlock components to obtain an interlock fault signal and output the interlock fault signal to the fault detection unit. Since the interlock fault signal can represent the interlock component with a fault, the fault detection unit can accurately determine the interlock component with a fault through the interlock fault signal.

[0034] Please refer to Figure 2 , Figure 2 which is a schematic structural diagram of another embodiment of the high-voltage interlock fault detection device provided by this application. As Figure 2 shown, the high-voltage interlock fault detection device further includes at least one of a first resistor 51, a second resistor 52, and a switch unit 53.

[0035] Among them, the first resistor 51 is connected between the first power supply 40 and the first end of the high-voltage interlock detection string 10.

[0036] One end of the second resistor 52 is connected to the second end of the high-voltage interlock detection string 10, and the other end of the second resistor 52 is grounded.

[0037] The first end of the switch unit 53 is connected to the first power supply 40, the second end of the switch unit 53 is connected to the first end of the high-voltage interlock detection string 10, and the controlled end of the switch unit 53 is connected to the control signal output terminal of the fault detection unit 30. Exemplarily, the switch unit 53 includes a triode 531 and a third resistor 532. The collector, emitter, and base of the triode 531 are respectively the first end, the second end, and the controlled end of the switch unit 53, and the emitter of the triode 531 is grounded through the third resistor 532.

[0038] When the control signal output terminal of the fault detection unit 30 outputs a high level, the switch unit 53 is in the conducting state, and at this time, the first power supply 40 is connected, and the high-voltage interlock fault detection can be performed; when the control signal output terminal of the fault detection unit 30 outputs a low level, the switch unit 53 is in the off state, and at this time, the first power supply 40 is not connected, and the high-voltage interlock fault detection is not performed. That is to say, the fault detection unit 30 can control the execution of the high-voltage interlock fault detection.

[0039] Exemplarily, the high-voltage interlock fault detection device further includes a first resistor 51, a second resistor 52, and a switch unit 53. In this case, one end of the first resistor 51 is connected to the second end of the switch unit 53, and the other end of the first resistor 51 is connected to the first end of the high-voltage interlock detection string 10.

[0040] It should be noted that in this embodiment, the resistance values of the first resistor 51, the second resistor 52, and the third resistor 532 in the switch unit 53 can be set according to actual requirements. Exemplarily, the resistance value of the first resistor 51 is 1 kΩ, the resistance value of the second resistor 52 is 3 kΩ, and the resistance value of the third resistor 532 is 4.7 kΩ.

[0041] Optionally, in this embodiment, the fault detection unit 30 may also be connected to the second end of the high-voltage interlock detection string 10, so as to obtain the level state of the second end of the high-voltage interlock detection string 10, thereby determining whether there is a faulty interlock component 11 in the high-voltage interlock detection string 10.

[0042] When all the interlock components 11 are normally connected, the detection sub-units 12 corresponding to the respective interlock components 11 are all short-circuited. At this time, the voltage at the second end of the high-voltage interlock detection string 10 is approximately the voltage of the first power supply 40, that is, the level state of the second end of the high-voltage interlock detection string 10 is a high level. When there is a fault (disconnection) in the interlock component 11, the detection sub-unit 12 corresponding to the interlock component 11 is connected. At this time, the level state of the second end of the high-voltage interlock detection string 10 is a low level. Therefore, when the fault detection unit 30 detects that the level state of the second end of the high-voltage interlock detection string 10 is a high level, it can be determined that there is no faulty interlock component 11 in the high-voltage interlock detection string 10. When the fault detection unit 30 detects that the level state of the second end of the high-voltage interlock detection string 10 is a low level, it can be determined that there is a faulty interlock component 11 in the high-voltage interlock detection string 10. However, at this time, the fault detection unit 30 cannot determine which specific interlock component 11 is faulty. Therefore, the fault detection unit 30 still needs to further determine the specific faulty interlock component 11 through the interlock fault signal output by the coding unit 20.

[0043] Optionally, in this embodiment, the encoding unit 20 is valid for low-level input. At this time, the high-voltage interlock fault detection device further includes a plurality of first inverters 54. The input ends of the first inverters 54 are respectively connected to the detection ends of a detection sub-unit 12, and the output ends of the first inverters 54 are respectively connected to a first input end of the encoding unit 20.

[0044] Considering that if the encoding unit 20 is valid for high-level input, when the input interlock status signal is low level, if there is a spike (glitch) in the interlock status signal, it may be regarded as high level and thus be encoded incorrectly. Therefore, by adopting the method that the encoding unit 20 is valid for low-level input, the stability (or anti-interference ability) of the encoding unit 20 can be improved, thereby improving the accuracy of the detection result of the high-voltage interlock fault detection device.

[0045] Optionally, in this embodiment, the encoding unit 20 may further include at least one second input end, and the second input ends of the encoding unit 20 are not connected to the detection ends of the detection sub-unit 12, that is, the second input ends of the encoding unit 20 are not used. At this time, it is necessary to invalidate the second input ends of the encoding unit 20. Specifically, since the encoding unit 20 is valid for low-level input, the second input ends of the encoding unit 20 can be respectively grounded through a second inverter 55, or the second input ends of the encoding unit 20 can also be connected to a second power supply to make the second input ends of the encoding unit 20 at high level. Exemplarily, the voltage of the second power supply is 5V, or it can also be other voltage values.

[0046] Exemplarily, when the input voltage of the first inverter 54 or the second inverter 55 is greater than or equal to the first voltage threshold, it is regarded as high level, and at this time, the first inverter 54 or the second inverter 55 will output low level; when the input voltage of the first inverter 54 or the second inverter 55 is less than the second voltage threshold, it is regarded as low level, and at this time, the first inverter 54 or the second inverter 55 will output high level. Exemplarily, the first voltage threshold is 0.7*VCC, the second voltage threshold is 0.3*VCC, and VCC is the voltage value of the power supply of the first inverter 54 or the second inverter 55, such as VCC is 5V.

[0047] Optionally, in this embodiment, the number of the plurality of first input ends of the encoding unit 20 is more than the number of the plurality of output ends of the encoding unit 20. When the number of the interlock components 11 is large, the number of I / O (input / output) ports of the fault detection unit 30 can be reduced, thereby saving the resources of the fault detection unit 30 and reducing the cost.

[0048] Please refer to Figure 3 , Figure 3 which is a schematic structural diagram of another embodiment of the high-voltage interlock fault detection device provided by the present application. Figure 3Only the high-voltage interlock detection string 10 includes 5 interlock components 11, and the encoding unit 20 only includes a priority encoder for exemplary illustration. Figure 3 At both ends of the 5 interlock components 11, a detection resistor string 121 is connected in parallel respectively. One end of each detection resistor string 121 connected to the first power supply 40 is D4’~D8’ respectively. Exemplarily, the resistance values of the detection resistor strings 121 corresponding to D4’~D8’ are 6.8 kΩ, 15 kΩ, 51 kΩ, 180 kΩ, and 620 kΩ respectively, to ensure that the voltage across the high-voltage interlock detection string 10 is clamped within a reasonable voltage range when a fault occurs. The priority encoder includes a total of 8 input terminals D1~D8 and 3 output terminals S1~S3. D1~D3 are all grounded through the second inverter 55. D4~D8 correspond to D4’~D8’ one by one. The priority of D1~D8 increases in sequence, and the priority encoder is valid for low-level input. Thus, the following truth table can be obtained:

[0049] Table 1:

[0050] J5 J4 J3 J2 J1 D8 D7 D6 D5 D4 D3 D2 D1 S1 S2 S3 0 X X X X 0 X X X X 1 1 1 0 0 0 1 0 X X X 1 0 X X X 1 1 1 1 0 0 1 1 0 X X 1 1 0 X X 1 1 1 0 1 0 1 1 1 0 X 1 1 1 0 X 1 1 1 1 1 0 1 1 1 1 0 1 1 1 1 0 1 1 1 0 0 1

[0051] In Table 1, J5, J4, J3, J2, and J1 respectively represent the interlock component corresponding to D8’, the interlock component corresponding to D7’, the interlock component corresponding to D6’, the interlock component corresponding to D5’, and the interlock component corresponding to D4’. In the columns of J1~J5, 0 indicates that the corresponding interlock component is faulty, 1 indicates that the corresponding interlock component is normal, and X indicates that the corresponding interlock component is normal or faulty; in the columns of D1~D8 and S1~S3, 0 indicates low level, 1 indicates high level, and X is low level or high level.

[0052] When J5 is faulty, the detection resistor string corresponding to D8’ is connected, D8’ is at high level, D8 is at low level. At this time, regardless of whether J1~J4 are normal, since the priority of D8 is the highest, the priority encoder only encodes the low level input by D8, and the outputs of S1~S3 are all 000.

[0053] When J5 is normal and J4 is faulty, the detection resistor string corresponding to D7’ is connected, D8’ is at low level and D7’ is at high level, D8 is at high level and D7 is at low level. At this time, regardless of whether J1~J3 are normal, since D8 is invalid at high level and the priority of D7 is the highest, the priority encoder only encodes the low level input by D7, and the outputs of S1~S3 are all 100.

[0054] When J5 and J4 are normal and J3 is faulty, the detection resistor corresponding to D6' is connected in series. D7' and D8' are both at low level and D6' is at high level. D7 and D8 are both at high level and D7 is at low level. At this time, regardless of whether J1 and J2 are normal, since the high levels of D7 and D8 are invalid, D6 has the highest priority. The priority encoder only encodes the low level input by D6, and the outputs of S1 to S3 are all 010.

[0055] When J5, J4 and J3 are normal and J2 is faulty, the detection resistor corresponding to D5' is connected in series. D6', D7' and D8' are all at low level and D5' is at high level. D6, D7 and D8 are at high level and D5 is at low level. At this time, regardless of whether J1 is normal, since the high levels of D6, D7 and D8 are invalid, D5 has the highest priority. The priority encoder only encodes the low level input by D5, and the outputs of S1 to S3 are all 110.

[0056] When J5, J4, J3 and J2 are normal and J1 is faulty, the detection resistor corresponding to D4' is connected in series. D5', D6', D7' and D8' are all at low level and D4' is at high level. D5, D6, D7 and D8 are at high level and D4 is at low level. At this time, since the high levels of D5, D6, D7 and D8 are invalid, D4 has the highest priority. The priority encoder only encodes the low level input by D4, and the outputs of S1 to S3 are all 001.

[0057] In this embodiment, in the case of only one interlock component being faulty, the fault detection unit can determine which specific interlock component is faulty based on the interlock fault signal and the truth table output by the priority encoder. In the case of multiple interlock components being faulty simultaneously, the first faulty interlock component can be determined. Further, after troubleshooting the faulty interlock component or short-circuiting the faulty interlock component through a connector jumper cap, the next faulty interlock component can be continued to be troubleshot. After multiple troubleshooting, all faulty interlock components can be detected.

[0058] Please refer to Figure 4 , Figure 4 which is a schematic structural diagram of another embodiment of the high-voltage interlock fault detection device provided by this application. Figure 4 In Figure 4 only 4 interlock components 11 of the high-voltage interlock detection string 10 are shown (the rest are omitted), and the encoding unit 20 only includes one encoder for exemplary illustration. The type of the encoder can be a general encoder or a priority encoder. Figure 4Each detection sub-unit 12 corresponding to the interlock components 11 includes a detection resistor string 121, a light-emitting element 122, and a photosensitive sensor 123. The detection resistor string 121 is connected in series with the light-emitting element 122, and the signal output terminals of the photosensitive sensors 123 are the detection terminals of the corresponding detection sub-units 12. The encoder includes a total of 8 input terminals D1 to D8 and 3 output terminals S1 to S3, and the encoder is valid for low-level input.

[0059] Figure 4 Among them, when each interlock component 11 is normal, the detection resistor strings 121 corresponding to the interlock components 11 are not connected, the light-emitting elements 122 corresponding to the interlock components 11 do not emit light, and the photosensitive sensors 123 all output low levels. When a certain interlock component 11 fails, the corresponding detection resistor string 121 is connected, and the corresponding light-emitting element 122 emits light. At this time, the corresponding photosensitive sensor 123 detects the light emission of the light-emitting element 122 and outputs a high level.

[0060] In an embodiment, for the case where only one interlock component fails, the type of the encoder can be an ordinary encoder. Thus, the following truth table can be obtained:

[0061] Table 2:

[0062] D8 D7 D6 D5 D4 D3 D2 D1 S1 S2 S3 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 1 1 0 1 0 0 1 1 1 1 1 1 0 1 1 0 1 0 1 1 1 1 0 1 1 1 0 1 1 1 1 1 0 1 1 1 1 1 0 0 1 1 0 1 1 1 1 1 1 0 1 1 0 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1

[0063] For example, when the interlock component 11 corresponding to D8 fails, the photosensitive sensor 123 corresponding to D8 outputs a high level, and the other photosensitive sensors 123 all output low levels. After being inverted by the first inverter 54, only D8 is at a low level, D1 to D7 are all at high levels, and the outputs of S1 to S3 are 111. Another example is that when the interlock component 11 corresponding to D1 fails, the photosensitive sensor 123 corresponding to D1 outputs a high level, and the other photosensitive sensors 123 all output low levels. After being inverted by the first inverter 54, only D1 is at a low level, D2 to D8 are all at high levels, and the outputs of S1 to S3 are 000. Therefore, the fault detection unit 30 can determine which specific interlock component 11 fails based on the interlock fault signal output by the encoder received and this truth table.

[0064] Optionally, in other embodiments, the type of the encoder can also be a priority encoder. The present embodiment does not specifically limit the type of the encoder. When the type of the encoder is a priority encoder, in the case where only one interlock component fails, it can be detected which specific interlock component it is; in the case where multiple interlock components fail simultaneously, the first failed interlock component can be detected. Further, after troubleshooting the failed interlock component or shorting the failed interlock component through a connector jumper, the next failed interlock component can be continued to be troubleshot, and all failed interlock components can be detected after multiple troubleshoots.

[0065] Figures 1 to 4 In any of the shown high-voltage interlock fault detection devices, when it is necessary to add an interlock component, the unused second input terminal in the coding unit 20 can be used; when the number of interlock components to be added is large and the number of input pins of the coding unit 20 is insufficient, the number of encoders in the coding unit 20 can be further increased. The high-voltage interlock fault detection device is not only simple in design but also has high scalability.

[0066] This application also provides a vehicle, which may include Figures 1 to 4 any of the shown high-voltage interlock fault detection devices. Exemplarily, the type of the vehicle is an electric vehicle, a hybrid vehicle, etc.

[0067] The above are only the embodiments of this application, and do not limit the patent scope of this application. Any equivalent structure or equivalent process transformation made by using the content of the specification and drawings of this application, or directly or indirectly applied in other related technical fields, shall be equally included in the patent protection scope of this application.

Claims

1. A high voltage interlock fault detection device, characterized in that: The high voltage interlock fault detection device comprises: A high-voltage interlock detection string, wherein a first end of the high-voltage interlock detection string is used to be connected to a first power source and a second end of the high-voltage interlock detection string is grounded, the high-voltage interlock detection string comprises a plurality of high-voltage interlock detection units connected in series, each of the high-voltage interlock detection units comprises an interlock component and a detection subunit connected in parallel at both ends of the interlock component, and a detection end of the detection subunit is used to output an interlock state signal; An encoding unit, the encoding unit comprising a plurality of first input terminals and a plurality of output terminals, and each first input terminal of the encoding unit is respectively connected to a detection terminal of the detection subunit, the encoding unit is used to encode the interlocking state signals output by all the detection subunits to obtain an interlocking fault signal, and output the interlocking fault signal through the plurality of output terminals, wherein the interlocking fault signal represents a faulty interlocking component; A fault detection unit is connected to a plurality of output terminals of the encoding unit.

2. The high voltage interlock fault detection device according to claim 1, characterized in that: Each of the detection sub-units includes a detection resistor string, which includes at least one detection resistor connected in series, and one end of each of the detection resistor strings connected to the first power supply is the detection end of the corresponding detection sub-unit.

3. The high voltage interlock fault detection device according to claim 1, characterized in that: Each of the detection sub-units includes a detection resistor string, a light-emitting element and a photosensitive sensor. The detection resistor string includes at least one detection resistor connected in series. The detection resistor string is connected in series with the light-emitting element. The signal output end of each photosensitive sensor is the detection end of the corresponding detection sub-unit.

4. The high voltage interlock fault detection device according to claim 1, characterized in that: The encoding unit includes at least one encoder.

5. The high voltage interlock fault detection device according to claim 4, characterized in that: The type of the encoder is a priority encoder.

6. The high voltage interlock fault detection device according to claim 1, characterized in that: The high-voltage interlock fault detection device further includes a first resistor connected between the first power supply and a first end of the high-voltage interlock detection string; And / or, the high-voltage interlock fault detection device further includes a second resistor, one end of the second resistor is connected to the second end of the high-voltage interlock detection string, and the other end of the second resistor is grounded.

7. The high voltage interlock fault detection device according to claim 1, characterized in that: The high-voltage interlock fault detection device further includes a plurality of first inverters, wherein the input end of each of the first inverters is respectively connected to the detection end of one of the detection subunits, and the output end of each of the first inverters is respectively connected to a first input end of the encoding unit.

8. The high voltage interlock fault detection device according to claim 1, characterized in that: The encoding unit further includes at least one second input terminal. Each of the second input terminals of the encoding unit is grounded via a second inverter, or each of the second input terminals of the encoding unit is connected to a second power supply.

9. The high voltage interlock fault detection device according to claim 1, characterized in that: The high-voltage interlock fault detection device further comprises a switch unit, a first end of the switch unit is connected to the first power supply, a second end of the switch unit is connected to the first end of the high-voltage interlock detection string, and a controlled end of the switch unit is connected to a control signal output end of the fault detection unit; And / or, the fault detection unit is also connected to the second end of the high-voltage interlock detection string; And / or, the number of the plurality of first input terminals is greater than the number of the plurality of output terminals.

10. A vehicle, characterized in that: The vehicle includes the high-voltage interlock failure detection device according to any one of claims 1 to 9.

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