Test platform for power device
By designing a modular test platform, including protection module, main test loop and external control power supply module, the problem of redesigning the circuit in the existing technology in the replacement of models is solved, and flexible testing of different models of GaN power devices is realized.
Patent Information
- Application Number
- CN202421323799.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-06-11
- Publication Date
- 2025-06-24
- Estimated Expiration
- 2034-06-11
AI Technical Summary
The lack of modular design in the prior art leads to the need to redesign the circuit after the GaN power device model is replaced, which is inconvenient to use.
A test platform including a protection module, a main test loop and an external control power supply module is designed. The main test loop includes a frequency pulse width control module and a high voltage conversion circuit module. The protection module is used for current over-limit circuit breaking, and the external control power supply module provides test control and protection power supply.
It realizes the testing of different models of GaN power devices without redesigning the circuit, and improves the flexibility and convenience of the test platform.
Smart Images

Figure CN223022298U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of power device testing equipment, and particularly relates to a testing platform for power devices. Background Art
[0002] The testing platform for power devices is applied to GaN power devices (GanMOS) or other power devices. Under the condition of 80% of the nominal voltage, within a certain temperature range (such as 80 - 125 degrees) and a fixed frequency (such as 100KHZ), it lasts for a long time (such as 1000 hours) to verify the reliability of the device.
[0003] However, in the prior art, there is no modular design. The circuit design is only for a certain model of GanMOS. After the model is changed, the circuit needs to be redesigned, which is rather inconvenient during use. Summary of the Utility Model
[0004] The purpose of the utility model is to provide a testing platform for power devices to solve the problem of inconvenient use in the prior art.
[0005] The embodiments of the utility model are realized by the following technical solutions:
[0006] A testing platform for power devices includes a protection module, a main test circuit and an external control power supply module. The protection module is connected to the main test circuit, and the external control power supply module is connected to the protection module and the main test circuit;
[0007] The main test circuit includes a frequency and pulse width control module and a high - voltage conversion circuit module, which are used to connect to the device under test;
[0008] The protection module is used to disconnect the circuit when the current exceeds the set value:
[0009] The external control power supply module is used to provide test control power supply for the main test circuit and protection power supply for the protection module.
[0010] In an embodiment of the utility model, the frequency and pulse width control module includes a frequency and pulse width controller, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor, an eighth capacitor, a ninth capacitor, a first resistor, a second resistor and a third resistor;
[0011] One ends of the first capacitor and the second capacitor are connected to an end of the frequency and pulse width controller;
[0012] One end of the third capacitor and the first resistor is connected to an end of the frequency pulse width controller, and the other end is connected to another end of the frequency pulse width controller;
[0013] One end of the fourth capacitor, the fifth capacitor, and the sixth capacitor is connected to an end of the frequency pulse width controller, and the other end is connected to another end of the frequency pulse width controller;
[0014] Both ends of the seventh capacitor are respectively connected to an end and another end of the frequency pulse width controller;
[0015] Both ends of the eighth capacitor are respectively connected to an end and another end of the frequency pulse width controller;
[0016] Both ends of the ninth capacitor are respectively connected to an end and another end of the frequency pulse width controller;
[0017] Both ends of the second resistor are respectively connected to an end and another end of the frequency pulse width controller;
[0018] Both ends of the third resistor are respectively connected to an end and another end of the frequency pulse width controller.
[0019] In an embodiment of the present invention, it further includes a rectification module connected to the protection module, and the rectification module includes a fourth resistor, a rectification module, a tenth capacitor, and an eleventh capacitor;
[0020] The fourth resistor is connected to one end of the rectification module, and the tenth capacitor and the eleventh capacitor are connected in parallel and then connected to one end of the rectification module.
[0021] In an embodiment of the present invention, the high-voltage conversion circuit module includes a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, a twelfth capacitor, a thirteenth capacitor, a fourteenth capacitor, a fifteenth capacitor, a sixteenth capacitor, a seventeenth capacitor, an eighteenth capacitor, a nineteenth capacitor, a twentieth capacitor, a twenty-first capacitor, a twenty-second capacitor, a first diode, a second diode, a third diode, a first voltage regulator, a first inductor, an optocoupler, and a conversion circuit;
[0022] One end of the first diode is connected to the twelfth capacitor, the thirteenth capacitor, and the first inductor, and the other end is connected to the conversion circuit. The other ends of the twelfth capacitor and the thirteenth capacitor are connected to the twentieth capacitor and the conversion circuit. The other end of the first inductor is connected to the fourteenth capacitor and the fifteenth capacitor. The other ends of the fourteenth capacitor and the fifteenth capacitor are connected to the fifteenth resistor, the twelfth capacitor, the thirteenth capacitor, the twentieth capacitor, and the conversion circuit;
[0023] One end of the second diode is connected to the conversion circuit, and the other end is connected to the fifth resistor. The other end of the fifth resistor is connected to the fourth resistor, the sixth resistor, and the sixteenth capacitor. The other end of the fifth resistor, the other ends of the fourth resistor, the sixth resistor, and the sixteenth capacitor are connected to the conversion circuit and the test device, and the other end of the test device is connected to the sixteenth resistor and the seventeenth resistor;
[0024] Both ends of the optocoupler are respectively connected to the twenty-first capacitor, the ninth resistor, the fourteenth resistor, the tenth resistor, the twenty-second capacitor, the thirteenth resistor, and the first voltage regulator. The twenty-first capacitor is connected to the eighteenth capacitor and the nineteenth capacitor. The ninth resistor is connected to the tenth resistor. The fourteenth resistor is connected to the first voltage regulator. The tenth resistor is connected to the twenty-second capacitor and the first voltage regulator. The twenty-second capacitor is connected to the twelfth resistor. The twelfth resistor is connected to the first voltage regulator, the eleventh resistor, and the fifteenth resistor. The other end of the fifteenth resistor is connected to the first voltage regulator. The other ends of the eighteenth capacitor and the nineteenth capacitor are connected to the seventh resistor. The seventh resistor, the eighth resistor, and the eleventh resistor are connected in series;
[0025] The third diode is connected to the conversion circuit and the seventeenth capacitor.
[0026] In an embodiment of the present invention, a feedback network power supply module is further included, which includes a third voltage regulator, a twenty-third capacitor, a twenty-fourth capacitor, a twenty-fifth capacitor, a twenty-sixth capacitor, a twenty-seventh capacitor, and a twenty-eighth capacitor;
[0027] The twenty-third capacitor, the twenty-fourth capacitor, the twenty-fifth capacitor, the twenty-sixth capacitor, the twenty-seventh capacitor, and the twenty-eighth capacitor are connected in parallel, and the third voltage regulator is connected in parallel between the twenty-fourth capacitor and the twenty-fifth capacitor.
[0028] In an embodiment of the present invention, a main circuit undervoltage protection module is further included, which includes a triode, a second voltage regulator, a twenty-ninth capacitor, a thirtieth capacitor, a thirty-first capacitor, an eighteenth resistor, a nineteenth resistor, a twentieth resistor, a twenty-first resistor, a twenty-second resistor, a twenty-third resistor, a twenty-fourth resistor, a twenty-fifth resistor, a twenty-sixth resistor, a twenty-seventh resistor, a twenty-eighth resistor, and an amplifier;
[0029] The triode is connected in parallel with the twenty-ninth capacitor and the twentieth resistor. One of the parallel terminals is connected to the twenty-second resistor, which is connected to the twenty-first resistor and the amplifier-. The twenty-first resistor is connected to the eighteenth resistor. The eighteenth resistor, the nineteenth resistor, and the thirtieth capacitor are connected to the non-inverting input terminal of the amplifier. The thirty-first capacitor and the twenty-third resistor are connected to the inverting input terminal of the amplifier. The twenty-third resistor is connected to the second voltage regulator, the twenty-seventh resistor, and the twenty-eighth resistor. The nineteenth resistor is connected to the thirtieth capacitor, the thirty-first capacitor, the second voltage regulator, and the twenty-eighth resistor;
[0030] The twenty-fourth resistor, the twenty-fifth resistor, the twenty-sixth resistor, and the twenty-seventh resistor are connected in series.
[0031] The technical solution of the embodiment of the present utility model has at least the following advantages and beneficial effects:
[0032] The structure provided by the present utility model mainly includes a protection module, a main test circuit, and an external control power supply module. The main test circuit is used to connect with the device under test for detection. The protection module is used to disconnect the circuit when the current exceeds the set value. The external control power supply module is used to provide test control power supply for the main test circuit and protection power supply for the protection module. Through the above structure, when the normal maximum voltage (264VAC) is input, the external control power supply module is used to reach a frequency of 100K, and then the parameters of the transformer are calculated. In cooperation with the main test circuit, the output voltage is stabilized. When the frequency switch of the main test circuit acts on the test power device (GaNMOS or ordinary MOS), the voltage superimposed when the secondary voltage is reflected and converted to the primary is exactly 80% of the device under test, and then the secondary current is adjusted so that the temperature of the primary device under test when flowing through the corresponding current is just within the controllable range (80 - 125 degrees). Aging is carried out for a long time in this state to test the reliability. Description of the Drawings
[0033] In order to more clearly illustrate the technical solution of the embodiment of the present utility model, the drawings required to be used in the embodiment will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present utility model, and therefore should not be regarded as a limitation of the scope. For those of ordinary skill in the art, other related drawings can be obtained based on these drawings without creative efforts.
[0034] Figure 1 It is a schematic diagram of the overall structure of the present utility model;
[0035] Figure 2 It is a schematic diagram of the frequency pulse width control module structure of the present utility model;
[0036] Figure 3Schematic diagram of the rectification module of the present utility model;
[0037] Figure 4 Schematic diagram of the high-voltage conversion circuit module of the present utility model;
[0038] Figure 5 Schematic diagram of the power supply structure of the feedback network of the present utility model;
[0039] Figure 6 Schematic diagram of the main circuit undervoltage protection module of the present utility model.
[0040] Icons: First capacitor C26, Second capacitor C27, Third capacitor C28, Fourth capacitor C29, Fifth capacitor C30, Sixth capacitor C31, Seventh capacitor C32, Eighth capacitor C33, Ninth capacitor C34, First resistor R31, Second resistor R33, Third resistor R34, Fourth resistor R1, Rectification module BD1, Tenth capacitor C7, Eleventh capacitor C8, Twenty-ninth resistor R8, Fifth resistor R9, Sixth resistor R10, Seventh resistor R16, Eighth resistor R17, Ninth resistor R18, Tenth resistor R19, Eleventh resistor R20, Twelfth resistor R21, Thirteenth resistor R23, Fourteenth resistor R25, Fifteenth resistor R26, Sixteenth resistor R30, Seventeenth resistor R32, Twelfth capacitor C12, Thirteenth capacitor C13, Fourteenth capacitor C14, Fifteenth capacitor C15, Sixteenth capacitor C16, Seventeenth capacitor C17, Eighteenth capacitor C18, Nineteenth capacitor C19, Twentieth capacitor CY1, Twenty-first capacitor C24, Twenty-second capacitor C25, First diode D1, Second diode D2, Third diode D4, First voltage regulator Q4, First inductor L5, Optocoupler U5, Twenty-third capacitor C3, Twenty-fourth capacitor C4, Twenty-fifth capacitor C5, Twenty-sixth capacitor C6, Twenty-seventh capacitor C35, Twenty-eighth capacitor C36, Triode Q2, Second voltage regulator D3, Twenty-ninth capacitor C9, Thirtieth capacitor C10, Thirty-first capacitor C11, Eighteenth resistor R2, Nineteenth resistor R3, Twentieth resistor R4, Twenty-first resistor R5, Twenty-second resistor R6, Twenty-third resistor R7, Twenty-fourth resistor R11, Twenty-fifth resistor R12, Twenty-sixth resistor R13, Twenty-seventh resistor R14, Twenty-eighth resistor R15, Amplifier U2-A, Third voltage regulator Q1. Detailed implementation
[0041] To make the objectives, technical solutions, and advantages of the embodiments of the present utility model clearer, the technical solutions in the embodiments of the present utility model will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present utility model. Apparently, the described embodiments are some, but not all, of the embodiments of the present utility model. The components of the embodiments of the present utility model described and illustrated herein can be arranged and designed in various different configurations.
[0042] Please refer to Figure 1 , a test platform for power devices provided by the present utility model includes a protection module, a main test circuit, and an external DC control power supply module. The protection module is connected to the main test circuit, and the external DC control power supply module is connected to the protection module and the main test circuit;
[0043] The main test circuit includes a frequency pulse width control module and a high-voltage conversion circuit module, and the frequency pulse width control module and the high-voltage conversion circuit module are used to connect to the device under test;
[0044] The protection module is used to disconnect the circuit when the current exceeds the set value:
[0045] The external DC control power supply module is used to provide test control power supply for the main test circuit and provide protection power supply for the protection module.
[0046] With the above structure, when the normal maximum voltage (264VAC) is input, by using the external control power supply module, a frequency of 100K is achieved, and then the parameters of the transformer are calculated. Cooperating with the main test circuit, the output voltage is stabilized. When the frequency switch of the main test circuit acts on the test power device (GaNMOS or ordinary MOS), the voltage superimposed when the secondary voltage is reflected and converted to the primary is exactly 80% of the device under test, and then the secondary current is adjusted so that the temperature of the primary device under test when flowing through the corresponding current is just within the controllable range (80 - 125 degrees). Aging is carried out for a long time in this state to test the reliability.
[0047] An exemplary embodiment of the present utility model, as Figure 2 shown, the frequency pulse width control module includes a frequency pulse width controller, a first capacitor C26, a second capacitor C27, a third capacitor C28, a fourth capacitor C29, a fifth capacitor C30, a sixth capacitor C31, a seventh capacitor C32, an eighth capacitor C33, a ninth capacitor C34, a first resistor R31, a second resistor R33, and a third resistor R34;
[0048] One end of the first capacitor C26 and the second capacitor C27 is connected to the REF terminal of the frequency pulse width controller;
[0049] One end of the third capacitor C28 and the first resistor R31 is connected to the COMP terminal of the frequency pulse width controller, and the other end is connected to the VFB terminal of the frequency pulse width controller;
[0050] One end of the fourth capacitor C29, the fifth capacitor C30, and the sixth capacitor C31 is connected to the VCC terminal of the frequency pulse width controller, and the other end is connected to the GND terminal of the frequency pulse width controller;
[0051] Both ends of the seventh capacitor C32 are respectively connected to the RC terminal and the GND terminal of the frequency pulse width controller;
[0052] Both ends of the eighth capacitor C33 are respectively connected to the I SENSE terminal and the GND terminal of the frequency pulse width controller;
[0053] Both ends of the ninth capacitor C34 are respectively connected to the RC terminal and the I SENSE terminal of the frequency pulse width controller;
[0054] Both ends of the second resistor R33 are respectively connected to the RC terminal and the REF terminal of the frequency pulse width controller;
[0055] Both ends of the third resistor R34 are respectively connected to the VFB terminal and the GND terminal of the frequency pulse width controller.
[0056] Among them, the UC38 / 28XX series is selected for the frequency pulse width controller to control the entire loop and generate a fixed frequency.
[0057] The external power supply is 12V. After conversion, it is supplied to the VCC pin of the frequency pulse width controller. The fourth capacitor C29, the fifth capacitor C30, and the sixth capacitor C31 are bypass and energy storage capacitors for the controller power supply terminal, and their capacitance values are different.
[0058] The REF pin of the frequency pulse width controller is a self-generated 5V voltage, which powers the internal logic and is used for power supply such as external oscillation feedback, etc.; the 5V voltage, through the second resistor R33 and the seventh capacitor C32, generates oscillation and is supplied to the RC pin of the frequency pulse width controller, so that the OUTPUT pin of the frequency pulse width controller outputs the corresponding PWM.
[0059] The frequency of the OUTPUT pin of the frequency pulse width controller is determined by the parameters of the second resistor R33 and the seventh capacitor C32 and can be adjusted according to the test requirements.
[0060] If the COMP pin of the frequency pulse width controller is enabled low, the frequency pulse width controller stops working and there is no PWM output.
[0061] The VFB pin of the frequency pulse width controller is the feedback terminal. After receiving the feedback signal, it is compensated to the COMP pin through the first resistor R31 and the third capacitor C28 to control the width of the PWM to maintain stability.
[0062] The I_SENSE pin of the frequency pulse width controller is the current sampling pin. When testing the device, the current is introduced into this port to form a current control loop. When the current is too large (the sampling reaches 1V voltage), the frequency pulse width controller stops working. This is a single cycle, and it is enabled once per cycle. If the internal threshold (1V) is not reached, it will not start. The GND pin of the frequency pulse width controller is the power reference ground.
[0063] An exemplary embodiment of the present utility model, as Figure 3 shown, further includes a rectification module connected to the protection module. The rectification module includes a fourth resistor R1, a rectification module BD1, a tenth capacitor C7, and an eleventh capacitor C8. The fourth resistor R1 is connected to one end of the rectification module BD1, and the tenth capacitor and the eleventh capacitor are connected in parallel and then connected to one end of the rectification module BD1.
[0064] The AC inputs L and N (DC voltage can also be connected) are rectified by the rectification module BD1 and then input to the protection module. The output of the protection module is the same as the input voltage. The tenth capacitor C7 and the eleventh capacitor C8 are energy storage capacitors after rectification to ensure the stability and smoothness of the 400DC voltage. The fourth resistor R1 is used to limit the instantaneous inrush current when powered on. Here, it only represents the meaning of input and output. It is not necessarily fixed at 400VDC. The corresponding voltage can be input according to the requirements of the circuit.
[0065] Among them, the model of the conversion circuit is: RM8P / 8.35 / 11-W.
[0066] An exemplary embodiment of the present utility model, referring to Figure 4 , the high-voltage conversion circuit module includes a twenty-ninth resistor R8, a fifth resistor R9, a sixth resistor R10, a seventh resistor R16, an eighth resistor R17, a ninth resistor R18, a tenth resistor R19, an eleventh resistor R20, a twelfth resistor R21, a thirteenth resistor R23, a fourteenth resistor R25, a fifteenth resistor R26, a sixteenth resistor R30, a seventeenth resistor, a twelfth capacitor C12, a thirteenth capacitor C13, a fourteenth capacitor C14, a fifteenth capacitor C15, a sixteenth capacitor C16, a seventeenth capacitor C17, an eighteenth capacitor C18, a nineteenth capacitor C19, a twentieth capacitor CY1, a twenty-first capacitor C24, a twenty-second capacitor C25, a first diode D1, a second diode D2, a third diode D4, a first voltage regulator Q4, a first inductor L5, an optocoupler U5, and a conversion circuit;
[0067] One end of the first diode D1 is connected to the twelfth capacitor C12, the thirteenth capacitor C13 and the first inductor L5, and the other end is connected to the conversion circuit. The other ends of the twelfth capacitor C12 and the thirteenth capacitor C13 are connected to the twentieth capacitor CY1 and the conversion circuit. The other end of the first inductor L5 is connected to the fourteenth capacitor C14 and the fifteenth capacitor C15. The other ends of the fourteenth capacitor C14 and the fifteenth capacitor C15 are connected to the fifteenth resistor R26, the twelfth capacitor C12, the thirteenth capacitor C13, the twentieth capacitor CY1 and the conversion circuit;
[0068] One end of the second diode D2 is connected to the conversion circuit, and the other end is connected to the fifth resistor R9. The other end of the fifth resistor R9 is connected to the twenty-ninth resistor R8, the sixth resistor R10 and the sixteenth capacitor C16. The other ends of the fifth resistor R9, the twenty-ninth resistor R8, the sixth resistor R10 and the sixteenth capacitor C16 are connected to the conversion circuit and the test device. The other end of the test device is connected to the sixteenth resistor R30 and the seventeenth resistor R32;
[0069] Both ends of the optocoupler U5 are respectively connected to the twenty-first capacitor C24, the ninth resistor R18, the fourteenth resistor R25, the tenth resistor R19, the twenty-second capacitor C25, the thirteenth resistor R23 and the first voltage regulator Q4. The twenty-first capacitor C24 is connected to the eighteenth capacitor C18 and the nineteenth capacitor C19. The ninth resistor R18 is connected to the tenth resistor R19. The fourteenth resistor R25 is connected to the first voltage regulator Q4. The tenth resistor R19 is connected to the twenty-second capacitor C25 and the first voltage regulator Q4. The twenty-second capacitor C25 is connected to the twelfth resistor R21. The twelfth resistor R21 is connected to the first voltage regulator Q4, the eleventh resistor R20 and the fifteenth resistor R26. The other end of the fifteenth resistor R26 is connected to the first voltage regulator Q4. The other ends of the eighteenth capacitor C18 and the nineteenth capacitor C19 are connected to the seventh resistor R16. The seventh resistor R16, the eighth resistor R17 and the eleventh resistor R20 are connected in series;
[0070] The third diode D4 is connected to the conversion circuit and the seventeenth capacitor C17.
[0071] The input of the high-voltage conversion circuit module is the output of the protection module. Then the voltage enters the high-voltage conversion circuit module, and then passes through the test device GaNMOS, and goes to the ground through the current detection seventeenth resistor R32. The second diode D2, the twenty-ninth resistor R8, the fifth resistor R9, the sixth resistor R10 and the sixteenth capacitor C16 form an absorption circuit. When the test device works in the switching state, it absorbs the spike oscillation to avoid the spike voltage from breaking down the test device.
[0072] The test device GaNMOS is modular, facilitating changes, disassembly, and assembly. It has multiple package designs to facilitate testing of different module devices. The VCC of the test device GaNMOS and the VCC of the frequency pulse width controller share the same port. The PWM of the test device GaNMOS is output from the OUTPUT pin of the frequency pulse width controller. The current on the sampling resistor passes through the sixteenth resistor R30 and connects to the I SENSE port of the frequency pulse width controller.
[0073] The secondary main circuit is rectified by the first diode D1 and then filtered by the twelfth capacitor C12, the thirteenth capacitor C13, the first inductor L5, the fourteenth capacitor C14, and the fifteenth capacitor C15, with the output being OUT. The OUT output is sampled by voltage division through the seventh resistor R16, the eighth resistor R17, the eleventh resistor R20, and the fifteenth resistor R26 and sent to the first voltage regulator Q4. The first voltage regulator Q4 is a precision reference voltage regulator, and together with the first voltage regulator Q4 and the optocoupler U5, it forms a feedback network to stabilize the voltage of OUT.
[0074] The twelfth resistor R21 and the twenty-second capacitor C25 are for feedback compensation inside the sampling point and the first voltage regulator Q4. The ninth resistor R18, the tenth resistor R19, and the fourteenth resistor R25 provide a certain current to the first voltage regulator Q4 to ensure normal operation during feedback.
[0075] The twenty-first capacitor C24 is a bypass capacitor to prevent the optocoupler U5 from being disturbed during operation.
[0076] The eighteenth capacitor C18 and the nineteenth capacitor C19 are to ensure that the sampling of the OUT voltage is not affected by other factors in the circuit. Since there is a certain distance from the filter capacitor of OUT to the sampling point during sampling, if the wiring is close enough, these two capacitors can be omitted.
[0077] The voltage of the primary test device is the main input voltage plus the voltage superimposed by the output OUT through the turns ratio of the primary and secondary of the high-voltage conversion circuit module. According to the requirements of the test device, the parameters are designed and calculated, and it just reaches the voltage required by the test device.
[0078] The twentieth capacitor CY1 is the coupling capacitor between the primary and secondary to ensure better working effects of the circuit and the converter.
[0079] The 5V voltage input of the optocoupler U5 is the REF pin port of the frequency pulse width controller. The thirteenth resistor R23 is for current blocking to maintain circuit stability.
[0080] The third diode D4 and the seventeenth capacitor C17 are for the auxiliary output winding and are used to supply power to the feedback network.
[0081] An exemplary embodiment of the present utility model is referred toFigure 5 It also includes a feedback network power supply module, which includes a third voltage regulator Q1, a twenty-third capacitor C3, a twenty-fourth capacitor C4, a twenty-fifth capacitor C5, a twenty-sixth capacitor C6, a twenty-seventh capacitor C35, and a twenty-eighth capacitor C36; the twenty-third capacitor C3, the twenty-fourth capacitor C4, the twenty-fifth capacitor C5, the twenty-sixth capacitor C6, the twenty-seventh capacitor C35, and the twenty-eighth capacitor C36 are connected in parallel, and the third voltage regulator Q1 is connected in parallel between the twenty-fourth capacitor C4 and the twenty-fifth capacitor C5.
[0082] The third diode D4, the seventeenth capacitor C17, the twenty-third capacitor C3, and the twenty-fourth capacitor C4 form a CLC filter, and then pass through a voltage regulation circuit composed of the third voltage regulator Q1, the twenty-fifth capacitor C5, the twenty-sixth capacitor C6, the twenty-seventh capacitor C35, and the twenty-eighth capacitor C36 for power supply to the feedback network. In this embodiment, the feedback network is composed of an optocoupler U5, a first voltage regulator Q4, and surrounding components. It should be noted that the first voltage regulator Q4 is an adjustable precision voltage regulator, and the third voltage regulator Q1 is a three-terminal voltage regulator.
[0083] An exemplary embodiment of the present invention is referred to Figure 6 It also includes a main circuit undervoltage protection module, which includes a triode Q2, a second voltage regulator D3, a twenty-ninth capacitor C9, a thirtieth capacitor C10, a thirty-first capacitor C11, an eighteenth resistor R2, a nineteenth resistor R3, a twentieth resistor R4, a twenty-first resistor R5, a twenty-second resistor R6, a twenty-third resistor R7, a twenty-fourth resistor R11, a twenty-fifth resistor R12, a twenty-sixth resistor R13, a twenty-seventh resistor R14, a twenty-eighth resistor R15, and an amplifier U2-A;
[0084] The triode Q2 is connected in parallel with the twenty-ninth capacitor C9 and the twentieth resistor R4. One of the parallel terminals is connected to the twenty-second resistor R6, and the other parallel terminal is connected to the reference ground. The twenty-second resistor R6 is connected to the twenty-first resistor R5 and the amplifier U2-A. The twenty-first resistor R5 is connected to the eighteenth resistor R2. The eighteenth resistor R2, the nineteenth resistor R3, and the thirtieth capacitor C10 are connected to the non-inverting input terminal of the amplifier U2-A. The thirty-first capacitor C11 and the twenty-third resistor R7 are connected to the inverting input terminal of the amplifier U2-A. The twenty-third resistor R7 is connected to the second voltage regulator D3, the twenty-seventh resistor R14, and the twenty-eighth resistor R15. The nineteenth resistor R3, the thirtieth capacitor C10, the thirty-first capacitor C11, the second voltage regulator D3, and the twenty-eighth resistor R15 are connected to the reference ground;
[0085] The twenty-fourth resistor R11, the twenty-fifth resistor R12, the twenty-sixth resistor R13, and the twenty-seventh resistor R14 are connected in series.
[0086] Through the twenty-fourth resistor R11, the twenty-fifth resistor R12, the twenty-sixth resistor R13, the twenty-seventh resistor R14, the twenty-eighth resistor R15, the second voltage regulator D3, the twenty-third resistor R7, and the thirty-first capacitor C11, the sampling from 400V_DC is sent to the amplifier U2-A. The power supplies of VCC and the frequency pulse width controller are the same. The eighteenth resistor R2, the nineteenth resistor R3, and the thirtieth capacitor C10 are used to divide the voltage from VCC to form a threshold voltage. The twenty-first resistor R5 is the pull-up resistor from the output terminal of the amplifier U2-A to VCC. When the sampling voltage of the main voltage 400V_DC is less than the threshold voltage, it indicates that the main voltage is low. Then the output terminal of the amplifier U2-A is high. Through the twenty-second resistor R6, the twentieth resistor R4, and the twenty-ninth capacitor C9, the triode Q2 is turned on, pulling the OFF port (COMP pin) of the frequency pulse width controller low. If the enable is low, the controller stops working. Therefore, when the input voltage is low, the entire voltage will not work. When the main voltage is high enough and the sampling voltage is higher than the threshold voltage, the output of the amplifier U2-A is low, then the triode Q2 is not turned on, OFF is no longer low, and the controller starts to work, and the entire circuit starts to work.
[0087] After all work properly, apply a certain load between the output OUT and the output ground (LVPSGND), and observe and test the temperature of the device under test, GaNMOS. Within a suitable range (such as 80 - 125 degrees), long-term testing can be carried out.
[0088] The above are only the preferred embodiments of the present invention and are not used to limit the present invention. For those skilled in the art, the present invention can have various changes and modifications. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.
Claims
1. A test platform for power devices, characterized in that: It includes a protection module, a main test circuit and an external DC control power supply module, wherein the protection module is connected to the main test circuit, and the external DC control power supply module is connected to the protection module and the main test circuit; The main test loop includes a frequency pulse width control module and a high voltage conversion circuit module, and the frequency pulse width control module and the high voltage conversion circuit module are used to connect with the device under test; The protection module is used to disconnect the circuit when the current exceeds the set value: The external DC control power supply module is used to provide test control power supply to the main test loop and provide protection power supply to the protection module.
2. A test platform for power devices according to claim 1, characterized in that: The frequency pulse width control module includes a frequency pulse width controller, a first capacitor C26, a second capacitor C27, a third capacitor C28, a fourth capacitor C29, a fifth capacitor C30, a sixth capacitor C31, a seventh capacitor C32, an eighth capacitor C33, a ninth capacitor C34, a first resistor R31, a second resistor R33 and a third resistor R34; One end of the first capacitor C26 and the second capacitor C27 are connected to the REF end of the frequency pulse width controller; One end of the third capacitor C28 and the first resistor R31 is connected to the COMP end of the frequency pulse width controller, and the other end is connected to the VFB end of the frequency pulse width controller; One end of the fourth capacitor C29, the fifth capacitor C30, and the sixth capacitor C31 is connected to the VCC terminal of the frequency and pulse width controller, and the other end is connected to the GND terminal of the frequency and pulse width controller; The two ends of the seventh capacitor C32 are respectively connected to the RC end and the GND end of the frequency pulse width controller; The two ends of the eighth capacitor C33 are respectively connected to the ISENSE end and the GND end of the frequency pulse width controller; Two ends of the ninth capacitor C34 are respectively connected to the RC end and the ISENSE end of the frequency pulse width controller; The two ends of the second resistor R33 are respectively connected to the RC end and the REF end of the frequency pulse width controller; Two ends of the third resistor R34 are respectively connected to the VFB end and the GND end of the frequency and pulse width controller.
3. A test platform for power devices according to claim 1, characterized in that: It also includes a rectifier module connected to the protection module, the rectifier module includes a fourth resistor R1, a rectifier module BD1, a tenth capacitor C7, and an eleventh capacitor C8; The fourth resistor R1 is connected to one end of the rectifier module BD1 , and the tenth capacitor and the eleventh capacitor are connected in parallel to one end of the rectifier module BD1 .
4. A test platform for power devices according to claim 1, characterized in that: The high-voltage conversion circuit module includes a twenty-ninth resistor R8, a fifth resistor R9, a sixth resistor R10, a seventh resistor R16, an eighth resistor R17, a ninth resistor R18, a tenth resistor R19, an eleventh resistor R20, a twelfth resistor R21, a thirteenth resistor R23, a fourteenth resistor R25, a fifteenth resistor R26, a sixteenth resistor R30, a seventeenth resistor R32, a twelfth capacitor C12, a thirteenth capacitor C13, a fourteenth capacitor C14, a fifteenth capacitor C15, a sixteenth capacitor C16, a seventeenth capacitor C17, an eighteenth capacitor C18, a nineteenth capacitor C19, a twentieth capacitor CY1, a twenty-first capacitor C24, a twenty-second capacitor C25, a first diode D1, a second diode D2, a third diode D4, a first voltage stabilizer Q4, a first inductor L5, an optical coupler U5 and a conversion circuit; One end of the first diode D1 is connected to the twelfth capacitor C12, the thirteenth capacitor C13 and the first inductor L5, and the other end is connected to the conversion circuit, the other ends of the twelfth capacitor C12 and the thirteenth capacitor C13 are connected to the twentieth capacitor CY1 and the conversion circuit, the other end of the first inductor L5 is connected to the fourteenth capacitor C14 and the fifteenth capacitor C15, and the other ends of the fourteenth capacitor C14 and the fifteenth capacitor C15 are connected to the fifteenth resistor R26, the twelfth capacitor C12, the thirteenth capacitor C13, the twentieth capacitor CY1 and the conversion circuit; One end of the second diode D2 is connected to the conversion circuit, and the other end is connected to the fifth resistor R9, the other end of the fifth resistor R9 is connected to the twenty-ninth resistor R8, the sixth resistor R10 and the sixteenth capacitor C16, the other end of the fifth resistor R9 and the other ends of the twenty-ninth resistor R8, the sixth resistor R10 and the sixteenth capacitor C16 are connected to the conversion circuit and the test device, and the other end of the test device is connected to the sixteenth resistor R30 and the seventeenth resistor R32; The two ends of the optical coupler U5 are respectively connected to the twenty-first capacitor C24, the ninth resistor R18, the fourteenth resistor R25, the tenth resistor R19, the twenty-second capacitor C25, the thirteenth resistor R23 and the first voltage regulator Q4, the twenty-first capacitor C24 is connected to the eighteenth capacitor C18 and the nineteenth capacitor C19, the ninth resistor R18 is connected to the tenth resistor R19, the fourteenth resistor R25 is connected to the first voltage regulator Q4, the tenth resistor R19 is connected to the twenty-second capacitor C25 and the first voltage regulator Q4, the twenty-second capacitor C25 is connected to the twelfth resistor R21, the twelfth resistor R21 is connected to the first voltage regulator Q4, the eleventh resistor R20 and the fifteenth resistor R26, the other end of the fifteenth resistor R26 is connected to the first voltage regulator Q4, the other ends of the eighteenth capacitor C18 and the nineteenth capacitor C19 are connected to the seventh resistor R16, and the seventh resistor R16, the eighth resistor R17 and the eleventh resistor R20 are connected in series; The third diode D4 is connected to the conversion circuit and the seventeenth capacitor C17.
5. A test platform for power devices according to claim 1, characterized in that: Also included is a feedback network power supply module, including a third voltage stabilizer Q1, a twenty-third capacitor C3, a twenty-fourth capacitor C4, a twenty-fifth capacitor C5, a twenty-sixth capacitor C6, a twenty-seventh capacitor C35 and a twenty-eighth capacitor C36; The twenty-third capacitor C3, the twenty-fourth capacitor C4, the twenty-fifth capacitor C5, the twenty-sixth capacitor C6, the twenty-seventh capacitor C35 and the twenty-eighth capacitor C36 are connected in parallel, and the third voltage regulator Q1 is connected in parallel between the twenty-fourth capacitor C4 and the twenty-fifth capacitor C5.
6. A test platform for power devices according to claim 1, characterized in that: It also includes a main undervoltage protection module, including a transistor Q2, a second voltage stabilizer D3, a twenty-ninth capacitor C9, a thirtieth capacitor C10, a thirty-first capacitor C11, an eighteenth resistor R2, a nineteenth resistor R3, a twentieth resistor R4, a twenty-first resistor R5, a twenty-second resistor R6, a twenty-third resistor R7, a twenty-fourth resistor R11, a twenty-fifth resistor R12, a twenty-sixth resistor R13, a twenty-seventh resistor R14, a twenty-eighth resistor R15 and an amplifier U2-A; The transistor Q2 is connected in parallel with the twenty-ninth capacitor C9 and the twentieth resistor R4, one of the parallel ends of which is connected to the twenty-second resistor R6, the twenty-second resistor R6 is connected to the twenty-first resistor R5 and the amplifier U2-A, the twenty-first resistor R5 is connected to the eighteenth resistor R2, the eighteenth resistor R2, the nineteenth resistor R3 and the thirtieth capacitor C10 are connected to the non-inverting input terminal of the amplifier U2-A, the thirty-first capacitor C11 and the twenty-third resistor R7 are connected to the inverting input terminal of the amplifier U2-A, the twenty-third resistor R7 is connected to the second regulator D3, the twenty-seventh resistor R14 and the twenty-eighth resistor R15, the nineteenth resistor R3 is connected to the thirtieth capacitor C10, the thirty-first capacitor C11, the second regulator D3 and the twenty-eighth resistor R15; The twenty-fourth resistor R11, the twenty-fifth resistor R12, the twenty-sixth resistor R13 and the twenty-seventh resistor R14 are connected in series.