Memory and electronic equipment
By setting up the main control chip and communication module on the carrier and establishing communication connections with electronic devices, the problem of large area of the motherboard in the prior art is solved, and the miniaturization of memory and the use of large-capacity batteries are realized.
Patent Information
- Application Number
- CN202421841216.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-07-31
- Publication Date
- 2025-06-24
- Estimated Expiration
- 2034-07-31
AI Technical Summary
In existing electronic devices, the main control chip and the communication module are connected to the motherboard through separate solutions, resulting in a large area of the motherboard, making it difficult to achieve a miniaturized design, especially in devices that require large-capacity batteries.
A memory is designed to reduce the space occupation of the main control chip and the communication module by setting up a main control chip and a communication module on the carrier, and establishing a communication connection with the electronic device through several connection points.
The memory miniaturization design is realized, reducing the space occupation of the main control chip and communication module, and providing more space for setting up large-capacity batteries, thereby extending the battery life of the device.
Smart Images
Figure CN223022914U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the technical field of electronic devices, and in particular, to a memory and an electronic device. Background Art
[0002] Currently, in current electronic devices, the main control chip and the communication module are connected to the motherboard through separate schemes to work, thus occupying a relatively large motherboard area, which poses a huge challenge to the system design of many motherboard miniaturization projects that require large-capacity batteries.
[0003] Therefore, how to achieve miniaturized design has become an urgent problem to be solved. Utility Model Content
[0004] The purpose of the embodiments of this application is to provide a memory and an electronic device.
[0005] To solve the above technical problems, the embodiments of this application provide the following technical solutions:
[0006] The first aspect of this application provides a memory, including:
[0007] A main control chip;
[0008] A storage area, having a data read / write channel with the main control chip, for storing data content;
[0009] A carrier for carrying and conducting the main control chip and the storage area, the main control chip and the storage area being provided on a first side of the carrier;
[0010] A communication module provided on a second side of the carrier, the second side and the first side being opposite sides of the carrier.
[0011] In some modified embodiments of the first aspect of this application, it further includes:
[0012] A plurality of connection points provided on the carrier, the plurality of connection points being used to establish a first communication connection with an accessed electronic device;
[0013] Wherein, a first group of connection points among the plurality of connection points is connected to the main control chip, a second group of connection points among the plurality of connection points is connected to the communication module, and the main control chip and / or the communication module can communicate with the electronic device through the first communication connection.
[0014] In some modified embodiments of the first aspect of this application, the first communication connection is at least one of a Peripheral Component Interconnect Express (PCIE) connection, a Serial Advanced Technology Attachment (SATA) connection, a Universal Serial Bus (USB) interface connection, a Compute Express Link (CXL) connection, or a Thunderbolt connection.
[0015] In some modified embodiments of the first aspect of the present application, the communication module includes at least one of a Wi-Fi communication module, a Bluetooth communication module, a mobile network communication module, and a near-field communication module.
[0016] In some modified embodiments of the first aspect of the present application, the plurality of connection points include multiple groups of differential signal connection points and ground connection points, and a ground connection point is provided between adjacent two groups of the differential signal connection points.
[0017] In a second aspect, the present application further provides an electronic device, including a memory, wherein the memory includes:
[0018] A main control chip;
[0019] A storage area having a data read / write channel with the main control chip for storing data content;
[0020] A carrier for carrying and conducting the main control chip and the storage area, and the main control chip and the storage area are disposed on a first side of the carrier;
[0021] A communication module disposed on a second side of the carrier, and the second side and the first side are opposite sides of the carrier.
[0022] In some modified embodiments of the first aspect of the present application, the electronic device further includes a first processor that establishes a first communication connection with the memory;
[0023] A plurality of connection points for establishing a first communication connection with the first processor are disposed on the carrier;
[0024] Wherein, a first group of connection points among the plurality of connection points is connected to the main control chip, a second group of connection points among the plurality of connection points is connected to the communication module, and the main control chip and / or the communication module can communicate with the first processor through the first communication connection.
[0025] In some modified embodiments of the first aspect of the present application, the first communication connection is at least one of a Peripheral Component Interconnect Express (PCIE) connection, a Serial Advanced Technology Attachment (SATA) connection, a Universal Serial Bus (USB) interface connection, a Compute Express Link (CXL) connection, or a Thunderbolt connection.
[0026] In some modified embodiments of the first aspect of the present application, the communication module includes at least one of a Wi-Fi communication module, a Bluetooth communication module, a mobile network communication module, and a near-field communication module.
[0027] In some modified embodiments of the first aspect of the present application, the plurality of connection points include multiple groups of differential signal connection points and ground connection points, and a ground connection point is disposed between adjacent two groups of the differential signal connection points. Description of the Drawings
[0028] By reading the following detailed description with reference to the accompanying drawings, the above and other objects, features and advantages of the exemplary embodiments of the present application will become readily understood. In the drawings, several embodiments of the present application are shown by way of illustration and not limitation, and the same or corresponding reference numerals represent the same or corresponding parts, wherein:
[0029] Figure 1 Schematically shows a partial structural diagram of an electronic device provided by the present application
[0030] Figure 2 Schematically shows a diagram of connection points of a memory provided by the present application;
[0031] Explanation of the Reference Numerals in the Drawings:
[0032] Electronic device 100, memory 1, main control chip 11, storage area 12, carrier 13, first side 131, second side 132, first group of connection points 133, second group of connection points 134, communication module 14, first processor 2. Detailed Embodiments
[0033] The following will describe the exemplary embodiments of the present application in more detail with reference to the accompanying drawings. Although the exemplary embodiments of the present application are shown in the drawings, it should be understood that the present application can be implemented in various forms and should not be limited by the embodiments set forth herein. On the contrary, these embodiments are provided so that the present application can be more thoroughly understood and the scope of the present application can be fully conveyed to those skilled in the art.
[0034] In an electronic device, in the related art, the main control chip and the communication module are mainly connected to the main board through separate schemes to work, which occupies a relatively large space on the main board, so that the area of the main board needs to be set relatively large, which is not conducive to the miniaturization of the electronic device, and other components provided in the electronic device, such as a battery, will not be able to be set with a large capacity due to limited space. Therefore, the present application provides a memory, in which the main control chip and the communication module are respectively disposed on the first side and the second side of the carrier, so as to reduce the space occupied by the main control chip and the communication module, thereby achieving miniaturization and enabling the use of a large-capacity battery.
[0035] As Figure 1 and Figure 2 shown, the present application provides a memory 1, including:
[0036] Main control chip 11;
[0037] A storage area 12, having a data read / write channel with the main control chip 11, is used for storing data content;
[0038] A carrier 13 for carrying and conducting the main control chip 11 and the storage area 12, where the main control chip 11 and the storage area 12 are arranged on the first side 131 of the carrier 13;
[0039] A communication module 14 arranged on the second side 132 of the carrier 13, and the second side 132 and the first side 131 are two opposite sides of the carrier 13.
[0040] A memory 1 provided by an embodiment of the present application includes a main control chip 11, a storage area, a carrier 13, and a communication module 14. The carrier 13 has a relatively arranged second side 132 and a second side 132. The main control chip 11 and the storage area 12 are carried on the first side 131 of the carrier 13. The carrier 13 is further used to conduct the main control chip 11 and the storage area 12, so that there is a data read / write channel between the main control chip 11 and the storage area 12. The data read / write channel is used for storing data content, thereby realizing the storage of the data content in the main control chip 11. The communication module 14 is arranged on the second side 132 of the carrier 13. Thus, the main control chip 11 and the communication module 14 can be arranged on the carrier 13 at the same time, and the main control chip 11 and the communication module 14 can be arranged correspondingly, thereby reducing the space occupied by the main control chip 11 and the communication module on the carrier 13, enabling the memory 1 to achieve a miniaturized design and meeting the needs of users.
[0041] In this embodiment, the main control chip 11 is a fixed hard disk, and the communication module 14 is a wireless network card.
[0042] In this embodiment, the carrier 13 is a rectangular structure, and the size of the carrier 13 can be 22mm * 24mm. The size of the carrier 13 is at least larger than the larger one of the sizes of the main control chip 11 and the communication module 14.
[0043] In an embodiment of the present application, a plurality of connection points are arranged on the carrier 13, and the plurality of connection points are used to establish a first communication connection with the accessed electronic device 100;
[0044] Among them, a first group of connection points 133 in the plurality of connection points are connected to the main control chip 11, a second group of connection points 134 in the plurality of connection points are connected to the communication module 14, and the main control chip 11 and / or the communication module 14 can communicate with the electronic device 100 through the first communication connection.
[0045] In this embodiment, there are several connection points on the carrier 13. The several connection points include a first group of connection points 133 and a second group of connection points 134. One end of the first group of connection points 133 is connected to the main control chip 11, and a first communication connection is established between the other end and the accessed electronic device 100. One end of the second group of connection points 134 is connected to the communication module 14, and a first communication connection is established between the other end and the accessed electronic device 100. Thus, the main control chip 11 on the carrier 13 is connected to the accessed electronic device 100 through the first group of connection points 133. Furthermore, data content can be transmitted between the main control chip 11 and the accessed electronic device 100. In addition, the communication module 14 on the carrier 13 can be connected to the accessed electronic device 100 through the second group of connection points 134, so that a communication connection can be established between the communication module 14 and the accessed electronic device 100 to facilitate signal reception and transmission.
[0046] As shown in Table 1, there are several connection points provided on the carrier 13. Among them, the odd pin points on the left side of the table are the first group of connection points 133 connected to the main control chip 11, and the even pin points on the right side of the table are the second group of connections connected to the communication module 14. Among them, pin6, Pin 8, Pin 20, Pin 22, Pin 24, Pin 26, Pin 28, Pin 30, Pin 32, Pin 34, Pin 36, Pin 38, Pin 40, Pin 42, Pin44, Pin 46, Pin 48, Pin 56, Pin 58 are redefinitions of the PC pins without functions. So that the communication module has voltage pins, Bluetooth pins, signal transmission pins, signal reception pins, clock signal pins, clock control signal pins, and wake-up control signal pins.
[0047]
[0048]
[0049]
[0050] Table 1
[0051] As Figure 1 and Figure 2As shown in the figure, the main control chip 11 is connected to the connected electronic device 100 through 4 PCIE connection lines. Among them, Pin5, Pin 7, Pin 11, and Pin 13 are connected to the connected electronic device 100 through a PCIE connection line, Pin17, Pin 19, Pin 23, and Pin 25 are connected to the connected electronic device 100 through a PCIE connection line, Pin29, Pin 31, Pin 35, and Pin 37 are connected to the connected electronic device 100 through a PCIE connection line, and Pin41, Pin 43, Pin 47, and Pin 49 are connected to the connected electronic device 100 through a PCIE connection line, so as to realize signal interaction between the main control chip 11 and the electronic device 100. The communication module 14 is connected to the access device through 1 PCIE connection line. Among them, Pin28, Pin 30, Pin 34, and Pin 36 are connected to the connected electronic device 100 through a PCIE connection line, so as to realize signal interaction between the communication module 14 and the electronic device 100.
[0052] In the embodiment of the present application, the first communication connection is at least one of a Peripheral Component Interconnect Express (PCIE) connection, a Serial Advanced Technology Attachment (SATA) connection, a Universal Serial Bus (USB) interface connection, a Compute Express Link (CXL) connection, or a Thunderbolt connection.
[0053] In this embodiment, there are several connection points on the carrier 13. The several connection points are used to establish a first communication connection with the connected electronic device 100. The first communication connection can be at least one of a Peripheral Component Interconnect Express (PCIE) connection, a Serial Advanced Technology Attachment (SATA) connection, a Universal Serial Bus (USB) interface connection, a Compute Express Link (CXL) connection, or a Thunderbolt connection, so as to connect the connected electronic device 100 to the main control chip 11 and / or the communication module 14 through the first communication connection, thereby realizing the transmission of data content between the main control chip 11 and the connected electronic device 100, and the communication connection between the communication module 14 and the connected electronic device 100, so as to facilitate the reception and transmission of signals.
[0054] In the embodiment of the present application, the communication module 14 includes at least one of a Wi-Fi communication module 14, a Bluetooth communication module 14, a mobile network communication module 14, and a Near Field Communication (NFC) module 14.
[0055] In this embodiment, the memory 1 includes a carrier 13, a main control chip 11, a storage area 12, and a communication module 14. The carrier 13 has a first side 131 and a second side 132 that are oppositely arranged. The main control chip 11 and the storage area 12 are arranged on the first side 131 of the carrier 13, and the communication module 14 is arranged on the second side 132 of the carrier 13. The communication module 14 can be a Wi-Fi communication module 14, a Bluetooth communication module 14, a mobile network communication module 14, or a near-field communication module 14, so as to implement Wi-Fi communication, Bluetooth communication, mobile network communication, and / or near-field communication of the memory 1.
[0056] In this embodiment, the carrier 13 is connected to the communication module 14 on the carrier 13 through a second group of connection points 134. The second group of connection points 134 can be one. A first communication connection is formed between one connection point and the access electronic device 100 through a PCIE connection line connected to the connection point, so as to realize the connection between the access electronic device 100 and the communication module 14 through the above-mentioned one PCIE connection line. The carrier 13 is connected to the main control chip 11 on the carrier 13 through a first group of connection points 133. The first group of connection points 133 can be four. A first communication connection is formed between the four connection points and the access electronic device 100 through four PCIE connection lines respectively connected to the four connection points, so as to realize the connection between the access electronic device 100 and the main control chip 11 through the above-mentioned four PCIE connection lines.
[0057] In the embodiment of the present application, the several connection points include multiple groups of differential signal connection points and grounding connection points, and a grounding connection point is arranged between adjacent two groups of the differential signal connection points.
[0058] In this embodiment, a grounding connection point is arranged between adjacent two groups of differential signal connection points, so as to ensure the integrity of the signal.
[0059] On the other hand, the present application further provides an electronic device 100, including the memory 1 as described above, and the memory 1 includes a main control chip 11;
[0060] A storage area 12, having a data reading and writing channel with the main control chip 11, and being used for storing data content;
[0061] A carrier 13 for carrying and conducting the main control chip 11 and the storage area 12, and the main control chip 11 and the storage area 12 are arranged on the first side 131 of the carrier 13;
[0062] A communication module 14 arranged on the second side 132 of the carrier 13, and the second side 132 and the first side 131 are two opposite sides of the carrier 13.
[0063] In an electronic device 100 provided by the present application, it includes a memory 1. The memory 1 includes a main control chip 11, a storage area, a carrier 13, and a communication module 14. The carrier 13 has a relatively arranged second side 132 and a second side 132. On the first side 131 of the carrier 13, the main control chip 11 and the storage area 12 are carried. The carrier 13 is also used to conduct the active chip and the storage area 12, so that there is a data read-write channel between the main control chip 11 and the storage area 12. The data read-write channel is used to store data content, thereby realizing the storage of data content. The communication module 14 is arranged on the second side 132 of the carrier 13. Thus, the main control chip 11 and the communication module 14 are respectively located on the first side 131 and the second side 132 of the carrier 13, reducing the occupied space area on the carrier 13, enabling the electronic device 100 to achieve a miniaturized design, meeting the needs of users. Moreover, the reduction in the space occupied by the main control chip 11 and the communication module 14 on the carrier 13 allows the electronic device 100 to have more space to place a battery, increasing the battery capacity and extending the overall battery life, enhancing the user experience.
[0064] In an embodiment of the present application, the electronic device 100 further includes a first processor 2 that establishes a first communication connection with the memory 1;
[0065] A number of connection points are arranged on the carrier 13 that establish a first communication connection with the first processor 2;
[0066] Among them, a first group of connection points 133 among the number of connection points are connected to the main control chip 11, a second group of connection points 134 among the number of connection points are connected to the communication module 14, and the main control chip 11 and / or the communication module 14 can communicate with the first processor 2 through the first communication connection.
[0067] In this embodiment, the electronic device 100 includes a memory 1 and a first processor 2. The memory 1 includes a carrier 13, a main control chip 11, a storage area 12, and a communication module 14. The main control chip 11 and the storage area 12 are disposed on the first side 131 of the carrier 13 and are connected through a data read / write channel. The communication module 14 is disposed on the second side 132 of the carrier 13. The carrier 13 has a plurality of connection points, which include a first group of connection points 133 and a second group of connection points 134. One end of the first group of connection points 133 is connected to the main control chip 11, and a first communication connection is established between the other end and the first processor 2. One end of the second group of connection points 134 is connected to the communication module 14, and a first communication connection is established between the other end and the first processor 2. Thus, the main control chip 11 on the carrier 13 is connected to the first processor 2 through the first group of connection points 133, so that data content can be transmitted between the main control chip 11 and the first processor 2. In addition, the communication module 14 on the carrier 13 can be connected to the first processor 2 through the second group of connection points 134, so that a communication connection can be established between the communication module 14 and the first processor 2 to facilitate signal reception and transmission.
[0068] In the embodiment of the present application, the first communication connection is at least one of a Peripheral Component Interconnect Express (PCIE) connection, a Serial Advanced Technology Attachment (SATA) connection, a Universal Serial Bus (USB) interface connection, a Compute Express Link (CXL) connection, or a Thunderbolt connection.
[0069] In this embodiment, the carrier 13 has a plurality of connection points for establishing a first communication connection with the first processor 2. The first communication connection can be at least one of a Peripheral Component Interconnect Express (PCIE) connection, a Serial Advanced Technology Attachment (SATA) connection, a Universal Serial Bus (USB) interface connection, a Compute Express Link (CXL) connection, or a Thunderbolt connection, so as to connect the first processor 2 to the main control chip 11 and / or the communication module 14 through the first communication connection, thereby realizing the transmission of data content between the main control chip 11 and the first processor 2, and the communication connection between the communication module 14 and the first processor 2 to facilitate signal reception and transmission.
[0070] As shown in Table 2, there are several connection points provided on the carrier 13. Among them, the odd pin points on the left side of the table are the first group of connection points 133 connected to the main control chip 11, and the even pin points on the right side of the table are the second group of connections connected to the communication module 14. Among them, Pin6, Pin 8, Pin 20, Pin 22, Pin 24, Pin 26, Pin 28, Pin 30, Pin 32, Pin 34, Pin 36, Pin 38, Pin 40, Pin 42, Pin44, Pin 46, Pin 48, Pin 56, Pin 58 are the redefinitions of the PC pins without functions.
[0071]
[0072]
[0073]
[0074] Table 2
[0075] As Figure 1 and Figure 2 shown, the main control chip 11 and the first processor 2 are connected by 4 PCIE connection lines. Among them, Pin5, Pin 7, Pin 11, and Pin 13 are connected to the first processor 2 through a PCIE connection line, Pin17, Pin 19, Pin23, and Pin 25 are connected to the first processor 2 through a PCIE connection line, Pin29, Pin 31, Pin 35, and Pin 37 are connected to the first processor 2 through a PCIE connection line, and Pin41, Pin 43, Pin 47, and Pin 49 are connected to the first processor 2 through a PCIE connection line, so as to realize the signal interaction between the main control chip 11 and the first processor 2. The communication module 14 and the first processor 2 are connected by 1 PCIE connection line. Among them, Pin28, Pin 30, Pin 34, and Pin 36 are connected to the first processor 2 through a PCIE connection line, so as to realize the signal interaction between the communication module 14 and the first processor 2.
[0076] In this embodiment, several connection ports corresponding to several connection points in the memory 1 are also provided in the first processor 2 to realize the connection with the memory 1
[0077] In the embodiment of the present application, the communication module 14 includes at least one of a Wi-Fi communication module 14, a Bluetooth communication module 14, a mobile network communication module 14, and a near-field communication module 14.
[0078] In this embodiment, the memory 1 includes a carrier 13, a main control chip 11, a storage area 12, and a communication module 14. The carrier 13 has a first side 131 and a second side 132 that are oppositely arranged. The main control chip 11 and the storage area 12 are arranged on the first side 131 of the carrier 13, and the communication module 14 is arranged on the second side 132 of the carrier 13. The communication module 14 can be a Wi-Fi communication module 14, a Bluetooth communication module 14, a mobile network communication module 14, or a near-field communication module 14, so as to implement Wi-Fi communication, Bluetooth communication, mobile network communication, and / or near-field communication of the memory 1.
[0079] In this embodiment, the carrier 13 is connected to the communication module 14 on the carrier 13 through a second group of connection points 134. The second group of connection points 134 can be one. A first communication connection is formed between one connection point and the first processor 2 through a PCIE connection line connected to the connection point, so as to realize the connection between the first processor 2 and the communication module 14 through the above-mentioned one PCIE connection line. The carrier 13 is connected to the main control chip 11 on the carrier 13 through a first group of connection points 133. The first group of connection points 133 can be four. A first communication connection is formed between the four connection points and the first processor 2 through four PCIE connection lines respectively connected to the four connection points, so as to realize the connection between the first processor 2 and the main control chip 11 through the above-mentioned four PCIE connection lines.
[0080] In the embodiment of the present application, the several connection points include multiple groups of differential signal connection points and grounding connection points, and a grounding connection point is arranged between adjacent two groups of differential signal connection points.
[0081] In this embodiment, a grounding connection point is arranged between adjacent two groups of differential signal connection points, so as to ensure the integrity of the signal.
[0082] In this embodiment, the electronic device 100 further includes a battery. The battery is arranged adjacent to the memory 1. When the space occupied by the memory 1 is smaller, the battery can occupy more space, so as to realize the setting of a large-capacity battery.
[0083] It can be understood that the relevant features in the above device can be referred to each other. In addition, the "first", "second", etc. in the above embodiments are used to distinguish each embodiment, and do not represent the advantages and disadvantages of each embodiment.
[0084] In the specification provided here, a large number of specific details are described. However, it can be understood that the embodiments of the present invention can be practiced without these specific details. In some instances, well-known structures and technologies are not shown in detail so as not to obscure the understanding of this specification.
[0085] As described above, it is only the specific implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present application can easily think of changes or substitutions, which should all be covered within the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims described above.
Claims
1. A memory, characterized in that: include: Main control chip; A storage area, having a data read and write channel with the main control chip, for storing data content; A carrier for carrying and conducting the main control chip and the storage area, wherein the main control chip and the storage area are arranged on a first side of the carrier; The communication module is arranged on the second side of the carrier, and the second side and the first side are two sides of the carrier arranged oppositely.
2. The memory according to claim 1, characterized in that: Also includes: A plurality of connection points arranged on the carrier, the plurality of connection points being used to establish a first communication connection with the connected electronic device; Among them, a first group of connection points among the several connection points are connected to the main control chip, and a second group of connection points among the several connection points are connected to the communication module. The main control chip and / or the communication module can communicate with the electronic device through the first communication connection.
3. The memory according to claim 2, characterized in that: The first communication connection is at least one of a high-speed serial computer expansion bus standard PCIE connection, a serial advanced technology attachment SATA connection, a universal serial bus interface USB connection, a high-speed interconnect protocol CXL connection, or a Thunderbolt connection.
4. The memory according to claim 1, characterized in that: The communication module includes at least one of a wireless fidelity wifi communication module, a bluetooth communication module, a mobile network communication module, and a near field communication module.
5. The memory according to claim 2, characterized in that: The plurality of connection points include a plurality of groups of differential signal connection points and ground connection points, and a ground connection point is provided between two adjacent groups of the differential signal connection points.
6. An electronic device, characterized in that: A memory is included, wherein the memory includes: Main control chip; A storage area, having a data read and write channel with the main control chip, for storing data content; A carrier for carrying and conducting the main control chip and the storage area, wherein the main control chip and the storage area are arranged on a first side of the carrier; The communication module is arranged on the second side of the carrier, and the second side and the first side are two sides of the carrier arranged oppositely.
7. The electronic device according to claim 6, characterized in that: The electronic device further includes a first processor having a first communication connection established with the memory; The carrier is provided with a plurality of connection points for establishing a first communication connection with the first processor; Among them, a first group of connection points among the several connection points are connected to the main control chip, and a second group of connection points among the several connection points are connected to the communication module. The main control chip and / or the communication module can communicate with the first processor through the first communication connection.
8. The electronic device according to claim 7, characterized in that: The first communication connection is at least one of a high-speed serial computer expansion bus standard PCIE connection, a serial advanced technology attachment SATA connection, a universal serial bus interface USB connection, a high-speed interconnect protocol CXL connection, or a Thunderbolt connection.
9. The electronic device according to claim 6, characterized in that: The communication module includes at least one of a wireless fidelity wifi communication module, a bluetooth communication module, a mobile network communication module, and a near field communication module.
10. The electronic device according to claim 7, characterized in that: The plurality of connection points include a plurality of groups of differential signal connection points and ground connection points, and a ground connection point is provided between two adjacent groups of the differential signal connection points.