Circuit structure and frequency converter structure

Abstract

The utility model provides a circuit structure and a frequency converter structure, and the circuit structure comprises a sampling circuit which is connected with a frequency converter so as to collect an electric signal of the frequency converter; the comparison circuit is used for comparing the electric signals of the frequency converter so as to output level signals according to a comparison result; the triode Q1 is connected with the triode Q2; the base electrode of the triode Q2 is connected with the comparison circuit so as to conduct the triode Q1 according to the level signal; the power supply voltage Vcc is connected with the triode Q1, and when the triode Q1 is conducted by the triode Q2, the power supply voltage Vcc is communicated to the base electrode of the triode Q2; and when the triode Q1 is conducted, the power supply voltage Vcc is conducted to the relay, so that the relay cuts off the input circuit of the frequency converter. The circuit structure provided by the utility model solves the technical problem of repeated loss of the power module in the use process of the frequency converter in the prior art.

Description

Technical Field

[0001] The utility model relates to the technical field of frequency converter protection, and particularly relates to a circuit structure and a frequency converter structure. Background Art

[0002] During the use of a frequency converter, problems such as overcurrent or short circuit may occur. To avoid accidents and protect the frequency converter in a timely manner, when an overcurrent or short circuit fault occurs in the circuit, the frequency converter will first perform protection and then output current.

[0003] However, the existing overcurrent protection circuit designs are relatively complex. When the protection action is triggered, problems such as repeated loss of the power module are likely to occur. This not only greatly increases the product development, maintenance costs, and product development time, but also significantly increases the maintenance cost.

[0004] Therefore, the existing technology needs to be further developed. Summary of the Utility Model

[0005] The purpose of the utility model is to overcome the above technical deficiencies and provide a circuit structure and a frequency converter structure to solve the technical problem of repeated loss of the power module during the use of the frequency converter in related technologies.

[0006] To achieve the above technical purpose, the utility model adopts the following technical solutions: A circuit structure is provided, including: a sampling circuit connected to the frequency converter to collect the electrical signal of the frequency converter; a comparison circuit that compares the electrical signal of the frequency converter to output a level signal according to the comparison result; a triode Q2 and a triode Q1 connected to the triode Q2; the base of the triode Q2 is connected to the comparison circuit to turn on the triode Q1 according to the level signal; a supply voltage Vcc, the supply voltage Vcc is connected to the triode Q1, and when the triode Q2 turns on the triode Q1, the supply voltage Vcc is connected to the base of the triode Q2; a relay, when the triode Q1 turns on, the supply voltage Vcc is conducted to the relay, thereby causing the relay to cut off the input circuit of the frequency converter.

[0007] Further, the circuit structure includes: a load RL provided on the frequency converter; a resistor R3 connected in series with the load RL; an input circuit, one end of the input circuit is connected between the load RL and the resistor R3, and the other end of the input circuit is connected to the inverting end of the sampler U1; a resistor R2 is provided on the input circuit.

[0008] Further, the sampling circuit includes: a zener diode D1, the zener diode D1 is connected in parallel with the resistor R3; and / or, a capacitor C1, the capacitor C1 is connected in parallel with the resistor R3.

[0009] Further, the sampling circuit includes: an amplifying circuit, which is connected to the non-inverting terminal of the sampler U1, and a resistor R1 is provided on the amplifying circuit; the output terminal of the sampler U1 is connected to the non-inverting input terminal of U1 in parallel through a resistor R4 and a capacitor C2.

[0010] Further, the comparison circuit includes a comparator U2, the non-inverting terminal of the comparator U2 is connected to the output terminal of the sampler U1, and the output terminal of the comparator U2 is connected to the base of the triode Q2.

[0011] Further, the comparison circuit includes: a resistor R7, which is connected to the output terminal of the comparator U2; a pull-up voltage, which is connected in series with the resistor R7.

[0012] Further, the triode Q1 is a PNP type triode, the triode Q2 is an NPN type triode, the supply voltage Vcc is connected to the collector of the triode Q1, and the base of the triode Q1 is connected to the collector of the triode Q2 through a resistor R9.

[0013] Further, the circuit structure includes a self-locking circuit, one end of the self-locking circuit is connected to the emitter of the triode Q1, the other end of the self-locking circuit is connected to the base of the triode Q2, and a resistor R10 is provided on the self-locking circuit.

[0014] Further, the emitter of the triode Q1 is connected to the relay.

[0015] A frequency converter structure includes a circuit structure, and the circuit structure is the above-mentioned circuit structure.

[0016] Beneficial effects:

[0017] 1. The circuit structure of the present utility model provides an overcurrent protection self-locking circuit, which avoids the situation that the load of the subsequent stage far exceeds the rated output load of the inverter, prevents repeated restarting and burning out of power devices due to the failure to eliminate the excessive output load, can effectively protect the frequency converter, extend the service life of the frequency converter, and reduce the product maintenance cost.

[0018] 2. The present utility model avoids the problem of power device loss caused by repeated triggering of overcurrent protection actions, improves the anti-interference ability, reduces the hardware cost, and has a delay protection function at the same time, which is safe, reliable and convenient to use. Description of the Drawings

[0019] Figure 1 is a schematic structural diagram of the circuit structure adopted in the embodiment of the present utility model;

[0020] Figure 2 is a schematic diagram of the working principle of the circuit structure adopted in the embodiment of the present utility model. Specific Embodiments

[0021] To enable those skilled in the art to better understand the solution of this application, the technical solutions in the embodiments of this application will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of this application. Obviously, the described embodiments are only a part of the embodiments of this application, rather than all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without making creative efforts shall fall within the protection scope of this application.

[0022] According to an embodiment of the present invention, a circuit structure is provided, including: a sampling circuit, the sampling circuit is connected to a frequency converter to collect the electrical signal of the frequency converter; a comparison circuit, the comparison circuit compares the electrical signal of the frequency converter to output a level signal according to the comparison result; a triode Q2 and a triode Q1 connected to the triode Q2; the base of the triode Q2 is connected to the comparison circuit to turn on the triode Q1 according to the level signal; a supply voltage Vcc, the supply voltage Vcc is connected to the triode Q1, when the triode Q2 turns on the triode Q1, the supply voltage Vcc is connected to the base of the triode Q2; a relay, when the triode Q1 is turned on, the supply voltage Vcc is turned on to the relay, so that the relay cuts off the input circuit of the frequency converter. With the above settings, when the signal of the frequency converter is abnormal, the relay cuts off the input circuit of the frequency converter. At the same time, through the control of the triode, a self-locking circuit is formed to lock the relay, realizing automatic protection of the circuit when the controller has an overcurrent. In this way, when the electrical signal of the frequency converter fluctuates, the relay will not be closed, avoiding repeated triggering of the relay to close and open, thus solving the technical problem of repeated loss of the power module in the frequency converter during use in the related art.

[0023] In the circuit structure of this embodiment, refer to Figure 1 , the circuit structure includes: a load RL provided on the frequency converter; a resistor R3 connected in series with the load RL; an input circuit, one end of the input circuit is connected between the load RL and the resistor R3, and the other end of the input circuit is connected to the inverting terminal of the sampler U1; a resistor R2 is provided on the input circuit. In this way, the current on the resistor R3 is equal to the current on the load RL, so that the change in the voltage on the resistor R3 can reflect the change in the load voltage to collect the electrical signal of the frequency converter.

[0024] Refer to Figure 1 , in the circuit structure of this embodiment, the sampling circuit includes: a zener diode D1, the zener diode D1 is connected in parallel with the resistor R3; and / or, a capacitor C1, the capacitor C1 is connected in parallel with the resistor R3.

[0025] Specifically, after the voltage stabilizing diode D1 and the capacitor C1 are connected in parallel, they are then connected in series with the resistor R2 and in parallel with the resistor R3. In this way, the voltage stabilizing diode D1 plays a protective role, protecting the input terminal of the operational amplifier from being damaged by excessive voltage, and the capacitor C1 plays an anti-interference role. The signal sampled by the sampling resistor R3 is amplified by the operational amplifier U1.

[0026] In the circuit structure of this embodiment, refer to Figure 1 , the sampling circuit includes: an amplifying circuit, the amplifying circuit is connected to the non-inverting terminal of the sampler U1, and a resistor R1 is provided on the amplifying circuit; the output terminal of the sampler U1 is connected in parallel with the resistor R4 and the capacitor C2 and fed back to the non-inverting input terminal of U1. In this way, U1, the resistor R1, and the resistor R4 form a non-inverting amplifying circuit, and the filtering effect is achieved through the capacitor C2.

[0027] Refer to Figure 1 , in the circuit structure of this embodiment, the comparison circuit includes a comparator U2, the non-inverting terminal of the comparator U2 is connected to the output terminal of the sampler U1, and the output terminal of the comparator U2 is connected to the base of the triode Q2. In this way, by setting the comparator U2, the sampled signal is compared with the signal passing through the resistor R5 to output different level signals. When an abnormal current is detected, the comparator U2 can be controlled to output an electrical signal that drives the triode Q2 to conduct, thereby turning off the frequency converter.

[0028] In the circuit structure of this embodiment, refer to Figure 1 , the comparison circuit includes: a resistor R7, the resistor R7 is connected to the output terminal of the comparator U2; a pull-up voltage, the pull-up voltage is connected in series with the resistor R7. In this way, the resistor R7 is the pull-up resistor for the comparator output, so that the output signal of the comparator U2 reaches the high level that triggers the triode Q2.

[0029] Refer to Figure 1 , in the circuit structure of this embodiment, the triode Q1 is a PNP type triode, the triode Q2 is an NPN type triode, the supply voltage Vcc is connected to the collector of the triode Q1, and the base of the triode Q1 is connected to the collector of the triode Q2 through the resistor R9. In this way, the supply voltage Vcc can provide voltage for the relay, and when the triode Q1 is triggered, it can also continuously provide voltage for the triode Q1, so as to keep the frequency converter disconnected.

[0030] In the circuit structure of this embodiment, refer to Figure 1 , the circuit structure includes a self-locking circuit, one end of the self-locking circuit is connected to the emitter of the triode Q1, the other end of the self-locking circuit is connected to the base of the triode Q2, and a resistor R10 is provided on the self-locking circuit.

[0031] Specifically, the comparator U2 outputs a high level to reach the base of the triode Q2. Since the triode Q2 is an NPN-type triode, after the base inputs a high level, the triode operates in the saturation state, and the collector-to-emitter is fully conducting. Both the collector and emitter of the triode Q2 become low levels. The collector of the triode Q2 is connected to the base of the triode Q1, and at this time, the triode Q1 also becomes low level. Since the triode Q1 is a PNP-type triode, after the base inputs a low level, the triode operates in the saturation state, and the emitter-to-collector is fully conducting. Both the emitter and collector of the triode Q1 become high levels. The high level at the collector of the triode Q1 is loaded to the base of the triode Q2 through the resistor R10, making the base of the triode Q2 still a high level. In this way, a self-locking is formed, that is, even if the output of the comparator U2 becomes low level, the triode Q2 and the triode Q1 are still conducting. At the same time, after the collector of the triode Q1 becomes high level, there is current flowing through the coil of the relay, and the relay will be attracted, cutting off the input of the power supply.

[0032] In the circuit structure of this embodiment, the emitter of the triode Q1 is connected to the relay. In this way, it can drive the frequency converter to disconnect.

[0033] The frequency converter structure of this embodiment includes a circuit structure, and the circuit structure is the above-mentioned circuit structure.

[0034] Embodiment 1:

[0035] Figure 1 It is an overcurrent protection self-locking circuit diagram. The whole circuit can be divided into the following four parts: one is the sampling protection circuit, which is composed of R2, R3, D1, and C1; the second is the in-phase signal amplification circuit composed of U1, R1, C2, and R4; the third is the comparison circuit composed of the comparator U2, R5, R6, and R7. After comparing the amplified signal, it judges whether overcurrent occurs, so as to control the action of the subsequent stage; the fourth is the circuit for driving the relay composed of the triodes Q1 and Q2.

[0036] Embodiment 2:

[0037] Figure 2It is a schematic flow diagram of a circuit structure. After the frequency converter is powered on, the controller main board is energized, and the system is in an operating state at this time. The signal is compared with the set protection value after passing through the sampling and amplification circuits. The comparator U2: an IC chip, IC_LM293, is used to compare the protection value I_PEAK signal with the processed current value signal. If the voltage value of the I_PEAK signal is less than the voltage value of the signal output by U1, the comparator U2 outputs a low level, and the system operates normally; if the I_PEAK signal is greater than the voltage value of the signal output by U1, the comparator U2 outputs a high level, the system reports an overcurrent protection, and the driving triode Q2 is turned on. The collector of Q2 becomes a low level to turn on the triode Q1. After Q1 is turned on, current flows through the coil of the relay, the relay is attracted, and the input of the power supply is cut off.

[0038] The working process of the entire circuit: As can be seen from the sampling circuit, the load RL and R3 are in series. According to the principle of equal series current, the current flowing through the sampling resistor R3 is equal to the current of the load RL. Thus, the change in the voltage across the resistor R3 can reflect the change in the load voltage. The signal sampled on the R3 resistor is input to the inverting terminal of the operational amplifier through the resistor R2. The zener diode D1 plays a protective role to protect the input terminal of the operational amplifier from being damaged by excessive voltage, and the capacitor C1 plays an anti-interference role. The signal sampled by the sampling resistor R3 is amplified by the operational amplifier U1. U1 and the resistors R1, R4 form a non-inverting amplifier circuit, and the filtering effect is achieved through the capacitor C2. The amplified signal is input to the non-inverting terminal of the comparator U2, and the comparator U2 is a comparator. Through this stage of comparison, the subsequent actions are controlled, whether to cut off the power supply or other operations. The comparator U2 has an open-collector output, and the resistor R7 is the pull-up resistor for the comparator output, otherwise it cannot output a high level. When the voltage at the non-inverting terminal is greater than the voltage at the inverting terminal, the comparator U2 outputs a high level, indicating that the circuit has an overcurrent. At this time, the comparator outputs a high level to turn on the triode Q2; after Q2 is turned on, the collector of Q2 becomes a low level to turn on the triode Q1. After the triode Q1 is turned on, the output voltage VCC (15V) is applied to the base of the triode Q2 through the triode Q1 and the resistor R10, forming a self-locking function. In the traditional overcurrent protection circuit, due to the repeated triggering of the overcurrent protection action, the power devices are continuously damaged, resulting in a relatively high maintenance cost. After the comparator in this patent outputs a high level to drive the triode Q1 and the triode Q2 to be turned on, even if the output of the comparator becomes a low level later, the triode Q2 and the triode Q1 are still turned on. After the triode Q1 is turned on, current flows through the coil of the relay, and the relay is attracted. The attraction of the relay will cut off the power input, thus avoiding the problem of power device loss caused by the repeated triggering of the overcurrent protection action. (Note: In practice, decoupling capacitors should be added to the power input of chips such as integrated operational amplifiers.)

[0039] It should be noted that the terms "first", "second", etc. in the description, claims and the above-mentioned drawings of this application are used to distinguish similar objects and do not necessarily have to be used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances so that the embodiments of the present application described here can be implemented in an order other than those illustrated or described here. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device that includes a series of steps or units does not necessarily have to be limited to those steps or units clearly listed, but may include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0040] Optionally, the specific examples in this embodiment may refer to the examples described in the above embodiments, and will not be elaborated here.

[0041] The serial numbers of the above embodiments of the present application are only for description and do not represent the advantages or disadvantages of the embodiments.

[0042] In the above embodiments of the present application, the descriptions of the various embodiments have their own emphases. For the parts not detailed in a certain embodiment, reference may be made to the relevant descriptions of other embodiments.

[0043] The above are only the preferred embodiments of the present application. It should be noted that for those of ordinary skill in the art, without departing from the principle of the present application, several improvements and refinements can be made, and these improvements and refinements should also be regarded as the protection scope of the present application.

Claims

1. A circuit structure, characterized in that: include: A sampling circuit, the sampling circuit is connected to the frequency converter to collect the electrical signal of the frequency converter; A comparison circuit, wherein the comparison circuit compares the electrical signal of the frequency converter to output a level signal according to the comparison result; A transistor Q2 and a transistor Q1 connected to the transistor Q2; a base of the transistor Q2 is connected to the comparison circuit to turn on the transistor Q1 according to the level signal; A power supply voltage Vcc, wherein the power supply voltage Vcc is connected to the transistor Q1, and when the transistor Q2 turns on the transistor Q1, the power supply voltage Vcc is connected to the base of the transistor Q2; Relay, when the transistor Q1 is turned on, the supply voltage Vcc is turned on to the relay, so that the relay cuts off the input circuit of the inverter.

2. The circuit structure according to claim 1, characterized in that: The circuit structure comprises: A load RL is set on the frequency converter; A resistor R3 connected in series with the load RL; An input circuit, one end of which is connected between the load RL and the resistor R3, and the other end of which is connected to the reverse end of the sampler U1; a resistor R2 is provided on the input circuit.

3. The circuit structure according to claim 2, characterized in that: The sampling circuit comprises: A voltage zener diode D1, wherein the voltage zener diode D1 is connected in parallel with the resistor R3; and / or, Capacitor C1, the capacitor C1 is connected in parallel with the resistor R3.

4. The circuit structure according to claim 2, characterized in that: The sampling circuit comprises: An amplifier circuit is connected to the in-phase terminal of the sampler U1 and is provided with a resistor R1; the output terminal of the sampler U1 is fed back to the in-phase input terminal of U1 via a resistor R4 and a capacitor C2 in parallel.

5. The circuit structure according to claim 2, characterized in that: The comparison circuit includes a comparator U2 , a non-inverting terminal of the comparator U2 is connected to the output terminal of the sampler U1 , and an output terminal of the comparator U2 is connected to the base of the transistor Q2 .

6. The circuit structure according to claim 5, characterized in that: The comparison circuit comprises: A resistor R7, wherein the resistor R7 is connected to the output end of the comparator U2; A pull-up voltage is connected in series with the resistor R7.

7. The circuit structure according to claim 1, characterized in that: The transistor Q1 is a PNP transistor, the transistor Q2 is an NPN transistor, the power supply voltage Vcc is connected to the collector of the transistor Q1, and the base of the transistor Q1 is connected to the collector of the transistor Q2 via a resistor R9.

8. The circuit structure according to claim 7, characterized in that: The circuit structure includes a self-locking circuit, one end of the self-locking circuit is connected to the emitter of the transistor Q1, the other end of the self-locking circuit is connected to the base of the transistor Q2, and a resistor R10 is provided on the self-locking circuit.

9. The circuit structure according to claim 8, characterized in that: The emitter of the transistor Q1 is connected to the relay.

10. A frequency converter structure, comprising a circuit structure, characterized in that: The circuit structure is the circuit structure according to any one of claims 1 to 9.

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