Voltage and current dual detection circuit
By designing a voltage and current dual detection circuit including a current detection module and a voltage detection module, the problem of two independent circuits in the prior art is solved, and a circuit is detected simultaneously, reducing the cost.
Patent Information
- Application Number
- CN202421001755.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-05-10
- Publication Date
- 2025-06-27
- Estimated Expiration
- 2034-05-10
AI Technical Summary
In the prior art, in order to detect the voltage and current of the semiconductor refrigeration sheet, two independent circuits need to be provided, resulting in higher costs.
A voltage and current dual detection circuit is designed, including a current detection module and a voltage detection module. Through components such as chips U11 and U12, the detection of voltages at the load input and output terminals and the calculation of current values are realized, forming a signal CS and a signal ADC_HPWP for processing by the upper computer.
A circuit is implemented to perform voltage and current detection simultaneously, reducing costs and improving detection efficiency.
Smart Images
Figure CN223038034U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of detection circuits, specifically a voltage and current dual-detection circuit. Background Art
[0002] With the continuous development of high-speed electric motorcycles, due to the limitations of the charging and discharging performance of the battery cells and the increase in the power of the motor, whether for safety reasons or to improve the use efficiency, the issues of refrigeration and heating are inseparable. Therefore, the control of thermal management becomes increasingly important. Most electric motorcycles use semiconductor refrigeration chips as the cold and heat sources. In order to achieve precise adjustment, it is necessary to detect the voltage and current of the semiconductor refrigeration chip.
[0003] Currently, traditional methods respectively use a voltage detection circuit and a current detection circuit to detect the voltage and current of the semiconductor refrigeration chip. However, the method of setting the two circuits separately has a high cost. Summary of the Utility Model
[0004] The technical problem to be solved by the utility model is to provide a voltage and current dual-detection circuit, and the cost of using this detection circuit is relatively low.
[0005] To solve the above problems, the following technical solutions are provided:
[0006] The voltage and current dual-detection circuit of the utility model is characterized by including a current detection module and a voltage detection module. The current detection module is adaptively connected to the input end and the output end of the load, and is used to detect the input voltage and the output voltage of the load, obtain the current value according to the input voltage and the output voltage of the load, and convert the current value into a signal CS. The voltage detection module is adaptively connected to the input end of the load, and is used to detect the input voltage of the load to form a signal ADC_HPWP.
[0007] Among them, the current detection module includes chip U11. A capacitor C62 is connected in series between the IN+ and IN- pins of chip U11. The IN+ pin of chip U11 is grounded after being connected in series with capacitor C64. The IN+ of chip U11 is connected to one end of bead FB2. The IN- pin of chip U11 is grounded after being connected in series with capacitor C61. The IN- of chip U11 is connected to one end of bead FB1. The other end of bead FB2 is connected to the first end of resistor R80. The other end of bead FB1 is connected to the first end of resistor R77. A resistor R75 and a resistor R74 are connected in parallel between the second end of resistor R80 and the second end of resistor R77. The second end of resistor R80 is connected to the output end of the load. The input end of the load is connected to one end of resistor R69. The other end of resistor R69 is connected to one end of resistor R72. The other end of resistor R72 is respectively connected to one end of resistor R73 and the voltage detection module. The other end of resistor R73 is connected to the second end of resistor R77 and the ground terminal. The OUT pin of chip U11 is connected to one end of resistor R76. The other end of resistor R76 forms the signal CS, and this end of resistor R76 is grounded through capacitor C59. The V+ pin of chip U11 is connected to the first power supply. The V+ pin of chip U11 is respectively connected to one end of capacitor C69 and capacitor C70. The other ends of capacitor C69 and capacitor C70 are grounded.
[0008] A capacitor C58 is connected in parallel across both ends of resistor R73.
[0009] The voltage detection module includes voltage follower U12. The non-inverting input terminal of voltage follower U12 is connected to one end of resistor R72 which is connected to resistor R73. The output terminal of voltage follower U12 is respectively connected to resistor R79 and the inverting input terminal of voltage follower U12. The other end of resistor R79 forms the signal ADC_HPWP, and this end of resistor R79 is grounded through capacitor C63.
[0010] It further includes a reference voltage module which is adaptively connected to chip U11 for providing a reference voltage to chip U11.
[0011] The reference voltage module includes chip U13. The IN pin of chip U13 is connected to the second power supply. The IN pin of chip U13 is respectively connected to one end of capacitor C65 and capacitor C66. The other ends of capacitor C65 and capacitor C66 are grounded. The OUT pin of chip U13 is respectively connected to one end of capacitor C67 and capacitor C68. The other ends of capacitor C67 and capacitor C68 are grounded. The OUT pin of chip U13 forms the reference voltage, and the OUT pin of chip U13 is connected to the REF pin of chip U11.
[0012] Adopting the above solution has the following advantages:
[0013] Since the current detection module of the voltage and current dual-detection circuit of the present utility model is adaptively connected to the input end and the output end of the load, it is used to detect the input voltage and the output voltage of the load, obtain the current value according to the input voltage and the output voltage of the load, and convert the current value into a signal CS; the voltage detection module is adaptively connected to the input end of the load and is used to detect the input voltage of the load to form a signal ADC_HPWP. By inputting the signal CS and the signal ADC_HPWP into the upper computer, the effect of simultaneously detecting voltage and current with one circuit can be achieved, and the cost is lower compared with the need to set up two circuits in the background technology. Brief Description of the Drawings
[0014] Figure 1 It is a schematic circuit diagram of the voltage and current dual-detection circuit of the present utility model. Detailed Embodiment
[0015] The present utility model will be further described in detail below with reference to the drawings.
[0016] As Figure 1As shown in the figure, the voltage and current dual-detection circuit of the present utility model includes a current detection module and a voltage detection module. The current detection module contains a chip U11 of model INA199A1DCKR and a reference voltage module, and the reference voltage module is adaptively connected to the chip U11 for providing a reference voltage for the chip U11. The reference voltage module includes a chip U13 of model REF3020AIDBZR. The IN pin of the chip U13 is connected to the second power supply, and the second power supply is VDD5V. The IN pin of the chip U13 is respectively connected to one end of a capacitor C65 and a capacitor C66, and the other ends of the capacitor C65 and the capacitor C66 are grounded. The OUT pin of the chip U13 is respectively connected to one end of a capacitor C67 and a capacitor C68, and the other ends of the capacitor C67 and the capacitor C68 are grounded. The OUT pin of the chip U13 forms a reference voltage, and the OUT pin of the chip U13 is connected to the REF pin of the chip U11. A capacitor C62 is connected in series between the IN+ pin and the IN- pin of the chip U11. The IN+ pin of the chip U11 is grounded after being connected in series with a capacitor C64. The IN+ of the chip U11 is connected to one end of a bead FB2. The IN- pin of the chip U11 is grounded after being connected in series with a capacitor C61. The IN- of the chip U11 is connected to one end of a bead FB1. The other end of the bead FB2 is connected to the first end of a resistor R80. The other end of the bead FB1 is connected to the first end of a resistor R77. A resistor R75 and a resistor R74 are connected in parallel between the second end of the resistor R80 and the second end of the resistor R77. The second end of the resistor R80 is connected to the output end of the load. The input end of the load is connected to one end of a resistor R69. The other end of the resistor R69 is connected to one end of a resistor R72. The other end of the resistor R72 is respectively connected to one end of a resistor R73 and the voltage detection module. The other end of the resistor R73 is connected to the second end of the resistor R77 and the ground terminal. A capacitor C58 is connected in parallel across both ends of the resistor R73. The OUT pin of the chip U11 is connected to one end of a resistor R76. The other end of the resistor R76 forms a signal CS, and this end of the resistor R76 is grounded through a capacitor C59. The V+ pin of the chip U11 is connected to the first power supply, and the first power supply is VDD6V. The V+ pin of the chip U11 is respectively connected to one end of a capacitor C69 and a capacitor C70, and the other ends of the capacitor C69 and the capacitor C70 are grounded. The current detection module is connected to the input end and the output end of the load, for detecting the input voltage and the output voltage of the load, obtaining a current value according to the input voltage and the output voltage of the load, and converting the current value into a signal CS.
[0017] The voltage detection module includes a voltage follower U12 of model INA199A1DCKR. The non-inverting input terminal of the voltage follower U12 is connected to one end of a resistor R72 that is connected to a resistor R73. The output terminal of the voltage follower U12 is respectively connected to a resistor R79 and the inverting input terminal of the voltage follower U12. The other end of the resistor R79 forms a signal ADC_HPWP, and this end of the resistor R79 is grounded through a capacitor C63. The voltage detection module is adaptively connected to the input terminal of the load and is used to detect the input terminal voltage of the load to form a signal ADC_HPWP.
[0018] In this embodiment, the load is a semiconductor refrigeration chip. Chips U11 and U12 are used to monitor the current and voltage of the semiconductor refrigeration chip. The specific principle is as follows:
[0019] Chip U13 provides a reference voltage for chip U11, and VDD6V provides a power supply voltage. The voltage difference between the input terminal voltage and the output terminal voltage of the semiconductor refrigeration chip after passing through voltage-dividing resistors R69, R72, and R73 at the IN- and IN+ pins of chip U11 is converted into current, and then forms a signal CS through the internal amplifier of chip U11 and is sent to the host computer (MCU) to obtain the current real-time current. The voltage follower U12 functions as a voltage follower and buffer. When the voltage fluctuates, the output pin of U12 also changes accordingly, and the voltage signal ADC_HPWP is sent to the host computer.
[0020] Resistors R69 and R72 are used as the first group of resistors, and resistor R73 is used as the second group of resistors. The voltage across R73 is the input voltage. Resistors R69 / R72 / R73 together form a voltage-dividing effect (series voltage division). After the voltage is output to the voltage follower, it is output to the host computer through the voltage follower. The power supply circuit (including VDD5V and chip U13) supplies power to U11. Resistors R75 and R74 are milliohm-level resistors.
Claims
1. A voltage and current dual detection circuit, characterized in that: It includes a current detection module and a voltage detection module; the current detection module is adaptively connected to the input end and the output end of the load, and is used to detect the input end voltage and the output end voltage of the load, obtain the current value according to the input end voltage and the output end voltage of the load, and convert the current value into a signal CS; the voltage detection module is adaptively connected to the input end of the load, and is used to detect the input end voltage of the load to form a signal ADC_HPWP.
2. The voltage and current dual detection circuit according to claim 1, characterized in that: The current detection module includes a chip U11, a capacitor C62 is connected in series between the IN+ pin and the IN- pin of the chip U11, the IN+ pin of the chip U11 is connected in series with a capacitor C64 and then grounded, the IN+ of the chip U11 is connected to one end of the magnetic bead FB2, the IN- pin of the chip U11 is connected in series with a capacitor C61 and then grounded, and the IN- of the chip U11 is connected to one end of the magnetic bead FB1; the other end of the magnetic bead FB2 is connected to the first end of the resistor R80, the other end of the magnetic bead FB1 is connected to the first end of the resistor R77, the resistor R75 and the resistor R74 are connected in parallel between the second end of the resistor R80 and the second end of the resistor R77, and the second end of the resistor R80 is connected to the output end of the load ; The input end of the load is connected to one end of the resistor R69, the other end of the resistor R69 is connected to one end of the resistor R72, the other end of the resistor R72 is respectively connected to one end of the resistor R73 and the voltage detection module, the other end of the resistor R73 is connected to the second end of the resistor R77 and the ground end; the OUT pin of the chip U11 is connected to one end of the resistor R76, the other end of the resistor R76 forms the signal CS, and this end of the resistor R76 is grounded through the capacitor C59; the V+ pin of the chip U11 is connected to the first power supply, the V+ pin of the chip U11 is respectively connected to one end of the capacitor C69 and the capacitor C70, and the other ends of the capacitor C69 and the capacitor C70 are grounded.
3. The voltage and current dual detection circuit as claimed in claim 2, characterized in that: The two ends of the resistor R73 are connected in parallel with a capacitor C58.
4. The voltage and current dual detection circuit as claimed in claim 2, characterized in that: The voltage detection module includes a voltage follower U12, the non-inverting input terminal of the voltage follower U12 is connected to one end of the resistor R72 connected to the resistor R73, the output terminal of the voltage follower U12 is respectively connected to the resistor R79 and the inverting input terminal of the voltage follower U12, the other end of the resistor R79 forms the signal ADC_HPWP, and this end of the resistor R79 is grounded through the capacitor C63.
5. The voltage and current dual detection circuit as claimed in claim 2, characterized in that: It also includes a reference voltage module, which is adaptively connected to the chip U11 and is used to provide a reference voltage for the chip U11.
6. The voltage and current dual detection circuit as claimed in claim 5, characterized in that: The reference voltage module includes a chip U13, an IN pin of the chip U13 is connected to a second power supply, the IN pin of the chip U13 is respectively connected to one end of a capacitor C65 and a capacitor C66, and the other end of the capacitor C65 and the capacitor C66 is grounded; the OUT pin of the chip U13 is respectively connected to one end of a capacitor C67 and a capacitor C68, and the other end of the capacitor C67 and the capacitor C68 is grounded, the OUT pin of the chip U13 forms the reference voltage, and the OUT pin of the chip U13 is connected to the REF pin of the chip U11.